1 /*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD$
34 */
35
36 #include <machine/asmacros.h>
37 #include <machine/specialreg.h>
38
39 #include "assym.inc"
40 #include "opt_sched.h"
41
42 /*****************************************************************************/
43 /* Scheduling */
44 /*****************************************************************************/
45
46 .text
47
48 /*
49 * cpu_throw()
50 *
51 * This is the second half of cpu_switch(). It is used when the current
52 * thread is either a dummy or slated to die, and we no longer care
53 * about its state. This is only a slight optimization and is probably
54 * not worth it anymore. Note that we need to clear the pm_active bits so
55 * we do need the old proc if it still exists.
56 * %rdi = oldtd
57 * %rsi = newtd
58 */
59 ENTRY(cpu_throw)
60 movq %rsi,%r12
61 movq %rsi,%rdi
62 call pmap_activate_sw
63 jmp sw1
64 END(cpu_throw)
65
66 /*
67 * cpu_switch(old, new, mtx)
68 *
69 * Save the current thread state, then select the next thread to run
70 * and load its state.
71 * %rdi = oldtd
72 * %rsi = newtd
73 * %rdx = mtx
74 */
75 ENTRY(cpu_switch)
76 /* Switch to new thread. First, save context. */
77 leaq TD_MD_PCB(%rdi),%r8
78
79 movq (%rsp),%rax /* Hardware registers */
80 movq %r15,PCB_R15(%r8)
81 movq %r14,PCB_R14(%r8)
82 movq %r13,PCB_R13(%r8)
83 movq %r12,PCB_R12(%r8)
84 movq %rbp,PCB_RBP(%r8)
85 movq %rsp,PCB_RSP(%r8)
86 movq %rbx,PCB_RBX(%r8)
87 movq %rax,PCB_RIP(%r8)
88
89 testl $PCB_FULL_IRET,PCB_FLAGS(%r8)
90 jnz 2f
91 orl $PCB_FULL_IRET,PCB_FLAGS(%r8)
92 testl $TDP_KTHREAD,TD_PFLAGS(%rdi)
93 jnz 2f
94 testb $CPUID_STDEXT_FSGSBASE,cpu_stdext_feature(%rip)
95 jz 2f
96 movl %fs,%eax
97 cmpl $KUF32SEL,%eax
98 jne 1f
99 rdfsbase %rax
100 movq %rax,PCB_FSBASE(%r8)
101 1: movl %gs,%eax
102 cmpl $KUG32SEL,%eax
103 jne 2f
104 movq %rdx,%r12
105 movl $MSR_KGSBASE,%ecx /* Read user gs base */
106 rdmsr
107 shlq $32,%rdx
108 orq %rdx,%rax
109 movq %rax,PCB_GSBASE(%r8)
110 movq %r12,%rdx
111
112 2:
113 testl $PCB_DBREGS,PCB_FLAGS(%r8)
114 jnz store_dr /* static predict not taken */
115 done_store_dr:
116
117 /* have we used fp, and need a save? */
118 cmpq %rdi,PCPU(FPCURTHREAD)
119 jne ctx_switch_fpusave_done
120 movq PCB_SAVEFPU(%r8),%r9
121 clts
122 cmpl $0,use_xsave(%rip)
123 jne 1f
124 fxsave (%r9)
125 jmp ctx_switch_fpusave_done
126 1: movq %rdx,%rcx
127 movl xsave_mask,%eax
128 movl xsave_mask+4,%edx
129 testl $PCB_32BIT,PCB_FLAGS(%r8)
130 jne ctx_switch_xsave32
131 .globl ctx_switch_xsave
132 ctx_switch_xsave:
133 /* This is patched to xsaveopt if supported, see fpuinit_bsp1() */
134 xsave64 (%r9)
135 ctx_switch_xsave_done:
136 movq %rcx,%rdx
137 ctx_switch_fpusave_done:
138 /* Save is done. Now fire up new thread. Leave old vmspace. */
139 movq %rsi,%r12
140 movq %rdi,%r13
141 movq %rdx,%r15
142 movq %rsi,%rdi
143 callq pmap_activate_sw
144 movq %r15,TD_LOCK(%r13) /* Release the old thread */
145 sw1:
146 leaq TD_MD_PCB(%r12),%r8
147 #if defined(SCHED_ULE) && defined(SMP)
148 movq $blocked_lock, %rdx
149 movq TD_LOCK(%r12),%rcx
150 cmpq %rcx, %rdx
151 je sw1wait
152 sw1cont:
153 #endif
154 /*
155 * At this point, we've switched address spaces and are ready
156 * to load up the rest of the next context.
157 */
158
159 /* Skip loading LDT and user fsbase/gsbase for kthreads */
160 testl $TDP_KTHREAD,TD_PFLAGS(%r12)
161 jnz do_kthread
162
163 /*
164 * Load ldt register
165 */
166 movq TD_PROC(%r12),%rcx
167 cmpq $0, P_MD+MD_LDT(%rcx)
168 jne do_ldt
169 xorl %eax,%eax
170 ld_ldt: lldt %ax
171
172 /* Restore fs base in GDT */
173 movl PCB_FSBASE(%r8),%eax
174 movq PCPU(FS32P),%rdx
175 movw %ax,2(%rdx)
176 shrl $16,%eax
177 movb %al,4(%rdx)
178 shrl $8,%eax
179 movb %al,7(%rdx)
180
181 /* Restore gs base in GDT */
182 movl PCB_GSBASE(%r8),%eax
183 movq PCPU(GS32P),%rdx
184 movw %ax,2(%rdx)
185 shrl $16,%eax
186 movb %al,4(%rdx)
187 shrl $8,%eax
188 movb %al,7(%rdx)
189
190 do_kthread:
191 /* Do we need to reload tss ? */
192 movq PCPU(TSSP),%rax
193 movq PCB_TSSP(%r8),%rdx
194 movq PCPU(PRVSPACE),%r13
195 addq $PC_COMMONTSS,%r13
196 testq %rdx,%rdx
197 cmovzq %r13,%rdx
198 cmpq %rax,%rdx
199 jne do_tss
200 done_tss:
201 movq TD_MD_STACK_BASE(%r12),%r9
202 movq %r9,PCPU(RSP0)
203 movq %r8,PCPU(CURPCB)
204 movq PCPU(PTI_RSP0),%rax
205 cmpq $~0,PCPU(UCR3)
206 cmove %r9,%rax
207 movq %rax,TSS_RSP0(%rdx)
208 movq %r12,PCPU(CURTHREAD) /* into next thread */
209
210 /* Test if debug registers should be restored. */
211 testl $PCB_DBREGS,PCB_FLAGS(%r8)
212 jnz load_dr /* static predict not taken */
213 done_load_dr:
214
215 /* Restore context. */
216 movq PCB_R15(%r8),%r15
217 movq PCB_R14(%r8),%r14
218 movq PCB_R13(%r8),%r13
219 movq PCB_R12(%r8),%r12
220 movq PCB_RBP(%r8),%rbp
221 movq PCB_RSP(%r8),%rsp
222 movq PCB_RBX(%r8),%rbx
223 movq PCB_RIP(%r8),%rax
224 movq %rax,(%rsp)
225 movq PCPU(CURTHREAD),%rdi
226 call fpu_activate_sw
227 cmpb $0,cpu_flush_rsb_ctxsw(%rip)
228 jne rsb_flush
229 ret
230
231 /*
232 * We order these strangely for several reasons.
233 * 1: I wanted to use static branch prediction hints
234 * 2: Most athlon64/opteron cpus don't have them. They define
235 * a forward branch as 'predict not taken'. Intel cores have
236 * the 'rep' prefix to invert this.
237 * So, to make it work on both forms of cpu we do the detour.
238 * We use jumps rather than call in order to avoid the stack.
239 */
240
241 store_dr:
242 movq %dr7,%rax /* yes, do the save */
243 movq %dr0,%r15
244 movq %dr1,%r14
245 movq %dr2,%r13
246 movq %dr3,%r12
247 movq %dr6,%r11
248 movq %r15,PCB_DR0(%r8)
249 movq %r14,PCB_DR1(%r8)
250 movq %r13,PCB_DR2(%r8)
251 movq %r12,PCB_DR3(%r8)
252 movq %r11,PCB_DR6(%r8)
253 movq %rax,PCB_DR7(%r8)
254 andq $0x0000fc00, %rax /* disable all watchpoints */
255 movq %rax,%dr7
256 jmp done_store_dr
257
258 load_dr:
259 movq %dr7,%rax
260 movq PCB_DR0(%r8),%r15
261 movq PCB_DR1(%r8),%r14
262 movq PCB_DR2(%r8),%r13
263 movq PCB_DR3(%r8),%r12
264 movq PCB_DR6(%r8),%r11
265 movq PCB_DR7(%r8),%rcx
266 movq %r15,%dr0
267 movq %r14,%dr1
268 /* Preserve reserved bits in %dr7 */
269 andq $0x0000fc00,%rax
270 andq $~0x0000fc00,%rcx
271 movq %r13,%dr2
272 movq %r12,%dr3
273 orq %rcx,%rax
274 movq %r11,%dr6
275 movq %rax,%dr7
276 jmp done_load_dr
277
278 do_tss: movq %rdx,PCPU(TSSP)
279 movq %rdx,%rcx
280 movq PCPU(TSS),%rax
281 movw %cx,2(%rax)
282 shrq $16,%rcx
283 movb %cl,4(%rax)
284 shrq $8,%rcx
285 movb %cl,7(%rax)
286 shrq $8,%rcx
287 movl %ecx,8(%rax)
288 movb $0x89,5(%rax) /* unset busy */
289 movl $TSSSEL,%eax
290 ltr %ax
291 jmp done_tss
292
293 do_ldt: movq PCPU(LDT),%rax
294 movq P_MD+MD_LDT_SD(%rcx),%rdx
295 movq %rdx,(%rax)
296 movq P_MD+MD_LDT_SD+8(%rcx),%rdx
297 movq %rdx,8(%rax)
298 movl $LDTSEL,%eax
299 jmp ld_ldt
300
301 .globl ctx_switch_xsave32
302 ctx_switch_xsave32:
303 xsave (%r9)
304 jmp ctx_switch_xsave_done
305 END(cpu_switch)
306
307 /*
308 * savectx(pcb)
309 * Update pcb, saving current processor state.
310 */
311 ENTRY(savectx)
312 /* Save caller's return address. */
313 movq (%rsp),%rax
314 movq %rax,PCB_RIP(%rdi)
315
316 movq %rbx,PCB_RBX(%rdi)
317 movq %rsp,PCB_RSP(%rdi)
318 movq %rbp,PCB_RBP(%rdi)
319 movq %r12,PCB_R12(%rdi)
320 movq %r13,PCB_R13(%rdi)
321 movq %r14,PCB_R14(%rdi)
322 movq %r15,PCB_R15(%rdi)
323
324 movq %cr0,%rax
325 movq %rax,PCB_CR0(%rdi)
326 movq %cr2,%rax
327 movq %rax,PCB_CR2(%rdi)
328 movq %cr3,%rax
329 movq %rax,PCB_CR3(%rdi)
330 movq %cr4,%rax
331 movq %rax,PCB_CR4(%rdi)
332
333 movq %dr0,%rax
334 movq %rax,PCB_DR0(%rdi)
335 movq %dr1,%rax
336 movq %rax,PCB_DR1(%rdi)
337 movq %dr2,%rax
338 movq %rax,PCB_DR2(%rdi)
339 movq %dr3,%rax
340 movq %rax,PCB_DR3(%rdi)
341 movq %dr6,%rax
342 movq %rax,PCB_DR6(%rdi)
343 movq %dr7,%rax
344 movq %rax,PCB_DR7(%rdi)
345
346 movl $MSR_FSBASE,%ecx
347 rdmsr
348 movl %eax,PCB_FSBASE(%rdi)
349 movl %edx,PCB_FSBASE+4(%rdi)
350 movl $MSR_GSBASE,%ecx
351 rdmsr
352 movl %eax,PCB_GSBASE(%rdi)
353 movl %edx,PCB_GSBASE+4(%rdi)
354 movl $MSR_KGSBASE,%ecx
355 rdmsr
356 movl %eax,PCB_KGSBASE(%rdi)
357 movl %edx,PCB_KGSBASE+4(%rdi)
358 movl $MSR_EFER,%ecx
359 rdmsr
360 movl %eax,PCB_EFER(%rdi)
361 movl %edx,PCB_EFER+4(%rdi)
362 movl $MSR_STAR,%ecx
363 rdmsr
364 movl %eax,PCB_STAR(%rdi)
365 movl %edx,PCB_STAR+4(%rdi)
366 movl $MSR_LSTAR,%ecx
367 rdmsr
368 movl %eax,PCB_LSTAR(%rdi)
369 movl %edx,PCB_LSTAR+4(%rdi)
370 movl $MSR_CSTAR,%ecx
371 rdmsr
372 movl %eax,PCB_CSTAR(%rdi)
373 movl %edx,PCB_CSTAR+4(%rdi)
374 movl $MSR_SF_MASK,%ecx
375 rdmsr
376 movl %eax,PCB_SFMASK(%rdi)
377 movl %edx,PCB_SFMASK+4(%rdi)
378
379 sgdt PCB_GDT(%rdi)
380 sidt PCB_IDT(%rdi)
381 sldt PCB_LDT(%rdi)
382 str PCB_TR(%rdi)
383
384 movl $1,%eax
385 ret
386 END(savectx)
387
388 /*
389 * resumectx(pcb)
390 * Resuming processor state from pcb.
391 */
392 ENTRY(resumectx)
393 /* Switch to KPML5/4phys. */
394 movq KPML4phys,%rax
395 movq KPML5phys,%rcx
396 cmpl $0, la57
397 cmovne %rcx, %rax
398 movq %rax,%cr3
399
400 /* Force kernel segment registers. */
401 movl $KDSEL,%eax
402 movw %ax,%ds
403 movw %ax,%es
404 movw %ax,%ss
405 movl $KUF32SEL,%eax
406 movw %ax,%fs
407 movl $KUG32SEL,%eax
408 movw %ax,%gs
409
410 movl $MSR_FSBASE,%ecx
411 movl PCB_FSBASE(%rdi),%eax
412 movl 4 + PCB_FSBASE(%rdi),%edx
413 wrmsr
414 movl $MSR_GSBASE,%ecx
415 movl PCB_GSBASE(%rdi),%eax
416 movl 4 + PCB_GSBASE(%rdi),%edx
417 wrmsr
418 movl $MSR_KGSBASE,%ecx
419 movl PCB_KGSBASE(%rdi),%eax
420 movl 4 + PCB_KGSBASE(%rdi),%edx
421 wrmsr
422
423 /* Restore EFER one more time. */
424 movl $MSR_EFER,%ecx
425 movl PCB_EFER(%rdi),%eax
426 wrmsr
427
428 /* Restore fast syscall stuff. */
429 movl $MSR_STAR,%ecx
430 movl PCB_STAR(%rdi),%eax
431 movl 4 + PCB_STAR(%rdi),%edx
432 wrmsr
433 movl $MSR_LSTAR,%ecx
434 movl PCB_LSTAR(%rdi),%eax
435 movl 4 + PCB_LSTAR(%rdi),%edx
436 wrmsr
437 movl $MSR_CSTAR,%ecx
438 movl PCB_CSTAR(%rdi),%eax
439 movl 4 + PCB_CSTAR(%rdi),%edx
440 wrmsr
441 movl $MSR_SF_MASK,%ecx
442 movl PCB_SFMASK(%rdi),%eax
443 wrmsr
444
445 /* Restore CR0, CR2, CR4 and CR3. */
446 movq PCB_CR0(%rdi),%rax
447 movq %rax,%cr0
448 movq PCB_CR2(%rdi),%rax
449 movq %rax,%cr2
450 movq PCB_CR4(%rdi),%rax
451 movq %rax,%cr4
452 movq PCB_CR3(%rdi),%rax
453 movq %rax,%cr3
454
455 /* Restore descriptor tables. */
456 lidt PCB_IDT(%rdi)
457 lldt PCB_LDT(%rdi)
458
459 #define SDT_SYSTSS 9
460 #define SDT_SYSBSY 11
461
462 /* Clear "task busy" bit and reload TR. */
463 movq PCPU(TSS),%rax
464 andb $(~SDT_SYSBSY | SDT_SYSTSS),5(%rax)
465 movw PCB_TR(%rdi),%ax
466 ltr %ax
467
468 #undef SDT_SYSTSS
469 #undef SDT_SYSBSY
470
471 /* Restore debug registers. */
472 movq PCB_DR0(%rdi),%rax
473 movq %rax,%dr0
474 movq PCB_DR1(%rdi),%rax
475 movq %rax,%dr1
476 movq PCB_DR2(%rdi),%rax
477 movq %rax,%dr2
478 movq PCB_DR3(%rdi),%rax
479 movq %rax,%dr3
480 movq PCB_DR6(%rdi),%rax
481 movq %rax,%dr6
482 movq PCB_DR7(%rdi),%rax
483 movq %rax,%dr7
484
485 /* Restore other callee saved registers. */
486 movq PCB_R15(%rdi),%r15
487 movq PCB_R14(%rdi),%r14
488 movq PCB_R13(%rdi),%r13
489 movq PCB_R12(%rdi),%r12
490 movq PCB_RBP(%rdi),%rbp
491 movq PCB_RSP(%rdi),%rsp
492 movq PCB_RBX(%rdi),%rbx
493
494 /* Restore return address. */
495 movq PCB_RIP(%rdi),%rax
496 movq %rax,(%rsp)
497
498 xorl %eax,%eax
499 ret
500 END(resumectx)
501
502 /* Wait for the new thread to become unblocked */
503 #if defined(SCHED_ULE) && defined(SMP)
504 sw1wait:
505 1:
506 pause
507 movq TD_LOCK(%r12),%rcx
508 cmpq %rcx, %rdx
509 je 1b
510 jmp sw1cont
511 #endif
Cache object: f73d2684397bdc80077d14062483506d
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