1 /*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD: releng/12.0/sys/amd64/amd64/cpu_switch.S 335072 2018-06-13 17:55:09Z kib $
34 */
35
36 #include <machine/asmacros.h>
37 #include <machine/specialreg.h>
38
39 #include "assym.inc"
40 #include "opt_sched.h"
41
42 /*****************************************************************************/
43 /* Scheduling */
44 /*****************************************************************************/
45
46 .text
47
48 #ifdef SMP
49 #define LK lock ;
50 #else
51 #define LK
52 #endif
53
54 #if defined(SCHED_ULE) && defined(SMP)
55 #define SETLK xchgq
56 #else
57 #define SETLK movq
58 #endif
59
60 /*
61 * cpu_throw()
62 *
63 * This is the second half of cpu_switch(). It is used when the current
64 * thread is either a dummy or slated to die, and we no longer care
65 * about its state. This is only a slight optimization and is probably
66 * not worth it anymore. Note that we need to clear the pm_active bits so
67 * we do need the old proc if it still exists.
68 * %rdi = oldtd
69 * %rsi = newtd
70 */
71 ENTRY(cpu_throw)
72 movq %rsi,%r12
73 movq %rsi,%rdi
74 call pmap_activate_sw
75 jmp sw1
76 END(cpu_throw)
77
78 /*
79 * cpu_switch(old, new, mtx)
80 *
81 * Save the current thread state, then select the next thread to run
82 * and load its state.
83 * %rdi = oldtd
84 * %rsi = newtd
85 * %rdx = mtx
86 */
87 ENTRY(cpu_switch)
88 /* Switch to new thread. First, save context. */
89 movq TD_PCB(%rdi),%r8
90
91 movq (%rsp),%rax /* Hardware registers */
92 movq %r15,PCB_R15(%r8)
93 movq %r14,PCB_R14(%r8)
94 movq %r13,PCB_R13(%r8)
95 movq %r12,PCB_R12(%r8)
96 movq %rbp,PCB_RBP(%r8)
97 movq %rsp,PCB_RSP(%r8)
98 movq %rbx,PCB_RBX(%r8)
99 movq %rax,PCB_RIP(%r8)
100
101 testl $PCB_FULL_IRET,PCB_FLAGS(%r8)
102 jnz 2f
103 orl $PCB_FULL_IRET,PCB_FLAGS(%r8)
104 testl $TDP_KTHREAD,TD_PFLAGS(%rdi)
105 jnz 2f
106 testb $CPUID_STDEXT_FSGSBASE,cpu_stdext_feature(%rip)
107 jz 2f
108 movl %fs,%eax
109 cmpl $KUF32SEL,%eax
110 jne 1f
111 rdfsbase %rax
112 movq %rax,PCB_FSBASE(%r8)
113 1: movl %gs,%eax
114 cmpl $KUG32SEL,%eax
115 jne 2f
116 movq %rdx,%r12
117 movl $MSR_KGSBASE,%ecx /* Read user gs base */
118 rdmsr
119 shlq $32,%rdx
120 orq %rdx,%rax
121 movq %rax,PCB_GSBASE(%r8)
122 movq %r12,%rdx
123
124 2:
125 testl $PCB_DBREGS,PCB_FLAGS(%r8)
126 jnz store_dr /* static predict not taken */
127 done_store_dr:
128
129 /* have we used fp, and need a save? */
130 cmpq %rdi,PCPU(FPCURTHREAD)
131 jne 2f
132 movq PCB_SAVEFPU(%r8),%r8
133 clts
134 cmpl $0,use_xsave(%rip)
135 jne 1f
136 fxsave (%r8)
137 jmp 2f
138 1: movq %rdx,%rcx
139 movl xsave_mask,%eax
140 movl xsave_mask+4,%edx
141 .globl ctx_switch_xsave
142 ctx_switch_xsave:
143 /* This is patched to xsaveopt if supported, see fpuinit_bsp1() */
144 xsave (%r8)
145 movq %rcx,%rdx
146 2:
147 /* Save is done. Now fire up new thread. Leave old vmspace. */
148 movq %rsi,%r12
149 movq %rdi,%r13
150 movq %rdx,%r15
151 movq %rsi,%rdi
152 callq pmap_activate_sw
153 SETLK %r15,TD_LOCK(%r13) /* Release the old thread */
154 sw1:
155 movq TD_PCB(%r12),%r8
156 #if defined(SCHED_ULE) && defined(SMP)
157 /* Wait for the new thread to become unblocked */
158 movq $blocked_lock, %rdx
159 1:
160 movq TD_LOCK(%r12),%rcx
161 cmpq %rcx, %rdx
162 pause
163 je 1b
164 #endif
165 /*
166 * At this point, we've switched address spaces and are ready
167 * to load up the rest of the next context.
168 */
169
170 /* Skip loading LDT and user fsbase/gsbase for kthreads */
171 testl $TDP_KTHREAD,TD_PFLAGS(%r12)
172 jnz do_kthread
173
174 /*
175 * Load ldt register
176 */
177 movq TD_PROC(%r12),%rcx
178 cmpq $0, P_MD+MD_LDT(%rcx)
179 jne do_ldt
180 xorl %eax,%eax
181 ld_ldt: lldt %ax
182
183 /* Restore fs base in GDT */
184 movl PCB_FSBASE(%r8),%eax
185 movq PCPU(FS32P),%rdx
186 movw %ax,2(%rdx)
187 shrl $16,%eax
188 movb %al,4(%rdx)
189 shrl $8,%eax
190 movb %al,7(%rdx)
191
192 /* Restore gs base in GDT */
193 movl PCB_GSBASE(%r8),%eax
194 movq PCPU(GS32P),%rdx
195 movw %ax,2(%rdx)
196 shrl $16,%eax
197 movb %al,4(%rdx)
198 shrl $8,%eax
199 movb %al,7(%rdx)
200
201 do_kthread:
202 /* Do we need to reload tss ? */
203 movq PCPU(TSSP),%rax
204 movq PCB_TSSP(%r8),%rdx
205 testq %rdx,%rdx
206 cmovzq PCPU(COMMONTSSP),%rdx
207 cmpq %rax,%rdx
208 jne do_tss
209 done_tss:
210 movq %r8,PCPU(RSP0)
211 movq %r8,PCPU(CURPCB)
212 /* Update the TSS_RSP0 pointer for the next interrupt */
213 cmpq $~0,PCPU(UCR3)
214 je 1f
215 movq PCPU(PTI_RSP0),%rax
216 movq %rax,TSS_RSP0(%rdx)
217 jmp 2f
218 1: movq %r8,TSS_RSP0(%rdx)
219 2: movq %r12,PCPU(CURTHREAD) /* into next thread */
220
221 /* Test if debug registers should be restored. */
222 testl $PCB_DBREGS,PCB_FLAGS(%r8)
223 jnz load_dr /* static predict not taken */
224 done_load_dr:
225
226 /* Restore context. */
227 movq PCB_R15(%r8),%r15
228 movq PCB_R14(%r8),%r14
229 movq PCB_R13(%r8),%r13
230 movq PCB_R12(%r8),%r12
231 movq PCB_RBP(%r8),%rbp
232 movq PCB_RSP(%r8),%rsp
233 movq PCB_RBX(%r8),%rbx
234 movq PCB_RIP(%r8),%rax
235 movq %rax,(%rsp)
236 movq PCPU(CURTHREAD),%rdi
237 call fpu_activate_sw
238 ret
239
240 /*
241 * We order these strangely for several reasons.
242 * 1: I wanted to use static branch prediction hints
243 * 2: Most athlon64/opteron cpus don't have them. They define
244 * a forward branch as 'predict not taken'. Intel cores have
245 * the 'rep' prefix to invert this.
246 * So, to make it work on both forms of cpu we do the detour.
247 * We use jumps rather than call in order to avoid the stack.
248 */
249
250 store_dr:
251 movq %dr7,%rax /* yes, do the save */
252 movq %dr0,%r15
253 movq %dr1,%r14
254 movq %dr2,%r13
255 movq %dr3,%r12
256 movq %dr6,%r11
257 movq %r15,PCB_DR0(%r8)
258 movq %r14,PCB_DR1(%r8)
259 movq %r13,PCB_DR2(%r8)
260 movq %r12,PCB_DR3(%r8)
261 movq %r11,PCB_DR6(%r8)
262 movq %rax,PCB_DR7(%r8)
263 andq $0x0000fc00, %rax /* disable all watchpoints */
264 movq %rax,%dr7
265 jmp done_store_dr
266
267 load_dr:
268 movq %dr7,%rax
269 movq PCB_DR0(%r8),%r15
270 movq PCB_DR1(%r8),%r14
271 movq PCB_DR2(%r8),%r13
272 movq PCB_DR3(%r8),%r12
273 movq PCB_DR6(%r8),%r11
274 movq PCB_DR7(%r8),%rcx
275 movq %r15,%dr0
276 movq %r14,%dr1
277 /* Preserve reserved bits in %dr7 */
278 andq $0x0000fc00,%rax
279 andq $~0x0000fc00,%rcx
280 movq %r13,%dr2
281 movq %r12,%dr3
282 orq %rcx,%rax
283 movq %r11,%dr6
284 movq %rax,%dr7
285 jmp done_load_dr
286
287 do_tss: movq %rdx,PCPU(TSSP)
288 movq %rdx,%rcx
289 movq PCPU(TSS),%rax
290 movw %cx,2(%rax)
291 shrq $16,%rcx
292 movb %cl,4(%rax)
293 shrq $8,%rcx
294 movb %cl,7(%rax)
295 shrq $8,%rcx
296 movl %ecx,8(%rax)
297 movb $0x89,5(%rax) /* unset busy */
298 movl $TSSSEL,%eax
299 ltr %ax
300 jmp done_tss
301
302 do_ldt: movq PCPU(LDT),%rax
303 movq P_MD+MD_LDT_SD(%rcx),%rdx
304 movq %rdx,(%rax)
305 movq P_MD+MD_LDT_SD+8(%rcx),%rdx
306 movq %rdx,8(%rax)
307 movl $LDTSEL,%eax
308 jmp ld_ldt
309 END(cpu_switch)
310
311 /*
312 * savectx(pcb)
313 * Update pcb, saving current processor state.
314 */
315 ENTRY(savectx)
316 /* Save caller's return address. */
317 movq (%rsp),%rax
318 movq %rax,PCB_RIP(%rdi)
319
320 movq %rbx,PCB_RBX(%rdi)
321 movq %rsp,PCB_RSP(%rdi)
322 movq %rbp,PCB_RBP(%rdi)
323 movq %r12,PCB_R12(%rdi)
324 movq %r13,PCB_R13(%rdi)
325 movq %r14,PCB_R14(%rdi)
326 movq %r15,PCB_R15(%rdi)
327
328 movq %cr0,%rax
329 movq %rax,PCB_CR0(%rdi)
330 movq %cr2,%rax
331 movq %rax,PCB_CR2(%rdi)
332 movq %cr3,%rax
333 movq %rax,PCB_CR3(%rdi)
334 movq %cr4,%rax
335 movq %rax,PCB_CR4(%rdi)
336
337 movq %dr0,%rax
338 movq %rax,PCB_DR0(%rdi)
339 movq %dr1,%rax
340 movq %rax,PCB_DR1(%rdi)
341 movq %dr2,%rax
342 movq %rax,PCB_DR2(%rdi)
343 movq %dr3,%rax
344 movq %rax,PCB_DR3(%rdi)
345 movq %dr6,%rax
346 movq %rax,PCB_DR6(%rdi)
347 movq %dr7,%rax
348 movq %rax,PCB_DR7(%rdi)
349
350 movl $MSR_FSBASE,%ecx
351 rdmsr
352 movl %eax,PCB_FSBASE(%rdi)
353 movl %edx,PCB_FSBASE+4(%rdi)
354 movl $MSR_GSBASE,%ecx
355 rdmsr
356 movl %eax,PCB_GSBASE(%rdi)
357 movl %edx,PCB_GSBASE+4(%rdi)
358 movl $MSR_KGSBASE,%ecx
359 rdmsr
360 movl %eax,PCB_KGSBASE(%rdi)
361 movl %edx,PCB_KGSBASE+4(%rdi)
362 movl $MSR_EFER,%ecx
363 rdmsr
364 movl %eax,PCB_EFER(%rdi)
365 movl %edx,PCB_EFER+4(%rdi)
366 movl $MSR_STAR,%ecx
367 rdmsr
368 movl %eax,PCB_STAR(%rdi)
369 movl %edx,PCB_STAR+4(%rdi)
370 movl $MSR_LSTAR,%ecx
371 rdmsr
372 movl %eax,PCB_LSTAR(%rdi)
373 movl %edx,PCB_LSTAR+4(%rdi)
374 movl $MSR_CSTAR,%ecx
375 rdmsr
376 movl %eax,PCB_CSTAR(%rdi)
377 movl %edx,PCB_CSTAR+4(%rdi)
378 movl $MSR_SF_MASK,%ecx
379 rdmsr
380 movl %eax,PCB_SFMASK(%rdi)
381 movl %edx,PCB_SFMASK+4(%rdi)
382
383 sgdt PCB_GDT(%rdi)
384 sidt PCB_IDT(%rdi)
385 sldt PCB_LDT(%rdi)
386 str PCB_TR(%rdi)
387
388 movl $1,%eax
389 ret
390 END(savectx)
391
392 /*
393 * resumectx(pcb)
394 * Resuming processor state from pcb.
395 */
396 ENTRY(resumectx)
397 /* Switch to KPML4phys. */
398 movq KPML4phys,%rax
399 movq %rax,%cr3
400
401 /* Force kernel segment registers. */
402 movl $KDSEL,%eax
403 movw %ax,%ds
404 movw %ax,%es
405 movw %ax,%ss
406 movl $KUF32SEL,%eax
407 movw %ax,%fs
408 movl $KUG32SEL,%eax
409 movw %ax,%gs
410
411 movl $MSR_FSBASE,%ecx
412 movl PCB_FSBASE(%rdi),%eax
413 movl 4 + PCB_FSBASE(%rdi),%edx
414 wrmsr
415 movl $MSR_GSBASE,%ecx
416 movl PCB_GSBASE(%rdi),%eax
417 movl 4 + PCB_GSBASE(%rdi),%edx
418 wrmsr
419 movl $MSR_KGSBASE,%ecx
420 movl PCB_KGSBASE(%rdi),%eax
421 movl 4 + PCB_KGSBASE(%rdi),%edx
422 wrmsr
423
424 /* Restore EFER one more time. */
425 movl $MSR_EFER,%ecx
426 movl PCB_EFER(%rdi),%eax
427 wrmsr
428
429 /* Restore fast syscall stuff. */
430 movl $MSR_STAR,%ecx
431 movl PCB_STAR(%rdi),%eax
432 movl 4 + PCB_STAR(%rdi),%edx
433 wrmsr
434 movl $MSR_LSTAR,%ecx
435 movl PCB_LSTAR(%rdi),%eax
436 movl 4 + PCB_LSTAR(%rdi),%edx
437 wrmsr
438 movl $MSR_CSTAR,%ecx
439 movl PCB_CSTAR(%rdi),%eax
440 movl 4 + PCB_CSTAR(%rdi),%edx
441 wrmsr
442 movl $MSR_SF_MASK,%ecx
443 movl PCB_SFMASK(%rdi),%eax
444 wrmsr
445
446 /* Restore CR0, CR2, CR4 and CR3. */
447 movq PCB_CR0(%rdi),%rax
448 movq %rax,%cr0
449 movq PCB_CR2(%rdi),%rax
450 movq %rax,%cr2
451 movq PCB_CR4(%rdi),%rax
452 movq %rax,%cr4
453 movq PCB_CR3(%rdi),%rax
454 movq %rax,%cr3
455
456 /* Restore descriptor tables. */
457 lidt PCB_IDT(%rdi)
458 lldt PCB_LDT(%rdi)
459
460 #define SDT_SYSTSS 9
461 #define SDT_SYSBSY 11
462
463 /* Clear "task busy" bit and reload TR. */
464 movq PCPU(TSS),%rax
465 andb $(~SDT_SYSBSY | SDT_SYSTSS),5(%rax)
466 movw PCB_TR(%rdi),%ax
467 ltr %ax
468
469 #undef SDT_SYSTSS
470 #undef SDT_SYSBSY
471
472 /* Restore debug registers. */
473 movq PCB_DR0(%rdi),%rax
474 movq %rax,%dr0
475 movq PCB_DR1(%rdi),%rax
476 movq %rax,%dr1
477 movq PCB_DR2(%rdi),%rax
478 movq %rax,%dr2
479 movq PCB_DR3(%rdi),%rax
480 movq %rax,%dr3
481 movq PCB_DR6(%rdi),%rax
482 movq %rax,%dr6
483 movq PCB_DR7(%rdi),%rax
484 movq %rax,%dr7
485
486 /* Restore other callee saved registers. */
487 movq PCB_R15(%rdi),%r15
488 movq PCB_R14(%rdi),%r14
489 movq PCB_R13(%rdi),%r13
490 movq PCB_R12(%rdi),%r12
491 movq PCB_RBP(%rdi),%rbp
492 movq PCB_RSP(%rdi),%rsp
493 movq PCB_RBX(%rdi),%rbx
494
495 /* Restore return address. */
496 movq PCB_RIP(%rdi),%rax
497 movq %rax,(%rsp)
498
499 xorl %eax,%eax
500 ret
501 END(resumectx)
Cache object: 461fa59cfc3ee74dc17b1b04662a0fde
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