Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/amd64/amd64/cpu_switch.S
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1 /*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD$ 34 */ 35 36 #include <machine/asmacros.h> 37 #include <machine/specialreg.h> 38 39 #include "assym.inc" 40 #include "opt_sched.h" 41 42 /*****************************************************************************/ 43 /* Scheduling */ 44 /*****************************************************************************/ 45 46 .text 47 48 #ifdef SMP 49 #define LK lock ; 50 #else 51 #define LK 52 #endif 53 54 #if defined(SCHED_ULE) && defined(SMP) 55 #define SETLK xchgq 56 #else 57 #define SETLK movq 58 #endif 59 60 /* 61 * cpu_throw() 62 * 63 * This is the second half of cpu_switch(). It is used when the current 64 * thread is either a dummy or slated to die, and we no longer care 65 * about its state. This is only a slight optimization and is probably 66 * not worth it anymore. Note that we need to clear the pm_active bits so 67 * we do need the old proc if it still exists. 68 * %rdi = oldtd 69 * %rsi = newtd 70 */ 71 ENTRY(cpu_throw) 72 movq %rsi,%r12 73 movq %rsi,%rdi 74 call pmap_activate_sw 75 jmp sw1 76 END(cpu_throw) 77 78 /* 79 * cpu_switch(old, new, mtx) 80 * 81 * Save the current thread state, then select the next thread to run 82 * and load its state. 83 * %rdi = oldtd 84 * %rsi = newtd 85 * %rdx = mtx 86 */ 87 ENTRY(cpu_switch) 88 /* Switch to new thread. First, save context. */ 89 leaq TD_MD_PCB(%rdi),%r8 90 91 movq (%rsp),%rax /* Hardware registers */ 92 movq %r15,PCB_R15(%r8) 93 movq %r14,PCB_R14(%r8) 94 movq %r13,PCB_R13(%r8) 95 movq %r12,PCB_R12(%r8) 96 movq %rbp,PCB_RBP(%r8) 97 movq %rsp,PCB_RSP(%r8) 98 movq %rbx,PCB_RBX(%r8) 99 movq %rax,PCB_RIP(%r8) 100 101 testl $PCB_FULL_IRET,PCB_FLAGS(%r8) 102 jnz 2f 103 orl $PCB_FULL_IRET,PCB_FLAGS(%r8) 104 testl $TDP_KTHREAD,TD_PFLAGS(%rdi) 105 jnz 2f 106 testb $CPUID_STDEXT_FSGSBASE,cpu_stdext_feature(%rip) 107 jz 2f 108 movl %fs,%eax 109 cmpl $KUF32SEL,%eax 110 jne 1f 111 rdfsbase %rax 112 movq %rax,PCB_FSBASE(%r8) 113 1: movl %gs,%eax 114 cmpl $KUG32SEL,%eax 115 jne 2f 116 movq %rdx,%r12 117 movl $MSR_KGSBASE,%ecx /* Read user gs base */ 118 rdmsr 119 shlq $32,%rdx 120 orq %rdx,%rax 121 movq %rax,PCB_GSBASE(%r8) 122 movq %r12,%rdx 123 124 2: 125 testl $PCB_DBREGS,PCB_FLAGS(%r8) 126 jnz store_dr /* static predict not taken */ 127 done_store_dr: 128 129 /* have we used fp, and need a save? */ 130 cmpq %rdi,PCPU(FPCURTHREAD) 131 jne ctx_switch_fpusave_done 132 movq PCB_SAVEFPU(%r8),%r9 133 clts 134 cmpl $0,use_xsave(%rip) 135 jne 1f 136 fxsave (%r9) 137 jmp ctx_switch_fpusave_done 138 1: movq %rdx,%rcx 139 movl xsave_mask,%eax 140 movl xsave_mask+4,%edx 141 testl $PCB_32BIT,PCB_FLAGS(%r8) 142 jne ctx_switch_xsave32 143 .globl ctx_switch_xsave 144 ctx_switch_xsave: 145 /* This is patched to xsaveopt if supported, see fpuinit_bsp1() */ 146 xsave64 (%r9) 147 ctx_switch_xsave_done: 148 movq %rcx,%rdx 149 ctx_switch_fpusave_done: 150 /* Save is done. Now fire up new thread. Leave old vmspace. */ 151 movq %rsi,%r12 152 movq %rdi,%r13 153 movq %rdx,%r15 154 movq %rsi,%rdi 155 callq pmap_activate_sw 156 SETLK %r15,TD_LOCK(%r13) /* Release the old thread */ 157 sw1: 158 leaq TD_MD_PCB(%r12),%r8 159 #if defined(SCHED_ULE) && defined(SMP) 160 /* Wait for the new thread to become unblocked */ 161 movq $blocked_lock, %rdx 162 1: 163 movq TD_LOCK(%r12),%rcx 164 cmpq %rcx, %rdx 165 pause 166 je 1b 167 #endif 168 /* 169 * At this point, we've switched address spaces and are ready 170 * to load up the rest of the next context. 171 */ 172 173 /* Skip loading LDT and user fsbase/gsbase for kthreads */ 174 testl $TDP_KTHREAD,TD_PFLAGS(%r12) 175 jnz do_kthread 176 177 /* 178 * Load ldt register 179 */ 180 movq TD_PROC(%r12),%rcx 181 cmpq $0, P_MD+MD_LDT(%rcx) 182 jne do_ldt 183 xorl %eax,%eax 184 ld_ldt: lldt %ax 185 186 /* Restore fs base in GDT */ 187 movl PCB_FSBASE(%r8),%eax 188 movq PCPU(FS32P),%rdx 189 movw %ax,2(%rdx) 190 shrl $16,%eax 191 movb %al,4(%rdx) 192 shrl $8,%eax 193 movb %al,7(%rdx) 194 195 /* Restore gs base in GDT */ 196 movl PCB_GSBASE(%r8),%eax 197 movq PCPU(GS32P),%rdx 198 movw %ax,2(%rdx) 199 shrl $16,%eax 200 movb %al,4(%rdx) 201 shrl $8,%eax 202 movb %al,7(%rdx) 203 204 do_kthread: 205 /* Do we need to reload tss ? */ 206 movq PCPU(TSSP),%rax 207 movq PCB_TSSP(%r8),%rdx 208 testq %rdx,%rdx 209 cmovzq PCPU(COMMONTSSP),%rdx 210 cmpq %rax,%rdx 211 jne do_tss 212 done_tss: 213 movq TD_MD_STACK_BASE(%r12),%r9 214 movq %r9,PCPU(RSP0) 215 movq %r8,PCPU(CURPCB) 216 movq PCPU(PTI_RSP0),%rax 217 cmpq $~0,PCPU(UCR3) 218 cmove %r9,%rax 219 movq %rax,TSS_RSP0(%rdx) 220 movq %r12,PCPU(CURTHREAD) /* into next thread */ 221 222 /* Test if debug registers should be restored. */ 223 testl $PCB_DBREGS,PCB_FLAGS(%r8) 224 jnz load_dr /* static predict not taken */ 225 done_load_dr: 226 227 /* Restore context. */ 228 movq PCB_R15(%r8),%r15 229 movq PCB_R14(%r8),%r14 230 movq PCB_R13(%r8),%r13 231 movq PCB_R12(%r8),%r12 232 movq PCB_RBP(%r8),%rbp 233 movq PCB_RSP(%r8),%rsp 234 movq PCB_RBX(%r8),%rbx 235 movq PCB_RIP(%r8),%rax 236 movq %rax,(%rsp) 237 movq PCPU(CURTHREAD),%rdi 238 call fpu_activate_sw 239 cmpb $0,cpu_flush_rsb_ctxsw(%rip) 240 jne rsb_flush 241 ret 242 243 /* 244 * We order these strangely for several reasons. 245 * 1: I wanted to use static branch prediction hints 246 * 2: Most athlon64/opteron cpus don't have them. They define 247 * a forward branch as 'predict not taken'. Intel cores have 248 * the 'rep' prefix to invert this. 249 * So, to make it work on both forms of cpu we do the detour. 250 * We use jumps rather than call in order to avoid the stack. 251 */ 252 253 store_dr: 254 movq %dr7,%rax /* yes, do the save */ 255 movq %dr0,%r15 256 movq %dr1,%r14 257 movq %dr2,%r13 258 movq %dr3,%r12 259 movq %dr6,%r11 260 movq %r15,PCB_DR0(%r8) 261 movq %r14,PCB_DR1(%r8) 262 movq %r13,PCB_DR2(%r8) 263 movq %r12,PCB_DR3(%r8) 264 movq %r11,PCB_DR6(%r8) 265 movq %rax,PCB_DR7(%r8) 266 andq $0x0000fc00, %rax /* disable all watchpoints */ 267 movq %rax,%dr7 268 jmp done_store_dr 269 270 load_dr: 271 movq %dr7,%rax 272 movq PCB_DR0(%r8),%r15 273 movq PCB_DR1(%r8),%r14 274 movq PCB_DR2(%r8),%r13 275 movq PCB_DR3(%r8),%r12 276 movq PCB_DR6(%r8),%r11 277 movq PCB_DR7(%r8),%rcx 278 movq %r15,%dr0 279 movq %r14,%dr1 280 /* Preserve reserved bits in %dr7 */ 281 andq $0x0000fc00,%rax 282 andq $~0x0000fc00,%rcx 283 movq %r13,%dr2 284 movq %r12,%dr3 285 orq %rcx,%rax 286 movq %r11,%dr6 287 movq %rax,%dr7 288 jmp done_load_dr 289 290 do_tss: movq %rdx,PCPU(TSSP) 291 movq %rdx,%rcx 292 movq PCPU(TSS),%rax 293 movw %cx,2(%rax) 294 shrq $16,%rcx 295 movb %cl,4(%rax) 296 shrq $8,%rcx 297 movb %cl,7(%rax) 298 shrq $8,%rcx 299 movl %ecx,8(%rax) 300 movb $0x89,5(%rax) /* unset busy */ 301 movl $TSSSEL,%eax 302 ltr %ax 303 jmp done_tss 304 305 do_ldt: movq PCPU(LDT),%rax 306 movq P_MD+MD_LDT_SD(%rcx),%rdx 307 movq %rdx,(%rax) 308 movq P_MD+MD_LDT_SD+8(%rcx),%rdx 309 movq %rdx,8(%rax) 310 movl $LDTSEL,%eax 311 jmp ld_ldt 312 313 .globl ctx_switch_xsave32 314 ctx_switch_xsave32: 315 xsave (%r9) 316 jmp ctx_switch_xsave_done 317 END(cpu_switch) 318 319 /* 320 * savectx(pcb) 321 * Update pcb, saving current processor state. 322 */ 323 ENTRY(savectx) 324 /* Save caller's return address. */ 325 movq (%rsp),%rax 326 movq %rax,PCB_RIP(%rdi) 327 328 movq %rbx,PCB_RBX(%rdi) 329 movq %rsp,PCB_RSP(%rdi) 330 movq %rbp,PCB_RBP(%rdi) 331 movq %r12,PCB_R12(%rdi) 332 movq %r13,PCB_R13(%rdi) 333 movq %r14,PCB_R14(%rdi) 334 movq %r15,PCB_R15(%rdi) 335 336 movq %cr0,%rax 337 movq %rax,PCB_CR0(%rdi) 338 movq %cr2,%rax 339 movq %rax,PCB_CR2(%rdi) 340 movq %cr3,%rax 341 movq %rax,PCB_CR3(%rdi) 342 movq %cr4,%rax 343 movq %rax,PCB_CR4(%rdi) 344 345 movq %dr0,%rax 346 movq %rax,PCB_DR0(%rdi) 347 movq %dr1,%rax 348 movq %rax,PCB_DR1(%rdi) 349 movq %dr2,%rax 350 movq %rax,PCB_DR2(%rdi) 351 movq %dr3,%rax 352 movq %rax,PCB_DR3(%rdi) 353 movq %dr6,%rax 354 movq %rax,PCB_DR6(%rdi) 355 movq %dr7,%rax 356 movq %rax,PCB_DR7(%rdi) 357 358 movl $MSR_FSBASE,%ecx 359 rdmsr 360 movl %eax,PCB_FSBASE(%rdi) 361 movl %edx,PCB_FSBASE+4(%rdi) 362 movl $MSR_GSBASE,%ecx 363 rdmsr 364 movl %eax,PCB_GSBASE(%rdi) 365 movl %edx,PCB_GSBASE+4(%rdi) 366 movl $MSR_KGSBASE,%ecx 367 rdmsr 368 movl %eax,PCB_KGSBASE(%rdi) 369 movl %edx,PCB_KGSBASE+4(%rdi) 370 movl $MSR_EFER,%ecx 371 rdmsr 372 movl %eax,PCB_EFER(%rdi) 373 movl %edx,PCB_EFER+4(%rdi) 374 movl $MSR_STAR,%ecx 375 rdmsr 376 movl %eax,PCB_STAR(%rdi) 377 movl %edx,PCB_STAR+4(%rdi) 378 movl $MSR_LSTAR,%ecx 379 rdmsr 380 movl %eax,PCB_LSTAR(%rdi) 381 movl %edx,PCB_LSTAR+4(%rdi) 382 movl $MSR_CSTAR,%ecx 383 rdmsr 384 movl %eax,PCB_CSTAR(%rdi) 385 movl %edx,PCB_CSTAR+4(%rdi) 386 movl $MSR_SF_MASK,%ecx 387 rdmsr 388 movl %eax,PCB_SFMASK(%rdi) 389 movl %edx,PCB_SFMASK+4(%rdi) 390 391 sgdt PCB_GDT(%rdi) 392 sidt PCB_IDT(%rdi) 393 sldt PCB_LDT(%rdi) 394 str PCB_TR(%rdi) 395 396 movl $1,%eax 397 ret 398 END(savectx) 399 400 /* 401 * resumectx(pcb) 402 * Resuming processor state from pcb. 403 */ 404 ENTRY(resumectx) 405 /* Switch to KPML4phys. */ 406 movq KPML4phys,%rax 407 movq %rax,%cr3 408 409 /* Force kernel segment registers. */ 410 movl $KDSEL,%eax 411 movw %ax,%ds 412 movw %ax,%es 413 movw %ax,%ss 414 movl $KUF32SEL,%eax 415 movw %ax,%fs 416 movl $KUG32SEL,%eax 417 movw %ax,%gs 418 419 movl $MSR_FSBASE,%ecx 420 movl PCB_FSBASE(%rdi),%eax 421 movl 4 + PCB_FSBASE(%rdi),%edx 422 wrmsr 423 movl $MSR_GSBASE,%ecx 424 movl PCB_GSBASE(%rdi),%eax 425 movl 4 + PCB_GSBASE(%rdi),%edx 426 wrmsr 427 movl $MSR_KGSBASE,%ecx 428 movl PCB_KGSBASE(%rdi),%eax 429 movl 4 + PCB_KGSBASE(%rdi),%edx 430 wrmsr 431 432 /* Restore EFER one more time. */ 433 movl $MSR_EFER,%ecx 434 movl PCB_EFER(%rdi),%eax 435 wrmsr 436 437 /* Restore fast syscall stuff. */ 438 movl $MSR_STAR,%ecx 439 movl PCB_STAR(%rdi),%eax 440 movl 4 + PCB_STAR(%rdi),%edx 441 wrmsr 442 movl $MSR_LSTAR,%ecx 443 movl PCB_LSTAR(%rdi),%eax 444 movl 4 + PCB_LSTAR(%rdi),%edx 445 wrmsr 446 movl $MSR_CSTAR,%ecx 447 movl PCB_CSTAR(%rdi),%eax 448 movl 4 + PCB_CSTAR(%rdi),%edx 449 wrmsr 450 movl $MSR_SF_MASK,%ecx 451 movl PCB_SFMASK(%rdi),%eax 452 wrmsr 453 454 /* Restore CR0, CR2, CR4 and CR3. */ 455 movq PCB_CR0(%rdi),%rax 456 movq %rax,%cr0 457 movq PCB_CR2(%rdi),%rax 458 movq %rax,%cr2 459 movq PCB_CR4(%rdi),%rax 460 movq %rax,%cr4 461 movq PCB_CR3(%rdi),%rax 462 movq %rax,%cr3 463 464 /* Restore descriptor tables. */ 465 lidt PCB_IDT(%rdi) 466 lldt PCB_LDT(%rdi) 467 468 #define SDT_SYSTSS 9 469 #define SDT_SYSBSY 11 470 471 /* Clear "task busy" bit and reload TR. */ 472 movq PCPU(TSS),%rax 473 andb $(~SDT_SYSBSY | SDT_SYSTSS),5(%rax) 474 movw PCB_TR(%rdi),%ax 475 ltr %ax 476 477 #undef SDT_SYSTSS 478 #undef SDT_SYSBSY 479 480 /* Restore debug registers. */ 481 movq PCB_DR0(%rdi),%rax 482 movq %rax,%dr0 483 movq PCB_DR1(%rdi),%rax 484 movq %rax,%dr1 485 movq PCB_DR2(%rdi),%rax 486 movq %rax,%dr2 487 movq PCB_DR3(%rdi),%rax 488 movq %rax,%dr3 489 movq PCB_DR6(%rdi),%rax 490 movq %rax,%dr6 491 movq PCB_DR7(%rdi),%rax 492 movq %rax,%dr7 493 494 /* Restore other callee saved registers. */ 495 movq PCB_R15(%rdi),%r15 496 movq PCB_R14(%rdi),%r14 497 movq PCB_R13(%rdi),%r13 498 movq PCB_R12(%rdi),%r12 499 movq PCB_RBP(%rdi),%rbp 500 movq PCB_RSP(%rdi),%rsp 501 movq PCB_RBX(%rdi),%rbx 502 503 /* Restore return address. */ 504 movq PCB_RIP(%rdi),%rax 505 movq %rax,(%rsp) 506 507 xorl %eax,%eax 508 ret 509 END(resumectx)
Cache object: 3bdf4fc4f15d1587bfaeeba68eaa5a87
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