1 /*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD: releng/8.4/sys/amd64/amd64/cpu_switch.S 237009 2012-06-13 15:25:52Z jhb $
34 */
35
36 #include <machine/asmacros.h>
37 #include <machine/specialreg.h>
38
39 #include "assym.s"
40 #include "opt_sched.h"
41
42 /*****************************************************************************/
43 /* Scheduling */
44 /*****************************************************************************/
45
46 .text
47
48 #ifdef SMP
49 #define LK lock ;
50 #else
51 #define LK
52 #endif
53
54 #if defined(SCHED_ULE) && defined(SMP)
55 #define SETLK xchgq
56 #else
57 #define SETLK movq
58 #endif
59
60 /*
61 * cpu_throw()
62 *
63 * This is the second half of cpu_switch(). It is used when the current
64 * thread is either a dummy or slated to die, and we no longer care
65 * about its state. This is only a slight optimization and is probably
66 * not worth it anymore. Note that we need to clear the pm_active bits so
67 * we do need the old proc if it still exists.
68 * %rdi = oldtd
69 * %rsi = newtd
70 */
71 ENTRY(cpu_throw)
72 movl PCPU(CPUID),%eax
73 testq %rdi,%rdi
74 jz 1f
75 /* release bit from old pm_active */
76 movq PCPU(CURPMAP),%rdx
77 LK btrl %eax,PM_ACTIVE(%rdx) /* clear old */
78 1:
79 movq TD_PCB(%rsi),%r8 /* newtd->td_proc */
80 movq PCB_CR3(%r8),%rdx
81 movq %rdx,%cr3 /* new address space */
82 jmp swact
83 END(cpu_throw)
84
85 /*
86 * cpu_switch(old, new, mtx)
87 *
88 * Save the current thread state, then select the next thread to run
89 * and load its state.
90 * %rdi = oldtd
91 * %rsi = newtd
92 * %rdx = mtx
93 */
94 ENTRY(cpu_switch)
95 /* Switch to new thread. First, save context. */
96 movq TD_PCB(%rdi),%r8
97 orl $PCB_FULL_IRET,PCB_FLAGS(%r8)
98
99 movq (%rsp),%rax /* Hardware registers */
100 movq %r15,PCB_R15(%r8)
101 movq %r14,PCB_R14(%r8)
102 movq %r13,PCB_R13(%r8)
103 movq %r12,PCB_R12(%r8)
104 movq %rbp,PCB_RBP(%r8)
105 movq %rsp,PCB_RSP(%r8)
106 movq %rbx,PCB_RBX(%r8)
107 movq %rax,PCB_RIP(%r8)
108
109 testl $PCB_DBREGS,PCB_FLAGS(%r8)
110 jnz store_dr /* static predict not taken */
111 done_store_dr:
112
113 /* have we used fp, and need a save? */
114 cmpq %rdi,PCPU(FPCURTHREAD)
115 jne 3f
116 movq PCB_SAVEFPU(%r8),%r8
117 clts
118 cmpl $0,use_xsave
119 jne 1f
120 fxsave (%r8)
121 jmp 2f
122 1: movq %rdx,%rcx
123 movl xsave_mask,%eax
124 movl xsave_mask+4,%edx
125 /* xsave (%r8) */
126 .byte 0x41,0x0f,0xae,0x20
127 movq %rcx,%rdx
128 2: smsw %ax
129 orb $CR0_TS,%al
130 lmsw %ax
131 xorl %eax,%eax
132 movq %rax,PCPU(FPCURTHREAD)
133 3:
134
135 /* Save is done. Now fire up new thread. Leave old vmspace. */
136 movq TD_PCB(%rsi),%r8
137
138 /* switch address space */
139 movq PCB_CR3(%r8),%rcx
140 movq %cr3,%rax
141 cmpq %rcx,%rax /* Same address space? */
142 jne swinact
143 SETLK %rdx, TD_LOCK(%rdi) /* Release the old thread */
144 jmp sw1
145 swinact:
146 movq %rcx,%cr3 /* new address space */
147 movl PCPU(CPUID), %eax
148 /* Release bit from old pmap->pm_active */
149 movq PCPU(CURPMAP),%rcx
150 LK btrl %eax,PM_ACTIVE(%rcx) /* clear old */
151 SETLK %rdx, TD_LOCK(%rdi) /* Release the old thread */
152 swact:
153 /* Set bit in new pmap->pm_active */
154 movq TD_PROC(%rsi),%rdx /* newproc */
155 movq P_VMSPACE(%rdx), %rdx
156 addq $VM_PMAP,%rdx
157 LK btsl %eax,PM_ACTIVE(%rdx) /* set new */
158 movq %rdx,PCPU(CURPMAP)
159
160 sw1:
161 #if defined(SCHED_ULE) && defined(SMP)
162 /* Wait for the new thread to become unblocked */
163 movq $blocked_lock, %rdx
164 1:
165 movq TD_LOCK(%rsi),%rcx
166 cmpq %rcx, %rdx
167 pause
168 je 1b
169 #endif
170 /*
171 * At this point, we've switched address spaces and are ready
172 * to load up the rest of the next context.
173 */
174
175 /* Skip loading user fsbase/gsbase for kthreads */
176 testl $TDP_KTHREAD,TD_PFLAGS(%rsi)
177 jnz do_kthread
178
179 /*
180 * Load ldt register
181 */
182 movq TD_PROC(%rsi),%rcx
183 cmpq $0, P_MD+MD_LDT(%rcx)
184 jne do_ldt
185 xorl %eax,%eax
186 ld_ldt: lldt %ax
187
188 /* Restore fs base in GDT */
189 movl PCB_FSBASE(%r8),%eax
190 movq PCPU(FS32P),%rdx
191 movw %ax,2(%rdx)
192 shrl $16,%eax
193 movb %al,4(%rdx)
194 shrl $8,%eax
195 movb %al,7(%rdx)
196
197 /* Restore gs base in GDT */
198 movl PCB_GSBASE(%r8),%eax
199 movq PCPU(GS32P),%rdx
200 movw %ax,2(%rdx)
201 shrl $16,%eax
202 movb %al,4(%rdx)
203 shrl $8,%eax
204 movb %al,7(%rdx)
205
206 do_kthread:
207 /* Do we need to reload tss ? */
208 movq PCPU(TSSP),%rax
209 movq PCB_TSSP(%r8),%rdx
210 testq %rdx,%rdx
211 cmovzq PCPU(COMMONTSSP),%rdx
212 cmpq %rax,%rdx
213 jne do_tss
214 done_tss:
215 movq %r8,PCPU(RSP0)
216 movq %r8,PCPU(CURPCB)
217 /* Update the TSS_RSP0 pointer for the next interrupt */
218 movq %r8,COMMON_TSS_RSP0(%rdx)
219 movq %rsi,PCPU(CURTHREAD) /* into next thread */
220
221 /* Test if debug registers should be restored. */
222 testl $PCB_DBREGS,PCB_FLAGS(%r8)
223 jnz load_dr /* static predict not taken */
224 done_load_dr:
225
226 /* Restore context. */
227 movq PCB_R15(%r8),%r15
228 movq PCB_R14(%r8),%r14
229 movq PCB_R13(%r8),%r13
230 movq PCB_R12(%r8),%r12
231 movq PCB_RBP(%r8),%rbp
232 movq PCB_RSP(%r8),%rsp
233 movq PCB_RBX(%r8),%rbx
234 movq PCB_RIP(%r8),%rax
235 movq %rax,(%rsp)
236 ret
237
238 /*
239 * We order these strangely for several reasons.
240 * 1: I wanted to use static branch prediction hints
241 * 2: Most athlon64/opteron cpus don't have them. They define
242 * a forward branch as 'predict not taken'. Intel cores have
243 * the 'rep' prefix to invert this.
244 * So, to make it work on both forms of cpu we do the detour.
245 * We use jumps rather than call in order to avoid the stack.
246 */
247
248 store_dr:
249 movq %dr7,%rax /* yes, do the save */
250 movq %dr0,%r15
251 movq %dr1,%r14
252 movq %dr2,%r13
253 movq %dr3,%r12
254 movq %dr6,%r11
255 movq %r15,PCB_DR0(%r8)
256 movq %r14,PCB_DR1(%r8)
257 movq %r13,PCB_DR2(%r8)
258 movq %r12,PCB_DR3(%r8)
259 movq %r11,PCB_DR6(%r8)
260 movq %rax,PCB_DR7(%r8)
261 andq $0x0000fc00, %rax /* disable all watchpoints */
262 movq %rax,%dr7
263 jmp done_store_dr
264
265 load_dr:
266 movq %dr7,%rax
267 movq PCB_DR0(%r8),%r15
268 movq PCB_DR1(%r8),%r14
269 movq PCB_DR2(%r8),%r13
270 movq PCB_DR3(%r8),%r12
271 movq PCB_DR6(%r8),%r11
272 movq PCB_DR7(%r8),%rcx
273 movq %r15,%dr0
274 movq %r14,%dr1
275 /* Preserve reserved bits in %dr7 */
276 andq $0x0000fc00,%rax
277 andq $~0x0000fc00,%rcx
278 movq %r13,%dr2
279 movq %r12,%dr3
280 orq %rcx,%rax
281 movq %r11,%dr6
282 movq %rax,%dr7
283 jmp done_load_dr
284
285 do_tss: movq %rdx,PCPU(TSSP)
286 movq %rdx,%rcx
287 movq PCPU(TSS),%rax
288 movw %cx,2(%rax)
289 shrq $16,%rcx
290 movb %cl,4(%rax)
291 shrq $8,%rcx
292 movb %cl,7(%rax)
293 shrq $8,%rcx
294 movl %ecx,8(%rax)
295 movb $0x89,5(%rax) /* unset busy */
296 movl $TSSSEL,%eax
297 ltr %ax
298 jmp done_tss
299
300 do_ldt: movq PCPU(LDT),%rax
301 movq P_MD+MD_LDT_SD(%rcx),%rdx
302 movq %rdx,(%rax)
303 movq P_MD+MD_LDT_SD+8(%rcx),%rdx
304 movq %rdx,8(%rax)
305 movl $LDTSEL,%eax
306 jmp ld_ldt
307 END(cpu_switch)
308
309 /*
310 * savectx(pcb)
311 * Update pcb, saving current processor state.
312 */
313 ENTRY(savectx)
314 /* Save caller's return address. */
315 movq (%rsp),%rax
316 movq %rax,PCB_RIP(%rdi)
317
318 movq %rbx,PCB_RBX(%rdi)
319 movq %rsp,PCB_RSP(%rdi)
320 movq %rbp,PCB_RBP(%rdi)
321 movq %r12,PCB_R12(%rdi)
322 movq %r13,PCB_R13(%rdi)
323 movq %r14,PCB_R14(%rdi)
324 movq %r15,PCB_R15(%rdi)
325
326 movq %cr0,%rsi
327 movq %rsi,PCB_CR0(%rdi)
328 movq %cr2,%rax
329 movq %rax,PCB_CR2(%rdi)
330 movq %cr3,%rax
331 movq %rax,PCB_CR3(%rdi)
332 movq %cr4,%rax
333 movq %rax,PCB_CR4(%rdi)
334
335 movq %dr0,%rax
336 movq %rax,PCB_DR0(%rdi)
337 movq %dr1,%rax
338 movq %rax,PCB_DR1(%rdi)
339 movq %dr2,%rax
340 movq %rax,PCB_DR2(%rdi)
341 movq %dr3,%rax
342 movq %rax,PCB_DR3(%rdi)
343 movq %dr6,%rax
344 movq %rax,PCB_DR6(%rdi)
345 movq %dr7,%rax
346 movq %rax,PCB_DR7(%rdi)
347
348 movl $MSR_FSBASE,%ecx
349 rdmsr
350 movl %eax,PCB_FSBASE(%rdi)
351 movl %edx,PCB_FSBASE+4(%rdi)
352 movl $MSR_GSBASE,%ecx
353 rdmsr
354 movl %eax,PCB_GSBASE(%rdi)
355 movl %edx,PCB_GSBASE+4(%rdi)
356 movl $MSR_KGSBASE,%ecx
357 rdmsr
358 movl %eax,PCB_KGSBASE(%rdi)
359 movl %edx,PCB_KGSBASE+4(%rdi)
360
361 sgdt PCB_GDT(%rdi)
362 sidt PCB_IDT(%rdi)
363 sldt PCB_LDT(%rdi)
364 str PCB_TR(%rdi)
365
366 2: movq %rsi,%cr0 /* The previous %cr0 is saved in %rsi. */
367
368 movl $1,%eax
369 ret
370 END(savectx)
371
372 /*
373 * Wrapper around fpusave to care about TS0_CR.
374 */
375 ENTRY(ctx_fpusave)
376 movq %cr0,%rsi
377 clts
378 call fpusave
379 movq %rsi,%cr0
380 ret
381 END(ctx_fpusave)
Cache object: 863e211171c6665735c799093b0b64c4
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