1 /*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD$
34 */
35
36 #include <machine/asmacros.h>
37 #include <machine/specialreg.h>
38
39 #include "assym.s"
40 #include "opt_sched.h"
41
42 /*****************************************************************************/
43 /* Scheduling */
44 /*****************************************************************************/
45
46 .text
47
48 #ifdef SMP
49 #define LK lock ;
50 #else
51 #define LK
52 #endif
53
54 #if defined(SCHED_ULE) && defined(SMP)
55 #define SETLK xchgq
56 #else
57 #define SETLK movq
58 #endif
59
60 /*
61 * cpu_throw()
62 *
63 * This is the second half of cpu_switch(). It is used when the current
64 * thread is either a dummy or slated to die, and we no longer care
65 * about its state. This is only a slight optimization and is probably
66 * not worth it anymore. Note that we need to clear the pm_active bits so
67 * we do need the old proc if it still exists.
68 * %rdi = oldtd
69 * %rsi = newtd
70 */
71 ENTRY(cpu_throw)
72 movl PCPU(CPUID),%eax
73 testq %rdi,%rdi
74 jz 1f
75 /* release bit from old pm_active */
76 movq PCPU(CURPMAP),%rdx
77 LK btrl %eax,PM_ACTIVE(%rdx) /* clear old */
78 1:
79 movq TD_PCB(%rsi),%r8 /* newtd->td_proc */
80 movq PCB_CR3(%r8),%rdx
81 movq %rdx,%cr3 /* new address space */
82 jmp swact
83 END(cpu_throw)
84
85 /*
86 * cpu_switch(old, new, mtx)
87 *
88 * Save the current thread state, then select the next thread to run
89 * and load its state.
90 * %rdi = oldtd
91 * %rsi = newtd
92 * %rdx = mtx
93 */
94 ENTRY(cpu_switch)
95 /* Switch to new thread. First, save context. */
96 movq TD_PCB(%rdi),%r8
97 orl $PCB_FULL_IRET,PCB_FLAGS(%r8)
98
99 movq (%rsp),%rax /* Hardware registers */
100 movq %r15,PCB_R15(%r8)
101 movq %r14,PCB_R14(%r8)
102 movq %r13,PCB_R13(%r8)
103 movq %r12,PCB_R12(%r8)
104 movq %rbp,PCB_RBP(%r8)
105 movq %rsp,PCB_RSP(%r8)
106 movq %rbx,PCB_RBX(%r8)
107 movq %rax,PCB_RIP(%r8)
108
109 testl $PCB_DBREGS,PCB_FLAGS(%r8)
110 jnz store_dr /* static predict not taken */
111 done_store_dr:
112
113 /* have we used fp, and need a save? */
114 cmpq %rdi,PCPU(FPCURTHREAD)
115 jne 3f
116 movq PCB_SAVEFPU(%r8),%r8
117 clts
118 cmpl $0,use_xsave
119 jne 1f
120 fxsave (%r8)
121 jmp 2f
122 1: movq %rdx,%rcx
123 movl xsave_mask,%eax
124 movl xsave_mask+4,%edx
125 .globl ctx_switch_xsave
126 ctx_switch_xsave:
127 /* This is patched to xsaveopt if supported, see fpuinit_bsp1() */
128 /* xsave (%r8) */
129 .byte 0x41,0x0f,0xae,0x20
130 movq %rcx,%rdx
131 2: smsw %ax
132 orb $CR0_TS,%al
133 lmsw %ax
134 xorl %eax,%eax
135 movq %rax,PCPU(FPCURTHREAD)
136 3:
137
138 /* Save is done. Now fire up new thread. Leave old vmspace. */
139 movq TD_PCB(%rsi),%r8
140
141 /* switch address space */
142 movq PCB_CR3(%r8),%rcx
143 movq %cr3,%rax
144 cmpq %rcx,%rax /* Same address space? */
145 jne swinact
146 SETLK %rdx, TD_LOCK(%rdi) /* Release the old thread */
147 jmp sw1
148 swinact:
149 movq %rcx,%cr3 /* new address space */
150 movl PCPU(CPUID), %eax
151 /* Release bit from old pmap->pm_active */
152 movq PCPU(CURPMAP),%rcx
153 LK btrl %eax,PM_ACTIVE(%rcx) /* clear old */
154 SETLK %rdx, TD_LOCK(%rdi) /* Release the old thread */
155 swact:
156 /* Set bit in new pmap->pm_active */
157 movq TD_PROC(%rsi),%rdx /* newproc */
158 movq P_VMSPACE(%rdx), %rdx
159 addq $VM_PMAP,%rdx
160 LK btsl %eax,PM_ACTIVE(%rdx) /* set new */
161 movq %rdx,PCPU(CURPMAP)
162
163 sw1:
164 #if defined(SCHED_ULE) && defined(SMP)
165 /* Wait for the new thread to become unblocked */
166 movq $blocked_lock, %rdx
167 1:
168 movq TD_LOCK(%rsi),%rcx
169 cmpq %rcx, %rdx
170 pause
171 je 1b
172 #endif
173 /*
174 * At this point, we've switched address spaces and are ready
175 * to load up the rest of the next context.
176 */
177
178 /* Skip loading user fsbase/gsbase for kthreads */
179 testl $TDP_KTHREAD,TD_PFLAGS(%rsi)
180 jnz do_kthread
181
182 /*
183 * Load ldt register
184 */
185 movq TD_PROC(%rsi),%rcx
186 cmpq $0, P_MD+MD_LDT(%rcx)
187 jne do_ldt
188 xorl %eax,%eax
189 ld_ldt: lldt %ax
190
191 /* Restore fs base in GDT */
192 movl PCB_FSBASE(%r8),%eax
193 movq PCPU(FS32P),%rdx
194 movw %ax,2(%rdx)
195 shrl $16,%eax
196 movb %al,4(%rdx)
197 shrl $8,%eax
198 movb %al,7(%rdx)
199
200 /* Restore gs base in GDT */
201 movl PCB_GSBASE(%r8),%eax
202 movq PCPU(GS32P),%rdx
203 movw %ax,2(%rdx)
204 shrl $16,%eax
205 movb %al,4(%rdx)
206 shrl $8,%eax
207 movb %al,7(%rdx)
208
209 do_kthread:
210 /* Do we need to reload tss ? */
211 movq PCPU(TSSP),%rax
212 movq PCB_TSSP(%r8),%rdx
213 testq %rdx,%rdx
214 cmovzq PCPU(COMMONTSSP),%rdx
215 cmpq %rax,%rdx
216 jne do_tss
217 done_tss:
218 movq %r8,PCPU(RSP0)
219 movq %r8,PCPU(CURPCB)
220 /* Update the TSS_RSP0 pointer for the next interrupt */
221 movq %r8,COMMON_TSS_RSP0(%rdx)
222 movq %rsi,PCPU(CURTHREAD) /* into next thread */
223
224 /* Test if debug registers should be restored. */
225 testl $PCB_DBREGS,PCB_FLAGS(%r8)
226 jnz load_dr /* static predict not taken */
227 done_load_dr:
228
229 /* Restore context. */
230 movq PCB_R15(%r8),%r15
231 movq PCB_R14(%r8),%r14
232 movq PCB_R13(%r8),%r13
233 movq PCB_R12(%r8),%r12
234 movq PCB_RBP(%r8),%rbp
235 movq PCB_RSP(%r8),%rsp
236 movq PCB_RBX(%r8),%rbx
237 movq PCB_RIP(%r8),%rax
238 movq %rax,(%rsp)
239 ret
240
241 /*
242 * We order these strangely for several reasons.
243 * 1: I wanted to use static branch prediction hints
244 * 2: Most athlon64/opteron cpus don't have them. They define
245 * a forward branch as 'predict not taken'. Intel cores have
246 * the 'rep' prefix to invert this.
247 * So, to make it work on both forms of cpu we do the detour.
248 * We use jumps rather than call in order to avoid the stack.
249 */
250
251 store_dr:
252 movq %dr7,%rax /* yes, do the save */
253 movq %dr0,%r15
254 movq %dr1,%r14
255 movq %dr2,%r13
256 movq %dr3,%r12
257 movq %dr6,%r11
258 movq %r15,PCB_DR0(%r8)
259 movq %r14,PCB_DR1(%r8)
260 movq %r13,PCB_DR2(%r8)
261 movq %r12,PCB_DR3(%r8)
262 movq %r11,PCB_DR6(%r8)
263 movq %rax,PCB_DR7(%r8)
264 andq $0x0000fc00, %rax /* disable all watchpoints */
265 movq %rax,%dr7
266 jmp done_store_dr
267
268 load_dr:
269 movq %dr7,%rax
270 movq PCB_DR0(%r8),%r15
271 movq PCB_DR1(%r8),%r14
272 movq PCB_DR2(%r8),%r13
273 movq PCB_DR3(%r8),%r12
274 movq PCB_DR6(%r8),%r11
275 movq PCB_DR7(%r8),%rcx
276 movq %r15,%dr0
277 movq %r14,%dr1
278 /* Preserve reserved bits in %dr7 */
279 andq $0x0000fc00,%rax
280 andq $~0x0000fc00,%rcx
281 movq %r13,%dr2
282 movq %r12,%dr3
283 orq %rcx,%rax
284 movq %r11,%dr6
285 movq %rax,%dr7
286 jmp done_load_dr
287
288 do_tss: movq %rdx,PCPU(TSSP)
289 movq %rdx,%rcx
290 movq PCPU(TSS),%rax
291 movw %cx,2(%rax)
292 shrq $16,%rcx
293 movb %cl,4(%rax)
294 shrq $8,%rcx
295 movb %cl,7(%rax)
296 shrq $8,%rcx
297 movl %ecx,8(%rax)
298 movb $0x89,5(%rax) /* unset busy */
299 movl $TSSSEL,%eax
300 ltr %ax
301 jmp done_tss
302
303 do_ldt: movq PCPU(LDT),%rax
304 movq P_MD+MD_LDT_SD(%rcx),%rdx
305 movq %rdx,(%rax)
306 movq P_MD+MD_LDT_SD+8(%rcx),%rdx
307 movq %rdx,8(%rax)
308 movl $LDTSEL,%eax
309 jmp ld_ldt
310 END(cpu_switch)
311
312 /*
313 * savectx(pcb)
314 * Update pcb, saving current processor state.
315 */
316 ENTRY(savectx)
317 /* Save caller's return address. */
318 movq (%rsp),%rax
319 movq %rax,PCB_RIP(%rdi)
320
321 movq %rbx,PCB_RBX(%rdi)
322 movq %rsp,PCB_RSP(%rdi)
323 movq %rbp,PCB_RBP(%rdi)
324 movq %r12,PCB_R12(%rdi)
325 movq %r13,PCB_R13(%rdi)
326 movq %r14,PCB_R14(%rdi)
327 movq %r15,PCB_R15(%rdi)
328
329 movq %cr0,%rax
330 movq %rax,PCB_CR0(%rdi)
331 movq %cr2,%rax
332 movq %rax,PCB_CR2(%rdi)
333 movq %cr3,%rax
334 movq %rax,PCB_CR3(%rdi)
335 movq %cr4,%rax
336 movq %rax,PCB_CR4(%rdi)
337
338 movq %dr0,%rax
339 movq %rax,PCB_DR0(%rdi)
340 movq %dr1,%rax
341 movq %rax,PCB_DR1(%rdi)
342 movq %dr2,%rax
343 movq %rax,PCB_DR2(%rdi)
344 movq %dr3,%rax
345 movq %rax,PCB_DR3(%rdi)
346 movq %dr6,%rax
347 movq %rax,PCB_DR6(%rdi)
348 movq %dr7,%rax
349 movq %rax,PCB_DR7(%rdi)
350
351 movl $MSR_FSBASE,%ecx
352 rdmsr
353 movl %eax,PCB_FSBASE(%rdi)
354 movl %edx,PCB_FSBASE+4(%rdi)
355 movl $MSR_GSBASE,%ecx
356 rdmsr
357 movl %eax,PCB_GSBASE(%rdi)
358 movl %edx,PCB_GSBASE+4(%rdi)
359 movl $MSR_KGSBASE,%ecx
360 rdmsr
361 movl %eax,PCB_KGSBASE(%rdi)
362 movl %edx,PCB_KGSBASE+4(%rdi)
363
364 sgdt PCB_GDT(%rdi)
365 sidt PCB_IDT(%rdi)
366 sldt PCB_LDT(%rdi)
367 str PCB_TR(%rdi)
368
369 movl $1,%eax
370 ret
371 END(savectx)
Cache object: f0bc03bc37967d29b0656d7adcc1d9ac
|