Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/amd64/amd64/exception.S
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1 /*- 2 * Copyright (c) 1989, 1990 William F. Jolitz. 3 * Copyright (c) 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 4. Neither the name of the University nor the names of its contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33 #include "opt_atpic.h" 34 #include "opt_compat.h" 35 36 #include <machine/asmacros.h> 37 #include <machine/psl.h> 38 #include <machine/trap.h> 39 40 #include "assym.s" 41 42 .text 43 44 /*****************************************************************************/ 45 /* Trap handling */ 46 /*****************************************************************************/ 47 /* 48 * Trap and fault vector routines. 49 * 50 * All traps are 'interrupt gates', SDT_SYSIGT. An interrupt gate pushes 51 * state on the stack but also disables interrupts. This is important for 52 * us for the use of the swapgs instruction. We cannot be interrupted 53 * until the GS.base value is correct. For most traps, we automatically 54 * then enable interrupts if the interrupted context had them enabled. 55 * This is equivalent to the i386 port's use of SDT_SYS386TGT. 56 * 57 * The cpu will push a certain amount of state onto the kernel stack for 58 * the current process. See amd64/include/frame.h. 59 * This includes the current RFLAGS (status register, which includes 60 * the interrupt disable state prior to the trap), the code segment register, 61 * and the return instruction pointer are pushed by the cpu. The cpu 62 * will also push an 'error' code for certain traps. We push a dummy 63 * error code for those traps where the cpu doesn't in order to maintain 64 * a consistent frame. We also push a contrived 'trap number'. 65 * 66 * The cpu does not push the general registers, we must do that, and we 67 * must restore them prior to calling 'iret'. The cpu adjusts the %cs and 68 * %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we 69 * must load them with appropriate values for supervisor mode operation. 70 */ 71 72 MCOUNT_LABEL(user) 73 MCOUNT_LABEL(btrap) 74 75 /* Traps that we leave interrupts disabled for.. */ 76 #define TRAP_NOEN(a) \ 77 subq $TF_RIP,%rsp; \ 78 movq $(a),TF_TRAPNO(%rsp) ; \ 79 movq $0,TF_ADDR(%rsp) ; \ 80 movq $0,TF_ERR(%rsp) ; \ 81 jmp alltraps_noen 82 IDTVEC(dbg) 83 TRAP_NOEN(T_TRCTRAP) 84 IDTVEC(bpt) 85 TRAP_NOEN(T_BPTFLT) 86 87 /* Regular traps; The cpu does not supply tf_err for these. */ 88 #define TRAP(a) \ 89 subq $TF_RIP,%rsp; \ 90 movq $(a),TF_TRAPNO(%rsp) ; \ 91 movq $0,TF_ADDR(%rsp) ; \ 92 movq $0,TF_ERR(%rsp) ; \ 93 jmp alltraps 94 IDTVEC(div) 95 TRAP(T_DIVIDE) 96 IDTVEC(ofl) 97 TRAP(T_OFLOW) 98 IDTVEC(bnd) 99 TRAP(T_BOUND) 100 IDTVEC(ill) 101 TRAP(T_PRIVINFLT) 102 IDTVEC(dna) 103 TRAP(T_DNA) 104 IDTVEC(fpusegm) 105 TRAP(T_FPOPFLT) 106 IDTVEC(mchk) 107 TRAP(T_MCHK) 108 IDTVEC(rsvd) 109 TRAP(T_RESERVED) 110 IDTVEC(fpu) 111 TRAP(T_ARITHTRAP) 112 IDTVEC(xmm) 113 TRAP(T_XMMFLT) 114 115 /* This group of traps have tf_err already pushed by the cpu */ 116 #define TRAP_ERR(a) \ 117 subq $TF_ERR,%rsp; \ 118 movq $(a),TF_TRAPNO(%rsp) ; \ 119 movq $0,TF_ADDR(%rsp) ; \ 120 jmp alltraps 121 IDTVEC(tss) 122 TRAP_ERR(T_TSSFLT) 123 IDTVEC(missing) 124 TRAP_ERR(T_SEGNPFLT) 125 IDTVEC(stk) 126 TRAP_ERR(T_STKFLT) 127 IDTVEC(align) 128 TRAP_ERR(T_ALIGNFLT) 129 130 /* 131 * alltraps entry point. Use swapgs if this is the first time in the 132 * kernel from userland. Reenable interrupts if they were enabled 133 * before the trap. This approximates SDT_SYS386TGT on the i386 port. 134 */ 135 136 SUPERALIGN_TEXT 137 .globl alltraps 138 .type alltraps,@function 139 alltraps: 140 testb $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */ 141 jz alltraps_testi /* already running with kernel GS.base */ 142 swapgs 143 alltraps_testi: 144 testl $PSL_I,TF_RFLAGS(%rsp) 145 jz alltraps_pushregs 146 sti 147 alltraps_pushregs: 148 movq %rdi,TF_RDI(%rsp) 149 alltraps_pushregs_no_rdi: 150 movq %rsi,TF_RSI(%rsp) 151 movq %rdx,TF_RDX(%rsp) 152 movq %rcx,TF_RCX(%rsp) 153 movq %r8,TF_R8(%rsp) 154 movq %r9,TF_R9(%rsp) 155 movq %rax,TF_RAX(%rsp) 156 movq %rbx,TF_RBX(%rsp) 157 movq %rbp,TF_RBP(%rsp) 158 movq %r10,TF_R10(%rsp) 159 movq %r11,TF_R11(%rsp) 160 movq %r12,TF_R12(%rsp) 161 movq %r13,TF_R13(%rsp) 162 movq %r14,TF_R14(%rsp) 163 movq %r15,TF_R15(%rsp) 164 FAKE_MCOUNT(TF_RIP(%rsp)) 165 .globl calltrap 166 .type calltrap,@function 167 calltrap: 168 movq %rsp, %rdi 169 call trap 170 MEXITCOUNT 171 jmp doreti /* Handle any pending ASTs */ 172 173 /* 174 * alltraps_noen entry point. Unlike alltraps above, we want to 175 * leave the interrupts disabled. This corresponds to 176 * SDT_SYS386IGT on the i386 port. 177 */ 178 SUPERALIGN_TEXT 179 .globl alltraps_noen 180 .type alltraps_noen,@function 181 alltraps_noen: 182 testb $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */ 183 jz alltraps_pushregs /* already running with kernel GS.base */ 184 swapgs 185 jmp alltraps_pushregs 186 187 IDTVEC(dblfault) 188 subq $TF_ERR,%rsp 189 movq $T_DOUBLEFLT,TF_TRAPNO(%rsp) 190 movq $0,TF_ADDR(%rsp) 191 movq $0,TF_ERR(%rsp) 192 movq %rdi,TF_RDI(%rsp) 193 movq %rsi,TF_RSI(%rsp) 194 movq %rdx,TF_RDX(%rsp) 195 movq %rcx,TF_RCX(%rsp) 196 movq %r8,TF_R8(%rsp) 197 movq %r9,TF_R9(%rsp) 198 movq %rax,TF_RAX(%rsp) 199 movq %rbx,TF_RBX(%rsp) 200 movq %rbp,TF_RBP(%rsp) 201 movq %r10,TF_R10(%rsp) 202 movq %r11,TF_R11(%rsp) 203 movq %r12,TF_R12(%rsp) 204 movq %r13,TF_R13(%rsp) 205 movq %r14,TF_R14(%rsp) 206 movq %r15,TF_R15(%rsp) 207 testb $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */ 208 jz 1f /* already running with kernel GS.base */ 209 swapgs 210 1: movq %rsp, %rdi 211 call dblfault_handler 212 2: hlt 213 jmp 2b 214 215 IDTVEC(page) 216 subq $TF_ERR,%rsp 217 movq $T_PAGEFLT,TF_TRAPNO(%rsp) 218 testb $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */ 219 jz 1f /* already running with kernel GS.base */ 220 swapgs 221 1: 222 movq %rdi,TF_RDI(%rsp) /* free up a GP register */ 223 movq %cr2,%rdi /* preserve %cr2 before .. */ 224 movq %rdi,TF_ADDR(%rsp) /* enabling interrupts. */ 225 testl $PSL_I,TF_RFLAGS(%rsp) 226 jz alltraps_pushregs_no_rdi 227 sti 228 jmp alltraps_pushregs_no_rdi 229 230 /* 231 * We have to special-case this one. If we get a trap in doreti() at 232 * the iretq stage, we'll reenter with the wrong gs state. We'll have 233 * to do a special the swapgs in this case even coming from the kernel. 234 * XXX linux has a trap handler for their equivalent of load_gs(). 235 */ 236 IDTVEC(prot) 237 subq $TF_ERR,%rsp 238 movq $T_PROTFLT,TF_TRAPNO(%rsp) 239 movq $0,TF_ADDR(%rsp) 240 movq %rdi,TF_RDI(%rsp) /* free up a GP register */ 241 leaq doreti_iret(%rip),%rdi 242 cmpq %rdi,TF_RIP(%rsp) 243 je 2f /* kernel but with user gsbase!! */ 244 testb $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */ 245 jz 1f /* already running with kernel GS.base */ 246 2: 247 swapgs 248 1: 249 testl $PSL_I,TF_RFLAGS(%rsp) 250 jz alltraps_pushregs_no_rdi 251 sti 252 jmp alltraps_pushregs_no_rdi 253 254 /* 255 * Fast syscall entry point. We enter here with just our new %cs/%ss set, 256 * and the new privilige level. We are still running on the old user stack 257 * pointer. We have to juggle a few things around to find our stack etc. 258 * swapgs gives us access to our PCPU space only. 259 */ 260 IDTVEC(fast_syscall) 261 swapgs 262 movq %rsp,PCPU(SCRATCH_RSP) 263 movq PCPU(RSP0),%rsp 264 /* Now emulate a trapframe. Make the 8 byte alignment odd for call. */ 265 subq $TF_SIZE,%rsp 266 /* defer TF_RSP till we have a spare register */ 267 movq %r11,TF_RFLAGS(%rsp) 268 movq %rcx,TF_RIP(%rsp) /* %rcx original value is in %r10 */ 269 movq PCPU(SCRATCH_RSP),%r11 /* %r11 already saved */ 270 movq %r11,TF_RSP(%rsp) /* user stack pointer */ 271 sti 272 movq $KUDSEL,TF_SS(%rsp) 273 movq $KUCSEL,TF_CS(%rsp) 274 movq $2,TF_ERR(%rsp) 275 movq %rdi,TF_RDI(%rsp) /* arg 1 */ 276 movq %rsi,TF_RSI(%rsp) /* arg 2 */ 277 movq %rdx,TF_RDX(%rsp) /* arg 3 */ 278 movq %r10,TF_RCX(%rsp) /* arg 4 */ 279 movq %r8,TF_R8(%rsp) /* arg 5 */ 280 movq %r9,TF_R9(%rsp) /* arg 6 */ 281 movq %rax,TF_RAX(%rsp) /* syscall number */ 282 movq %rbx,TF_RBX(%rsp) /* C preserved */ 283 movq %rbp,TF_RBP(%rsp) /* C preserved */ 284 movq %r12,TF_R12(%rsp) /* C preserved */ 285 movq %r13,TF_R13(%rsp) /* C preserved */ 286 movq %r14,TF_R14(%rsp) /* C preserved */ 287 movq %r15,TF_R15(%rsp) /* C preserved */ 288 FAKE_MCOUNT(TF_RIP(%rsp)) 289 movq %rsp, %rdi 290 call syscall 291 movq PCPU(CURPCB),%rax 292 testq $PCB_FULLCTX,PCB_FLAGS(%rax) 293 jne 3f 294 1: /* Check for and handle AST's on return to userland */ 295 cli 296 movq PCPU(CURTHREAD),%rax 297 testl $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%rax) 298 je 2f 299 sti 300 movq %rsp, %rdi 301 call ast 302 jmp 1b 303 2: /* restore preserved registers */ 304 MEXITCOUNT 305 movq TF_RDI(%rsp),%rdi /* bonus; preserve arg 1 */ 306 movq TF_RSI(%rsp),%rsi /* bonus: preserve arg 2 */ 307 movq TF_RDX(%rsp),%rdx /* return value 2 */ 308 movq TF_RAX(%rsp),%rax /* return value 1 */ 309 movq TF_RBX(%rsp),%rbx /* C preserved */ 310 movq TF_RBP(%rsp),%rbp /* C preserved */ 311 movq TF_R12(%rsp),%r12 /* C preserved */ 312 movq TF_R13(%rsp),%r13 /* C preserved */ 313 movq TF_R14(%rsp),%r14 /* C preserved */ 314 movq TF_R15(%rsp),%r15 /* C preserved */ 315 movq TF_RFLAGS(%rsp),%r11 /* original %rflags */ 316 movq TF_RIP(%rsp),%rcx /* original %rip */ 317 movq TF_RSP(%rsp),%r9 /* user stack pointer */ 318 movq %r9,%rsp /* original %rsp */ 319 swapgs 320 sysretq 321 3: /* Requested full context restore, use doreti for that */ 322 andq $~PCB_FULLCTX,PCB_FLAGS(%rax) 323 MEXITCOUNT 324 jmp doreti 325 326 /* 327 * Here for CYA insurance, in case a "syscall" instruction gets 328 * issued from 32 bit compatability mode. MSR_CSTAR has to point 329 * to *something* if EFER_SCE is enabled. 330 */ 331 IDTVEC(fast_syscall32) 332 sysret 333 334 /* 335 * NMI handling is special. 336 * 337 * First, NMIs do not respect the state of the processor's RFLAGS.IF 338 * bit and the NMI handler may be invoked at any time, including when 339 * the processor is in a critical section with RFLAGS.IF == 0. In 340 * particular, this means that the processor's GS.base values could be 341 * inconsistent on entry to the handler, and so we need to read 342 * MSR_GSBASE to determine if a 'swapgs' is needed. We use '%ebx', a 343 * C-preserved register, to remember whether to swap GS back on the 344 * exit path. 345 * 346 * Second, the processor treats NMIs specially, blocking further NMIs 347 * until an 'iretq' instruction is executed. We therefore need to 348 * execute the NMI handler with interrupts disabled to prevent a 349 * nested interrupt from executing an 'iretq' instruction and 350 * inadvertently taking the processor out of NMI mode. 351 */ 352 353 IDTVEC(nmi) 354 subq $TF_RIP,%rsp 355 movq $(T_NMI),TF_TRAPNO(%rsp) 356 movq $0,TF_ADDR(%rsp) 357 movq $0,TF_ERR(%rsp) 358 movq %rdi,TF_RDI(%rsp) 359 movq %rsi,TF_RSI(%rsp) 360 movq %rdx,TF_RDX(%rsp) 361 movq %rcx,TF_RCX(%rsp) 362 movq %r8,TF_R8(%rsp) 363 movq %r9,TF_R9(%rsp) 364 movq %rax,TF_RAX(%rsp) 365 movq %rbx,TF_RBX(%rsp) 366 movq %rbp,TF_RBP(%rsp) 367 movq %r10,TF_R10(%rsp) 368 movq %r11,TF_R11(%rsp) 369 movq %r12,TF_R12(%rsp) 370 movq %r13,TF_R13(%rsp) 371 movq %r14,TF_R14(%rsp) 372 movq %r15,TF_R15(%rsp) 373 xorl %ebx,%ebx 374 testb $SEL_RPL_MASK,TF_CS(%rsp) 375 jnz nmi_needswapgs /* we came from userland */ 376 movl $MSR_GSBASE,%ecx 377 rdmsr 378 cmpl $VM_MAXUSER_ADDRESS >> 32,%edx 379 jae nmi_calltrap /* GS.base holds a kernel VA */ 380 nmi_needswapgs: 381 incl %ebx 382 swapgs 383 /* Note: this label is also used by ddb and gdb: */ 384 nmi_calltrap: 385 FAKE_MCOUNT(TF_RIP(%rsp)) 386 movq %rsp, %rdi 387 call trap 388 MEXITCOUNT 389 testl %ebx,%ebx 390 jz nmi_restoreregs 391 swapgs 392 nmi_restoreregs: 393 movq TF_RDI(%rsp),%rdi 394 movq TF_RSI(%rsp),%rsi 395 movq TF_RDX(%rsp),%rdx 396 movq TF_RCX(%rsp),%rcx 397 movq TF_R8(%rsp),%r8 398 movq TF_R9(%rsp),%r9 399 movq TF_RAX(%rsp),%rax 400 movq TF_RBX(%rsp),%rbx 401 movq TF_RBP(%rsp),%rbp 402 movq TF_R10(%rsp),%r10 403 movq TF_R11(%rsp),%r11 404 movq TF_R12(%rsp),%r12 405 movq TF_R13(%rsp),%r13 406 movq TF_R14(%rsp),%r14 407 movq TF_R15(%rsp),%r15 408 addq $TF_RIP,%rsp 409 iretq 410 411 ENTRY(fork_trampoline) 412 movq %r12, %rdi /* function */ 413 movq %rbx, %rsi /* arg1 */ 414 movq %rsp, %rdx /* trapframe pointer */ 415 call fork_exit 416 MEXITCOUNT 417 jmp doreti /* Handle any ASTs */ 418 419 /* 420 * To efficiently implement classification of trap and interrupt handlers 421 * for profiling, there must be only trap handlers between the labels btrap 422 * and bintr, and only interrupt handlers between the labels bintr and 423 * eintr. This is implemented (partly) by including files that contain 424 * some of the handlers. Before including the files, set up a normal asm 425 * environment so that the included files doen't need to know that they are 426 * included. 427 */ 428 429 #ifdef COMPAT_IA32 430 .data 431 .p2align 4 432 .text 433 SUPERALIGN_TEXT 434 435 #include <amd64/ia32/ia32_exception.S> 436 #endif 437 438 .data 439 .p2align 4 440 .text 441 SUPERALIGN_TEXT 442 MCOUNT_LABEL(bintr) 443 444 #include <amd64/amd64/apic_vector.S> 445 446 #ifdef DEV_ATPIC 447 .data 448 .p2align 4 449 .text 450 SUPERALIGN_TEXT 451 452 #include <amd64/isa/atpic_vector.S> 453 #endif 454 455 .text 456 MCOUNT_LABEL(eintr) 457 458 /* 459 * void doreti(struct trapframe) 460 * 461 * Handle return from interrupts, traps and syscalls. 462 */ 463 .text 464 SUPERALIGN_TEXT 465 .type doreti,@function 466 doreti: 467 FAKE_MCOUNT($bintr) /* init "from" bintr -> doreti */ 468 /* 469 * Check if ASTs can be handled now. 470 */ 471 testb $SEL_RPL_MASK,TF_CS(%rsp) /* are we returning to user mode? */ 472 jz doreti_exit /* can't handle ASTs now if not */ 473 474 doreti_ast: 475 /* 476 * Check for ASTs atomically with returning. Disabling CPU 477 * interrupts provides sufficient locking eve in the SMP case, 478 * since we will be informed of any new ASTs by an IPI. 479 */ 480 cli 481 movq PCPU(CURTHREAD),%rax 482 testl $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%rax) 483 je doreti_exit 484 sti 485 movq %rsp, %rdi /* pass a pointer to the trapframe */ 486 call ast 487 jmp doreti_ast 488 489 /* 490 * doreti_exit: pop registers, iret. 491 * 492 * The segment register pop is a special case, since it may 493 * fault if (for example) a sigreturn specifies bad segment 494 * registers. The fault is handled in trap.c. 495 */ 496 doreti_exit: 497 MEXITCOUNT 498 movq TF_RDI(%rsp),%rdi 499 movq TF_RSI(%rsp),%rsi 500 movq TF_RDX(%rsp),%rdx 501 movq TF_RCX(%rsp),%rcx 502 movq TF_R8(%rsp),%r8 503 movq TF_R9(%rsp),%r9 504 movq TF_RAX(%rsp),%rax 505 movq TF_RBX(%rsp),%rbx 506 movq TF_RBP(%rsp),%rbp 507 movq TF_R10(%rsp),%r10 508 movq TF_R11(%rsp),%r11 509 movq TF_R12(%rsp),%r12 510 movq TF_R13(%rsp),%r13 511 movq TF_R14(%rsp),%r14 512 movq TF_R15(%rsp),%r15 513 testb $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */ 514 jz 1f /* keep running with kernel GS.base */ 515 cli 516 swapgs 517 1: addq $TF_RIP,%rsp /* skip over tf_err, tf_trapno */ 518 .globl doreti_iret 519 doreti_iret: 520 iretq 521 522 /* 523 * doreti_iret_fault. Alternative return code for 524 * the case where we get a fault in the doreti_exit code 525 * above. trap() (amd64/amd64/trap.c) catches this specific 526 * case, sends the process a signal and continues in the 527 * corresponding place in the code below. 528 */ 529 ALIGN_TEXT 530 .globl doreti_iret_fault 531 doreti_iret_fault: 532 subq $TF_RIP,%rsp /* space including tf_err, tf_trapno */ 533 testl $PSL_I,TF_RFLAGS(%rsp) 534 jz 1f 535 sti 536 1: movq %rdi,TF_RDI(%rsp) 537 movq %rsi,TF_RSI(%rsp) 538 movq %rdx,TF_RDX(%rsp) 539 movq %rcx,TF_RCX(%rsp) 540 movq %r8,TF_R8(%rsp) 541 movq %r9,TF_R9(%rsp) 542 movq %rax,TF_RAX(%rsp) 543 movq %rbx,TF_RBX(%rsp) 544 movq %rbp,TF_RBP(%rsp) 545 movq %r10,TF_R10(%rsp) 546 movq %r11,TF_R11(%rsp) 547 movq %r12,TF_R12(%rsp) 548 movq %r13,TF_R13(%rsp) 549 movq %r14,TF_R14(%rsp) 550 movq %r15,TF_R15(%rsp) 551 movq $T_PROTFLT,TF_TRAPNO(%rsp) 552 movq $0,TF_ERR(%rsp) /* XXX should be the error code */ 553 movq $0,TF_ADDR(%rsp) 554 FAKE_MCOUNT(TF_RIP(%rsp)) 555 jmp calltrap
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