The Design and Implementation of the FreeBSD Operating System, Second Edition
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sys/amd64/amd64/exception.S

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    1 /*-
    2  * Copyright (c) 1989, 1990 William F. Jolitz.
    3  * Copyright (c) 1990 The Regents of the University of California.
    4  * Copyright (c) 2007 The FreeBSD Foundation
    5  * All rights reserved.
    6  *
    7  * Portions of this software were developed by A. Joseph Koshy under
    8  * sponsorship from the FreeBSD Foundation and Google, Inc.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 4. Neither the name of the University nor the names of its contributors
   19  *    may be used to endorse or promote products derived from this software
   20  *    without specific prior written permission.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   32  * SUCH DAMAGE.
   33  *
   34  * $FreeBSD: releng/9.2/sys/amd64/amd64/exception.S 252246 2013-06-26 05:54:37Z kib $
   35  */
   36 
   37 #include "opt_atpic.h"
   38 #include "opt_compat.h"
   39 #include "opt_hwpmc_hooks.h"
   40 #include "opt_kdtrace.h"
   41 
   42 #include <machine/asmacros.h>
   43 #include <machine/psl.h>
   44 #include <machine/trap.h>
   45 #include <machine/specialreg.h>
   46 
   47 #include "assym.s"
   48 
   49 #ifdef KDTRACE_HOOKS
   50         .bss
   51         .globl  dtrace_invop_jump_addr
   52         .align  8
   53         .type   dtrace_invop_jump_addr,@object
   54         .size   dtrace_invop_jump_addr,8
   55 dtrace_invop_jump_addr:
   56         .zero   8
   57         .globl  dtrace_invop_calltrap_addr
   58         .align  8
   59         .type   dtrace_invop_calltrap_addr,@object
   60         .size   dtrace_invop_calltrap_addr,8
   61 dtrace_invop_calltrap_addr:
   62         .zero   8
   63 #endif
   64         .text
   65 #ifdef HWPMC_HOOKS
   66         ENTRY(start_exceptions)
   67 #endif
   68 
   69 /*****************************************************************************/
   70 /* Trap handling                                                             */
   71 /*****************************************************************************/
   72 /*
   73  * Trap and fault vector routines.
   74  *
   75  * All traps are 'interrupt gates', SDT_SYSIGT.  An interrupt gate pushes
   76  * state on the stack but also disables interrupts.  This is important for
   77  * us for the use of the swapgs instruction.  We cannot be interrupted
   78  * until the GS.base value is correct.  For most traps, we automatically
   79  * then enable interrupts if the interrupted context had them enabled.
   80  * This is equivalent to the i386 port's use of SDT_SYS386TGT.
   81  *
   82  * The cpu will push a certain amount of state onto the kernel stack for
   83  * the current process.  See amd64/include/frame.h.
   84  * This includes the current RFLAGS (status register, which includes
   85  * the interrupt disable state prior to the trap), the code segment register,
   86  * and the return instruction pointer are pushed by the cpu.  The cpu
   87  * will also push an 'error' code for certain traps.  We push a dummy
   88  * error code for those traps where the cpu doesn't in order to maintain
   89  * a consistent frame.  We also push a contrived 'trap number'.
   90  *
   91  * The CPU does not push the general registers, so we must do that, and we
   92  * must restore them prior to calling 'iret'.  The CPU adjusts %cs and %ss
   93  * but does not mess with %ds, %es, %gs or %fs.  We swap the %gs base for
   94  * for the kernel mode operation shortly, without changes to the selector
   95  * loaded.  Since superuser long mode works with any selectors loaded into
   96  * segment registers other then %cs, which makes them mostly unused in long
   97  * mode, and kernel does not reference %fs, leave them alone.  The segment
   98  * registers are reloaded on return to the usermode.
   99  */
  100 
  101 MCOUNT_LABEL(user)
  102 MCOUNT_LABEL(btrap)
  103 
  104 /* Traps that we leave interrupts disabled for.. */
  105 #define TRAP_NOEN(a)    \
  106         subq $TF_RIP,%rsp; \
  107         movl $(a),TF_TRAPNO(%rsp) ; \
  108         movq $0,TF_ADDR(%rsp) ; \
  109         movq $0,TF_ERR(%rsp) ; \
  110         jmp alltraps_noen
  111 IDTVEC(dbg)
  112         TRAP_NOEN(T_TRCTRAP)
  113 IDTVEC(bpt)
  114         TRAP_NOEN(T_BPTFLT)
  115 #ifdef KDTRACE_HOOKS
  116 IDTVEC(dtrace_ret)
  117         TRAP_NOEN(T_DTRACE_RET)
  118 #endif
  119 
  120 /* Regular traps; The cpu does not supply tf_err for these. */
  121 #define TRAP(a)  \
  122         subq $TF_RIP,%rsp; \
  123         movl $(a),TF_TRAPNO(%rsp) ; \
  124         movq $0,TF_ADDR(%rsp) ; \
  125         movq $0,TF_ERR(%rsp) ; \
  126         jmp alltraps
  127 IDTVEC(div)
  128         TRAP(T_DIVIDE)
  129 IDTVEC(ofl)
  130         TRAP(T_OFLOW)
  131 IDTVEC(bnd)
  132         TRAP(T_BOUND)
  133 IDTVEC(ill)
  134         TRAP(T_PRIVINFLT)
  135 IDTVEC(dna)
  136         TRAP(T_DNA)
  137 IDTVEC(fpusegm)
  138         TRAP(T_FPOPFLT)
  139 IDTVEC(mchk)
  140         TRAP(T_MCHK)
  141 IDTVEC(rsvd)
  142         TRAP(T_RESERVED)
  143 IDTVEC(fpu)
  144         TRAP(T_ARITHTRAP)
  145 IDTVEC(xmm)
  146         TRAP(T_XMMFLT)
  147 
  148 /* This group of traps have tf_err already pushed by the cpu */
  149 #define TRAP_ERR(a)     \
  150         subq $TF_ERR,%rsp; \
  151         movl $(a),TF_TRAPNO(%rsp) ; \
  152         movq $0,TF_ADDR(%rsp) ; \
  153         jmp alltraps
  154 IDTVEC(tss)
  155         TRAP_ERR(T_TSSFLT)
  156 IDTVEC(missing)
  157         TRAP_ERR(T_SEGNPFLT)
  158 IDTVEC(stk)
  159         TRAP_ERR(T_STKFLT)
  160 IDTVEC(align)
  161         TRAP_ERR(T_ALIGNFLT)
  162 
  163         /*
  164          * alltraps entry point.  Use swapgs if this is the first time in the
  165          * kernel from userland.  Reenable interrupts if they were enabled
  166          * before the trap.  This approximates SDT_SYS386TGT on the i386 port.
  167          */
  168         SUPERALIGN_TEXT
  169         .globl  alltraps
  170         .type   alltraps,@function
  171 alltraps:
  172         movq    %rdi,TF_RDI(%rsp)
  173         testb   $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */
  174         jz      alltraps_testi          /* already running with kernel GS.base */
  175         swapgs
  176         movq    PCPU(CURPCB),%rdi
  177         andl    $~PCB_FULL_IRET,PCB_FLAGS(%rdi)
  178         movw    %fs,TF_FS(%rsp)
  179         movw    %gs,TF_GS(%rsp)
  180         movw    %es,TF_ES(%rsp)
  181         movw    %ds,TF_DS(%rsp)
  182 alltraps_testi:
  183         testl   $PSL_I,TF_RFLAGS(%rsp)
  184         jz      alltraps_pushregs_no_rdi
  185         sti
  186 alltraps_pushregs_no_rdi:
  187         movq    %rsi,TF_RSI(%rsp)
  188         movq    %rdx,TF_RDX(%rsp)
  189         movq    %rcx,TF_RCX(%rsp)
  190         movq    %r8,TF_R8(%rsp)
  191         movq    %r9,TF_R9(%rsp)
  192         movq    %rax,TF_RAX(%rsp)
  193         movq    %rbx,TF_RBX(%rsp)
  194         movq    %rbp,TF_RBP(%rsp)
  195         movq    %r10,TF_R10(%rsp)
  196         movq    %r11,TF_R11(%rsp)
  197         movq    %r12,TF_R12(%rsp)
  198         movq    %r13,TF_R13(%rsp)
  199         movq    %r14,TF_R14(%rsp)
  200         movq    %r15,TF_R15(%rsp)
  201         movl    $TF_HASSEGS,TF_FLAGS(%rsp)
  202         cld
  203         FAKE_MCOUNT(TF_RIP(%rsp))
  204 #ifdef KDTRACE_HOOKS
  205         /*
  206          * DTrace Function Boundary Trace (fbt) probes are triggered
  207          * by int3 (0xcc) which causes the #BP (T_BPTFLT) breakpoint
  208          * interrupt. For all other trap types, just handle them in
  209          * the usual way.
  210          */
  211         cmpl    $T_BPTFLT,TF_TRAPNO(%rsp)
  212         jne     calltrap
  213 
  214         /* Check if there is no DTrace hook registered. */
  215         cmpq    $0,dtrace_invop_jump_addr
  216         je      calltrap
  217 
  218         /*
  219          * Set our jump address for the jump back in the event that
  220          * the breakpoint wasn't caused by DTrace at all.
  221          */
  222         movq    $calltrap,dtrace_invop_calltrap_addr(%rip)
  223 
  224         /* Jump to the code hooked in by DTrace. */
  225         movq    dtrace_invop_jump_addr,%rax
  226         jmpq    *dtrace_invop_jump_addr
  227 #endif
  228         .globl  calltrap
  229         .type   calltrap,@function
  230 calltrap:
  231         movq    %rsp,%rdi
  232         call    trap
  233         MEXITCOUNT
  234         jmp     doreti                  /* Handle any pending ASTs */
  235 
  236         /*
  237          * alltraps_noen entry point.  Unlike alltraps above, we want to
  238          * leave the interrupts disabled.  This corresponds to
  239          * SDT_SYS386IGT on the i386 port.
  240          */
  241         SUPERALIGN_TEXT
  242         .globl  alltraps_noen
  243         .type   alltraps_noen,@function
  244 alltraps_noen:
  245         movq    %rdi,TF_RDI(%rsp)
  246         testb   $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */
  247         jz      1f      /* already running with kernel GS.base */
  248         swapgs
  249         movq    PCPU(CURPCB),%rdi
  250         andl    $~PCB_FULL_IRET,PCB_FLAGS(%rdi)
  251 1:      movw    %fs,TF_FS(%rsp)
  252         movw    %gs,TF_GS(%rsp)
  253         movw    %es,TF_ES(%rsp)
  254         movw    %ds,TF_DS(%rsp)
  255         jmp     alltraps_pushregs_no_rdi
  256 
  257 IDTVEC(dblfault)
  258         subq    $TF_ERR,%rsp
  259         movl    $T_DOUBLEFLT,TF_TRAPNO(%rsp)
  260         movq    $0,TF_ADDR(%rsp)
  261         movq    $0,TF_ERR(%rsp)
  262         movq    %rdi,TF_RDI(%rsp)
  263         movq    %rsi,TF_RSI(%rsp)
  264         movq    %rdx,TF_RDX(%rsp)
  265         movq    %rcx,TF_RCX(%rsp)
  266         movq    %r8,TF_R8(%rsp)
  267         movq    %r9,TF_R9(%rsp)
  268         movq    %rax,TF_RAX(%rsp)
  269         movq    %rbx,TF_RBX(%rsp)
  270         movq    %rbp,TF_RBP(%rsp)
  271         movq    %r10,TF_R10(%rsp)
  272         movq    %r11,TF_R11(%rsp)
  273         movq    %r12,TF_R12(%rsp)
  274         movq    %r13,TF_R13(%rsp)
  275         movq    %r14,TF_R14(%rsp)
  276         movq    %r15,TF_R15(%rsp)
  277         movw    %fs,TF_FS(%rsp)
  278         movw    %gs,TF_GS(%rsp)
  279         movw    %es,TF_ES(%rsp)
  280         movw    %ds,TF_DS(%rsp)
  281         movl    $TF_HASSEGS,TF_FLAGS(%rsp)
  282         cld
  283         testb   $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */
  284         jz      1f                      /* already running with kernel GS.base */
  285         swapgs
  286 1:
  287         movq    %rsp,%rdi
  288         call    dblfault_handler
  289 2:
  290         hlt
  291         jmp     2b
  292 
  293 IDTVEC(page)
  294         subq    $TF_ERR,%rsp
  295         movl    $T_PAGEFLT,TF_TRAPNO(%rsp)
  296         movq    %rdi,TF_RDI(%rsp)       /* free up a GP register */
  297         testb   $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */
  298         jz      1f                      /* already running with kernel GS.base */
  299         swapgs
  300         movq    PCPU(CURPCB),%rdi
  301         andl    $~PCB_FULL_IRET,PCB_FLAGS(%rdi)
  302 1:      movq    %cr2,%rdi               /* preserve %cr2 before ..  */
  303         movq    %rdi,TF_ADDR(%rsp)      /* enabling interrupts. */
  304         movw    %fs,TF_FS(%rsp)
  305         movw    %gs,TF_GS(%rsp)
  306         movw    %es,TF_ES(%rsp)
  307         movw    %ds,TF_DS(%rsp)
  308         testl   $PSL_I,TF_RFLAGS(%rsp)
  309         jz      alltraps_pushregs_no_rdi
  310         sti
  311         jmp     alltraps_pushregs_no_rdi
  312 
  313         /*
  314          * We have to special-case this one.  If we get a trap in doreti() at
  315          * the iretq stage, we'll reenter with the wrong gs state.  We'll have
  316          * to do a special the swapgs in this case even coming from the kernel.
  317          * XXX linux has a trap handler for their equivalent of load_gs().
  318          */
  319 IDTVEC(prot)
  320         subq    $TF_ERR,%rsp
  321         movl    $T_PROTFLT,TF_TRAPNO(%rsp)
  322         movq    $0,TF_ADDR(%rsp)
  323         movq    %rdi,TF_RDI(%rsp)       /* free up a GP register */
  324         leaq    doreti_iret(%rip),%rdi
  325         cmpq    %rdi,TF_RIP(%rsp)
  326         je      1f                      /* kernel but with user gsbase!! */
  327         testb   $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */
  328         jz      2f                      /* already running with kernel GS.base */
  329 1:      swapgs
  330 2:      movq    PCPU(CURPCB),%rdi
  331         orl     $PCB_FULL_IRET,PCB_FLAGS(%rdi)  /* always full iret from GPF */
  332         movw    %fs,TF_FS(%rsp)
  333         movw    %gs,TF_GS(%rsp)
  334         movw    %es,TF_ES(%rsp)
  335         movw    %ds,TF_DS(%rsp)
  336         testl   $PSL_I,TF_RFLAGS(%rsp)
  337         jz      alltraps_pushregs_no_rdi
  338         sti
  339         jmp     alltraps_pushregs_no_rdi
  340 
  341 /*
  342  * Fast syscall entry point.  We enter here with just our new %cs/%ss set,
  343  * and the new privilige level.  We are still running on the old user stack
  344  * pointer.  We have to juggle a few things around to find our stack etc.
  345  * swapgs gives us access to our PCPU space only.
  346  *
  347  * We do not support invoking this from a custom %cs or %ss (e.g. using
  348  * entries from an LDT).
  349  */
  350 IDTVEC(fast_syscall)
  351         swapgs
  352         movq    %rsp,PCPU(SCRATCH_RSP)
  353         movq    PCPU(RSP0),%rsp
  354         /* Now emulate a trapframe. Make the 8 byte alignment odd for call. */
  355         subq    $TF_SIZE,%rsp
  356         /* defer TF_RSP till we have a spare register */
  357         movq    %r11,TF_RFLAGS(%rsp)
  358         movq    %rcx,TF_RIP(%rsp)       /* %rcx original value is in %r10 */
  359         movq    PCPU(SCRATCH_RSP),%r11  /* %r11 already saved */
  360         movq    %r11,TF_RSP(%rsp)       /* user stack pointer */
  361         movw    %fs,TF_FS(%rsp)
  362         movw    %gs,TF_GS(%rsp)
  363         movw    %es,TF_ES(%rsp)
  364         movw    %ds,TF_DS(%rsp)
  365         movq    PCPU(CURPCB),%r11
  366         andl    $~PCB_FULL_IRET,PCB_FLAGS(%r11)
  367         sti
  368         movq    $KUDSEL,TF_SS(%rsp)
  369         movq    $KUCSEL,TF_CS(%rsp)
  370         movq    $2,TF_ERR(%rsp)
  371         movq    %rdi,TF_RDI(%rsp)       /* arg 1 */
  372         movq    %rsi,TF_RSI(%rsp)       /* arg 2 */
  373         movq    %rdx,TF_RDX(%rsp)       /* arg 3 */
  374         movq    %r10,TF_RCX(%rsp)       /* arg 4 */
  375         movq    %r8,TF_R8(%rsp)         /* arg 5 */
  376         movq    %r9,TF_R9(%rsp)         /* arg 6 */
  377         movq    %rax,TF_RAX(%rsp)       /* syscall number */
  378         movq    %rbx,TF_RBX(%rsp)       /* C preserved */
  379         movq    %rbp,TF_RBP(%rsp)       /* C preserved */
  380         movq    %r12,TF_R12(%rsp)       /* C preserved */
  381         movq    %r13,TF_R13(%rsp)       /* C preserved */
  382         movq    %r14,TF_R14(%rsp)       /* C preserved */
  383         movq    %r15,TF_R15(%rsp)       /* C preserved */
  384         movl    $TF_HASSEGS,TF_FLAGS(%rsp)
  385         cld
  386         FAKE_MCOUNT(TF_RIP(%rsp))
  387         movq    PCPU(CURTHREAD),%rdi
  388         movq    %rsp,TD_FRAME(%rdi)
  389         movl    TF_RFLAGS(%rsp),%esi
  390         andl    $PSL_T,%esi
  391         call    amd64_syscall
  392 1:      movq    PCPU(CURPCB),%rax
  393         /* Disable interrupts before testing PCB_FULL_IRET. */
  394         cli
  395         testl   $PCB_FULL_IRET,PCB_FLAGS(%rax)
  396         jnz     3f
  397         /* Check for and handle AST's on return to userland. */
  398         movq    PCPU(CURTHREAD),%rax
  399         testl   $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%rax)
  400         jne     2f
  401         /* Restore preserved registers. */
  402         MEXITCOUNT
  403         movq    TF_RDI(%rsp),%rdi       /* bonus; preserve arg 1 */
  404         movq    TF_RSI(%rsp),%rsi       /* bonus: preserve arg 2 */
  405         movq    TF_RDX(%rsp),%rdx       /* return value 2 */
  406         movq    TF_RAX(%rsp),%rax       /* return value 1 */
  407         movq    TF_RFLAGS(%rsp),%r11    /* original %rflags */
  408         movq    TF_RIP(%rsp),%rcx       /* original %rip */
  409         movq    TF_RSP(%rsp),%rsp       /* user stack pointer */
  410         swapgs
  411         sysretq
  412 
  413 2:      /* AST scheduled. */
  414         sti
  415         movq    %rsp,%rdi
  416         call    ast
  417         jmp     1b
  418 
  419 3:      /* Requested full context restore, use doreti for that. */
  420         MEXITCOUNT
  421         jmp     doreti
  422 
  423 /*
  424  * Here for CYA insurance, in case a "syscall" instruction gets
  425  * issued from 32 bit compatability mode. MSR_CSTAR has to point
  426  * to *something* if EFER_SCE is enabled.
  427  */
  428 IDTVEC(fast_syscall32)
  429         sysret
  430 
  431 /*
  432  * NMI handling is special.
  433  *
  434  * First, NMIs do not respect the state of the processor's RFLAGS.IF
  435  * bit.  The NMI handler may be entered at any time, including when
  436  * the processor is in a critical section with RFLAGS.IF == 0.
  437  * The processor's GS.base value could be invalid on entry to the
  438  * handler.
  439  *
  440  * Second, the processor treats NMIs specially, blocking further NMIs
  441  * until an 'iretq' instruction is executed.  We thus need to execute
  442  * the NMI handler with interrupts disabled, to prevent a nested interrupt
  443  * from executing an 'iretq' instruction and inadvertently taking the
  444  * processor out of NMI mode.
  445  *
  446  * Third, the NMI handler runs on its own stack (tss_ist2). The canonical
  447  * GS.base value for the processor is stored just above the bottom of its
  448  * NMI stack.  For NMIs taken from kernel mode, the current value in
  449  * the processor's GS.base is saved at entry to C-preserved register %r12,
  450  * the canonical value for GS.base is then loaded into the processor, and
  451  * the saved value is restored at exit time.  For NMIs taken from user mode,
  452  * the cheaper 'SWAPGS' instructions are used for swapping GS.base.
  453  */
  454 
  455 IDTVEC(nmi)
  456         subq    $TF_RIP,%rsp
  457         movl    $(T_NMI),TF_TRAPNO(%rsp)
  458         movq    $0,TF_ADDR(%rsp)
  459         movq    $0,TF_ERR(%rsp)
  460         movq    %rdi,TF_RDI(%rsp)
  461         movq    %rsi,TF_RSI(%rsp)
  462         movq    %rdx,TF_RDX(%rsp)
  463         movq    %rcx,TF_RCX(%rsp)
  464         movq    %r8,TF_R8(%rsp)
  465         movq    %r9,TF_R9(%rsp)
  466         movq    %rax,TF_RAX(%rsp)
  467         movq    %rbx,TF_RBX(%rsp)
  468         movq    %rbp,TF_RBP(%rsp)
  469         movq    %r10,TF_R10(%rsp)
  470         movq    %r11,TF_R11(%rsp)
  471         movq    %r12,TF_R12(%rsp)
  472         movq    %r13,TF_R13(%rsp)
  473         movq    %r14,TF_R14(%rsp)
  474         movq    %r15,TF_R15(%rsp)
  475         movw    %fs,TF_FS(%rsp)
  476         movw    %gs,TF_GS(%rsp)
  477         movw    %es,TF_ES(%rsp)
  478         movw    %ds,TF_DS(%rsp)
  479         movl    $TF_HASSEGS,TF_FLAGS(%rsp)
  480         cld
  481         xorl    %ebx,%ebx
  482         testb   $SEL_RPL_MASK,TF_CS(%rsp)
  483         jnz     nmi_fromuserspace
  484         /*
  485          * We've interrupted the kernel.  Preserve GS.base in %r12.
  486          */
  487         movl    $MSR_GSBASE,%ecx
  488         rdmsr
  489         movq    %rax,%r12
  490         shlq    $32,%rdx
  491         orq     %rdx,%r12
  492         /* Retrieve and load the canonical value for GS.base. */
  493         movq    TF_SIZE(%rsp),%rdx
  494         movl    %edx,%eax
  495         shrq    $32,%rdx
  496         wrmsr
  497         jmp     nmi_calltrap
  498 nmi_fromuserspace:
  499         incl    %ebx
  500         swapgs
  501 /* Note: this label is also used by ddb and gdb: */
  502 nmi_calltrap:
  503         FAKE_MCOUNT(TF_RIP(%rsp))
  504         movq    %rsp,%rdi
  505         call    trap
  506         MEXITCOUNT
  507 #ifdef HWPMC_HOOKS
  508         /*
  509          * Capture a userspace callchain if needed.
  510          *
  511          * - Check if the current trap was from user mode.
  512          * - Check if the current thread is valid.
  513          * - Check if the thread requires a user call chain to be
  514          *   captured.
  515          *
  516          * We are still in NMI mode at this point.
  517          */
  518         testl   %ebx,%ebx
  519         jz      nocallchain     /* not from userspace */
  520         movq    PCPU(CURTHREAD),%rax
  521         orq     %rax,%rax       /* curthread present? */
  522         jz      nocallchain
  523         testl   $TDP_CALLCHAIN,TD_PFLAGS(%rax) /* flagged for capture? */
  524         jz      nocallchain
  525         /*
  526          * A user callchain is to be captured, so:
  527          * - Move execution to the regular kernel stack, to allow for
  528          *   nested NMI interrupts.
  529          * - Take the processor out of "NMI" mode by faking an "iret".
  530          * - Enable interrupts, so that copyin() can work.
  531          */
  532         movq    %rsp,%rsi       /* source stack pointer */
  533         movq    $TF_SIZE,%rcx
  534         movq    PCPU(RSP0),%rdx
  535         subq    %rcx,%rdx
  536         movq    %rdx,%rdi       /* destination stack pointer */
  537 
  538         shrq    $3,%rcx         /* trap frame size in long words */
  539         cld
  540         rep
  541         movsq                   /* copy trapframe */
  542 
  543         movl    %ss,%eax
  544         pushq   %rax            /* tf_ss */
  545         pushq   %rdx            /* tf_rsp (on kernel stack) */
  546         pushfq                  /* tf_rflags */
  547         movl    %cs,%eax
  548         pushq   %rax            /* tf_cs */
  549         pushq   $outofnmi       /* tf_rip */
  550         iretq
  551 outofnmi:
  552         /*
  553          * At this point the processor has exited NMI mode and is running
  554          * with interrupts turned off on the normal kernel stack.
  555          *
  556          * If a pending NMI gets recognized at or after this point, it
  557          * will cause a kernel callchain to be traced.
  558          *
  559          * We turn interrupts back on, and call the user callchain capture hook.
  560          */
  561         movq    pmc_hook,%rax
  562         orq     %rax,%rax
  563         jz      nocallchain
  564         movq    PCPU(CURTHREAD),%rdi            /* thread */
  565         movq    $PMC_FN_USER_CALLCHAIN,%rsi     /* command */
  566         movq    %rsp,%rdx                       /* frame */
  567         sti
  568         call    *%rax
  569         cli
  570 nocallchain:
  571 #endif
  572         testl   %ebx,%ebx
  573         jnz     doreti_exit
  574 nmi_kernelexit:
  575         /*
  576          * Put back the preserved MSR_GSBASE value.
  577          */
  578         movl    $MSR_GSBASE,%ecx
  579         movq    %r12,%rdx
  580         movl    %edx,%eax
  581         shrq    $32,%rdx
  582         wrmsr
  583 nmi_restoreregs:
  584         movq    TF_RDI(%rsp),%rdi
  585         movq    TF_RSI(%rsp),%rsi
  586         movq    TF_RDX(%rsp),%rdx
  587         movq    TF_RCX(%rsp),%rcx
  588         movq    TF_R8(%rsp),%r8
  589         movq    TF_R9(%rsp),%r9
  590         movq    TF_RAX(%rsp),%rax
  591         movq    TF_RBX(%rsp),%rbx
  592         movq    TF_RBP(%rsp),%rbp
  593         movq    TF_R10(%rsp),%r10
  594         movq    TF_R11(%rsp),%r11
  595         movq    TF_R12(%rsp),%r12
  596         movq    TF_R13(%rsp),%r13
  597         movq    TF_R14(%rsp),%r14
  598         movq    TF_R15(%rsp),%r15
  599         addq    $TF_RIP,%rsp
  600         jmp     doreti_iret
  601 
  602 ENTRY(fork_trampoline)
  603         movq    %r12,%rdi               /* function */
  604         movq    %rbx,%rsi               /* arg1 */
  605         movq    %rsp,%rdx               /* trapframe pointer */
  606         call    fork_exit
  607         MEXITCOUNT
  608         jmp     doreti                  /* Handle any ASTs */
  609 
  610 /*
  611  * To efficiently implement classification of trap and interrupt handlers
  612  * for profiling, there must be only trap handlers between the labels btrap
  613  * and bintr, and only interrupt handlers between the labels bintr and
  614  * eintr.  This is implemented (partly) by including files that contain
  615  * some of the handlers.  Before including the files, set up a normal asm
  616  * environment so that the included files doen't need to know that they are
  617  * included.
  618  */
  619 
  620 #ifdef COMPAT_FREEBSD32
  621         .data
  622         .p2align 4
  623         .text
  624         SUPERALIGN_TEXT
  625 
  626 #include <amd64/ia32/ia32_exception.S>
  627 #endif
  628 
  629         .data
  630         .p2align 4
  631         .text
  632         SUPERALIGN_TEXT
  633 MCOUNT_LABEL(bintr)
  634 
  635 #include <amd64/amd64/apic_vector.S>
  636 
  637 #ifdef DEV_ATPIC
  638         .data
  639         .p2align 4
  640         .text
  641         SUPERALIGN_TEXT
  642 
  643 #include <amd64/amd64/atpic_vector.S>
  644 #endif
  645 
  646         .text
  647 MCOUNT_LABEL(eintr)
  648 
  649 /*
  650  * void doreti(struct trapframe)
  651  *
  652  * Handle return from interrupts, traps and syscalls.
  653  */
  654         .text
  655         SUPERALIGN_TEXT
  656         .type   doreti,@function
  657 doreti:
  658         FAKE_MCOUNT($bintr)             /* init "from" bintr -> doreti */
  659         /*
  660          * Check if ASTs can be handled now.
  661          */
  662         testb   $SEL_RPL_MASK,TF_CS(%rsp) /* are we returning to user mode? */
  663         jz      doreti_exit             /* can't handle ASTs now if not */
  664 
  665 doreti_ast:
  666         /*
  667          * Check for ASTs atomically with returning.  Disabling CPU
  668          * interrupts provides sufficient locking even in the SMP case,
  669          * since we will be informed of any new ASTs by an IPI.
  670          */
  671         cli
  672         movq    PCPU(CURTHREAD),%rax
  673         testl   $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%rax)
  674         je      doreti_exit
  675         sti
  676         movq    %rsp,%rdi       /* pass a pointer to the trapframe */
  677         call    ast
  678         jmp     doreti_ast
  679 
  680         /*
  681          * doreti_exit: pop registers, iret.
  682          *
  683          *      The segment register pop is a special case, since it may
  684          *      fault if (for example) a sigreturn specifies bad segment
  685          *      registers.  The fault is handled in trap.c.
  686          */
  687 doreti_exit:
  688         MEXITCOUNT
  689         movq    PCPU(CURPCB),%r8
  690 
  691         /*
  692          * Do not reload segment registers for kernel.
  693          * Since we do not reload segments registers with sane
  694          * values on kernel entry, descriptors referenced by
  695          * segments registers might be not valid.  This is fatal
  696          * for user mode, but is not a problem for the kernel.
  697          */
  698         testb   $SEL_RPL_MASK,TF_CS(%rsp)
  699         jz      ld_regs
  700         testl   $PCB_FULL_IRET,PCB_FLAGS(%r8)
  701         jz      ld_regs
  702         testl   $TF_HASSEGS,TF_FLAGS(%rsp)
  703         je      set_segs
  704 
  705 do_segs:
  706         /* Restore %fs and fsbase */
  707         movw    TF_FS(%rsp),%ax
  708         .globl  ld_fs
  709 ld_fs:
  710         movw    %ax,%fs
  711         cmpw    $KUF32SEL,%ax
  712         jne     1f
  713         movl    $MSR_FSBASE,%ecx
  714         movl    PCB_FSBASE(%r8),%eax
  715         movl    PCB_FSBASE+4(%r8),%edx
  716         .globl  ld_fsbase
  717 ld_fsbase:
  718         wrmsr
  719 1:
  720         /* Restore %gs and gsbase */
  721         movw    TF_GS(%rsp),%si
  722         pushfq
  723         cli
  724         movl    $MSR_GSBASE,%ecx
  725         rdmsr
  726         .globl  ld_gs
  727 ld_gs:
  728         movw    %si,%gs
  729         wrmsr
  730         popfq
  731         cmpw    $KUG32SEL,%si
  732         jne     1f
  733         movl    $MSR_KGSBASE,%ecx
  734         movl    PCB_GSBASE(%r8),%eax
  735         movl    PCB_GSBASE+4(%r8),%edx
  736         .globl  ld_gsbase
  737 ld_gsbase:
  738         wrmsr
  739 1:
  740         .globl  ld_es
  741 ld_es:
  742         movw    TF_ES(%rsp),%es
  743         .globl  ld_ds
  744 ld_ds:
  745         movw    TF_DS(%rsp),%ds
  746 ld_regs:
  747         movq    TF_RDI(%rsp),%rdi
  748         movq    TF_RSI(%rsp),%rsi
  749         movq    TF_RDX(%rsp),%rdx
  750         movq    TF_RCX(%rsp),%rcx
  751         movq    TF_R8(%rsp),%r8
  752         movq    TF_R9(%rsp),%r9
  753         movq    TF_RAX(%rsp),%rax
  754         movq    TF_RBX(%rsp),%rbx
  755         movq    TF_RBP(%rsp),%rbp
  756         movq    TF_R10(%rsp),%r10
  757         movq    TF_R11(%rsp),%r11
  758         movq    TF_R12(%rsp),%r12
  759         movq    TF_R13(%rsp),%r13
  760         movq    TF_R14(%rsp),%r14
  761         movq    TF_R15(%rsp),%r15
  762         testb   $SEL_RPL_MASK,TF_CS(%rsp) /* Did we come from kernel? */
  763         jz      1f                      /* keep running with kernel GS.base */
  764         cli
  765         swapgs
  766 1:
  767         addq    $TF_RIP,%rsp            /* skip over tf_err, tf_trapno */
  768         .globl  doreti_iret
  769 doreti_iret:
  770         iretq
  771 
  772 set_segs:
  773         movw    $KUDSEL,%ax
  774         movw    %ax,TF_DS(%rsp)
  775         movw    %ax,TF_ES(%rsp)
  776         movw    $KUF32SEL,TF_FS(%rsp)
  777         movw    $KUG32SEL,TF_GS(%rsp)
  778         jmp     do_segs
  779 
  780         /*
  781          * doreti_iret_fault.  Alternative return code for
  782          * the case where we get a fault in the doreti_exit code
  783          * above.  trap() (amd64/amd64/trap.c) catches this specific
  784          * case, sends the process a signal and continues in the
  785          * corresponding place in the code below.
  786          */
  787         ALIGN_TEXT
  788         .globl  doreti_iret_fault
  789 doreti_iret_fault:
  790         subq    $TF_RIP,%rsp            /* space including tf_err, tf_trapno */
  791         testl   $PSL_I,TF_RFLAGS(%rsp)
  792         jz      1f
  793         sti
  794 1:
  795         movw    %fs,TF_FS(%rsp)
  796         movw    %gs,TF_GS(%rsp)
  797         movw    %es,TF_ES(%rsp)
  798         movw    %ds,TF_DS(%rsp)
  799         movl    $TF_HASSEGS,TF_FLAGS(%rsp)
  800         movq    %rdi,TF_RDI(%rsp)
  801         movq    %rsi,TF_RSI(%rsp)
  802         movq    %rdx,TF_RDX(%rsp)
  803         movq    %rcx,TF_RCX(%rsp)
  804         movq    %r8,TF_R8(%rsp)
  805         movq    %r9,TF_R9(%rsp)
  806         movq    %rax,TF_RAX(%rsp)
  807         movq    %rbx,TF_RBX(%rsp)
  808         movq    %rbp,TF_RBP(%rsp)
  809         movq    %r10,TF_R10(%rsp)
  810         movq    %r11,TF_R11(%rsp)
  811         movq    %r12,TF_R12(%rsp)
  812         movq    %r13,TF_R13(%rsp)
  813         movq    %r14,TF_R14(%rsp)
  814         movq    %r15,TF_R15(%rsp)
  815         movl    $T_PROTFLT,TF_TRAPNO(%rsp)
  816         movq    $0,TF_ERR(%rsp) /* XXX should be the error code */
  817         movq    $0,TF_ADDR(%rsp)
  818         FAKE_MCOUNT(TF_RIP(%rsp))
  819         jmp     calltrap
  820 
  821         ALIGN_TEXT
  822         .globl  ds_load_fault
  823 ds_load_fault:
  824         movl    $T_PROTFLT,TF_TRAPNO(%rsp)
  825         testl   $PSL_I,TF_RFLAGS(%rsp)
  826         jz      1f
  827         sti
  828 1:
  829         movq    %rsp,%rdi
  830         call    trap
  831         movw    $KUDSEL,TF_DS(%rsp)
  832         jmp     doreti
  833 
  834         ALIGN_TEXT
  835         .globl  es_load_fault
  836 es_load_fault:
  837         movl    $T_PROTFLT,TF_TRAPNO(%rsp)
  838         testl   $PSL_I,TF_RFLAGS(%rsp)
  839         jz      1f
  840         sti
  841 1:
  842         movq    %rsp,%rdi
  843         call    trap
  844         movw    $KUDSEL,TF_ES(%rsp)
  845         jmp     doreti
  846 
  847         ALIGN_TEXT
  848         .globl  fs_load_fault
  849 fs_load_fault:
  850         testl   $PSL_I,TF_RFLAGS(%rsp)
  851         jz      1f
  852         sti
  853 1:
  854         movl    $T_PROTFLT,TF_TRAPNO(%rsp)
  855         movq    %rsp,%rdi
  856         call    trap
  857         movw    $KUF32SEL,TF_FS(%rsp)
  858         jmp     doreti
  859 
  860         ALIGN_TEXT
  861         .globl  gs_load_fault
  862 gs_load_fault:
  863         popfq
  864         movl    $T_PROTFLT,TF_TRAPNO(%rsp)
  865         testl   $PSL_I,TF_RFLAGS(%rsp)
  866         jz      1f
  867         sti
  868 1:
  869         movq    %rsp,%rdi
  870         call    trap
  871         movw    $KUG32SEL,TF_GS(%rsp)
  872         jmp     doreti
  873 
  874         ALIGN_TEXT
  875         .globl  fsbase_load_fault
  876 fsbase_load_fault:
  877         movl    $T_PROTFLT,TF_TRAPNO(%rsp)
  878         testl   $PSL_I,TF_RFLAGS(%rsp)
  879         jz      1f
  880         sti
  881 1:
  882         movq    %rsp,%rdi
  883         call    trap
  884         movq    PCPU(CURTHREAD),%r8
  885         movq    TD_PCB(%r8),%r8
  886         movq    $0,PCB_FSBASE(%r8)
  887         jmp     doreti
  888 
  889         ALIGN_TEXT
  890         .globl  gsbase_load_fault
  891 gsbase_load_fault:
  892         movl    $T_PROTFLT,TF_TRAPNO(%rsp)
  893         testl   $PSL_I,TF_RFLAGS(%rsp)
  894         jz      1f
  895         sti
  896 1:
  897         movq    %rsp,%rdi
  898         call    trap
  899         movq    PCPU(CURTHREAD),%r8
  900         movq    TD_PCB(%r8),%r8
  901         movq    $0,PCB_GSBASE(%r8)
  902         jmp     doreti
  903 
  904 #ifdef HWPMC_HOOKS
  905         ENTRY(end_exceptions)
  906 #endif

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