1 /*-
2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD: releng/6.1/sys/amd64/amd64/intr_machdep.c 158179 2006-04-30 16:44:43Z cvs2svn $
30 */
31
32 /*
33 * Machine dependent interrupt code for amd64. For amd64, we have to
34 * deal with different PICs. Thus, we use the passed in vector to lookup
35 * an interrupt source associated with that vector. The interrupt source
36 * describes which PIC the source belongs to and includes methods to handle
37 * that source.
38 */
39
40 #include "opt_ddb.h"
41
42 #include <sys/param.h>
43 #include <sys/bus.h>
44 #include <sys/interrupt.h>
45 #include <sys/lock.h>
46 #include <sys/ktr.h>
47 #include <sys/kernel.h>
48 #include <sys/mutex.h>
49 #include <sys/proc.h>
50 #include <sys/syslog.h>
51 #include <sys/systm.h>
52 #include <machine/clock.h>
53 #include <machine/intr_machdep.h>
54 #ifdef DDB
55 #include <ddb/ddb.h>
56 #endif
57
58 #define MAX_STRAY_LOG 5
59
60 typedef void (*mask_fn)(void *);
61
62 static int intrcnt_index;
63 static struct intsrc *interrupt_sources[NUM_IO_INTS];
64 static struct mtx intr_table_lock;
65
66 #ifdef SMP
67 static int assign_cpu;
68
69 static void intr_assign_next_cpu(struct intsrc *isrc);
70 #endif
71
72 static void intr_init(void *__dummy);
73 static void intrcnt_setname(const char *name, int index);
74 static void intrcnt_updatename(struct intsrc *is);
75 static void intrcnt_register(struct intsrc *is);
76
77 /*
78 * Register a new interrupt source with the global interrupt system.
79 * The global interrupts need to be disabled when this function is
80 * called.
81 */
82 int
83 intr_register_source(struct intsrc *isrc)
84 {
85 int error, vector;
86
87 vector = isrc->is_pic->pic_vector(isrc);
88 if (interrupt_sources[vector] != NULL)
89 return (EEXIST);
90 error = intr_event_create(&isrc->is_event, isrc, 0,
91 (mask_fn)isrc->is_pic->pic_enable_source, "irq%d:", vector);
92 if (error)
93 return (error);
94 mtx_lock_spin(&intr_table_lock);
95 if (interrupt_sources[vector] != NULL) {
96 mtx_unlock_spin(&intr_table_lock);
97 intr_event_destroy(isrc->is_event);
98 return (EEXIST);
99 }
100 intrcnt_register(isrc);
101 interrupt_sources[vector] = isrc;
102 isrc->is_enabled = 0;
103 mtx_unlock_spin(&intr_table_lock);
104 return (0);
105 }
106
107 struct intsrc *
108 intr_lookup_source(int vector)
109 {
110
111 return (interrupt_sources[vector]);
112 }
113
114 int
115 intr_add_handler(const char *name, int vector, driver_intr_t handler,
116 void *arg, enum intr_type flags, void **cookiep)
117 {
118 struct intsrc *isrc;
119 int error;
120
121 isrc = intr_lookup_source(vector);
122 if (isrc == NULL)
123 return (EINVAL);
124 error = intr_event_add_handler(isrc->is_event, name, handler, arg,
125 intr_priority(flags), flags, cookiep);
126 if (error == 0) {
127 intrcnt_updatename(isrc);
128 mtx_lock_spin(&intr_table_lock);
129 if (!isrc->is_enabled) {
130 isrc->is_enabled = 1;
131 #ifdef SMP
132 if (assign_cpu)
133 intr_assign_next_cpu(isrc);
134 #endif
135 mtx_unlock_spin(&intr_table_lock);
136 isrc->is_pic->pic_enable_intr(isrc);
137 } else
138 mtx_unlock_spin(&intr_table_lock);
139 isrc->is_pic->pic_enable_source(isrc);
140 }
141 return (error);
142 }
143
144 int
145 intr_remove_handler(void *cookie)
146 {
147 int error;
148
149 error = intr_event_remove_handler(cookie);
150 #ifdef XXX
151 if (error == 0)
152 intrcnt_updatename(/* XXX */);
153 #endif
154 return (error);
155 }
156
157 int
158 intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
159 {
160 struct intsrc *isrc;
161
162 isrc = intr_lookup_source(vector);
163 if (isrc == NULL)
164 return (EINVAL);
165 return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
166 }
167
168 void
169 intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe)
170 {
171 struct thread *td;
172 struct intr_event *ie;
173 struct intr_handler *ih;
174 int error, vector, thread;
175
176 td = curthread;
177
178 /*
179 * We count software interrupts when we process them. The
180 * code here follows previous practice, but there's an
181 * argument for counting hardware interrupts when they're
182 * processed too.
183 */
184 (*isrc->is_count)++;
185 PCPU_LAZY_INC(cnt.v_intr);
186
187 ie = isrc->is_event;
188
189 /*
190 * XXX: We assume that IRQ 0 is only used for the ISA timer
191 * device (clk).
192 */
193 vector = isrc->is_pic->pic_vector(isrc);
194 if (vector == 0)
195 clkintr_pending = 1;
196
197 /*
198 * For stray interrupts, mask and EOI the source, bump the
199 * stray count, and log the condition.
200 */
201 if (ie == NULL || TAILQ_EMPTY(&ie->ie_handlers)) {
202 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
203 (*isrc->is_straycount)++;
204 if (*isrc->is_straycount < MAX_STRAY_LOG)
205 log(LOG_ERR, "stray irq%d\n", vector);
206 else if (*isrc->is_straycount == MAX_STRAY_LOG)
207 log(LOG_CRIT,
208 "too many stray irq %d's: not logging anymore\n",
209 vector);
210 return;
211 }
212
213 /*
214 * Execute fast interrupt handlers directly.
215 * To support clock handlers, if a handler registers
216 * with a NULL argument, then we pass it a pointer to
217 * an intrframe as its argument.
218 */
219 td->td_intr_nesting_level++;
220 thread = 0;
221 critical_enter();
222 TAILQ_FOREACH(ih, &ie->ie_handlers, ih_next) {
223 if (!(ih->ih_flags & IH_FAST)) {
224 thread = 1;
225 continue;
226 }
227 CTR4(KTR_INTR, "%s: exec %p(%p) for %s", __func__,
228 ih->ih_handler, ih->ih_argument == NULL ? iframe :
229 ih->ih_argument, ih->ih_name);
230 if (ih->ih_argument == NULL)
231 ih->ih_handler(iframe);
232 else
233 ih->ih_handler(ih->ih_argument);
234 }
235
236 /*
237 * If there are any threaded handlers that need to run,
238 * mask the source as well as sending it an EOI. Otherwise,
239 * just send it an EOI but leave it unmasked.
240 */
241 if (thread)
242 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
243 else
244 isrc->is_pic->pic_eoi_source(isrc);
245 critical_exit();
246
247 /* Schedule the ithread if needed. */
248 if (thread) {
249 error = intr_event_schedule_thread(ie);
250 KASSERT(error == 0, ("bad stray interrupt"));
251 }
252 td->td_intr_nesting_level--;
253 }
254
255 void
256 intr_resume(void)
257 {
258 struct intsrc **isrc;
259 int i;
260
261 mtx_lock_spin(&intr_table_lock);
262 for (i = 0, isrc = interrupt_sources; i < NUM_IO_INTS; i++, isrc++)
263 if (*isrc != NULL && (*isrc)->is_pic->pic_resume != NULL)
264 (*isrc)->is_pic->pic_resume(*isrc);
265 mtx_unlock_spin(&intr_table_lock);
266 }
267
268 void
269 intr_suspend(void)
270 {
271 struct intsrc **isrc;
272 int i;
273
274 mtx_lock_spin(&intr_table_lock);
275 for (i = 0, isrc = interrupt_sources; i < NUM_IO_INTS; i++, isrc++)
276 if (*isrc != NULL && (*isrc)->is_pic->pic_suspend != NULL)
277 (*isrc)->is_pic->pic_suspend(*isrc);
278 mtx_unlock_spin(&intr_table_lock);
279 }
280
281 static void
282 intrcnt_setname(const char *name, int index)
283 {
284
285 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
286 MAXCOMLEN, name);
287 }
288
289 static void
290 intrcnt_updatename(struct intsrc *is)
291 {
292
293 intrcnt_setname(is->is_event->ie_fullname, is->is_index);
294 }
295
296 static void
297 intrcnt_register(struct intsrc *is)
298 {
299 char straystr[MAXCOMLEN + 1];
300
301 /* mtx_assert(&intr_table_lock, MA_OWNED); */
302 KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__));
303 is->is_index = intrcnt_index;
304 intrcnt_index += 2;
305 snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
306 is->is_pic->pic_vector(is));
307 intrcnt_updatename(is);
308 is->is_count = &intrcnt[is->is_index];
309 intrcnt_setname(straystr, is->is_index + 1);
310 is->is_straycount = &intrcnt[is->is_index + 1];
311 }
312
313 void
314 intrcnt_add(const char *name, u_long **countp)
315 {
316
317 mtx_lock_spin(&intr_table_lock);
318 *countp = &intrcnt[intrcnt_index];
319 intrcnt_setname(name, intrcnt_index);
320 intrcnt_index++;
321 mtx_unlock_spin(&intr_table_lock);
322 }
323
324 static void
325 intr_init(void *dummy __unused)
326 {
327
328 intrcnt_setname("???", 0);
329 intrcnt_index = 1;
330 mtx_init(&intr_table_lock, "intr table", NULL, MTX_SPIN);
331 }
332 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL)
333
334 #ifdef DDB
335 /*
336 * Dump data about interrupt handlers
337 */
338 DB_SHOW_COMMAND(irqs, db_show_irqs)
339 {
340 struct intsrc **isrc;
341 int i, quit, verbose;
342
343 quit = 0;
344 if (strcmp(modif, "v") == 0)
345 verbose = 1;
346 else
347 verbose = 0;
348 isrc = interrupt_sources;
349 db_setup_paging(db_simple_pager, &quit, db_lines_per_page);
350 for (i = 0; i < NUM_IO_INTS && !quit; i++, isrc++)
351 if (*isrc != NULL)
352 db_dump_intr_event((*isrc)->is_event, verbose);
353 }
354 #endif
355
356 #ifdef SMP
357 /*
358 * Support for balancing interrupt sources across CPUs. For now we just
359 * allocate CPUs round-robin.
360 */
361
362 static u_int cpu_apic_ids[MAXCPU];
363 static int current_cpu, num_cpus;
364
365 static void
366 intr_assign_next_cpu(struct intsrc *isrc)
367 {
368 struct pic *pic;
369 u_int apic_id;
370
371 /*
372 * Assign this source to a local APIC in a round-robin fashion.
373 */
374 pic = isrc->is_pic;
375 apic_id = cpu_apic_ids[current_cpu];
376 current_cpu++;
377 if (current_cpu >= num_cpus)
378 current_cpu = 0;
379 if (bootverbose) {
380 printf("INTR: Assigning IRQ %d", pic->pic_vector(isrc));
381 printf(" to local APIC %u\n", apic_id);
382 }
383 pic->pic_assign_cpu(isrc, apic_id);
384 }
385
386 /*
387 * Add a local APIC ID to our list of valid local APIC IDs that can
388 * be destinations of interrupts.
389 */
390 void
391 intr_add_cpu(u_int apic_id)
392 {
393
394 if (bootverbose)
395 printf("INTR: Adding local APIC %d as a target\n", apic_id);
396 if (num_cpus >= MAXCPU)
397 panic("WARNING: Local APIC IDs exhausted!");
398 cpu_apic_ids[num_cpus] = apic_id;
399 num_cpus++;
400 }
401
402 /*
403 * Distribute all the interrupt sources among the available CPUs once the
404 * AP's have been launched.
405 */
406 static void
407 intr_shuffle_irqs(void *arg __unused)
408 {
409 struct intsrc *isrc;
410 int i;
411
412 /* Don't bother on UP. */
413 if (num_cpus <= 1)
414 return;
415
416 /* Round-robin assign each enabled source a CPU. */
417 mtx_lock_spin(&intr_table_lock);
418 assign_cpu = 1;
419 for (i = 0; i < NUM_IO_INTS; i++) {
420 isrc = interrupt_sources[i];
421 if (isrc != NULL && isrc->is_enabled)
422 intr_assign_next_cpu(isrc);
423 }
424 mtx_unlock_spin(&intr_table_lock);
425 }
426 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs, NULL)
427 #endif
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