Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/amd64/amd64/machdep.c
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1 /*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41 #include <sys/cdefs.h> 42 __FBSDID("$FreeBSD: releng/6.1/sys/amd64/amd64/machdep.c 158179 2006-04-30 16:44:43Z cvs2svn $"); 43 44 #include "opt_atalk.h" 45 #include "opt_atpic.h" 46 #include "opt_compat.h" 47 #include "opt_cpu.h" 48 #include "opt_ddb.h" 49 #include "opt_inet.h" 50 #include "opt_ipx.h" 51 #include "opt_isa.h" 52 #include "opt_kstack_pages.h" 53 #include "opt_maxmem.h" 54 #include "opt_msgbuf.h" 55 #include "opt_perfmon.h" 56 57 #include <sys/param.h> 58 #include <sys/proc.h> 59 #include <sys/systm.h> 60 #include <sys/bio.h> 61 #include <sys/buf.h> 62 #include <sys/bus.h> 63 #include <sys/callout.h> 64 #include <sys/cons.h> 65 #include <sys/cpu.h> 66 #include <sys/eventhandler.h> 67 #include <sys/exec.h> 68 #include <sys/imgact.h> 69 #include <sys/kdb.h> 70 #include <sys/kernel.h> 71 #include <sys/ktr.h> 72 #include <sys/linker.h> 73 #include <sys/lock.h> 74 #include <sys/malloc.h> 75 #include <sys/memrange.h> 76 #include <sys/msgbuf.h> 77 #include <sys/mutex.h> 78 #include <sys/pcpu.h> 79 #include <sys/ptrace.h> 80 #include <sys/reboot.h> 81 #include <sys/sched.h> 82 #include <sys/signalvar.h> 83 #include <sys/sysctl.h> 84 #include <sys/sysent.h> 85 #include <sys/sysproto.h> 86 #include <sys/ucontext.h> 87 #include <sys/vmmeter.h> 88 89 #include <vm/vm.h> 90 #include <vm/vm_extern.h> 91 #include <vm/vm_kern.h> 92 #include <vm/vm_page.h> 93 #include <vm/vm_map.h> 94 #include <vm/vm_object.h> 95 #include <vm/vm_pager.h> 96 #include <vm/vm_param.h> 97 98 #ifdef DDB 99 #ifndef KDB 100 #error KDB must be enabled in order for DDB to work! 101 #endif 102 #endif 103 #include <ddb/ddb.h> 104 105 #include <net/netisr.h> 106 107 #include <machine/clock.h> 108 #include <machine/cpu.h> 109 #include <machine/cputypes.h> 110 #include <machine/intr_machdep.h> 111 #include <machine/md_var.h> 112 #include <machine/metadata.h> 113 #include <machine/pc/bios.h> 114 #include <machine/pcb.h> 115 #include <machine/proc.h> 116 #include <machine/reg.h> 117 #include <machine/sigframe.h> 118 #include <machine/specialreg.h> 119 #ifdef PERFMON 120 #include <machine/perfmon.h> 121 #endif 122 #include <machine/tss.h> 123 #ifdef SMP 124 #include <machine/smp.h> 125 #endif 126 127 #include <dev/ic/i8259.h> 128 #include <amd64/isa/icu.h> 129 #include <machine/apicvar.h> 130 131 #include <isa/isareg.h> 132 #include <isa/rtc.h> 133 134 /* Sanity check for __curthread() */ 135 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 136 137 extern u_int64_t hammer_time(u_int64_t, u_int64_t); 138 extern void dblfault_handler(void); 139 140 extern void printcpuinfo(void); /* XXX header file */ 141 extern void identify_cpu(void); 142 extern void panicifcpuunsupported(void); 143 144 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 145 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 146 147 static void cpu_startup(void *); 148 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 149 static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 150 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 151 152 #ifdef DDB 153 extern vm_offset_t ksym_start, ksym_end; 154 #endif 155 156 int _udatasel, _ucodesel, _ucode32sel; 157 158 int cold = 1; 159 160 long Maxmem = 0; 161 long realmem = 0; 162 163 vm_paddr_t phys_avail[20]; 164 vm_paddr_t dump_avail[20]; 165 166 /* must be 2 less so 0 0 can signal end of chunks */ 167 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 168 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 169 170 struct kva_md_info kmi; 171 172 static struct trapframe proc0_tf; 173 struct region_descriptor r_gdt, r_idt; 174 175 struct pcpu __pcpu[MAXCPU]; 176 177 struct mtx icu_lock; 178 179 struct mem_range_softc mem_range_softc; 180 181 static void 182 cpu_startup(dummy) 183 void *dummy; 184 { 185 /* 186 * Good {morning,afternoon,evening,night}. 187 */ 188 startrtclock(); 189 printcpuinfo(); 190 panicifcpuunsupported(); 191 #ifdef PERFMON 192 perfmon_init(); 193 #endif 194 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 195 ptoa((uintmax_t)Maxmem) / 1048576); 196 realmem = Maxmem; 197 /* 198 * Display any holes after the first chunk of extended memory. 199 */ 200 if (bootverbose) { 201 int indx; 202 203 printf("Physical memory chunk(s):\n"); 204 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 205 vm_paddr_t size; 206 207 size = phys_avail[indx + 1] - phys_avail[indx]; 208 printf( 209 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 210 (uintmax_t)phys_avail[indx], 211 (uintmax_t)phys_avail[indx + 1] - 1, 212 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 213 } 214 } 215 216 vm_ksubmap_init(&kmi); 217 218 printf("avail memory = %ju (%ju MB)\n", 219 ptoa((uintmax_t)cnt.v_free_count), 220 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 221 222 /* 223 * Set up buffers, so they can be used to read disk labels. 224 */ 225 bufinit(); 226 vm_pager_bufferinit(); 227 228 cpu_setregs(); 229 } 230 231 /* 232 * Send an interrupt to process. 233 * 234 * Stack is set up to allow sigcode stored 235 * at top to call routine, followed by kcall 236 * to sigreturn routine below. After sigreturn 237 * resets the signal mask, the stack, and the 238 * frame pointer, it returns to the user 239 * specified pc, psl. 240 */ 241 void 242 sendsig(catcher, sig, mask, code) 243 sig_t catcher; 244 int sig; 245 sigset_t *mask; 246 u_long code; 247 { 248 struct sigframe sf, *sfp; 249 struct proc *p; 250 struct thread *td; 251 struct sigacts *psp; 252 char *sp; 253 struct trapframe *regs; 254 int oonstack; 255 256 td = curthread; 257 p = td->td_proc; 258 PROC_LOCK_ASSERT(p, MA_OWNED); 259 psp = p->p_sigacts; 260 mtx_assert(&psp->ps_mtx, MA_OWNED); 261 regs = td->td_frame; 262 oonstack = sigonstack(regs->tf_rsp); 263 264 /* Save user context. */ 265 bzero(&sf, sizeof(sf)); 266 sf.sf_uc.uc_sigmask = *mask; 267 sf.sf_uc.uc_stack = td->td_sigstk; 268 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 269 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 270 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 271 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 272 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 273 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 274 fpstate_drop(td); 275 276 /* Allocate space for the signal handler context. */ 277 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 278 SIGISMEMBER(psp->ps_sigonstack, sig)) { 279 sp = td->td_sigstk.ss_sp + 280 td->td_sigstk.ss_size - sizeof(struct sigframe); 281 #if defined(COMPAT_43) 282 td->td_sigstk.ss_flags |= SS_ONSTACK; 283 #endif 284 } else 285 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 286 /* Align to 16 bytes. */ 287 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 288 289 /* Translate the signal if appropriate. */ 290 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 291 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 292 293 /* Build the argument list for the signal handler. */ 294 regs->tf_rdi = sig; /* arg 1 in %rdi */ 295 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 296 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 297 /* Signal handler installed with SA_SIGINFO. */ 298 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 299 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 300 301 /* Fill in POSIX parts */ 302 sf.sf_si.si_signo = sig; 303 sf.sf_si.si_code = code; 304 regs->tf_rcx = regs->tf_addr; /* arg 4 in %rcx */ 305 } else { 306 /* Old FreeBSD-style arguments. */ 307 regs->tf_rsi = code; /* arg 2 in %rsi */ 308 regs->tf_rcx = regs->tf_addr; /* arg 4 in %rcx */ 309 sf.sf_ahu.sf_handler = catcher; 310 } 311 mtx_unlock(&psp->ps_mtx); 312 PROC_UNLOCK(p); 313 314 /* 315 * Copy the sigframe out to the user's stack. 316 */ 317 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 318 #ifdef DEBUG 319 printf("process %ld has trashed its stack\n", (long)p->p_pid); 320 #endif 321 PROC_LOCK(p); 322 sigexit(td, SIGILL); 323 } 324 325 regs->tf_rsp = (long)sfp; 326 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 327 regs->tf_rflags &= ~PSL_T; 328 regs->tf_cs = _ucodesel; 329 PROC_LOCK(p); 330 mtx_lock(&psp->ps_mtx); 331 } 332 333 /* 334 * Build siginfo_t for SA thread 335 */ 336 void 337 cpu_thread_siginfo(int sig, u_long code, siginfo_t *si) 338 { 339 struct proc *p; 340 struct thread *td; 341 struct trapframe *regs; 342 343 td = curthread; 344 p = td->td_proc; 345 regs = td->td_frame; 346 PROC_LOCK_ASSERT(p, MA_OWNED); 347 348 bzero(si, sizeof(*si)); 349 si->si_signo = sig; 350 si->si_code = code; 351 si->si_addr = (void *)regs->tf_addr; 352 /* XXXKSE fill other fields */ 353 } 354 355 /* 356 * System call to cleanup state after a signal 357 * has been taken. Reset signal mask and 358 * stack state from context left by sendsig (above). 359 * Return to previous pc and psl as specified by 360 * context left by sendsig. Check carefully to 361 * make sure that the user has not modified the 362 * state to gain improper privileges. 363 * 364 * MPSAFE 365 */ 366 int 367 sigreturn(td, uap) 368 struct thread *td; 369 struct sigreturn_args /* { 370 const __ucontext *sigcntxp; 371 } */ *uap; 372 { 373 ucontext_t uc; 374 struct proc *p = td->td_proc; 375 struct trapframe *regs; 376 const ucontext_t *ucp; 377 long rflags; 378 int cs, error, ret; 379 380 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 381 if (error != 0) 382 return (error); 383 ucp = &uc; 384 regs = td->td_frame; 385 rflags = ucp->uc_mcontext.mc_rflags; 386 /* 387 * Don't allow users to change privileged or reserved flags. 388 */ 389 /* 390 * XXX do allow users to change the privileged flag PSL_RF. 391 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 392 * should sometimes set it there too. tf_rflags is kept in 393 * the signal context during signal handling and there is no 394 * other place to remember it, so the PSL_RF bit may be 395 * corrupted by the signal handler without us knowing. 396 * Corruption of the PSL_RF bit at worst causes one more or 397 * one less debugger trap, so allowing it is fairly harmless. 398 */ 399 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 400 printf("sigreturn: rflags = 0x%lx\n", rflags); 401 return (EINVAL); 402 } 403 404 /* 405 * Don't allow users to load a valid privileged %cs. Let the 406 * hardware check for invalid selectors, excess privilege in 407 * other selectors, invalid %eip's and invalid %esp's. 408 */ 409 cs = ucp->uc_mcontext.mc_cs; 410 if (!CS_SECURE(cs)) { 411 printf("sigreturn: cs = 0x%x\n", cs); 412 trapsignal(td, SIGBUS, T_PROTFLT); 413 return (EINVAL); 414 } 415 416 ret = set_fpcontext(td, &ucp->uc_mcontext); 417 if (ret != 0) 418 return (ret); 419 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 420 421 PROC_LOCK(p); 422 #if defined(COMPAT_43) 423 if (ucp->uc_mcontext.mc_onstack & 1) 424 td->td_sigstk.ss_flags |= SS_ONSTACK; 425 else 426 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 427 #endif 428 429 td->td_sigmask = ucp->uc_sigmask; 430 SIG_CANTMASK(td->td_sigmask); 431 signotify(td); 432 PROC_UNLOCK(p); 433 td->td_pcb->pcb_flags |= PCB_FULLCTX; 434 return (EJUSTRETURN); 435 } 436 437 #ifdef COMPAT_FREEBSD4 438 int 439 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 440 { 441 442 return sigreturn(td, (struct sigreturn_args *)uap); 443 } 444 #endif 445 446 447 /* 448 * Machine dependent boot() routine 449 * 450 * I haven't seen anything to put here yet 451 * Possibly some stuff might be grafted back here from boot() 452 */ 453 void 454 cpu_boot(int howto) 455 { 456 } 457 458 /* Get current clock frequency for the given cpu id. */ 459 int 460 cpu_est_clockrate(int cpu_id, uint64_t *rate) 461 { 462 register_t reg; 463 uint64_t tsc1, tsc2; 464 465 if (pcpu_find(cpu_id) == NULL || rate == NULL) 466 return (EINVAL); 467 468 /* If we're booting, trust the rate calibrated moments ago. */ 469 if (cold) { 470 *rate = tsc_freq; 471 return (0); 472 } 473 474 #ifdef SMP 475 /* Schedule ourselves on the indicated cpu. */ 476 mtx_lock_spin(&sched_lock); 477 sched_bind(curthread, cpu_id); 478 mtx_unlock_spin(&sched_lock); 479 #endif 480 481 /* Calibrate by measuring a short delay. */ 482 reg = intr_disable(); 483 tsc1 = rdtsc(); 484 DELAY(1000); 485 tsc2 = rdtsc(); 486 intr_restore(reg); 487 488 #ifdef SMP 489 mtx_lock_spin(&sched_lock); 490 sched_unbind(curthread); 491 mtx_unlock_spin(&sched_lock); 492 #endif 493 494 /* 495 * Calculate the difference in readings, convert to Mhz, and 496 * subtract 0.5% of the total. Empirical testing has shown that 497 * overhead in DELAY() works out to approximately this value. 498 */ 499 tsc2 -= tsc1; 500 *rate = tsc2 * 1000 - tsc2 * 5; 501 return (0); 502 } 503 504 /* 505 * Shutdown the CPU as much as possible 506 */ 507 void 508 cpu_halt(void) 509 { 510 for (;;) 511 __asm__ ("hlt"); 512 } 513 514 /* 515 * Hook to idle the CPU when possible. In the SMP case we default to 516 * off because a halted cpu will not currently pick up a new thread in the 517 * run queue until the next timer tick. If turned on this will result in 518 * approximately a 4.2% loss in real time performance in buildworld tests 519 * (but improves user and sys times oddly enough), and saves approximately 520 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 521 * 522 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 523 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 524 * Then we can have our cake and eat it too. 525 * 526 * XXX I'm turning it on for SMP as well by default for now. It seems to 527 * help lock contention somewhat, and this is critical for HTT. -Peter 528 */ 529 static int cpu_idle_hlt = 1; 530 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 531 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 532 533 static void 534 cpu_idle_default(void) 535 { 536 /* 537 * we must absolutely guarentee that hlt is the 538 * absolute next instruction after sti or we 539 * introduce a timing window. 540 */ 541 __asm __volatile("sti; hlt"); 542 } 543 544 /* 545 * Note that we have to be careful here to avoid a race between checking 546 * sched_runnable() and actually halting. If we don't do this, we may waste 547 * the time between calling hlt and the next interrupt even though there 548 * is a runnable process. 549 */ 550 void 551 cpu_idle(void) 552 { 553 554 #ifdef SMP 555 if (mp_grab_cpu_hlt()) 556 return; 557 #endif 558 if (cpu_idle_hlt) { 559 disable_intr(); 560 if (sched_runnable()) 561 enable_intr(); 562 else 563 (*cpu_idle_hook)(); 564 } 565 } 566 567 /* Other subsystems (e.g., ACPI) can hook this later. */ 568 void (*cpu_idle_hook)(void) = cpu_idle_default; 569 570 /* 571 * Clear registers on exec 572 */ 573 void 574 exec_setregs(td, entry, stack, ps_strings) 575 struct thread *td; 576 u_long entry; 577 u_long stack; 578 u_long ps_strings; 579 { 580 struct trapframe *regs = td->td_frame; 581 struct pcb *pcb = td->td_pcb; 582 583 critical_enter(); 584 wrmsr(MSR_FSBASE, 0); 585 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 586 pcb->pcb_fsbase = 0; 587 pcb->pcb_gsbase = 0; 588 critical_exit(); 589 load_ds(_udatasel); 590 load_es(_udatasel); 591 load_fs(_udatasel); 592 load_gs(_udatasel); 593 pcb->pcb_ds = _udatasel; 594 pcb->pcb_es = _udatasel; 595 pcb->pcb_fs = _udatasel; 596 pcb->pcb_gs = _udatasel; 597 598 bzero((char *)regs, sizeof(struct trapframe)); 599 regs->tf_rip = entry; 600 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 601 regs->tf_rdi = stack; /* argv */ 602 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 603 regs->tf_ss = _udatasel; 604 regs->tf_cs = _ucodesel; 605 606 /* 607 * Reset the hardware debug registers if they were in use. 608 * They won't have any meaning for the newly exec'd process. 609 */ 610 if (pcb->pcb_flags & PCB_DBREGS) { 611 pcb->pcb_dr0 = 0; 612 pcb->pcb_dr1 = 0; 613 pcb->pcb_dr2 = 0; 614 pcb->pcb_dr3 = 0; 615 pcb->pcb_dr6 = 0; 616 pcb->pcb_dr7 = 0; 617 if (pcb == PCPU_GET(curpcb)) { 618 /* 619 * Clear the debug registers on the running 620 * CPU, otherwise they will end up affecting 621 * the next process we switch to. 622 */ 623 reset_dbregs(); 624 } 625 pcb->pcb_flags &= ~PCB_DBREGS; 626 } 627 628 /* 629 * Drop the FP state if we hold it, so that the process gets a 630 * clean FP state if it uses the FPU again. 631 */ 632 fpstate_drop(td); 633 } 634 635 void 636 cpu_setregs(void) 637 { 638 register_t cr0; 639 640 cr0 = rcr0(); 641 /* 642 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 643 * BSP. See the comments there about why we set them. 644 */ 645 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 646 load_cr0(cr0); 647 } 648 649 static int 650 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 651 { 652 int error; 653 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 654 req); 655 if (!error && req->newptr) 656 resettodr(); 657 return (error); 658 } 659 660 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 661 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 662 663 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 664 CTLFLAG_RW, &disable_rtc_set, 0, ""); 665 666 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 667 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 668 669 /* 670 * Initialize amd64 and configure to run kernel 671 */ 672 673 /* 674 * Initialize segments & interrupt table 675 */ 676 677 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor table */ 678 static struct gate_descriptor idt0[NIDT]; 679 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 680 681 static char dblfault_stack[PAGE_SIZE] __aligned(16); 682 683 struct amd64tss common_tss[MAXCPU]; 684 685 /* software prototypes -- in more palatable form */ 686 struct soft_segment_descriptor gdt_segs[] = { 687 /* GNULL_SEL 0 Null Descriptor */ 688 { 0x0, /* segment base address */ 689 0x0, /* length */ 690 0, /* segment type */ 691 0, /* segment descriptor priority level */ 692 0, /* segment descriptor present */ 693 0, /* long */ 694 0, /* default 32 vs 16 bit size */ 695 0 /* limit granularity (byte/page units)*/ }, 696 /* GCODE_SEL 1 Code Descriptor for kernel */ 697 { 0x0, /* segment base address */ 698 0xfffff, /* length - all address space */ 699 SDT_MEMERA, /* segment type */ 700 SEL_KPL, /* segment descriptor priority level */ 701 1, /* segment descriptor present */ 702 1, /* long */ 703 0, /* default 32 vs 16 bit size */ 704 1 /* limit granularity (byte/page units)*/ }, 705 /* GDATA_SEL 2 Data Descriptor for kernel */ 706 { 0x0, /* segment base address */ 707 0xfffff, /* length - all address space */ 708 SDT_MEMRWA, /* segment type */ 709 SEL_KPL, /* segment descriptor priority level */ 710 1, /* segment descriptor present */ 711 1, /* long */ 712 0, /* default 32 vs 16 bit size */ 713 1 /* limit granularity (byte/page units)*/ }, 714 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */ 715 { 0x0, /* segment base address */ 716 0xfffff, /* length - all address space */ 717 SDT_MEMERA, /* segment type */ 718 SEL_UPL, /* segment descriptor priority level */ 719 1, /* segment descriptor present */ 720 0, /* long */ 721 1, /* default 32 vs 16 bit size */ 722 1 /* limit granularity (byte/page units)*/ }, 723 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */ 724 { 0x0, /* segment base address */ 725 0xfffff, /* length - all address space */ 726 SDT_MEMRWA, /* segment type */ 727 SEL_UPL, /* segment descriptor priority level */ 728 1, /* segment descriptor present */ 729 0, /* long */ 730 1, /* default 32 vs 16 bit size */ 731 1 /* limit granularity (byte/page units)*/ }, 732 /* GUCODE_SEL 5 64 bit Code Descriptor for user */ 733 { 0x0, /* segment base address */ 734 0xfffff, /* length - all address space */ 735 SDT_MEMERA, /* segment type */ 736 SEL_UPL, /* segment descriptor priority level */ 737 1, /* segment descriptor present */ 738 1, /* long */ 739 0, /* default 32 vs 16 bit size */ 740 1 /* limit granularity (byte/page units)*/ }, 741 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 742 { 743 0x0, /* segment base address */ 744 sizeof(struct amd64tss)-1,/* length - all address space */ 745 SDT_SYSTSS, /* segment type */ 746 SEL_KPL, /* segment descriptor priority level */ 747 1, /* segment descriptor present */ 748 0, /* long */ 749 0, /* unused - default 32 vs 16 bit size */ 750 0 /* limit granularity (byte/page units)*/ }, 751 /* Actually, the TSS is a system descriptor which is double size */ 752 { 0x0, /* segment base address */ 753 0x0, /* length */ 754 0, /* segment type */ 755 0, /* segment descriptor priority level */ 756 0, /* segment descriptor present */ 757 0, /* long */ 758 0, /* default 32 vs 16 bit size */ 759 0 /* limit granularity (byte/page units)*/ }, 760 }; 761 762 void 763 setidt(idx, func, typ, dpl, ist) 764 int idx; 765 inthand_t *func; 766 int typ; 767 int dpl; 768 int ist; 769 { 770 struct gate_descriptor *ip; 771 772 ip = idt + idx; 773 ip->gd_looffset = (uintptr_t)func; 774 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 775 ip->gd_ist = ist; 776 ip->gd_xx = 0; 777 ip->gd_type = typ; 778 ip->gd_dpl = dpl; 779 ip->gd_p = 1; 780 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 781 } 782 783 #define IDTVEC(name) __CONCAT(X,name) 784 785 extern inthand_t 786 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 787 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 788 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 789 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 790 IDTVEC(xmm), IDTVEC(dblfault), 791 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 792 793 void 794 sdtossd(sd, ssd) 795 struct user_segment_descriptor *sd; 796 struct soft_segment_descriptor *ssd; 797 { 798 799 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 800 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 801 ssd->ssd_type = sd->sd_type; 802 ssd->ssd_dpl = sd->sd_dpl; 803 ssd->ssd_p = sd->sd_p; 804 ssd->ssd_long = sd->sd_long; 805 ssd->ssd_def32 = sd->sd_def32; 806 ssd->ssd_gran = sd->sd_gran; 807 } 808 809 void 810 ssdtosd(ssd, sd) 811 struct soft_segment_descriptor *ssd; 812 struct user_segment_descriptor *sd; 813 { 814 815 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 816 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 817 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 818 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 819 sd->sd_type = ssd->ssd_type; 820 sd->sd_dpl = ssd->ssd_dpl; 821 sd->sd_p = ssd->ssd_p; 822 sd->sd_long = ssd->ssd_long; 823 sd->sd_def32 = ssd->ssd_def32; 824 sd->sd_gran = ssd->ssd_gran; 825 } 826 827 void 828 ssdtosyssd(ssd, sd) 829 struct soft_segment_descriptor *ssd; 830 struct system_segment_descriptor *sd; 831 { 832 833 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 834 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 835 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 836 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 837 sd->sd_type = ssd->ssd_type; 838 sd->sd_dpl = ssd->ssd_dpl; 839 sd->sd_p = ssd->ssd_p; 840 sd->sd_gran = ssd->ssd_gran; 841 } 842 843 #if !defined(DEV_ATPIC) && defined(DEV_ISA) 844 #include <isa/isavar.h> 845 u_int 846 isa_irq_pending(void) 847 { 848 849 return (0); 850 } 851 #endif 852 853 #define PHYSMAP_SIZE (2 * 20) 854 855 u_int basemem; 856 857 /* 858 * Populate the (physmap) array with base/bound pairs describing the 859 * available physical memory in the system, then test this memory and 860 * build the phys_avail array describing the actually-available memory. 861 * 862 * If we cannot accurately determine the physical memory map, then use 863 * value from the 0xE801 call, and failing that, the RTC. 864 * 865 * Total memory size may be set by the kernel environment variable 866 * hw.physmem or the compile-time define MAXMEM. 867 * 868 * XXX first should be vm_paddr_t. 869 */ 870 static void 871 getmemsize(caddr_t kmdp, u_int64_t first) 872 { 873 int i, physmap_idx, pa_indx, da_indx; 874 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 875 u_long physmem_tunable; 876 pt_entry_t *pte; 877 struct bios_smap *smapbase, *smap, *smapend; 878 u_int32_t smapsize; 879 quad_t dcons_addr, dcons_size; 880 881 bzero(physmap, sizeof(physmap)); 882 basemem = 0; 883 physmap_idx = 0; 884 885 /* 886 * get memory map from INT 15:E820, kindly supplied by the loader. 887 * 888 * subr_module.c says: 889 * "Consumer may safely assume that size value precedes data." 890 * ie: an int32_t immediately precedes smap. 891 */ 892 smapbase = (struct bios_smap *)preload_search_info(kmdp, 893 MODINFO_METADATA | MODINFOMD_SMAP); 894 if (smapbase == NULL) 895 panic("No BIOS smap info from loader!"); 896 897 smapsize = *((u_int32_t *)smapbase - 1); 898 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 899 900 for (smap = smapbase; smap < smapend; smap++) { 901 if (boothowto & RB_VERBOSE) 902 printf("SMAP type=%02x base=%016lx len=%016lx\n", 903 smap->type, smap->base, smap->length); 904 905 if (smap->type != 0x01) 906 continue; 907 908 if (smap->length == 0) 909 continue; 910 911 for (i = 0; i <= physmap_idx; i += 2) { 912 if (smap->base < physmap[i + 1]) { 913 if (boothowto & RB_VERBOSE) 914 printf( 915 "Overlapping or non-montonic memory region, ignoring second region\n"); 916 continue; 917 } 918 } 919 920 if (smap->base == physmap[physmap_idx + 1]) { 921 physmap[physmap_idx + 1] += smap->length; 922 continue; 923 } 924 925 physmap_idx += 2; 926 if (physmap_idx == PHYSMAP_SIZE) { 927 printf( 928 "Too many segments in the physical address map, giving up\n"); 929 break; 930 } 931 physmap[physmap_idx] = smap->base; 932 physmap[physmap_idx + 1] = smap->base + smap->length; 933 } 934 935 /* 936 * Find the 'base memory' segment for SMP 937 */ 938 basemem = 0; 939 for (i = 0; i <= physmap_idx; i += 2) { 940 if (physmap[i] == 0x00000000) { 941 basemem = physmap[i + 1] / 1024; 942 break; 943 } 944 } 945 if (basemem == 0) 946 panic("BIOS smap did not include a basemem segment!"); 947 948 #ifdef SMP 949 /* make hole for AP bootstrap code */ 950 physmap[1] = mp_bootaddress(physmap[1] / 1024); 951 #endif 952 953 /* 954 * Maxmem isn't the "maximum memory", it's one larger than the 955 * highest page of the physical address space. It should be 956 * called something like "Maxphyspage". We may adjust this 957 * based on ``hw.physmem'' and the results of the memory test. 958 */ 959 Maxmem = atop(physmap[physmap_idx + 1]); 960 961 #ifdef MAXMEM 962 Maxmem = MAXMEM / 4; 963 #endif 964 965 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 966 Maxmem = atop(physmem_tunable); 967 968 if (atop(physmap[physmap_idx + 1]) != Maxmem && 969 (boothowto & RB_VERBOSE)) 970 printf("Physical memory use set to %ldK\n", Maxmem * 4); 971 972 /* 973 * If Maxmem has been increased beyond what the system has detected, 974 * extend the last memory segment to the new limit. 975 */ 976 if (atop(physmap[physmap_idx + 1]) < Maxmem) 977 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 978 979 /* call pmap initialization to make new kernel address space */ 980 pmap_bootstrap(&first); 981 982 /* 983 * Size up each available chunk of physical memory. 984 */ 985 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 986 pa_indx = 0; 987 da_indx = 1; 988 phys_avail[pa_indx++] = physmap[0]; 989 phys_avail[pa_indx] = physmap[0]; 990 dump_avail[da_indx] = physmap[0]; 991 pte = CMAP1; 992 993 /* 994 * Get dcons buffer address 995 */ 996 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 997 getenv_quad("dcons.size", &dcons_size) == 0) 998 dcons_addr = 0; 999 1000 /* 1001 * physmap is in bytes, so when converting to page boundaries, 1002 * round up the start address and round down the end address. 1003 */ 1004 for (i = 0; i <= physmap_idx; i += 2) { 1005 vm_paddr_t end; 1006 1007 end = ptoa((vm_paddr_t)Maxmem); 1008 if (physmap[i + 1] < end) 1009 end = trunc_page(physmap[i + 1]); 1010 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1011 int tmp, page_bad, full; 1012 int *ptr = (int *)CADDR1; 1013 1014 full = FALSE; 1015 /* 1016 * block out kernel memory as not available. 1017 */ 1018 if (pa >= 0x100000 && pa < first) 1019 goto do_dump_avail; 1020 1021 /* 1022 * block out dcons buffer 1023 */ 1024 if (dcons_addr > 0 1025 && pa >= trunc_page(dcons_addr) 1026 && pa < dcons_addr + dcons_size) 1027 goto do_dump_avail; 1028 1029 page_bad = FALSE; 1030 1031 /* 1032 * map page into kernel: valid, read/write,non-cacheable 1033 */ 1034 *pte = pa | PG_V | PG_RW | PG_N; 1035 invltlb(); 1036 1037 tmp = *(int *)ptr; 1038 /* 1039 * Test for alternating 1's and 0's 1040 */ 1041 *(volatile int *)ptr = 0xaaaaaaaa; 1042 if (*(volatile int *)ptr != 0xaaaaaaaa) 1043 page_bad = TRUE; 1044 /* 1045 * Test for alternating 0's and 1's 1046 */ 1047 *(volatile int *)ptr = 0x55555555; 1048 if (*(volatile int *)ptr != 0x55555555) 1049 page_bad = TRUE; 1050 /* 1051 * Test for all 1's 1052 */ 1053 *(volatile int *)ptr = 0xffffffff; 1054 if (*(volatile int *)ptr != 0xffffffff) 1055 page_bad = TRUE; 1056 /* 1057 * Test for all 0's 1058 */ 1059 *(volatile int *)ptr = 0x0; 1060 if (*(volatile int *)ptr != 0x0) 1061 page_bad = TRUE; 1062 /* 1063 * Restore original value. 1064 */ 1065 *(int *)ptr = tmp; 1066 1067 /* 1068 * Adjust array of valid/good pages. 1069 */ 1070 if (page_bad == TRUE) 1071 continue; 1072 /* 1073 * If this good page is a continuation of the 1074 * previous set of good pages, then just increase 1075 * the end pointer. Otherwise start a new chunk. 1076 * Note that "end" points one higher than end, 1077 * making the range >= start and < end. 1078 * If we're also doing a speculative memory 1079 * test and we at or past the end, bump up Maxmem 1080 * so that we keep going. The first bad page 1081 * will terminate the loop. 1082 */ 1083 if (phys_avail[pa_indx] == pa) { 1084 phys_avail[pa_indx] += PAGE_SIZE; 1085 } else { 1086 pa_indx++; 1087 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1088 printf( 1089 "Too many holes in the physical address space, giving up\n"); 1090 pa_indx--; 1091 full = TRUE; 1092 goto do_dump_avail; 1093 } 1094 phys_avail[pa_indx++] = pa; /* start */ 1095 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1096 } 1097 physmem++; 1098 do_dump_avail: 1099 if (dump_avail[da_indx] == pa) { 1100 dump_avail[da_indx] += PAGE_SIZE; 1101 } else { 1102 da_indx++; 1103 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1104 da_indx--; 1105 goto do_next; 1106 } 1107 dump_avail[da_indx++] = pa; /* start */ 1108 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1109 } 1110 do_next: 1111 if (full) 1112 break; 1113 } 1114 } 1115 *pte = 0; 1116 invltlb(); 1117 1118 /* 1119 * XXX 1120 * The last chunk must contain at least one page plus the message 1121 * buffer to avoid complicating other code (message buffer address 1122 * calculation, etc.). 1123 */ 1124 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1125 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1126 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1127 phys_avail[pa_indx--] = 0; 1128 phys_avail[pa_indx--] = 0; 1129 } 1130 1131 Maxmem = atop(phys_avail[pa_indx]); 1132 1133 /* Trim off space for the message buffer. */ 1134 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1135 1136 avail_end = phys_avail[pa_indx]; 1137 } 1138 1139 u_int64_t 1140 hammer_time(u_int64_t modulep, u_int64_t physfree) 1141 { 1142 caddr_t kmdp; 1143 int gsel_tss, off, x; 1144 struct pcpu *pc; 1145 u_int64_t msr; 1146 char *env; 1147 1148 thread0.td_kstack = physfree + KERNBASE; 1149 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE); 1150 physfree += KSTACK_PAGES * PAGE_SIZE; 1151 thread0.td_pcb = (struct pcb *) 1152 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1153 1154 /* 1155 * This may be done better later if it gets more high level 1156 * components in it. If so just link td->td_proc here. 1157 */ 1158 proc_linkup(&proc0, &ksegrp0, &thread0); 1159 1160 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1161 preload_bootstrap_relocate(KERNBASE); 1162 kmdp = preload_search_by_type("elf kernel"); 1163 if (kmdp == NULL) 1164 kmdp = preload_search_by_type("elf64 kernel"); 1165 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1166 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1167 #ifdef DDB 1168 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1169 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1170 #endif 1171 1172 /* Init basic tunables, hz etc */ 1173 init_param1(); 1174 1175 /* 1176 * make gdt memory segments 1177 */ 1178 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1179 1180 for (x = 0; x < NGDT; x++) { 1181 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1)) 1182 ssdtosd(&gdt_segs[x], &gdt[x]); 1183 } 1184 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1185 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1186 1187 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1188 r_gdt.rd_base = (long) gdt; 1189 lgdt(&r_gdt); 1190 pc = &__pcpu[0]; 1191 1192 wrmsr(MSR_FSBASE, 0); /* User value */ 1193 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1194 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1195 1196 pcpu_init(pc, 0, sizeof(struct pcpu)); 1197 PCPU_SET(prvspace, pc); 1198 PCPU_SET(curthread, &thread0); 1199 PCPU_SET(curpcb, thread0.td_pcb); 1200 PCPU_SET(tssp, &common_tss[0]); 1201 1202 /* 1203 * Initialize mutexes. 1204 * 1205 * icu_lock: in order to allow an interrupt to occur in a critical 1206 * section, to set pcpu->ipending (etc...) properly, we 1207 * must be able to get the icu lock, so it can't be 1208 * under witness. 1209 */ 1210 mutex_init(); 1211 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN); 1212 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1213 1214 /* exceptions */ 1215 for (x = 0; x < NIDT; x++) 1216 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1217 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1218 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1219 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 0); 1220 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1221 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1222 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1223 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1224 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1225 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1226 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1227 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1228 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1229 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1230 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1231 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1232 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1233 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1234 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1235 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1236 1237 r_idt.rd_limit = sizeof(idt0) - 1; 1238 r_idt.rd_base = (long) idt; 1239 lidt(&r_idt); 1240 1241 /* 1242 * Initialize the console before we print anything out. 1243 */ 1244 cninit(); 1245 1246 #ifdef DEV_ISA 1247 #ifdef DEV_ATPIC 1248 elcr_probe(); 1249 atpic_startup(); 1250 #else 1251 /* Reset and mask the atpics and leave them shut down. */ 1252 outb(IO_ICU1, ICW1_RESET | ICW1_IC4); 1253 outb(IO_ICU1 + ICU_IMR_OFFSET, IDT_IO_INTS); 1254 outb(IO_ICU1 + ICU_IMR_OFFSET, 1 << 2); 1255 outb(IO_ICU1 + ICU_IMR_OFFSET, ICW4_8086); 1256 outb(IO_ICU1 + ICU_IMR_OFFSET, 0xff); 1257 outb(IO_ICU1, OCW3_SEL | OCW3_RR); 1258 1259 outb(IO_ICU2, ICW1_RESET | ICW1_IC4); 1260 outb(IO_ICU2 + ICU_IMR_OFFSET, IDT_IO_INTS + 8); 1261 outb(IO_ICU2 + ICU_IMR_OFFSET, 2); 1262 outb(IO_ICU2 + ICU_IMR_OFFSET, ICW4_8086); 1263 outb(IO_ICU2 + ICU_IMR_OFFSET, 0xff); 1264 outb(IO_ICU2, OCW3_SEL | OCW3_RR); 1265 1266 /* 1267 * Point the ICU spurious interrupt vectors at the APIC spurious 1268 * interrupt handler. 1269 */ 1270 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1271 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1272 #endif 1273 #else 1274 #error "have you forgotten the isa device?"; 1275 #endif 1276 1277 kdb_init(); 1278 1279 #ifdef KDB 1280 if (boothowto & RB_KDB) 1281 kdb_enter("Boot flags requested debugger"); 1282 #endif 1283 1284 identify_cpu(); /* Final stage of CPU initialization */ 1285 initializecpu(); /* Initialize CPU registers */ 1286 1287 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1288 common_tss[0].tss_rsp0 = thread0.td_kstack + \ 1289 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb); 1290 /* Ensure the stack is aligned to 16 bytes */ 1291 common_tss[0].tss_rsp0 &= ~0xFul; 1292 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 1293 1294 /* doublefault stack space, runs on ist1 */ 1295 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1296 1297 /* Set the IO permission bitmap (empty due to tss seg limit) */ 1298 common_tss[0].tss_iobase = sizeof(struct amd64tss); 1299 1300 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1301 ltr(gsel_tss); 1302 1303 /* Set up the fast syscall stuff */ 1304 msr = rdmsr(MSR_EFER) | EFER_SCE; 1305 wrmsr(MSR_EFER, msr); 1306 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1307 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1308 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1309 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1310 wrmsr(MSR_STAR, msr); 1311 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1312 1313 getmemsize(kmdp, physfree); 1314 init_param2(physmem); 1315 1316 /* now running on new page tables, configured,and u/iom is accessible */ 1317 1318 /* Map the message buffer. */ 1319 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1320 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 1321 1322 msgbufinit(msgbufp, MSGBUF_SIZE); 1323 fpuinit(); 1324 1325 /* transfer to user mode */ 1326 1327 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1328 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1329 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1330 1331 /* setup proc 0's pcb */ 1332 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 1333 thread0.td_pcb->pcb_cr3 = KPML4phys; 1334 thread0.td_frame = &proc0_tf; 1335 1336 env = getenv("kernelname"); 1337 if (env != NULL) 1338 strlcpy(kernelname, env, sizeof(kernelname)); 1339 1340 /* Location of kernel stack for locore */ 1341 return ((u_int64_t)thread0.td_pcb); 1342 } 1343 1344 void 1345 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1346 { 1347 1348 pcpu->pc_acpi_id = 0xffffffff; 1349 } 1350 1351 void 1352 spinlock_enter(void) 1353 { 1354 struct thread *td; 1355 1356 td = curthread; 1357 if (td->td_md.md_spinlock_count == 0) 1358 td->td_md.md_saved_flags = intr_disable(); 1359 td->td_md.md_spinlock_count++; 1360 critical_enter(); 1361 } 1362 1363 void 1364 spinlock_exit(void) 1365 { 1366 struct thread *td; 1367 1368 td = curthread; 1369 critical_exit(); 1370 td->td_md.md_spinlock_count--; 1371 if (td->td_md.md_spinlock_count == 0) 1372 intr_restore(td->td_md.md_saved_flags); 1373 } 1374 1375 /* 1376 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1377 * we want to start a backtrace from the function that caused us to enter 1378 * the debugger. We have the context in the trapframe, but base the trace 1379 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1380 * enough for a backtrace. 1381 */ 1382 void 1383 makectx(struct trapframe *tf, struct pcb *pcb) 1384 { 1385 1386 pcb->pcb_r12 = tf->tf_r12; 1387 pcb->pcb_r13 = tf->tf_r13; 1388 pcb->pcb_r14 = tf->tf_r14; 1389 pcb->pcb_r15 = tf->tf_r15; 1390 pcb->pcb_rbp = tf->tf_rbp; 1391 pcb->pcb_rbx = tf->tf_rbx; 1392 pcb->pcb_rip = tf->tf_rip; 1393 pcb->pcb_rsp = (ISPL(tf->tf_cs)) ? tf->tf_rsp : (long)(tf + 1) - 8; 1394 } 1395 1396 int 1397 ptrace_set_pc(struct thread *td, unsigned long addr) 1398 { 1399 td->td_frame->tf_rip = addr; 1400 return (0); 1401 } 1402 1403 int 1404 ptrace_single_step(struct thread *td) 1405 { 1406 td->td_frame->tf_rflags |= PSL_T; 1407 return (0); 1408 } 1409 1410 int 1411 ptrace_clear_single_step(struct thread *td) 1412 { 1413 td->td_frame->tf_rflags &= ~PSL_T; 1414 return (0); 1415 } 1416 1417 int 1418 fill_regs(struct thread *td, struct reg *regs) 1419 { 1420 struct trapframe *tp; 1421 1422 tp = td->td_frame; 1423 regs->r_r15 = tp->tf_r15; 1424 regs->r_r14 = tp->tf_r14; 1425 regs->r_r13 = tp->tf_r13; 1426 regs->r_r12 = tp->tf_r12; 1427 regs->r_r11 = tp->tf_r11; 1428 regs->r_r10 = tp->tf_r10; 1429 regs->r_r9 = tp->tf_r9; 1430 regs->r_r8 = tp->tf_r8; 1431 regs->r_rdi = tp->tf_rdi; 1432 regs->r_rsi = tp->tf_rsi; 1433 regs->r_rbp = tp->tf_rbp; 1434 regs->r_rbx = tp->tf_rbx; 1435 regs->r_rdx = tp->tf_rdx; 1436 regs->r_rcx = tp->tf_rcx; 1437 regs->r_rax = tp->tf_rax; 1438 regs->r_rip = tp->tf_rip; 1439 regs->r_cs = tp->tf_cs; 1440 regs->r_rflags = tp->tf_rflags; 1441 regs->r_rsp = tp->tf_rsp; 1442 regs->r_ss = tp->tf_ss; 1443 return (0); 1444 } 1445 1446 int 1447 set_regs(struct thread *td, struct reg *regs) 1448 { 1449 struct trapframe *tp; 1450 register_t rflags; 1451 1452 tp = td->td_frame; 1453 rflags = regs->r_rflags & 0xffffffff; 1454 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 1455 return (EINVAL); 1456 tp->tf_r15 = regs->r_r15; 1457 tp->tf_r14 = regs->r_r14; 1458 tp->tf_r13 = regs->r_r13; 1459 tp->tf_r12 = regs->r_r12; 1460 tp->tf_r11 = regs->r_r11; 1461 tp->tf_r10 = regs->r_r10; 1462 tp->tf_r9 = regs->r_r9; 1463 tp->tf_r8 = regs->r_r8; 1464 tp->tf_rdi = regs->r_rdi; 1465 tp->tf_rsi = regs->r_rsi; 1466 tp->tf_rbp = regs->r_rbp; 1467 tp->tf_rbx = regs->r_rbx; 1468 tp->tf_rdx = regs->r_rdx; 1469 tp->tf_rcx = regs->r_rcx; 1470 tp->tf_rax = regs->r_rax; 1471 tp->tf_rip = regs->r_rip; 1472 tp->tf_cs = regs->r_cs; 1473 tp->tf_rflags = rflags; 1474 tp->tf_rsp = regs->r_rsp; 1475 tp->tf_ss = regs->r_ss; 1476 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1477 return (0); 1478 } 1479 1480 /* XXX check all this stuff! */ 1481 /* externalize from sv_xmm */ 1482 static void 1483 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 1484 { 1485 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1486 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1487 int i; 1488 1489 /* pcb -> fpregs */ 1490 bzero(fpregs, sizeof(*fpregs)); 1491 1492 /* FPU control/status */ 1493 penv_fpreg->en_cw = penv_xmm->en_cw; 1494 penv_fpreg->en_sw = penv_xmm->en_sw; 1495 penv_fpreg->en_tw = penv_xmm->en_tw; 1496 penv_fpreg->en_opcode = penv_xmm->en_opcode; 1497 penv_fpreg->en_rip = penv_xmm->en_rip; 1498 penv_fpreg->en_rdp = penv_xmm->en_rdp; 1499 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 1500 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 1501 1502 /* FPU registers */ 1503 for (i = 0; i < 8; ++i) 1504 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 1505 1506 /* SSE registers */ 1507 for (i = 0; i < 16; ++i) 1508 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 1509 } 1510 1511 /* internalize from fpregs into sv_xmm */ 1512 static void 1513 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 1514 { 1515 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1516 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1517 int i; 1518 1519 /* fpregs -> pcb */ 1520 /* FPU control/status */ 1521 penv_xmm->en_cw = penv_fpreg->en_cw; 1522 penv_xmm->en_sw = penv_fpreg->en_sw; 1523 penv_xmm->en_tw = penv_fpreg->en_tw; 1524 penv_xmm->en_opcode = penv_fpreg->en_opcode; 1525 penv_xmm->en_rip = penv_fpreg->en_rip; 1526 penv_xmm->en_rdp = penv_fpreg->en_rdp; 1527 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 1528 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask; 1529 1530 /* FPU registers */ 1531 for (i = 0; i < 8; ++i) 1532 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 1533 1534 /* SSE registers */ 1535 for (i = 0; i < 16; ++i) 1536 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 1537 } 1538 1539 /* externalize from td->pcb */ 1540 int 1541 fill_fpregs(struct thread *td, struct fpreg *fpregs) 1542 { 1543 1544 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs); 1545 return (0); 1546 } 1547 1548 /* internalize to td->pcb */ 1549 int 1550 set_fpregs(struct thread *td, struct fpreg *fpregs) 1551 { 1552 1553 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save); 1554 return (0); 1555 } 1556 1557 /* 1558 * Get machine context. 1559 */ 1560 int 1561 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 1562 { 1563 struct trapframe *tp; 1564 1565 tp = td->td_frame; 1566 PROC_LOCK(curthread->td_proc); 1567 mcp->mc_onstack = sigonstack(tp->tf_rsp); 1568 PROC_UNLOCK(curthread->td_proc); 1569 mcp->mc_r15 = tp->tf_r15; 1570 mcp->mc_r14 = tp->tf_r14; 1571 mcp->mc_r13 = tp->tf_r13; 1572 mcp->mc_r12 = tp->tf_r12; 1573 mcp->mc_r11 = tp->tf_r11; 1574 mcp->mc_r10 = tp->tf_r10; 1575 mcp->mc_r9 = tp->tf_r9; 1576 mcp->mc_r8 = tp->tf_r8; 1577 mcp->mc_rdi = tp->tf_rdi; 1578 mcp->mc_rsi = tp->tf_rsi; 1579 mcp->mc_rbp = tp->tf_rbp; 1580 mcp->mc_rbx = tp->tf_rbx; 1581 mcp->mc_rcx = tp->tf_rcx; 1582 mcp->mc_rflags = tp->tf_rflags; 1583 if (flags & GET_MC_CLEAR_RET) { 1584 mcp->mc_rax = 0; 1585 mcp->mc_rdx = 0; 1586 mcp->mc_rflags &= ~PSL_C; 1587 } else { 1588 mcp->mc_rax = tp->tf_rax; 1589 mcp->mc_rdx = tp->tf_rdx; 1590 } 1591 mcp->mc_rip = tp->tf_rip; 1592 mcp->mc_cs = tp->tf_cs; 1593 mcp->mc_rsp = tp->tf_rsp; 1594 mcp->mc_ss = tp->tf_ss; 1595 mcp->mc_len = sizeof(*mcp); 1596 get_fpcontext(td, mcp); 1597 return (0); 1598 } 1599 1600 /* 1601 * Set machine context. 1602 * 1603 * However, we don't set any but the user modifiable flags, and we won't 1604 * touch the cs selector. 1605 */ 1606 int 1607 set_mcontext(struct thread *td, const mcontext_t *mcp) 1608 { 1609 struct trapframe *tp; 1610 long rflags; 1611 int ret; 1612 1613 tp = td->td_frame; 1614 if (mcp->mc_len != sizeof(*mcp)) 1615 return (EINVAL); 1616 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 1617 (tp->tf_rflags & ~PSL_USERCHANGE); 1618 ret = set_fpcontext(td, mcp); 1619 if (ret != 0) 1620 return (ret); 1621 tp->tf_r15 = mcp->mc_r15; 1622 tp->tf_r14 = mcp->mc_r14; 1623 tp->tf_r13 = mcp->mc_r13; 1624 tp->tf_r12 = mcp->mc_r12; 1625 tp->tf_r11 = mcp->mc_r11; 1626 tp->tf_r10 = mcp->mc_r10; 1627 tp->tf_r9 = mcp->mc_r9; 1628 tp->tf_r8 = mcp->mc_r8; 1629 tp->tf_rdi = mcp->mc_rdi; 1630 tp->tf_rsi = mcp->mc_rsi; 1631 tp->tf_rbp = mcp->mc_rbp; 1632 tp->tf_rbx = mcp->mc_rbx; 1633 tp->tf_rdx = mcp->mc_rdx; 1634 tp->tf_rcx = mcp->mc_rcx; 1635 tp->tf_rax = mcp->mc_rax; 1636 tp->tf_rip = mcp->mc_rip; 1637 tp->tf_rflags = rflags; 1638 tp->tf_rsp = mcp->mc_rsp; 1639 tp->tf_ss = mcp->mc_ss; 1640 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1641 return (0); 1642 } 1643 1644 static void 1645 get_fpcontext(struct thread *td, mcontext_t *mcp) 1646 { 1647 1648 mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1649 mcp->mc_fpformat = fpuformat(); 1650 } 1651 1652 static int 1653 set_fpcontext(struct thread *td, const mcontext_t *mcp) 1654 { 1655 1656 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 1657 return (0); 1658 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 1659 return (EINVAL); 1660 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 1661 /* We don't care what state is left in the FPU or PCB. */ 1662 fpstate_drop(td); 1663 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 1664 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 1665 /* 1666 * XXX we violate the dubious requirement that fpusetregs() 1667 * be called with interrupts disabled. 1668 * XXX obsolete on trap-16 systems? 1669 */ 1670 fpusetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1671 } else 1672 return (EINVAL); 1673 return (0); 1674 } 1675 1676 void 1677 fpstate_drop(struct thread *td) 1678 { 1679 register_t s; 1680 1681 s = intr_disable(); 1682 if (PCPU_GET(fpcurthread) == td) 1683 fpudrop(); 1684 /* 1685 * XXX force a full drop of the fpu. The above only drops it if we 1686 * owned it. 1687 * 1688 * XXX I don't much like fpugetregs()'s semantics of doing a full 1689 * drop. Dropping only to the pcb matches fnsave's behaviour. 1690 * We only need to drop to !PCB_INITDONE in sendsig(). But 1691 * sendsig() is the only caller of fpugetregs()... perhaps we just 1692 * have too many layers. 1693 */ 1694 curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE; 1695 intr_restore(s); 1696 } 1697 1698 int 1699 fill_dbregs(struct thread *td, struct dbreg *dbregs) 1700 { 1701 struct pcb *pcb; 1702 1703 if (td == NULL) { 1704 dbregs->dr[0] = rdr0(); 1705 dbregs->dr[1] = rdr1(); 1706 dbregs->dr[2] = rdr2(); 1707 dbregs->dr[3] = rdr3(); 1708 dbregs->dr[6] = rdr6(); 1709 dbregs->dr[7] = rdr7(); 1710 } else { 1711 pcb = td->td_pcb; 1712 dbregs->dr[0] = pcb->pcb_dr0; 1713 dbregs->dr[1] = pcb->pcb_dr1; 1714 dbregs->dr[2] = pcb->pcb_dr2; 1715 dbregs->dr[3] = pcb->pcb_dr3; 1716 dbregs->dr[6] = pcb->pcb_dr6; 1717 dbregs->dr[7] = pcb->pcb_dr7; 1718 } 1719 dbregs->dr[4] = 0; 1720 dbregs->dr[5] = 0; 1721 dbregs->dr[8] = 0; 1722 dbregs->dr[9] = 0; 1723 dbregs->dr[10] = 0; 1724 dbregs->dr[11] = 0; 1725 dbregs->dr[12] = 0; 1726 dbregs->dr[13] = 0; 1727 dbregs->dr[14] = 0; 1728 dbregs->dr[15] = 0; 1729 return (0); 1730 } 1731 1732 int 1733 set_dbregs(struct thread *td, struct dbreg *dbregs) 1734 { 1735 struct pcb *pcb; 1736 int i; 1737 u_int64_t mask1, mask2; 1738 1739 if (td == NULL) { 1740 load_dr0(dbregs->dr[0]); 1741 load_dr1(dbregs->dr[1]); 1742 load_dr2(dbregs->dr[2]); 1743 load_dr3(dbregs->dr[3]); 1744 load_dr6(dbregs->dr[6]); 1745 load_dr7(dbregs->dr[7]); 1746 } else { 1747 /* 1748 * Don't let an illegal value for dr7 get set. Specifically, 1749 * check for undefined settings. Setting these bit patterns 1750 * result in undefined behaviour and can lead to an unexpected 1751 * TRCTRAP or a general protection fault right here. 1752 * Upper bits of dr6 and dr7 must not be set 1753 */ 1754 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 1755 i++, mask1 <<= 2, mask2 <<= 2) 1756 if ((dbregs->dr[7] & mask1) == mask2) 1757 return (EINVAL); 1758 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 1759 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 1760 return (EINVAL); 1761 1762 pcb = td->td_pcb; 1763 1764 /* 1765 * Don't let a process set a breakpoint that is not within the 1766 * process's address space. If a process could do this, it 1767 * could halt the system by setting a breakpoint in the kernel 1768 * (if ddb was enabled). Thus, we need to check to make sure 1769 * that no breakpoints are being enabled for addresses outside 1770 * process's address space. 1771 * 1772 * XXX - what about when the watched area of the user's 1773 * address space is written into from within the kernel 1774 * ... wouldn't that still cause a breakpoint to be generated 1775 * from within kernel mode? 1776 */ 1777 1778 if (dbregs->dr[7] & 0x3) { 1779 /* dr0 is enabled */ 1780 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 1781 return (EINVAL); 1782 } 1783 if (dbregs->dr[7] & 0x3<<2) { 1784 /* dr1 is enabled */ 1785 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 1786 return (EINVAL); 1787 } 1788 if (dbregs->dr[7] & 0x3<<4) { 1789 /* dr2 is enabled */ 1790 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 1791 return (EINVAL); 1792 } 1793 if (dbregs->dr[7] & 0x3<<6) { 1794 /* dr3 is enabled */ 1795 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 1796 return (EINVAL); 1797 } 1798 1799 pcb->pcb_dr0 = dbregs->dr[0]; 1800 pcb->pcb_dr1 = dbregs->dr[1]; 1801 pcb->pcb_dr2 = dbregs->dr[2]; 1802 pcb->pcb_dr3 = dbregs->dr[3]; 1803 pcb->pcb_dr6 = dbregs->dr[6]; 1804 pcb->pcb_dr7 = dbregs->dr[7]; 1805 1806 pcb->pcb_flags |= PCB_DBREGS; 1807 } 1808 1809 return (0); 1810 } 1811 1812 void 1813 reset_dbregs(void) 1814 { 1815 1816 load_dr7(0); /* Turn off the control bits first */ 1817 load_dr0(0); 1818 load_dr1(0); 1819 load_dr2(0); 1820 load_dr3(0); 1821 load_dr6(0); 1822 } 1823 1824 /* 1825 * Return > 0 if a hardware breakpoint has been hit, and the 1826 * breakpoint was in user space. Return 0, otherwise. 1827 */ 1828 int 1829 user_dbreg_trap(void) 1830 { 1831 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 1832 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 1833 int nbp; /* number of breakpoints that triggered */ 1834 caddr_t addr[4]; /* breakpoint addresses */ 1835 int i; 1836 1837 dr7 = rdr7(); 1838 if ((dr7 & 0x000000ff) == 0) { 1839 /* 1840 * all GE and LE bits in the dr7 register are zero, 1841 * thus the trap couldn't have been caused by the 1842 * hardware debug registers 1843 */ 1844 return 0; 1845 } 1846 1847 nbp = 0; 1848 dr6 = rdr6(); 1849 bp = dr6 & 0x0000000f; 1850 1851 if (!bp) { 1852 /* 1853 * None of the breakpoint bits are set meaning this 1854 * trap was not caused by any of the debug registers 1855 */ 1856 return 0; 1857 } 1858 1859 /* 1860 * at least one of the breakpoints were hit, check to see 1861 * which ones and if any of them are user space addresses 1862 */ 1863 1864 if (bp & 0x01) { 1865 addr[nbp++] = (caddr_t)rdr0(); 1866 } 1867 if (bp & 0x02) { 1868 addr[nbp++] = (caddr_t)rdr1(); 1869 } 1870 if (bp & 0x04) { 1871 addr[nbp++] = (caddr_t)rdr2(); 1872 } 1873 if (bp & 0x08) { 1874 addr[nbp++] = (caddr_t)rdr3(); 1875 } 1876 1877 for (i=0; i<nbp; i++) { 1878 if (addr[i] < 1879 (caddr_t)VM_MAXUSER_ADDRESS) { 1880 /* 1881 * addr[i] is in user space 1882 */ 1883 return nbp; 1884 } 1885 } 1886 1887 /* 1888 * None of the breakpoints are in user space. 1889 */ 1890 return 0; 1891 } 1892 1893 #ifdef KDB 1894 1895 /* 1896 * Provide inb() and outb() as functions. They are normally only 1897 * available as macros calling inlined functions, thus cannot be 1898 * called from the debugger. 1899 * 1900 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1901 */ 1902 1903 #undef inb 1904 #undef outb 1905 1906 /* silence compiler warnings */ 1907 u_char inb(u_int); 1908 void outb(u_int, u_char); 1909 1910 u_char 1911 inb(u_int port) 1912 { 1913 u_char data; 1914 /* 1915 * We use %%dx and not %1 here because i/o is done at %dx and not at 1916 * %edx, while gcc generates inferior code (movw instead of movl) 1917 * if we tell it to load (u_short) port. 1918 */ 1919 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1920 return (data); 1921 } 1922 1923 void 1924 outb(u_int port, u_char data) 1925 { 1926 u_char al; 1927 /* 1928 * Use an unnecessary assignment to help gcc's register allocator. 1929 * This make a large difference for gcc-1.40 and a tiny difference 1930 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1931 * best results. gcc-2.6.0 can't handle this. 1932 */ 1933 al = data; 1934 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1935 } 1936 1937 #endif /* KDB */
Cache object: 6ce71af48c0a5e7d5fcaaa04944e93a6
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