Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/amd64/amd64/machdep.c
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1 /*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41 #include <sys/cdefs.h> 42 __FBSDID("$FreeBSD: releng/6.4/sys/amd64/amd64/machdep.c 177665 2008-03-27 13:53:52Z kib $"); 43 44 #include "opt_atalk.h" 45 #include "opt_atpic.h" 46 #include "opt_compat.h" 47 #include "opt_cpu.h" 48 #include "opt_ddb.h" 49 #include "opt_inet.h" 50 #include "opt_ipx.h" 51 #include "opt_isa.h" 52 #include "opt_kstack_pages.h" 53 #include "opt_maxmem.h" 54 #include "opt_msgbuf.h" 55 #include "opt_perfmon.h" 56 57 #include <sys/param.h> 58 #include <sys/proc.h> 59 #include <sys/systm.h> 60 #include <sys/bio.h> 61 #include <sys/buf.h> 62 #include <sys/bus.h> 63 #include <sys/callout.h> 64 #include <sys/cons.h> 65 #include <sys/cpu.h> 66 #include <sys/eventhandler.h> 67 #include <sys/exec.h> 68 #include <sys/imgact.h> 69 #include <sys/kdb.h> 70 #include <sys/kernel.h> 71 #include <sys/ktr.h> 72 #include <sys/linker.h> 73 #include <sys/lock.h> 74 #include <sys/malloc.h> 75 #include <sys/memrange.h> 76 #include <sys/msgbuf.h> 77 #include <sys/mutex.h> 78 #include <sys/pcpu.h> 79 #include <sys/ptrace.h> 80 #include <sys/reboot.h> 81 #include <sys/sched.h> 82 #include <sys/signalvar.h> 83 #include <sys/sysctl.h> 84 #include <sys/sysent.h> 85 #include <sys/sysproto.h> 86 #include <sys/ucontext.h> 87 #include <sys/vmmeter.h> 88 89 #include <vm/vm.h> 90 #include <vm/vm_extern.h> 91 #include <vm/vm_kern.h> 92 #include <vm/vm_page.h> 93 #include <vm/vm_map.h> 94 #include <vm/vm_object.h> 95 #include <vm/vm_pager.h> 96 #include <vm/vm_param.h> 97 98 #ifdef DDB 99 #ifndef KDB 100 #error KDB must be enabled in order for DDB to work! 101 #endif 102 #endif 103 #include <ddb/ddb.h> 104 105 #include <net/netisr.h> 106 107 #include <machine/clock.h> 108 #include <machine/cpu.h> 109 #include <machine/cputypes.h> 110 #include <machine/intr_machdep.h> 111 #include <machine/md_var.h> 112 #include <machine/metadata.h> 113 #include <machine/pc/bios.h> 114 #include <machine/pcb.h> 115 #include <machine/proc.h> 116 #include <machine/reg.h> 117 #include <machine/sigframe.h> 118 #include <machine/specialreg.h> 119 #ifdef PERFMON 120 #include <machine/perfmon.h> 121 #endif 122 #include <machine/tss.h> 123 #ifdef SMP 124 #include <machine/smp.h> 125 #endif 126 127 #ifdef DEV_ATPIC 128 #include <amd64/isa/icu.h> 129 #else 130 #include <machine/apicvar.h> 131 #endif 132 133 #include <isa/isareg.h> 134 #include <isa/rtc.h> 135 136 /* Sanity check for __curthread() */ 137 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 138 139 extern u_int64_t hammer_time(u_int64_t, u_int64_t); 140 141 extern void printcpuinfo(void); /* XXX header file */ 142 extern void identify_cpu(void); 143 extern void panicifcpuunsupported(void); 144 145 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 146 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 147 148 static void cpu_startup(void *); 149 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 150 static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 151 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 152 153 #ifdef DDB 154 extern vm_offset_t ksym_start, ksym_end; 155 #endif 156 157 /* Intel ICH registers */ 158 #define ICH_PMBASE 0x400 159 #define ICH_SMI_EN ICH_PMBASE + 0x30 160 161 int _udatasel, _ucodesel, _ucode32sel; 162 163 int cold = 1; 164 165 long Maxmem = 0; 166 long realmem = 0; 167 168 #define PHYSMAP_SIZE (2 * 30) 169 170 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 171 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 172 173 /* must be 2 less so 0 0 can signal end of chunks */ 174 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 175 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 176 177 struct kva_md_info kmi; 178 179 static struct trapframe proc0_tf; 180 struct region_descriptor r_gdt, r_idt; 181 182 struct pcpu __pcpu[MAXCPU]; 183 184 struct mtx icu_lock; 185 186 struct mem_range_softc mem_range_softc; 187 188 static void 189 cpu_startup(dummy) 190 void *dummy; 191 { 192 char *sysenv; 193 194 /* 195 * On MacBooks, we need to disallow the legacy USB circuit to 196 * generate an SMI# because this can cause several problems, 197 * namely: incorrect CPU frequency detection and failure to 198 * start the APs. 199 * We do this by disabling a bit in the SMI_EN (SMI Control and 200 * Enable register) of the Intel ICH LPC Interface Bridge. 201 */ 202 sysenv = getenv("smbios.system.product"); 203 if (sysenv != NULL) { 204 if (strncmp(sysenv, "MacBook", 7) == 0) { 205 if (bootverbose) 206 printf("Disabling LEGACY_USB_EN bit on " 207 "Intel ICH.\n"); 208 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8); 209 } 210 freeenv(sysenv); 211 } 212 213 /* 214 * Good {morning,afternoon,evening,night}. 215 */ 216 startrtclock(); 217 printcpuinfo(); 218 panicifcpuunsupported(); 219 #ifdef PERFMON 220 perfmon_init(); 221 #endif 222 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 223 ptoa((uintmax_t)Maxmem) / 1048576); 224 realmem = Maxmem; 225 /* 226 * Display any holes after the first chunk of extended memory. 227 */ 228 if (bootverbose) { 229 int indx; 230 231 printf("Physical memory chunk(s):\n"); 232 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 233 vm_paddr_t size; 234 235 size = phys_avail[indx + 1] - phys_avail[indx]; 236 printf( 237 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 238 (uintmax_t)phys_avail[indx], 239 (uintmax_t)phys_avail[indx + 1] - 1, 240 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 241 } 242 } 243 244 vm_ksubmap_init(&kmi); 245 246 printf("avail memory = %ju (%ju MB)\n", 247 ptoa((uintmax_t)cnt.v_free_count), 248 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 249 250 /* 251 * Set up buffers, so they can be used to read disk labels. 252 */ 253 bufinit(); 254 vm_pager_bufferinit(); 255 256 cpu_setregs(); 257 } 258 259 /* 260 * Send an interrupt to process. 261 * 262 * Stack is set up to allow sigcode stored 263 * at top to call routine, followed by kcall 264 * to sigreturn routine below. After sigreturn 265 * resets the signal mask, the stack, and the 266 * frame pointer, it returns to the user 267 * specified pc, psl. 268 */ 269 void 270 sendsig(catcher, sig, mask, code) 271 sig_t catcher; 272 int sig; 273 sigset_t *mask; 274 u_long code; 275 { 276 struct sigframe sf, *sfp; 277 struct proc *p; 278 struct thread *td; 279 struct sigacts *psp; 280 char *sp; 281 struct trapframe *regs; 282 int oonstack; 283 284 td = curthread; 285 p = td->td_proc; 286 PROC_LOCK_ASSERT(p, MA_OWNED); 287 psp = p->p_sigacts; 288 mtx_assert(&psp->ps_mtx, MA_OWNED); 289 regs = td->td_frame; 290 oonstack = sigonstack(regs->tf_rsp); 291 292 /* Save user context. */ 293 bzero(&sf, sizeof(sf)); 294 sf.sf_uc.uc_sigmask = *mask; 295 sf.sf_uc.uc_stack = td->td_sigstk; 296 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 297 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 298 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 299 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 300 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 301 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 302 fpstate_drop(td); 303 304 /* Allocate space for the signal handler context. */ 305 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 306 SIGISMEMBER(psp->ps_sigonstack, sig)) { 307 sp = td->td_sigstk.ss_sp + 308 td->td_sigstk.ss_size - sizeof(struct sigframe); 309 #if defined(COMPAT_43) 310 td->td_sigstk.ss_flags |= SS_ONSTACK; 311 #endif 312 } else 313 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 314 /* Align to 16 bytes. */ 315 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 316 317 /* Translate the signal if appropriate. */ 318 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 319 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 320 321 /* Build the argument list for the signal handler. */ 322 regs->tf_rdi = sig; /* arg 1 in %rdi */ 323 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 324 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 325 /* Signal handler installed with SA_SIGINFO. */ 326 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 327 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 328 329 /* Fill in POSIX parts */ 330 sf.sf_si.si_signo = sig; 331 sf.sf_si.si_code = code; 332 sf.sf_si.si_addr = (void *)regs->tf_addr; 333 regs->tf_rcx = regs->tf_addr; /* arg 4 in %rcx */ 334 } else { 335 /* Old FreeBSD-style arguments. */ 336 regs->tf_rsi = code; /* arg 2 in %rsi */ 337 regs->tf_rcx = regs->tf_addr; /* arg 4 in %rcx */ 338 sf.sf_ahu.sf_handler = catcher; 339 } 340 mtx_unlock(&psp->ps_mtx); 341 PROC_UNLOCK(p); 342 343 /* 344 * Copy the sigframe out to the user's stack. 345 */ 346 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 347 #ifdef DEBUG 348 printf("process %ld has trashed its stack\n", (long)p->p_pid); 349 #endif 350 PROC_LOCK(p); 351 sigexit(td, SIGILL); 352 } 353 354 regs->tf_rsp = (long)sfp; 355 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 356 regs->tf_rflags &= ~(PSL_T | PSL_D); 357 regs->tf_cs = _ucodesel; 358 PROC_LOCK(p); 359 mtx_lock(&psp->ps_mtx); 360 } 361 362 /* 363 * Build siginfo_t for SA thread 364 */ 365 void 366 cpu_thread_siginfo(int sig, u_long code, siginfo_t *si) 367 { 368 struct proc *p; 369 struct thread *td; 370 struct trapframe *regs; 371 372 td = curthread; 373 p = td->td_proc; 374 regs = td->td_frame; 375 PROC_LOCK_ASSERT(p, MA_OWNED); 376 377 bzero(si, sizeof(*si)); 378 si->si_signo = sig; 379 si->si_code = code; 380 si->si_addr = (void *)regs->tf_addr; 381 /* XXXKSE fill other fields */ 382 } 383 384 /* 385 * System call to cleanup state after a signal 386 * has been taken. Reset signal mask and 387 * stack state from context left by sendsig (above). 388 * Return to previous pc and psl as specified by 389 * context left by sendsig. Check carefully to 390 * make sure that the user has not modified the 391 * state to gain improper privileges. 392 * 393 * MPSAFE 394 */ 395 int 396 sigreturn(td, uap) 397 struct thread *td; 398 struct sigreturn_args /* { 399 const __ucontext *sigcntxp; 400 } */ *uap; 401 { 402 ucontext_t uc; 403 struct proc *p = td->td_proc; 404 struct trapframe *regs; 405 const ucontext_t *ucp; 406 long rflags; 407 int cs, error, ret; 408 409 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 410 if (error != 0) 411 return (error); 412 ucp = &uc; 413 regs = td->td_frame; 414 rflags = ucp->uc_mcontext.mc_rflags; 415 /* 416 * Don't allow users to change privileged or reserved flags. 417 */ 418 /* 419 * XXX do allow users to change the privileged flag PSL_RF. 420 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 421 * should sometimes set it there too. tf_rflags is kept in 422 * the signal context during signal handling and there is no 423 * other place to remember it, so the PSL_RF bit may be 424 * corrupted by the signal handler without us knowing. 425 * Corruption of the PSL_RF bit at worst causes one more or 426 * one less debugger trap, so allowing it is fairly harmless. 427 */ 428 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 429 printf("sigreturn: rflags = 0x%lx\n", rflags); 430 return (EINVAL); 431 } 432 433 /* 434 * Don't allow users to load a valid privileged %cs. Let the 435 * hardware check for invalid selectors, excess privilege in 436 * other selectors, invalid %eip's and invalid %esp's. 437 */ 438 cs = ucp->uc_mcontext.mc_cs; 439 if (!CS_SECURE(cs)) { 440 printf("sigreturn: cs = 0x%x\n", cs); 441 trapsignal(td, SIGBUS, T_PROTFLT); 442 return (EINVAL); 443 } 444 445 ret = set_fpcontext(td, &ucp->uc_mcontext); 446 if (ret != 0) 447 return (ret); 448 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 449 450 PROC_LOCK(p); 451 #if defined(COMPAT_43) 452 if (ucp->uc_mcontext.mc_onstack & 1) 453 td->td_sigstk.ss_flags |= SS_ONSTACK; 454 else 455 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 456 #endif 457 458 td->td_sigmask = ucp->uc_sigmask; 459 SIG_CANTMASK(td->td_sigmask); 460 signotify(td); 461 PROC_UNLOCK(p); 462 td->td_pcb->pcb_flags |= PCB_FULLCTX; 463 return (EJUSTRETURN); 464 } 465 466 #ifdef COMPAT_FREEBSD4 467 int 468 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 469 { 470 471 return sigreturn(td, (struct sigreturn_args *)uap); 472 } 473 #endif 474 475 476 /* 477 * Machine dependent boot() routine 478 * 479 * I haven't seen anything to put here yet 480 * Possibly some stuff might be grafted back here from boot() 481 */ 482 void 483 cpu_boot(int howto) 484 { 485 } 486 487 /* Get current clock frequency for the given cpu id. */ 488 int 489 cpu_est_clockrate(int cpu_id, uint64_t *rate) 490 { 491 register_t reg; 492 uint64_t tsc1, tsc2; 493 494 if (pcpu_find(cpu_id) == NULL || rate == NULL) 495 return (EINVAL); 496 497 /* If we're booting, trust the rate calibrated moments ago. */ 498 if (cold) { 499 *rate = tsc_freq; 500 return (0); 501 } 502 503 #ifdef SMP 504 /* Schedule ourselves on the indicated cpu. */ 505 mtx_lock_spin(&sched_lock); 506 sched_bind(curthread, cpu_id); 507 mtx_unlock_spin(&sched_lock); 508 #endif 509 510 /* Calibrate by measuring a short delay. */ 511 reg = intr_disable(); 512 tsc1 = rdtsc(); 513 DELAY(1000); 514 tsc2 = rdtsc(); 515 intr_restore(reg); 516 517 #ifdef SMP 518 mtx_lock_spin(&sched_lock); 519 sched_unbind(curthread); 520 mtx_unlock_spin(&sched_lock); 521 #endif 522 523 /* 524 * Calculate the difference in readings, convert to Mhz, and 525 * subtract 0.5% of the total. Empirical testing has shown that 526 * overhead in DELAY() works out to approximately this value. 527 */ 528 tsc2 -= tsc1; 529 *rate = tsc2 * 1000 - tsc2 * 5; 530 return (0); 531 } 532 533 /* 534 * Shutdown the CPU as much as possible 535 */ 536 void 537 cpu_halt(void) 538 { 539 for (;;) 540 __asm__ ("hlt"); 541 } 542 543 /* 544 * Hook to idle the CPU when possible. In the SMP case we default to 545 * off because a halted cpu will not currently pick up a new thread in the 546 * run queue until the next timer tick. If turned on this will result in 547 * approximately a 4.2% loss in real time performance in buildworld tests 548 * (but improves user and sys times oddly enough), and saves approximately 549 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 550 * 551 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 552 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 553 * Then we can have our cake and eat it too. 554 * 555 * XXX I'm turning it on for SMP as well by default for now. It seems to 556 * help lock contention somewhat, and this is critical for HTT. -Peter 557 */ 558 static int cpu_idle_hlt = 1; 559 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 560 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 561 562 static void 563 cpu_idle_default(void) 564 { 565 /* 566 * we must absolutely guarentee that hlt is the 567 * absolute next instruction after sti or we 568 * introduce a timing window. 569 */ 570 __asm __volatile("sti; hlt"); 571 } 572 573 /* 574 * Note that we have to be careful here to avoid a race between checking 575 * sched_runnable() and actually halting. If we don't do this, we may waste 576 * the time between calling hlt and the next interrupt even though there 577 * is a runnable process. 578 */ 579 void 580 cpu_idle(void) 581 { 582 583 #ifdef SMP 584 if (mp_grab_cpu_hlt()) 585 return; 586 #endif 587 if (cpu_idle_hlt) { 588 disable_intr(); 589 if (sched_runnable()) 590 enable_intr(); 591 else 592 (*cpu_idle_hook)(); 593 } 594 } 595 596 /* Other subsystems (e.g., ACPI) can hook this later. */ 597 void (*cpu_idle_hook)(void) = cpu_idle_default; 598 599 /* 600 * Clear registers on exec 601 */ 602 void 603 exec_setregs(td, entry, stack, ps_strings) 604 struct thread *td; 605 u_long entry; 606 u_long stack; 607 u_long ps_strings; 608 { 609 struct trapframe *regs = td->td_frame; 610 struct pcb *pcb = td->td_pcb; 611 612 critical_enter(); 613 wrmsr(MSR_FSBASE, 0); 614 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 615 pcb->pcb_fsbase = 0; 616 pcb->pcb_gsbase = 0; 617 critical_exit(); 618 load_ds(_udatasel); 619 load_es(_udatasel); 620 load_fs(_udatasel); 621 load_gs(_udatasel); 622 pcb->pcb_ds = _udatasel; 623 pcb->pcb_es = _udatasel; 624 pcb->pcb_fs = _udatasel; 625 pcb->pcb_gs = _udatasel; 626 627 bzero((char *)regs, sizeof(struct trapframe)); 628 regs->tf_rip = entry; 629 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 630 regs->tf_rdi = stack; /* argv */ 631 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 632 regs->tf_ss = _udatasel; 633 regs->tf_cs = _ucodesel; 634 635 /* 636 * Reset the hardware debug registers if they were in use. 637 * They won't have any meaning for the newly exec'd process. 638 */ 639 if (pcb->pcb_flags & PCB_DBREGS) { 640 pcb->pcb_dr0 = 0; 641 pcb->pcb_dr1 = 0; 642 pcb->pcb_dr2 = 0; 643 pcb->pcb_dr3 = 0; 644 pcb->pcb_dr6 = 0; 645 pcb->pcb_dr7 = 0; 646 if (pcb == PCPU_GET(curpcb)) { 647 /* 648 * Clear the debug registers on the running 649 * CPU, otherwise they will end up affecting 650 * the next process we switch to. 651 */ 652 reset_dbregs(); 653 } 654 pcb->pcb_flags &= ~PCB_DBREGS; 655 } 656 657 /* 658 * Drop the FP state if we hold it, so that the process gets a 659 * clean FP state if it uses the FPU again. 660 */ 661 fpstate_drop(td); 662 } 663 664 void 665 cpu_setregs(void) 666 { 667 register_t cr0; 668 669 cr0 = rcr0(); 670 /* 671 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 672 * BSP. See the comments there about why we set them. 673 */ 674 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 675 load_cr0(cr0); 676 } 677 678 static int 679 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 680 { 681 int error; 682 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 683 req); 684 if (!error && req->newptr) 685 resettodr(); 686 return (error); 687 } 688 689 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 690 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 691 692 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 693 CTLFLAG_RW, &disable_rtc_set, 0, ""); 694 695 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 696 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 697 698 /* 699 * Initialize amd64 and configure to run kernel 700 */ 701 702 /* 703 * Initialize segments & interrupt table 704 */ 705 706 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor table */ 707 static struct gate_descriptor idt0[NIDT]; 708 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 709 710 static char dblfault_stack[PAGE_SIZE] __aligned(16); 711 712 struct amd64tss common_tss[MAXCPU]; 713 714 /* software prototypes -- in more palatable form */ 715 struct soft_segment_descriptor gdt_segs[] = { 716 /* GNULL_SEL 0 Null Descriptor */ 717 { 0x0, /* segment base address */ 718 0x0, /* length */ 719 0, /* segment type */ 720 0, /* segment descriptor priority level */ 721 0, /* segment descriptor present */ 722 0, /* long */ 723 0, /* default 32 vs 16 bit size */ 724 0 /* limit granularity (byte/page units)*/ }, 725 /* GCODE_SEL 1 Code Descriptor for kernel */ 726 { 0x0, /* segment base address */ 727 0xfffff, /* length - all address space */ 728 SDT_MEMERA, /* segment type */ 729 SEL_KPL, /* segment descriptor priority level */ 730 1, /* segment descriptor present */ 731 1, /* long */ 732 0, /* default 32 vs 16 bit size */ 733 1 /* limit granularity (byte/page units)*/ }, 734 /* GDATA_SEL 2 Data Descriptor for kernel */ 735 { 0x0, /* segment base address */ 736 0xfffff, /* length - all address space */ 737 SDT_MEMRWA, /* segment type */ 738 SEL_KPL, /* segment descriptor priority level */ 739 1, /* segment descriptor present */ 740 1, /* long */ 741 0, /* default 32 vs 16 bit size */ 742 1 /* limit granularity (byte/page units)*/ }, 743 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */ 744 { 0x0, /* segment base address */ 745 0xfffff, /* length - all address space */ 746 SDT_MEMERA, /* segment type */ 747 SEL_UPL, /* segment descriptor priority level */ 748 1, /* segment descriptor present */ 749 0, /* long */ 750 1, /* default 32 vs 16 bit size */ 751 1 /* limit granularity (byte/page units)*/ }, 752 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */ 753 { 0x0, /* segment base address */ 754 0xfffff, /* length - all address space */ 755 SDT_MEMRWA, /* segment type */ 756 SEL_UPL, /* segment descriptor priority level */ 757 1, /* segment descriptor present */ 758 0, /* long */ 759 1, /* default 32 vs 16 bit size */ 760 1 /* limit granularity (byte/page units)*/ }, 761 /* GUCODE_SEL 5 64 bit Code Descriptor for user */ 762 { 0x0, /* segment base address */ 763 0xfffff, /* length - all address space */ 764 SDT_MEMERA, /* segment type */ 765 SEL_UPL, /* segment descriptor priority level */ 766 1, /* segment descriptor present */ 767 1, /* long */ 768 0, /* default 32 vs 16 bit size */ 769 1 /* limit granularity (byte/page units)*/ }, 770 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 771 { 772 0x0, /* segment base address */ 773 sizeof(struct amd64tss)-1,/* length - all address space */ 774 SDT_SYSTSS, /* segment type */ 775 SEL_KPL, /* segment descriptor priority level */ 776 1, /* segment descriptor present */ 777 0, /* long */ 778 0, /* unused - default 32 vs 16 bit size */ 779 0 /* limit granularity (byte/page units)*/ }, 780 /* Actually, the TSS is a system descriptor which is double size */ 781 { 0x0, /* segment base address */ 782 0x0, /* length */ 783 0, /* segment type */ 784 0, /* segment descriptor priority level */ 785 0, /* segment descriptor present */ 786 0, /* long */ 787 0, /* default 32 vs 16 bit size */ 788 0 /* limit granularity (byte/page units)*/ }, 789 }; 790 791 void 792 setidt(idx, func, typ, dpl, ist) 793 int idx; 794 inthand_t *func; 795 int typ; 796 int dpl; 797 int ist; 798 { 799 struct gate_descriptor *ip; 800 801 ip = idt + idx; 802 ip->gd_looffset = (uintptr_t)func; 803 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 804 ip->gd_ist = ist; 805 ip->gd_xx = 0; 806 ip->gd_type = typ; 807 ip->gd_dpl = dpl; 808 ip->gd_p = 1; 809 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 810 } 811 812 #define IDTVEC(name) __CONCAT(X,name) 813 814 extern inthand_t 815 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 816 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 817 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 818 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 819 IDTVEC(xmm), IDTVEC(dblfault), 820 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 821 822 void 823 sdtossd(sd, ssd) 824 struct user_segment_descriptor *sd; 825 struct soft_segment_descriptor *ssd; 826 { 827 828 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 829 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 830 ssd->ssd_type = sd->sd_type; 831 ssd->ssd_dpl = sd->sd_dpl; 832 ssd->ssd_p = sd->sd_p; 833 ssd->ssd_long = sd->sd_long; 834 ssd->ssd_def32 = sd->sd_def32; 835 ssd->ssd_gran = sd->sd_gran; 836 } 837 838 void 839 ssdtosd(ssd, sd) 840 struct soft_segment_descriptor *ssd; 841 struct user_segment_descriptor *sd; 842 { 843 844 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 845 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 846 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 847 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 848 sd->sd_type = ssd->ssd_type; 849 sd->sd_dpl = ssd->ssd_dpl; 850 sd->sd_p = ssd->ssd_p; 851 sd->sd_long = ssd->ssd_long; 852 sd->sd_def32 = ssd->ssd_def32; 853 sd->sd_gran = ssd->ssd_gran; 854 } 855 856 void 857 ssdtosyssd(ssd, sd) 858 struct soft_segment_descriptor *ssd; 859 struct system_segment_descriptor *sd; 860 { 861 862 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 863 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 864 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 865 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 866 sd->sd_type = ssd->ssd_type; 867 sd->sd_dpl = ssd->ssd_dpl; 868 sd->sd_p = ssd->ssd_p; 869 sd->sd_gran = ssd->ssd_gran; 870 } 871 872 #if !defined(DEV_ATPIC) && defined(DEV_ISA) 873 #include <isa/isavar.h> 874 u_int 875 isa_irq_pending(void) 876 { 877 878 return (0); 879 } 880 #endif 881 882 u_int basemem; 883 884 /* 885 * Populate the (physmap) array with base/bound pairs describing the 886 * available physical memory in the system, then test this memory and 887 * build the phys_avail array describing the actually-available memory. 888 * 889 * If we cannot accurately determine the physical memory map, then use 890 * value from the 0xE801 call, and failing that, the RTC. 891 * 892 * Total memory size may be set by the kernel environment variable 893 * hw.physmem or the compile-time define MAXMEM. 894 * 895 * XXX first should be vm_paddr_t. 896 */ 897 static void 898 getmemsize(caddr_t kmdp, u_int64_t first) 899 { 900 int i, physmap_idx, pa_indx, da_indx; 901 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 902 u_long physmem_tunable; 903 pt_entry_t *pte; 904 struct bios_smap *smapbase, *smap, *smapend; 905 u_int32_t smapsize; 906 quad_t dcons_addr, dcons_size; 907 908 bzero(physmap, sizeof(physmap)); 909 basemem = 0; 910 physmap_idx = 0; 911 912 /* 913 * get memory map from INT 15:E820, kindly supplied by the loader. 914 * 915 * subr_module.c says: 916 * "Consumer may safely assume that size value precedes data." 917 * ie: an int32_t immediately precedes smap. 918 */ 919 smapbase = (struct bios_smap *)preload_search_info(kmdp, 920 MODINFO_METADATA | MODINFOMD_SMAP); 921 if (smapbase == NULL) 922 panic("No BIOS smap info from loader!"); 923 924 smapsize = *((u_int32_t *)smapbase - 1); 925 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 926 927 for (smap = smapbase; smap < smapend; smap++) { 928 if (boothowto & RB_VERBOSE) 929 printf("SMAP type=%02x base=%016lx len=%016lx\n", 930 smap->type, smap->base, smap->length); 931 932 if (smap->type != SMAP_TYPE_MEMORY) 933 continue; 934 935 if (smap->length == 0) 936 continue; 937 938 for (i = 0; i <= physmap_idx; i += 2) { 939 if (smap->base < physmap[i + 1]) { 940 if (boothowto & RB_VERBOSE) 941 printf( 942 "Overlapping or non-montonic memory region, ignoring second region\n"); 943 continue; 944 } 945 } 946 947 if (smap->base == physmap[physmap_idx + 1]) { 948 physmap[physmap_idx + 1] += smap->length; 949 continue; 950 } 951 952 physmap_idx += 2; 953 if (physmap_idx == PHYSMAP_SIZE) { 954 printf( 955 "Too many segments in the physical address map, giving up\n"); 956 break; 957 } 958 physmap[physmap_idx] = smap->base; 959 physmap[physmap_idx + 1] = smap->base + smap->length; 960 } 961 962 /* 963 * Find the 'base memory' segment for SMP 964 */ 965 basemem = 0; 966 for (i = 0; i <= physmap_idx; i += 2) { 967 if (physmap[i] == 0x00000000) { 968 basemem = physmap[i + 1] / 1024; 969 break; 970 } 971 } 972 if (basemem == 0) 973 panic("BIOS smap did not include a basemem segment!"); 974 975 #ifdef SMP 976 /* make hole for AP bootstrap code */ 977 physmap[1] = mp_bootaddress(physmap[1] / 1024); 978 #endif 979 980 /* 981 * Maxmem isn't the "maximum memory", it's one larger than the 982 * highest page of the physical address space. It should be 983 * called something like "Maxphyspage". We may adjust this 984 * based on ``hw.physmem'' and the results of the memory test. 985 */ 986 Maxmem = atop(physmap[physmap_idx + 1]); 987 988 #ifdef MAXMEM 989 Maxmem = MAXMEM / 4; 990 #endif 991 992 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 993 Maxmem = atop(physmem_tunable); 994 995 /* 996 * Don't allow MAXMEM or hw.physmem to extend the amount of memory 997 * in the system. 998 */ 999 if (Maxmem > atop(physmap[physmap_idx + 1])) 1000 Maxmem = atop(physmap[physmap_idx + 1]); 1001 1002 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1003 (boothowto & RB_VERBOSE)) 1004 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1005 1006 /* call pmap initialization to make new kernel address space */ 1007 pmap_bootstrap(&first); 1008 1009 /* 1010 * Size up each available chunk of physical memory. 1011 */ 1012 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1013 pa_indx = 0; 1014 da_indx = 1; 1015 phys_avail[pa_indx++] = physmap[0]; 1016 phys_avail[pa_indx] = physmap[0]; 1017 dump_avail[da_indx] = physmap[0]; 1018 pte = CMAP1; 1019 1020 /* 1021 * Get dcons buffer address 1022 */ 1023 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1024 getenv_quad("dcons.size", &dcons_size) == 0) 1025 dcons_addr = 0; 1026 1027 /* 1028 * physmap is in bytes, so when converting to page boundaries, 1029 * round up the start address and round down the end address. 1030 */ 1031 for (i = 0; i <= physmap_idx; i += 2) { 1032 vm_paddr_t end; 1033 1034 end = ptoa((vm_paddr_t)Maxmem); 1035 if (physmap[i + 1] < end) 1036 end = trunc_page(physmap[i + 1]); 1037 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1038 int tmp, page_bad, full; 1039 int *ptr = (int *)CADDR1; 1040 1041 full = FALSE; 1042 /* 1043 * block out kernel memory as not available. 1044 */ 1045 if (pa >= 0x100000 && pa < first) 1046 goto do_dump_avail; 1047 1048 /* 1049 * block out dcons buffer 1050 */ 1051 if (dcons_addr > 0 1052 && pa >= trunc_page(dcons_addr) 1053 && pa < dcons_addr + dcons_size) 1054 goto do_dump_avail; 1055 1056 page_bad = FALSE; 1057 1058 /* 1059 * map page into kernel: valid, read/write,non-cacheable 1060 */ 1061 *pte = pa | PG_V | PG_RW | PG_N; 1062 invltlb(); 1063 1064 tmp = *(int *)ptr; 1065 /* 1066 * Test for alternating 1's and 0's 1067 */ 1068 *(volatile int *)ptr = 0xaaaaaaaa; 1069 if (*(volatile int *)ptr != 0xaaaaaaaa) 1070 page_bad = TRUE; 1071 /* 1072 * Test for alternating 0's and 1's 1073 */ 1074 *(volatile int *)ptr = 0x55555555; 1075 if (*(volatile int *)ptr != 0x55555555) 1076 page_bad = TRUE; 1077 /* 1078 * Test for all 1's 1079 */ 1080 *(volatile int *)ptr = 0xffffffff; 1081 if (*(volatile int *)ptr != 0xffffffff) 1082 page_bad = TRUE; 1083 /* 1084 * Test for all 0's 1085 */ 1086 *(volatile int *)ptr = 0x0; 1087 if (*(volatile int *)ptr != 0x0) 1088 page_bad = TRUE; 1089 /* 1090 * Restore original value. 1091 */ 1092 *(int *)ptr = tmp; 1093 1094 /* 1095 * Adjust array of valid/good pages. 1096 */ 1097 if (page_bad == TRUE) 1098 continue; 1099 /* 1100 * If this good page is a continuation of the 1101 * previous set of good pages, then just increase 1102 * the end pointer. Otherwise start a new chunk. 1103 * Note that "end" points one higher than end, 1104 * making the range >= start and < end. 1105 * If we're also doing a speculative memory 1106 * test and we at or past the end, bump up Maxmem 1107 * so that we keep going. The first bad page 1108 * will terminate the loop. 1109 */ 1110 if (phys_avail[pa_indx] == pa) { 1111 phys_avail[pa_indx] += PAGE_SIZE; 1112 } else { 1113 pa_indx++; 1114 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1115 printf( 1116 "Too many holes in the physical address space, giving up\n"); 1117 pa_indx--; 1118 full = TRUE; 1119 goto do_dump_avail; 1120 } 1121 phys_avail[pa_indx++] = pa; /* start */ 1122 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1123 } 1124 physmem++; 1125 do_dump_avail: 1126 if (dump_avail[da_indx] == pa) { 1127 dump_avail[da_indx] += PAGE_SIZE; 1128 } else { 1129 da_indx++; 1130 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1131 da_indx--; 1132 goto do_next; 1133 } 1134 dump_avail[da_indx++] = pa; /* start */ 1135 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1136 } 1137 do_next: 1138 if (full) 1139 break; 1140 } 1141 } 1142 *pte = 0; 1143 invltlb(); 1144 1145 /* 1146 * XXX 1147 * The last chunk must contain at least one page plus the message 1148 * buffer to avoid complicating other code (message buffer address 1149 * calculation, etc.). 1150 */ 1151 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1152 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1153 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1154 phys_avail[pa_indx--] = 0; 1155 phys_avail[pa_indx--] = 0; 1156 } 1157 1158 Maxmem = atop(phys_avail[pa_indx]); 1159 1160 /* Trim off space for the message buffer. */ 1161 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1162 1163 avail_end = phys_avail[pa_indx]; 1164 } 1165 1166 u_int64_t 1167 hammer_time(u_int64_t modulep, u_int64_t physfree) 1168 { 1169 caddr_t kmdp; 1170 int gsel_tss, off, x; 1171 struct pcpu *pc; 1172 u_int64_t msr; 1173 char *env; 1174 1175 thread0.td_kstack = physfree + KERNBASE; 1176 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE); 1177 physfree += KSTACK_PAGES * PAGE_SIZE; 1178 thread0.td_pcb = (struct pcb *) 1179 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1180 1181 /* 1182 * This may be done better later if it gets more high level 1183 * components in it. If so just link td->td_proc here. 1184 */ 1185 proc_linkup(&proc0, &ksegrp0, &thread0); 1186 1187 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1188 preload_bootstrap_relocate(KERNBASE); 1189 kmdp = preload_search_by_type("elf kernel"); 1190 if (kmdp == NULL) 1191 kmdp = preload_search_by_type("elf64 kernel"); 1192 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1193 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1194 #ifdef DDB 1195 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1196 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1197 #endif 1198 1199 /* Init basic tunables, hz etc */ 1200 init_param1(); 1201 1202 /* 1203 * make gdt memory segments 1204 */ 1205 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1206 1207 for (x = 0; x < NGDT; x++) { 1208 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1)) 1209 ssdtosd(&gdt_segs[x], &gdt[x]); 1210 } 1211 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1212 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1213 1214 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1215 r_gdt.rd_base = (long) gdt; 1216 lgdt(&r_gdt); 1217 pc = &__pcpu[0]; 1218 1219 wrmsr(MSR_FSBASE, 0); /* User value */ 1220 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1221 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1222 1223 pcpu_init(pc, 0, sizeof(struct pcpu)); 1224 PCPU_SET(prvspace, pc); 1225 PCPU_SET(curthread, &thread0); 1226 PCPU_SET(curpcb, thread0.td_pcb); 1227 PCPU_SET(tssp, &common_tss[0]); 1228 1229 /* 1230 * Initialize mutexes. 1231 * 1232 * icu_lock: in order to allow an interrupt to occur in a critical 1233 * section, to set pcpu->ipending (etc...) properly, we 1234 * must be able to get the icu lock, so it can't be 1235 * under witness. 1236 */ 1237 mutex_init(); 1238 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN); 1239 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1240 1241 /* exceptions */ 1242 for (x = 0; x < NIDT; x++) 1243 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1244 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1245 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1246 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1); 1247 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1248 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1249 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1250 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1251 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1252 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1253 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1254 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1255 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1256 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1257 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1258 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1259 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1260 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1261 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1262 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1263 1264 r_idt.rd_limit = sizeof(idt0) - 1; 1265 r_idt.rd_base = (long) idt; 1266 lidt(&r_idt); 1267 1268 /* 1269 * Initialize the console before we print anything out. 1270 */ 1271 cninit(); 1272 1273 #ifdef DEV_ISA 1274 #ifdef DEV_ATPIC 1275 elcr_probe(); 1276 atpic_startup(); 1277 #else 1278 /* Reset and mask the atpics and leave them shut down. */ 1279 atpic_reset(); 1280 1281 /* 1282 * Point the ICU spurious interrupt vectors at the APIC spurious 1283 * interrupt handler. 1284 */ 1285 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1286 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1287 #endif 1288 #else 1289 #error "have you forgotten the isa device?"; 1290 #endif 1291 1292 kdb_init(); 1293 1294 #ifdef KDB 1295 if (boothowto & RB_KDB) 1296 kdb_enter("Boot flags requested debugger"); 1297 #endif 1298 1299 identify_cpu(); /* Final stage of CPU initialization */ 1300 initializecpu(); /* Initialize CPU registers */ 1301 1302 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1303 common_tss[0].tss_rsp0 = thread0.td_kstack + \ 1304 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb); 1305 /* Ensure the stack is aligned to 16 bytes */ 1306 common_tss[0].tss_rsp0 &= ~0xFul; 1307 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 1308 1309 /* doublefault stack space, runs on ist1 */ 1310 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1311 1312 /* Set the IO permission bitmap (empty due to tss seg limit) */ 1313 common_tss[0].tss_iobase = sizeof(struct amd64tss); 1314 1315 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1316 ltr(gsel_tss); 1317 1318 /* Set up the fast syscall stuff */ 1319 msr = rdmsr(MSR_EFER) | EFER_SCE; 1320 wrmsr(MSR_EFER, msr); 1321 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1322 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1323 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1324 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1325 wrmsr(MSR_STAR, msr); 1326 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1327 1328 getmemsize(kmdp, physfree); 1329 init_param2(physmem); 1330 1331 /* now running on new page tables, configured,and u/iom is accessible */ 1332 1333 /* Map the message buffer. */ 1334 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1335 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 1336 1337 msgbufinit(msgbufp, MSGBUF_SIZE); 1338 fpuinit(); 1339 1340 /* transfer to user mode */ 1341 1342 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1343 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1344 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1345 1346 /* setup proc 0's pcb */ 1347 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 1348 thread0.td_pcb->pcb_cr3 = KPML4phys; 1349 thread0.td_frame = &proc0_tf; 1350 1351 env = getenv("kernelname"); 1352 if (env != NULL) 1353 strlcpy(kernelname, env, sizeof(kernelname)); 1354 1355 /* Location of kernel stack for locore */ 1356 return ((u_int64_t)thread0.td_pcb); 1357 } 1358 1359 void 1360 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1361 { 1362 1363 pcpu->pc_acpi_id = 0xffffffff; 1364 } 1365 1366 void 1367 spinlock_enter(void) 1368 { 1369 struct thread *td; 1370 1371 td = curthread; 1372 if (td->td_md.md_spinlock_count == 0) 1373 td->td_md.md_saved_flags = intr_disable(); 1374 td->td_md.md_spinlock_count++; 1375 critical_enter(); 1376 } 1377 1378 void 1379 spinlock_exit(void) 1380 { 1381 struct thread *td; 1382 1383 td = curthread; 1384 critical_exit(); 1385 td->td_md.md_spinlock_count--; 1386 if (td->td_md.md_spinlock_count == 0) 1387 intr_restore(td->td_md.md_saved_flags); 1388 } 1389 1390 /* 1391 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1392 * we want to start a backtrace from the function that caused us to enter 1393 * the debugger. We have the context in the trapframe, but base the trace 1394 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1395 * enough for a backtrace. 1396 */ 1397 void 1398 makectx(struct trapframe *tf, struct pcb *pcb) 1399 { 1400 1401 pcb->pcb_r12 = tf->tf_r12; 1402 pcb->pcb_r13 = tf->tf_r13; 1403 pcb->pcb_r14 = tf->tf_r14; 1404 pcb->pcb_r15 = tf->tf_r15; 1405 pcb->pcb_rbp = tf->tf_rbp; 1406 pcb->pcb_rbx = tf->tf_rbx; 1407 pcb->pcb_rip = tf->tf_rip; 1408 pcb->pcb_rsp = (ISPL(tf->tf_cs)) ? tf->tf_rsp : (long)(tf + 1) - 8; 1409 } 1410 1411 int 1412 ptrace_set_pc(struct thread *td, unsigned long addr) 1413 { 1414 td->td_frame->tf_rip = addr; 1415 return (0); 1416 } 1417 1418 int 1419 ptrace_single_step(struct thread *td) 1420 { 1421 td->td_frame->tf_rflags |= PSL_T; 1422 return (0); 1423 } 1424 1425 int 1426 ptrace_clear_single_step(struct thread *td) 1427 { 1428 td->td_frame->tf_rflags &= ~PSL_T; 1429 return (0); 1430 } 1431 1432 int 1433 fill_regs(struct thread *td, struct reg *regs) 1434 { 1435 struct trapframe *tp; 1436 1437 tp = td->td_frame; 1438 regs->r_r15 = tp->tf_r15; 1439 regs->r_r14 = tp->tf_r14; 1440 regs->r_r13 = tp->tf_r13; 1441 regs->r_r12 = tp->tf_r12; 1442 regs->r_r11 = tp->tf_r11; 1443 regs->r_r10 = tp->tf_r10; 1444 regs->r_r9 = tp->tf_r9; 1445 regs->r_r8 = tp->tf_r8; 1446 regs->r_rdi = tp->tf_rdi; 1447 regs->r_rsi = tp->tf_rsi; 1448 regs->r_rbp = tp->tf_rbp; 1449 regs->r_rbx = tp->tf_rbx; 1450 regs->r_rdx = tp->tf_rdx; 1451 regs->r_rcx = tp->tf_rcx; 1452 regs->r_rax = tp->tf_rax; 1453 regs->r_rip = tp->tf_rip; 1454 regs->r_cs = tp->tf_cs; 1455 regs->r_rflags = tp->tf_rflags; 1456 regs->r_rsp = tp->tf_rsp; 1457 regs->r_ss = tp->tf_ss; 1458 return (0); 1459 } 1460 1461 int 1462 set_regs(struct thread *td, struct reg *regs) 1463 { 1464 struct trapframe *tp; 1465 register_t rflags; 1466 1467 tp = td->td_frame; 1468 rflags = regs->r_rflags & 0xffffffff; 1469 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 1470 return (EINVAL); 1471 tp->tf_r15 = regs->r_r15; 1472 tp->tf_r14 = regs->r_r14; 1473 tp->tf_r13 = regs->r_r13; 1474 tp->tf_r12 = regs->r_r12; 1475 tp->tf_r11 = regs->r_r11; 1476 tp->tf_r10 = regs->r_r10; 1477 tp->tf_r9 = regs->r_r9; 1478 tp->tf_r8 = regs->r_r8; 1479 tp->tf_rdi = regs->r_rdi; 1480 tp->tf_rsi = regs->r_rsi; 1481 tp->tf_rbp = regs->r_rbp; 1482 tp->tf_rbx = regs->r_rbx; 1483 tp->tf_rdx = regs->r_rdx; 1484 tp->tf_rcx = regs->r_rcx; 1485 tp->tf_rax = regs->r_rax; 1486 tp->tf_rip = regs->r_rip; 1487 tp->tf_cs = regs->r_cs; 1488 tp->tf_rflags = rflags; 1489 tp->tf_rsp = regs->r_rsp; 1490 tp->tf_ss = regs->r_ss; 1491 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1492 return (0); 1493 } 1494 1495 /* XXX check all this stuff! */ 1496 /* externalize from sv_xmm */ 1497 static void 1498 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 1499 { 1500 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1501 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1502 int i; 1503 1504 /* pcb -> fpregs */ 1505 bzero(fpregs, sizeof(*fpregs)); 1506 1507 /* FPU control/status */ 1508 penv_fpreg->en_cw = penv_xmm->en_cw; 1509 penv_fpreg->en_sw = penv_xmm->en_sw; 1510 penv_fpreg->en_tw = penv_xmm->en_tw; 1511 penv_fpreg->en_opcode = penv_xmm->en_opcode; 1512 penv_fpreg->en_rip = penv_xmm->en_rip; 1513 penv_fpreg->en_rdp = penv_xmm->en_rdp; 1514 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 1515 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 1516 1517 /* FPU registers */ 1518 for (i = 0; i < 8; ++i) 1519 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 1520 1521 /* SSE registers */ 1522 for (i = 0; i < 16; ++i) 1523 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 1524 } 1525 1526 /* internalize from fpregs into sv_xmm */ 1527 static void 1528 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 1529 { 1530 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1531 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1532 int i; 1533 1534 /* fpregs -> pcb */ 1535 /* FPU control/status */ 1536 penv_xmm->en_cw = penv_fpreg->en_cw; 1537 penv_xmm->en_sw = penv_fpreg->en_sw; 1538 penv_xmm->en_tw = penv_fpreg->en_tw; 1539 penv_xmm->en_opcode = penv_fpreg->en_opcode; 1540 penv_xmm->en_rip = penv_fpreg->en_rip; 1541 penv_xmm->en_rdp = penv_fpreg->en_rdp; 1542 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 1543 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 1544 1545 /* FPU registers */ 1546 for (i = 0; i < 8; ++i) 1547 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 1548 1549 /* SSE registers */ 1550 for (i = 0; i < 16; ++i) 1551 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 1552 } 1553 1554 /* externalize from td->pcb */ 1555 int 1556 fill_fpregs(struct thread *td, struct fpreg *fpregs) 1557 { 1558 1559 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs); 1560 return (0); 1561 } 1562 1563 /* internalize to td->pcb */ 1564 int 1565 set_fpregs(struct thread *td, struct fpreg *fpregs) 1566 { 1567 1568 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save); 1569 return (0); 1570 } 1571 1572 /* 1573 * Get machine context. 1574 */ 1575 int 1576 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 1577 { 1578 struct trapframe *tp; 1579 1580 tp = td->td_frame; 1581 PROC_LOCK(curthread->td_proc); 1582 mcp->mc_onstack = sigonstack(tp->tf_rsp); 1583 PROC_UNLOCK(curthread->td_proc); 1584 mcp->mc_r15 = tp->tf_r15; 1585 mcp->mc_r14 = tp->tf_r14; 1586 mcp->mc_r13 = tp->tf_r13; 1587 mcp->mc_r12 = tp->tf_r12; 1588 mcp->mc_r11 = tp->tf_r11; 1589 mcp->mc_r10 = tp->tf_r10; 1590 mcp->mc_r9 = tp->tf_r9; 1591 mcp->mc_r8 = tp->tf_r8; 1592 mcp->mc_rdi = tp->tf_rdi; 1593 mcp->mc_rsi = tp->tf_rsi; 1594 mcp->mc_rbp = tp->tf_rbp; 1595 mcp->mc_rbx = tp->tf_rbx; 1596 mcp->mc_rcx = tp->tf_rcx; 1597 mcp->mc_rflags = tp->tf_rflags; 1598 if (flags & GET_MC_CLEAR_RET) { 1599 mcp->mc_rax = 0; 1600 mcp->mc_rdx = 0; 1601 mcp->mc_rflags &= ~PSL_C; 1602 } else { 1603 mcp->mc_rax = tp->tf_rax; 1604 mcp->mc_rdx = tp->tf_rdx; 1605 } 1606 mcp->mc_rip = tp->tf_rip; 1607 mcp->mc_cs = tp->tf_cs; 1608 mcp->mc_rsp = tp->tf_rsp; 1609 mcp->mc_ss = tp->tf_ss; 1610 mcp->mc_len = sizeof(*mcp); 1611 get_fpcontext(td, mcp); 1612 return (0); 1613 } 1614 1615 /* 1616 * Set machine context. 1617 * 1618 * However, we don't set any but the user modifiable flags, and we won't 1619 * touch the cs selector. 1620 */ 1621 int 1622 set_mcontext(struct thread *td, const mcontext_t *mcp) 1623 { 1624 struct trapframe *tp; 1625 long rflags; 1626 int ret; 1627 1628 tp = td->td_frame; 1629 if (mcp->mc_len != sizeof(*mcp)) 1630 return (EINVAL); 1631 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 1632 (tp->tf_rflags & ~PSL_USERCHANGE); 1633 ret = set_fpcontext(td, mcp); 1634 if (ret != 0) 1635 return (ret); 1636 tp->tf_r15 = mcp->mc_r15; 1637 tp->tf_r14 = mcp->mc_r14; 1638 tp->tf_r13 = mcp->mc_r13; 1639 tp->tf_r12 = mcp->mc_r12; 1640 tp->tf_r11 = mcp->mc_r11; 1641 tp->tf_r10 = mcp->mc_r10; 1642 tp->tf_r9 = mcp->mc_r9; 1643 tp->tf_r8 = mcp->mc_r8; 1644 tp->tf_rdi = mcp->mc_rdi; 1645 tp->tf_rsi = mcp->mc_rsi; 1646 tp->tf_rbp = mcp->mc_rbp; 1647 tp->tf_rbx = mcp->mc_rbx; 1648 tp->tf_rdx = mcp->mc_rdx; 1649 tp->tf_rcx = mcp->mc_rcx; 1650 tp->tf_rax = mcp->mc_rax; 1651 tp->tf_rip = mcp->mc_rip; 1652 tp->tf_rflags = rflags; 1653 tp->tf_rsp = mcp->mc_rsp; 1654 tp->tf_ss = mcp->mc_ss; 1655 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1656 return (0); 1657 } 1658 1659 static void 1660 get_fpcontext(struct thread *td, mcontext_t *mcp) 1661 { 1662 1663 mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1664 mcp->mc_fpformat = fpuformat(); 1665 } 1666 1667 static int 1668 set_fpcontext(struct thread *td, const mcontext_t *mcp) 1669 { 1670 struct savefpu *fpstate; 1671 1672 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 1673 return (0); 1674 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 1675 return (EINVAL); 1676 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 1677 /* We don't care what state is left in the FPU or PCB. */ 1678 fpstate_drop(td); 1679 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 1680 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 1681 /* 1682 * XXX we violate the dubious requirement that fpusetregs() 1683 * be called with interrupts disabled. 1684 * XXX obsolete on trap-16 systems? 1685 */ 1686 fpstate = (struct savefpu *)&mcp->mc_fpstate; 1687 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask; 1688 fpusetregs(td, fpstate); 1689 } else 1690 return (EINVAL); 1691 return (0); 1692 } 1693 1694 void 1695 fpstate_drop(struct thread *td) 1696 { 1697 register_t s; 1698 1699 s = intr_disable(); 1700 if (PCPU_GET(fpcurthread) == td) 1701 fpudrop(); 1702 /* 1703 * XXX force a full drop of the fpu. The above only drops it if we 1704 * owned it. 1705 * 1706 * XXX I don't much like fpugetregs()'s semantics of doing a full 1707 * drop. Dropping only to the pcb matches fnsave's behaviour. 1708 * We only need to drop to !PCB_INITDONE in sendsig(). But 1709 * sendsig() is the only caller of fpugetregs()... perhaps we just 1710 * have too many layers. 1711 */ 1712 curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE; 1713 intr_restore(s); 1714 } 1715 1716 int 1717 fill_dbregs(struct thread *td, struct dbreg *dbregs) 1718 { 1719 struct pcb *pcb; 1720 1721 if (td == NULL) { 1722 dbregs->dr[0] = rdr0(); 1723 dbregs->dr[1] = rdr1(); 1724 dbregs->dr[2] = rdr2(); 1725 dbregs->dr[3] = rdr3(); 1726 dbregs->dr[6] = rdr6(); 1727 dbregs->dr[7] = rdr7(); 1728 } else { 1729 pcb = td->td_pcb; 1730 dbregs->dr[0] = pcb->pcb_dr0; 1731 dbregs->dr[1] = pcb->pcb_dr1; 1732 dbregs->dr[2] = pcb->pcb_dr2; 1733 dbregs->dr[3] = pcb->pcb_dr3; 1734 dbregs->dr[6] = pcb->pcb_dr6; 1735 dbregs->dr[7] = pcb->pcb_dr7; 1736 } 1737 dbregs->dr[4] = 0; 1738 dbregs->dr[5] = 0; 1739 dbregs->dr[8] = 0; 1740 dbregs->dr[9] = 0; 1741 dbregs->dr[10] = 0; 1742 dbregs->dr[11] = 0; 1743 dbregs->dr[12] = 0; 1744 dbregs->dr[13] = 0; 1745 dbregs->dr[14] = 0; 1746 dbregs->dr[15] = 0; 1747 return (0); 1748 } 1749 1750 int 1751 set_dbregs(struct thread *td, struct dbreg *dbregs) 1752 { 1753 struct pcb *pcb; 1754 int i; 1755 u_int64_t mask1, mask2; 1756 1757 if (td == NULL) { 1758 load_dr0(dbregs->dr[0]); 1759 load_dr1(dbregs->dr[1]); 1760 load_dr2(dbregs->dr[2]); 1761 load_dr3(dbregs->dr[3]); 1762 load_dr6(dbregs->dr[6]); 1763 load_dr7(dbregs->dr[7]); 1764 } else { 1765 /* 1766 * Don't let an illegal value for dr7 get set. Specifically, 1767 * check for undefined settings. Setting these bit patterns 1768 * result in undefined behaviour and can lead to an unexpected 1769 * TRCTRAP or a general protection fault right here. 1770 * Upper bits of dr6 and dr7 must not be set 1771 */ 1772 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 1773 i++, mask1 <<= 2, mask2 <<= 2) 1774 if ((dbregs->dr[7] & mask1) == mask2) 1775 return (EINVAL); 1776 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 1777 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 1778 return (EINVAL); 1779 1780 pcb = td->td_pcb; 1781 1782 /* 1783 * Don't let a process set a breakpoint that is not within the 1784 * process's address space. If a process could do this, it 1785 * could halt the system by setting a breakpoint in the kernel 1786 * (if ddb was enabled). Thus, we need to check to make sure 1787 * that no breakpoints are being enabled for addresses outside 1788 * process's address space. 1789 * 1790 * XXX - what about when the watched area of the user's 1791 * address space is written into from within the kernel 1792 * ... wouldn't that still cause a breakpoint to be generated 1793 * from within kernel mode? 1794 */ 1795 1796 if (dbregs->dr[7] & 0x3) { 1797 /* dr0 is enabled */ 1798 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 1799 return (EINVAL); 1800 } 1801 if (dbregs->dr[7] & 0x3<<2) { 1802 /* dr1 is enabled */ 1803 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 1804 return (EINVAL); 1805 } 1806 if (dbregs->dr[7] & 0x3<<4) { 1807 /* dr2 is enabled */ 1808 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 1809 return (EINVAL); 1810 } 1811 if (dbregs->dr[7] & 0x3<<6) { 1812 /* dr3 is enabled */ 1813 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 1814 return (EINVAL); 1815 } 1816 1817 pcb->pcb_dr0 = dbregs->dr[0]; 1818 pcb->pcb_dr1 = dbregs->dr[1]; 1819 pcb->pcb_dr2 = dbregs->dr[2]; 1820 pcb->pcb_dr3 = dbregs->dr[3]; 1821 pcb->pcb_dr6 = dbregs->dr[6]; 1822 pcb->pcb_dr7 = dbregs->dr[7]; 1823 1824 pcb->pcb_flags |= PCB_DBREGS; 1825 } 1826 1827 return (0); 1828 } 1829 1830 void 1831 reset_dbregs(void) 1832 { 1833 1834 load_dr7(0); /* Turn off the control bits first */ 1835 load_dr0(0); 1836 load_dr1(0); 1837 load_dr2(0); 1838 load_dr3(0); 1839 load_dr6(0); 1840 } 1841 1842 /* 1843 * Return > 0 if a hardware breakpoint has been hit, and the 1844 * breakpoint was in user space. Return 0, otherwise. 1845 */ 1846 int 1847 user_dbreg_trap(void) 1848 { 1849 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 1850 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 1851 int nbp; /* number of breakpoints that triggered */ 1852 caddr_t addr[4]; /* breakpoint addresses */ 1853 int i; 1854 1855 dr7 = rdr7(); 1856 if ((dr7 & 0x000000ff) == 0) { 1857 /* 1858 * all GE and LE bits in the dr7 register are zero, 1859 * thus the trap couldn't have been caused by the 1860 * hardware debug registers 1861 */ 1862 return 0; 1863 } 1864 1865 nbp = 0; 1866 dr6 = rdr6(); 1867 bp = dr6 & 0x0000000f; 1868 1869 if (!bp) { 1870 /* 1871 * None of the breakpoint bits are set meaning this 1872 * trap was not caused by any of the debug registers 1873 */ 1874 return 0; 1875 } 1876 1877 /* 1878 * at least one of the breakpoints were hit, check to see 1879 * which ones and if any of them are user space addresses 1880 */ 1881 1882 if (bp & 0x01) { 1883 addr[nbp++] = (caddr_t)rdr0(); 1884 } 1885 if (bp & 0x02) { 1886 addr[nbp++] = (caddr_t)rdr1(); 1887 } 1888 if (bp & 0x04) { 1889 addr[nbp++] = (caddr_t)rdr2(); 1890 } 1891 if (bp & 0x08) { 1892 addr[nbp++] = (caddr_t)rdr3(); 1893 } 1894 1895 for (i=0; i<nbp; i++) { 1896 if (addr[i] < 1897 (caddr_t)VM_MAXUSER_ADDRESS) { 1898 /* 1899 * addr[i] is in user space 1900 */ 1901 return nbp; 1902 } 1903 } 1904 1905 /* 1906 * None of the breakpoints are in user space. 1907 */ 1908 return 0; 1909 } 1910 1911 #ifdef KDB 1912 1913 /* 1914 * Provide inb() and outb() as functions. They are normally only 1915 * available as macros calling inlined functions, thus cannot be 1916 * called from the debugger. 1917 * 1918 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1919 */ 1920 1921 #undef inb 1922 #undef outb 1923 1924 /* silence compiler warnings */ 1925 u_char inb(u_int); 1926 void outb(u_int, u_char); 1927 1928 u_char 1929 inb(u_int port) 1930 { 1931 u_char data; 1932 /* 1933 * We use %%dx and not %1 here because i/o is done at %dx and not at 1934 * %edx, while gcc generates inferior code (movw instead of movl) 1935 * if we tell it to load (u_short) port. 1936 */ 1937 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1938 return (data); 1939 } 1940 1941 void 1942 outb(u_int port, u_char data) 1943 { 1944 u_char al; 1945 /* 1946 * Use an unnecessary assignment to help gcc's register allocator. 1947 * This make a large difference for gcc-1.40 and a tiny difference 1948 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1949 * best results. gcc-2.6.0 can't handle this. 1950 */ 1951 al = data; 1952 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1953 } 1954 1955 #endif /* KDB */
Cache object: 314d6d4fcf08a7a221c48a4106ace62d
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