1 /*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
39 */
40
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
43
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
47 #include "opt_cpu.h"
48 #include "opt_ddb.h"
49 #include "opt_inet.h"
50 #include "opt_ipx.h"
51 #include "opt_isa.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
56
57 #include <sys/param.h>
58 #include <sys/proc.h>
59 #include <sys/systm.h>
60 #include <sys/bio.h>
61 #include <sys/buf.h>
62 #include <sys/bus.h>
63 #include <sys/callout.h>
64 #include <sys/clock.h>
65 #include <sys/cons.h>
66 #include <sys/cpu.h>
67 #include <sys/eventhandler.h>
68 #include <sys/exec.h>
69 #include <sys/imgact.h>
70 #include <sys/kdb.h>
71 #include <sys/kernel.h>
72 #include <sys/ktr.h>
73 #include <sys/linker.h>
74 #include <sys/lock.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
79 #include <sys/pcpu.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/sched.h>
83 #include <sys/signalvar.h>
84 #include <sys/sysctl.h>
85 #include <sys/sysent.h>
86 #include <sys/sysproto.h>
87 #include <sys/ucontext.h>
88 #include <sys/vmmeter.h>
89
90 #include <vm/vm.h>
91 #include <vm/vm_extern.h>
92 #include <vm/vm_kern.h>
93 #include <vm/vm_page.h>
94 #include <vm/vm_map.h>
95 #include <vm/vm_object.h>
96 #include <vm/vm_pager.h>
97 #include <vm/vm_param.h>
98
99 #ifdef DDB
100 #ifndef KDB
101 #error KDB must be enabled in order for DDB to work!
102 #endif
103 #endif
104 #include <ddb/ddb.h>
105
106 #include <net/netisr.h>
107
108 #include <machine/clock.h>
109 #include <machine/cpu.h>
110 #include <machine/cputypes.h>
111 #include <machine/intr_machdep.h>
112 #include <machine/md_var.h>
113 #include <machine/metadata.h>
114 #include <machine/pc/bios.h>
115 #include <machine/pcb.h>
116 #include <machine/proc.h>
117 #include <machine/reg.h>
118 #include <machine/sigframe.h>
119 #include <machine/specialreg.h>
120 #ifdef PERFMON
121 #include <machine/perfmon.h>
122 #endif
123 #include <machine/tss.h>
124 #ifdef SMP
125 #include <machine/smp.h>
126 #endif
127
128 #ifdef DEV_ATPIC
129 #include <amd64/isa/icu.h>
130 #else
131 #include <machine/apicvar.h>
132 #endif
133
134 #include <isa/isareg.h>
135 #include <isa/rtc.h>
136
137 /* Sanity check for __curthread() */
138 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
139
140 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
141
142 extern void printcpuinfo(void); /* XXX header file */
143 extern void identify_cpu(void);
144 extern void panicifcpuunsupported(void);
145
146 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
147 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
148
149 static void cpu_startup(void *);
150 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
151 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
152 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
153
154 #ifdef DDB
155 extern vm_offset_t ksym_start, ksym_end;
156 #endif
157
158 /* Intel ICH registers */
159 #define ICH_PMBASE 0x400
160 #define ICH_SMI_EN ICH_PMBASE + 0x30
161
162 int _udatasel, _ucodesel, _ucode32sel;
163
164 int cold = 1;
165
166 long Maxmem = 0;
167 long realmem = 0;
168
169 /*
170 * The number of PHYSMAP entries must be one less than the number of
171 * PHYSSEG entries because the PHYSMAP entry that spans the largest
172 * physical address that is accessible by ISA DMA is split into two
173 * PHYSSEG entries.
174 */
175 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
176
177 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
178 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
179
180 /* must be 2 less so 0 0 can signal end of chunks */
181 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
182 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
183
184 struct kva_md_info kmi;
185
186 static struct trapframe proc0_tf;
187 struct region_descriptor r_gdt, r_idt;
188
189 struct pcpu __pcpu[MAXCPU];
190
191 struct mtx icu_lock;
192
193 struct mem_range_softc mem_range_softc;
194
195 static void
196 cpu_startup(dummy)
197 void *dummy;
198 {
199 char *sysenv;
200
201 /*
202 * On MacBooks, we need to disallow the legacy USB circuit to
203 * generate an SMI# because this can cause several problems,
204 * namely: incorrect CPU frequency detection and failure to
205 * start the APs.
206 * We do this by disabling a bit in the SMI_EN (SMI Control and
207 * Enable register) of the Intel ICH LPC Interface Bridge.
208 */
209 sysenv = getenv("smbios.system.product");
210 if (sysenv != NULL) {
211 if (strncmp(sysenv, "MacBook", 7) == 0) {
212 if (bootverbose)
213 printf("Disabling LEGACY_USB_EN bit on "
214 "Intel ICH.\n");
215 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
216 }
217 freeenv(sysenv);
218 }
219
220 /*
221 * Good {morning,afternoon,evening,night}.
222 */
223 startrtclock();
224 printcpuinfo();
225 panicifcpuunsupported();
226 #ifdef PERFMON
227 perfmon_init();
228 #endif
229 printf("usable memory = %ju (%ju MB)\n", ptoa((uintmax_t)physmem),
230 ptoa((uintmax_t)physmem) / 1048576);
231 realmem = Maxmem;
232 /*
233 * Display any holes after the first chunk of extended memory.
234 */
235 if (bootverbose) {
236 int indx;
237
238 printf("Physical memory chunk(s):\n");
239 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
240 vm_paddr_t size;
241
242 size = phys_avail[indx + 1] - phys_avail[indx];
243 printf(
244 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
245 (uintmax_t)phys_avail[indx],
246 (uintmax_t)phys_avail[indx + 1] - 1,
247 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
248 }
249 }
250
251 vm_ksubmap_init(&kmi);
252
253 printf("avail memory = %ju (%ju MB)\n",
254 ptoa((uintmax_t)cnt.v_free_count),
255 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
256
257 /*
258 * Set up buffers, so they can be used to read disk labels.
259 */
260 bufinit();
261 vm_pager_bufferinit();
262
263 cpu_setregs();
264 }
265
266 /*
267 * Send an interrupt to process.
268 *
269 * Stack is set up to allow sigcode stored
270 * at top to call routine, followed by kcall
271 * to sigreturn routine below. After sigreturn
272 * resets the signal mask, the stack, and the
273 * frame pointer, it returns to the user
274 * specified pc, psl.
275 */
276 void
277 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
278 {
279 struct sigframe sf, *sfp;
280 struct proc *p;
281 struct thread *td;
282 struct sigacts *psp;
283 char *sp;
284 struct trapframe *regs;
285 int sig;
286 int oonstack;
287
288 td = curthread;
289 p = td->td_proc;
290 PROC_LOCK_ASSERT(p, MA_OWNED);
291 sig = ksi->ksi_signo;
292 psp = p->p_sigacts;
293 mtx_assert(&psp->ps_mtx, MA_OWNED);
294 regs = td->td_frame;
295 oonstack = sigonstack(regs->tf_rsp);
296
297 /* Save user context. */
298 bzero(&sf, sizeof(sf));
299 sf.sf_uc.uc_sigmask = *mask;
300 sf.sf_uc.uc_stack = td->td_sigstk;
301 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
302 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
303 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
304 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
305 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
306 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
307 fpstate_drop(td);
308
309 /* Allocate space for the signal handler context. */
310 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
311 SIGISMEMBER(psp->ps_sigonstack, sig)) {
312 sp = td->td_sigstk.ss_sp +
313 td->td_sigstk.ss_size - sizeof(struct sigframe);
314 #if defined(COMPAT_43)
315 td->td_sigstk.ss_flags |= SS_ONSTACK;
316 #endif
317 } else
318 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
319 /* Align to 16 bytes. */
320 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
321
322 /* Translate the signal if appropriate. */
323 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
324 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
325
326 /* Build the argument list for the signal handler. */
327 regs->tf_rdi = sig; /* arg 1 in %rdi */
328 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
329 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
330 /* Signal handler installed with SA_SIGINFO. */
331 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
332 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
333
334 /* Fill in POSIX parts */
335 sf.sf_si = ksi->ksi_info;
336 sf.sf_si.si_signo = sig; /* maybe a translated signal */
337 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
338 } else {
339 /* Old FreeBSD-style arguments. */
340 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
341 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
342 sf.sf_ahu.sf_handler = catcher;
343 }
344 mtx_unlock(&psp->ps_mtx);
345 PROC_UNLOCK(p);
346
347 /*
348 * Copy the sigframe out to the user's stack.
349 */
350 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
351 #ifdef DEBUG
352 printf("process %ld has trashed its stack\n", (long)p->p_pid);
353 #endif
354 PROC_LOCK(p);
355 sigexit(td, SIGILL);
356 }
357
358 regs->tf_rsp = (long)sfp;
359 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
360 regs->tf_rflags &= ~PSL_T;
361 regs->tf_cs = _ucodesel;
362 PROC_LOCK(p);
363 mtx_lock(&psp->ps_mtx);
364 }
365
366 /*
367 * System call to cleanup state after a signal
368 * has been taken. Reset signal mask and
369 * stack state from context left by sendsig (above).
370 * Return to previous pc and psl as specified by
371 * context left by sendsig. Check carefully to
372 * make sure that the user has not modified the
373 * state to gain improper privileges.
374 *
375 * MPSAFE
376 */
377 int
378 sigreturn(td, uap)
379 struct thread *td;
380 struct sigreturn_args /* {
381 const struct __ucontext *sigcntxp;
382 } */ *uap;
383 {
384 ucontext_t uc;
385 struct proc *p = td->td_proc;
386 struct trapframe *regs;
387 const ucontext_t *ucp;
388 long rflags;
389 int cs, error, ret;
390 ksiginfo_t ksi;
391
392 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
393 if (error != 0)
394 return (error);
395 ucp = &uc;
396 regs = td->td_frame;
397 rflags = ucp->uc_mcontext.mc_rflags;
398 /*
399 * Don't allow users to change privileged or reserved flags.
400 */
401 /*
402 * XXX do allow users to change the privileged flag PSL_RF.
403 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers
404 * should sometimes set it there too. tf_rflags is kept in
405 * the signal context during signal handling and there is no
406 * other place to remember it, so the PSL_RF bit may be
407 * corrupted by the signal handler without us knowing.
408 * Corruption of the PSL_RF bit at worst causes one more or
409 * one less debugger trap, so allowing it is fairly harmless.
410 */
411 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
412 printf("sigreturn: rflags = 0x%lx\n", rflags);
413 return (EINVAL);
414 }
415
416 /*
417 * Don't allow users to load a valid privileged %cs. Let the
418 * hardware check for invalid selectors, excess privilege in
419 * other selectors, invalid %eip's and invalid %esp's.
420 */
421 cs = ucp->uc_mcontext.mc_cs;
422 if (!CS_SECURE(cs)) {
423 printf("sigreturn: cs = 0x%x\n", cs);
424 ksiginfo_init_trap(&ksi);
425 ksi.ksi_signo = SIGBUS;
426 ksi.ksi_code = BUS_OBJERR;
427 ksi.ksi_trapno = T_PROTFLT;
428 ksi.ksi_addr = (void *)regs->tf_rip;
429 trapsignal(td, &ksi);
430 return (EINVAL);
431 }
432
433 ret = set_fpcontext(td, &ucp->uc_mcontext);
434 if (ret != 0)
435 return (ret);
436 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
437
438 PROC_LOCK(p);
439 #if defined(COMPAT_43)
440 if (ucp->uc_mcontext.mc_onstack & 1)
441 td->td_sigstk.ss_flags |= SS_ONSTACK;
442 else
443 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
444 #endif
445
446 td->td_sigmask = ucp->uc_sigmask;
447 SIG_CANTMASK(td->td_sigmask);
448 signotify(td);
449 PROC_UNLOCK(p);
450 td->td_pcb->pcb_flags |= PCB_FULLCTX;
451 return (EJUSTRETURN);
452 }
453
454 #ifdef COMPAT_FREEBSD4
455 int
456 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
457 {
458
459 return sigreturn(td, (struct sigreturn_args *)uap);
460 }
461 #endif
462
463
464 /*
465 * Machine dependent boot() routine
466 *
467 * I haven't seen anything to put here yet
468 * Possibly some stuff might be grafted back here from boot()
469 */
470 void
471 cpu_boot(int howto)
472 {
473 }
474
475 /* Get current clock frequency for the given cpu id. */
476 int
477 cpu_est_clockrate(int cpu_id, uint64_t *rate)
478 {
479 register_t reg;
480 uint64_t tsc1, tsc2;
481
482 if (pcpu_find(cpu_id) == NULL || rate == NULL)
483 return (EINVAL);
484
485 /* If we're booting, trust the rate calibrated moments ago. */
486 if (cold) {
487 *rate = tsc_freq;
488 return (0);
489 }
490
491 #ifdef SMP
492 /* Schedule ourselves on the indicated cpu. */
493 thread_lock(curthread);
494 sched_bind(curthread, cpu_id);
495 thread_unlock(curthread);
496 #endif
497
498 /* Calibrate by measuring a short delay. */
499 reg = intr_disable();
500 tsc1 = rdtsc();
501 DELAY(1000);
502 tsc2 = rdtsc();
503 intr_restore(reg);
504
505 #ifdef SMP
506 thread_lock(curthread);
507 sched_unbind(curthread);
508 thread_unlock(curthread);
509 #endif
510
511 /*
512 * Calculate the difference in readings, convert to Mhz, and
513 * subtract 0.5% of the total. Empirical testing has shown that
514 * overhead in DELAY() works out to approximately this value.
515 */
516 tsc2 -= tsc1;
517 *rate = tsc2 * 1000 - tsc2 * 5;
518 return (0);
519 }
520
521 /*
522 * Shutdown the CPU as much as possible
523 */
524 void
525 cpu_halt(void)
526 {
527 for (;;)
528 __asm__ ("hlt");
529 }
530
531 /*
532 * Hook to idle the CPU when possible. In the SMP case we default to
533 * off because a halted cpu will not currently pick up a new thread in the
534 * run queue until the next timer tick. If turned on this will result in
535 * approximately a 4.2% loss in real time performance in buildworld tests
536 * (but improves user and sys times oddly enough), and saves approximately
537 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3).
538 *
539 * XXX we need to have a cpu mask of idle cpus and generate an IPI or
540 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT.
541 * Then we can have our cake and eat it too.
542 *
543 * XXX I'm turning it on for SMP as well by default for now. It seems to
544 * help lock contention somewhat, and this is critical for HTT. -Peter
545 */
546 static int cpu_idle_hlt = 1;
547 TUNABLE_INT("machdep.cpu_idle_hlt", &cpu_idle_hlt);
548 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
549 &cpu_idle_hlt, 0, "Idle loop HLT enable");
550
551 static void
552 cpu_idle_default(void)
553 {
554 /*
555 * we must absolutely guarentee that hlt is the
556 * absolute next instruction after sti or we
557 * introduce a timing window.
558 */
559 __asm __volatile("sti; hlt");
560 }
561
562 /*
563 * Note that we have to be careful here to avoid a race between checking
564 * sched_runnable() and actually halting. If we don't do this, we may waste
565 * the time between calling hlt and the next interrupt even though there
566 * is a runnable process.
567 */
568 void
569 cpu_idle(void)
570 {
571
572 #ifdef SMP
573 if (mp_grab_cpu_hlt())
574 return;
575 #endif
576 if (cpu_idle_hlt) {
577 disable_intr();
578 if (sched_runnable())
579 enable_intr();
580 else
581 (*cpu_idle_hook)();
582 }
583 }
584
585 /* Other subsystems (e.g., ACPI) can hook this later. */
586 void (*cpu_idle_hook)(void) = cpu_idle_default;
587
588 /*
589 * Clear registers on exec
590 */
591 void
592 exec_setregs(td, entry, stack, ps_strings)
593 struct thread *td;
594 u_long entry;
595 u_long stack;
596 u_long ps_strings;
597 {
598 struct trapframe *regs = td->td_frame;
599 struct pcb *pcb = td->td_pcb;
600
601 critical_enter();
602 wrmsr(MSR_FSBASE, 0);
603 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */
604 pcb->pcb_fsbase = 0;
605 pcb->pcb_gsbase = 0;
606 critical_exit();
607 load_ds(_udatasel);
608 load_es(_udatasel);
609 load_fs(_udatasel);
610 load_gs(_udatasel);
611 pcb->pcb_ds = _udatasel;
612 pcb->pcb_es = _udatasel;
613 pcb->pcb_fs = _udatasel;
614 pcb->pcb_gs = _udatasel;
615
616 bzero((char *)regs, sizeof(struct trapframe));
617 regs->tf_rip = entry;
618 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
619 regs->tf_rdi = stack; /* argv */
620 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
621 regs->tf_ss = _udatasel;
622 regs->tf_cs = _ucodesel;
623
624 /*
625 * Reset the hardware debug registers if they were in use.
626 * They won't have any meaning for the newly exec'd process.
627 */
628 if (pcb->pcb_flags & PCB_DBREGS) {
629 pcb->pcb_dr0 = 0;
630 pcb->pcb_dr1 = 0;
631 pcb->pcb_dr2 = 0;
632 pcb->pcb_dr3 = 0;
633 pcb->pcb_dr6 = 0;
634 pcb->pcb_dr7 = 0;
635 if (pcb == PCPU_GET(curpcb)) {
636 /*
637 * Clear the debug registers on the running
638 * CPU, otherwise they will end up affecting
639 * the next process we switch to.
640 */
641 reset_dbregs();
642 }
643 pcb->pcb_flags &= ~PCB_DBREGS;
644 }
645
646 /*
647 * Drop the FP state if we hold it, so that the process gets a
648 * clean FP state if it uses the FPU again.
649 */
650 fpstate_drop(td);
651 }
652
653 void
654 cpu_setregs(void)
655 {
656 register_t cr0;
657
658 cr0 = rcr0();
659 /*
660 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
661 * BSP. See the comments there about why we set them.
662 */
663 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
664 load_cr0(cr0);
665 }
666
667 /*
668 * Initialize amd64 and configure to run kernel
669 */
670
671 /*
672 * Initialize segments & interrupt table
673 */
674
675 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor table */
676 static struct gate_descriptor idt0[NIDT];
677 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
678
679 static char dblfault_stack[PAGE_SIZE] __aligned(16);
680
681 struct amd64tss common_tss[MAXCPU];
682
683 /* software prototypes -- in more palatable form */
684 struct soft_segment_descriptor gdt_segs[] = {
685 /* GNULL_SEL 0 Null Descriptor */
686 { 0x0, /* segment base address */
687 0x0, /* length */
688 0, /* segment type */
689 0, /* segment descriptor priority level */
690 0, /* segment descriptor present */
691 0, /* long */
692 0, /* default 32 vs 16 bit size */
693 0 /* limit granularity (byte/page units)*/ },
694 /* GCODE_SEL 1 Code Descriptor for kernel */
695 { 0x0, /* segment base address */
696 0xfffff, /* length - all address space */
697 SDT_MEMERA, /* segment type */
698 SEL_KPL, /* segment descriptor priority level */
699 1, /* segment descriptor present */
700 1, /* long */
701 0, /* default 32 vs 16 bit size */
702 1 /* limit granularity (byte/page units)*/ },
703 /* GDATA_SEL 2 Data Descriptor for kernel */
704 { 0x0, /* segment base address */
705 0xfffff, /* length - all address space */
706 SDT_MEMRWA, /* segment type */
707 SEL_KPL, /* segment descriptor priority level */
708 1, /* segment descriptor present */
709 1, /* long */
710 0, /* default 32 vs 16 bit size */
711 1 /* limit granularity (byte/page units)*/ },
712 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
713 { 0x0, /* segment base address */
714 0xfffff, /* length - all address space */
715 SDT_MEMERA, /* segment type */
716 SEL_UPL, /* segment descriptor priority level */
717 1, /* segment descriptor present */
718 0, /* long */
719 1, /* default 32 vs 16 bit size */
720 1 /* limit granularity (byte/page units)*/ },
721 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
722 { 0x0, /* segment base address */
723 0xfffff, /* length - all address space */
724 SDT_MEMRWA, /* segment type */
725 SEL_UPL, /* segment descriptor priority level */
726 1, /* segment descriptor present */
727 0, /* long */
728 1, /* default 32 vs 16 bit size */
729 1 /* limit granularity (byte/page units)*/ },
730 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
731 { 0x0, /* segment base address */
732 0xfffff, /* length - all address space */
733 SDT_MEMERA, /* segment type */
734 SEL_UPL, /* segment descriptor priority level */
735 1, /* segment descriptor present */
736 1, /* long */
737 0, /* default 32 vs 16 bit size */
738 1 /* limit granularity (byte/page units)*/ },
739 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
740 {
741 0x0, /* segment base address */
742 sizeof(struct amd64tss)-1,/* length - all address space */
743 SDT_SYSTSS, /* segment type */
744 SEL_KPL, /* segment descriptor priority level */
745 1, /* segment descriptor present */
746 0, /* long */
747 0, /* unused - default 32 vs 16 bit size */
748 0 /* limit granularity (byte/page units)*/ },
749 /* Actually, the TSS is a system descriptor which is double size */
750 { 0x0, /* segment base address */
751 0x0, /* length */
752 0, /* segment type */
753 0, /* segment descriptor priority level */
754 0, /* segment descriptor present */
755 0, /* long */
756 0, /* default 32 vs 16 bit size */
757 0 /* limit granularity (byte/page units)*/ },
758 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
759 { 0x0, /* segment base address */
760 0xfffff, /* length - all address space */
761 SDT_MEMRWA, /* segment type */
762 SEL_UPL, /* segment descriptor priority level */
763 1, /* segment descriptor present */
764 0, /* long */
765 1, /* default 32 vs 16 bit size */
766 1 /* limit granularity (byte/page units)*/ },
767 };
768
769 void
770 setidt(idx, func, typ, dpl, ist)
771 int idx;
772 inthand_t *func;
773 int typ;
774 int dpl;
775 int ist;
776 {
777 struct gate_descriptor *ip;
778
779 ip = idt + idx;
780 ip->gd_looffset = (uintptr_t)func;
781 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
782 ip->gd_ist = ist;
783 ip->gd_xx = 0;
784 ip->gd_type = typ;
785 ip->gd_dpl = dpl;
786 ip->gd_p = 1;
787 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
788 }
789
790 extern inthand_t
791 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
792 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
793 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
794 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
795 IDTVEC(xmm), IDTVEC(dblfault),
796 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
797
798 void
799 sdtossd(sd, ssd)
800 struct user_segment_descriptor *sd;
801 struct soft_segment_descriptor *ssd;
802 {
803
804 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
805 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
806 ssd->ssd_type = sd->sd_type;
807 ssd->ssd_dpl = sd->sd_dpl;
808 ssd->ssd_p = sd->sd_p;
809 ssd->ssd_long = sd->sd_long;
810 ssd->ssd_def32 = sd->sd_def32;
811 ssd->ssd_gran = sd->sd_gran;
812 }
813
814 void
815 ssdtosd(ssd, sd)
816 struct soft_segment_descriptor *ssd;
817 struct user_segment_descriptor *sd;
818 {
819
820 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
821 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
822 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
823 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
824 sd->sd_type = ssd->ssd_type;
825 sd->sd_dpl = ssd->ssd_dpl;
826 sd->sd_p = ssd->ssd_p;
827 sd->sd_long = ssd->ssd_long;
828 sd->sd_def32 = ssd->ssd_def32;
829 sd->sd_gran = ssd->ssd_gran;
830 }
831
832 void
833 ssdtosyssd(ssd, sd)
834 struct soft_segment_descriptor *ssd;
835 struct system_segment_descriptor *sd;
836 {
837
838 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
839 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
840 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
841 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
842 sd->sd_type = ssd->ssd_type;
843 sd->sd_dpl = ssd->ssd_dpl;
844 sd->sd_p = ssd->ssd_p;
845 sd->sd_gran = ssd->ssd_gran;
846 }
847
848 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
849 #include <isa/isavar.h>
850 u_int
851 isa_irq_pending(void)
852 {
853
854 return (0);
855 }
856 #endif
857
858 u_int basemem;
859
860 /*
861 * Populate the (physmap) array with base/bound pairs describing the
862 * available physical memory in the system, then test this memory and
863 * build the phys_avail array describing the actually-available memory.
864 *
865 * If we cannot accurately determine the physical memory map, then use
866 * value from the 0xE801 call, and failing that, the RTC.
867 *
868 * Total memory size may be set by the kernel environment variable
869 * hw.physmem or the compile-time define MAXMEM.
870 *
871 * XXX first should be vm_paddr_t.
872 */
873 static void
874 getmemsize(caddr_t kmdp, u_int64_t first)
875 {
876 int i, off, physmap_idx, pa_indx, da_indx;
877 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
878 u_long physmem_tunable;
879 pt_entry_t *pte;
880 struct bios_smap *smapbase, *smap, *smapend;
881 u_int32_t smapsize;
882 quad_t dcons_addr, dcons_size;
883
884 bzero(physmap, sizeof(physmap));
885 basemem = 0;
886 physmap_idx = 0;
887
888 /*
889 * get memory map from INT 15:E820, kindly supplied by the loader.
890 *
891 * subr_module.c says:
892 * "Consumer may safely assume that size value precedes data."
893 * ie: an int32_t immediately precedes smap.
894 */
895 smapbase = (struct bios_smap *)preload_search_info(kmdp,
896 MODINFO_METADATA | MODINFOMD_SMAP);
897 if (smapbase == NULL)
898 panic("No BIOS smap info from loader!");
899
900 smapsize = *((u_int32_t *)smapbase - 1);
901 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
902
903 for (smap = smapbase; smap < smapend; smap++) {
904 if (boothowto & RB_VERBOSE)
905 printf("SMAP type=%02x base=%016lx len=%016lx\n",
906 smap->type, smap->base, smap->length);
907
908 if (smap->type != 0x01)
909 continue;
910
911 if (smap->length == 0)
912 continue;
913
914 for (i = 0; i <= physmap_idx; i += 2) {
915 if (smap->base < physmap[i + 1]) {
916 if (boothowto & RB_VERBOSE)
917 printf(
918 "Overlapping or non-monotonic memory region, ignoring second region\n");
919 continue;
920 }
921 }
922
923 if (smap->base == physmap[physmap_idx + 1]) {
924 physmap[physmap_idx + 1] += smap->length;
925 continue;
926 }
927
928 physmap_idx += 2;
929 if (physmap_idx == PHYSMAP_SIZE) {
930 printf(
931 "Too many segments in the physical address map, giving up\n");
932 break;
933 }
934 physmap[physmap_idx] = smap->base;
935 physmap[physmap_idx + 1] = smap->base + smap->length;
936 }
937
938 /*
939 * Find the 'base memory' segment for SMP
940 */
941 basemem = 0;
942 for (i = 0; i <= physmap_idx; i += 2) {
943 if (physmap[i] == 0x00000000) {
944 basemem = physmap[i + 1] / 1024;
945 break;
946 }
947 }
948 if (basemem == 0)
949 panic("BIOS smap did not include a basemem segment!");
950
951 #ifdef SMP
952 /* make hole for AP bootstrap code */
953 physmap[1] = mp_bootaddress(physmap[1] / 1024);
954 #endif
955
956 /*
957 * Maxmem isn't the "maximum memory", it's one larger than the
958 * highest page of the physical address space. It should be
959 * called something like "Maxphyspage". We may adjust this
960 * based on ``hw.physmem'' and the results of the memory test.
961 */
962 Maxmem = atop(physmap[physmap_idx + 1]);
963
964 #ifdef MAXMEM
965 Maxmem = MAXMEM / 4;
966 #endif
967
968 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
969 Maxmem = atop(physmem_tunable);
970
971 /*
972 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
973 * in the system.
974 */
975 if (Maxmem > atop(physmap[physmap_idx + 1]))
976 Maxmem = atop(physmap[physmap_idx + 1]);
977
978 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
979 (boothowto & RB_VERBOSE))
980 printf("Physical memory use set to %ldK\n", Maxmem * 4);
981
982 /* call pmap initialization to make new kernel address space */
983 pmap_bootstrap(&first);
984
985 /*
986 * Size up each available chunk of physical memory.
987 */
988 physmap[0] = PAGE_SIZE; /* mask off page 0 */
989 pa_indx = 0;
990 da_indx = 1;
991 phys_avail[pa_indx++] = physmap[0];
992 phys_avail[pa_indx] = physmap[0];
993 dump_avail[da_indx] = physmap[0];
994 pte = CMAP1;
995
996 /*
997 * Get dcons buffer address
998 */
999 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1000 getenv_quad("dcons.size", &dcons_size) == 0)
1001 dcons_addr = 0;
1002
1003 /*
1004 * physmap is in bytes, so when converting to page boundaries,
1005 * round up the start address and round down the end address.
1006 */
1007 for (i = 0; i <= physmap_idx; i += 2) {
1008 vm_paddr_t end;
1009
1010 end = ptoa((vm_paddr_t)Maxmem);
1011 if (physmap[i + 1] < end)
1012 end = trunc_page(physmap[i + 1]);
1013 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1014 int tmp, page_bad, full;
1015 int *ptr = (int *)CADDR1;
1016
1017 full = FALSE;
1018 /*
1019 * block out kernel memory as not available.
1020 */
1021 if (pa >= 0x100000 && pa < first)
1022 goto do_dump_avail;
1023
1024 /*
1025 * block out dcons buffer
1026 */
1027 if (dcons_addr > 0
1028 && pa >= trunc_page(dcons_addr)
1029 && pa < dcons_addr + dcons_size)
1030 goto do_dump_avail;
1031
1032 page_bad = FALSE;
1033
1034 /*
1035 * map page into kernel: valid, read/write,non-cacheable
1036 */
1037 *pte = pa | PG_V | PG_RW | PG_N;
1038 invltlb();
1039
1040 tmp = *(int *)ptr;
1041 /*
1042 * Test for alternating 1's and 0's
1043 */
1044 *(volatile int *)ptr = 0xaaaaaaaa;
1045 if (*(volatile int *)ptr != 0xaaaaaaaa)
1046 page_bad = TRUE;
1047 /*
1048 * Test for alternating 0's and 1's
1049 */
1050 *(volatile int *)ptr = 0x55555555;
1051 if (*(volatile int *)ptr != 0x55555555)
1052 page_bad = TRUE;
1053 /*
1054 * Test for all 1's
1055 */
1056 *(volatile int *)ptr = 0xffffffff;
1057 if (*(volatile int *)ptr != 0xffffffff)
1058 page_bad = TRUE;
1059 /*
1060 * Test for all 0's
1061 */
1062 *(volatile int *)ptr = 0x0;
1063 if (*(volatile int *)ptr != 0x0)
1064 page_bad = TRUE;
1065 /*
1066 * Restore original value.
1067 */
1068 *(int *)ptr = tmp;
1069
1070 /*
1071 * Adjust array of valid/good pages.
1072 */
1073 if (page_bad == TRUE)
1074 continue;
1075 /*
1076 * If this good page is a continuation of the
1077 * previous set of good pages, then just increase
1078 * the end pointer. Otherwise start a new chunk.
1079 * Note that "end" points one higher than end,
1080 * making the range >= start and < end.
1081 * If we're also doing a speculative memory
1082 * test and we at or past the end, bump up Maxmem
1083 * so that we keep going. The first bad page
1084 * will terminate the loop.
1085 */
1086 if (phys_avail[pa_indx] == pa) {
1087 phys_avail[pa_indx] += PAGE_SIZE;
1088 } else {
1089 pa_indx++;
1090 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1091 printf(
1092 "Too many holes in the physical address space, giving up\n");
1093 pa_indx--;
1094 full = TRUE;
1095 goto do_dump_avail;
1096 }
1097 phys_avail[pa_indx++] = pa; /* start */
1098 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1099 }
1100 physmem++;
1101 do_dump_avail:
1102 if (dump_avail[da_indx] == pa) {
1103 dump_avail[da_indx] += PAGE_SIZE;
1104 } else {
1105 da_indx++;
1106 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1107 da_indx--;
1108 goto do_next;
1109 }
1110 dump_avail[da_indx++] = pa; /* start */
1111 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1112 }
1113 do_next:
1114 if (full)
1115 break;
1116 }
1117 }
1118 *pte = 0;
1119 invltlb();
1120
1121 /*
1122 * XXX
1123 * The last chunk must contain at least one page plus the message
1124 * buffer to avoid complicating other code (message buffer address
1125 * calculation, etc.).
1126 */
1127 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1128 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1129 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1130 phys_avail[pa_indx--] = 0;
1131 phys_avail[pa_indx--] = 0;
1132 }
1133
1134 Maxmem = atop(phys_avail[pa_indx]);
1135
1136 /* Trim off space for the message buffer. */
1137 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1138
1139 /* Map the message buffer. */
1140 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1141 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1142 off);
1143 }
1144
1145 u_int64_t
1146 hammer_time(u_int64_t modulep, u_int64_t physfree)
1147 {
1148 caddr_t kmdp;
1149 int gsel_tss, x;
1150 struct pcpu *pc;
1151 u_int64_t msr;
1152 char *env;
1153
1154 thread0.td_kstack = physfree + KERNBASE;
1155 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE);
1156 physfree += KSTACK_PAGES * PAGE_SIZE;
1157 thread0.td_pcb = (struct pcb *)
1158 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
1159
1160 /*
1161 * This may be done better later if it gets more high level
1162 * components in it. If so just link td->td_proc here.
1163 */
1164 proc_linkup0(&proc0, &thread0);
1165
1166 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
1167 preload_bootstrap_relocate(KERNBASE);
1168 kmdp = preload_search_by_type("elf kernel");
1169 if (kmdp == NULL)
1170 kmdp = preload_search_by_type("elf64 kernel");
1171 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1172 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE;
1173 #ifdef DDB
1174 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1175 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1176 #endif
1177
1178 /* Init basic tunables, hz etc */
1179 init_param1();
1180
1181 /*
1182 * make gdt memory segments
1183 */
1184 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
1185
1186 for (x = 0; x < NGDT; x++) {
1187 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1188 ssdtosd(&gdt_segs[x], &gdt[x]);
1189 }
1190 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1191 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1192
1193 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1194 r_gdt.rd_base = (long) gdt;
1195 lgdt(&r_gdt);
1196 pc = &__pcpu[0];
1197
1198 wrmsr(MSR_FSBASE, 0); /* User value */
1199 wrmsr(MSR_GSBASE, (u_int64_t)pc);
1200 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1201
1202 pcpu_init(pc, 0, sizeof(struct pcpu));
1203 PCPU_SET(prvspace, pc);
1204 PCPU_SET(curthread, &thread0);
1205 PCPU_SET(curpcb, thread0.td_pcb);
1206 PCPU_SET(tssp, &common_tss[0]);
1207
1208 /*
1209 * Initialize mutexes.
1210 *
1211 * icu_lock: in order to allow an interrupt to occur in a critical
1212 * section, to set pcpu->ipending (etc...) properly, we
1213 * must be able to get the icu lock, so it can't be
1214 * under witness.
1215 */
1216 mutex_init();
1217 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1218
1219 /* exceptions */
1220 for (x = 0; x < NIDT; x++)
1221 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1222 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1223 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1224 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1225 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1226 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1227 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1228 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1229 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1230 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1231 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1232 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1233 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1234 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1235 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1236 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1237 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1238 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1239 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1240 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1241
1242 r_idt.rd_limit = sizeof(idt0) - 1;
1243 r_idt.rd_base = (long) idt;
1244 lidt(&r_idt);
1245
1246 /*
1247 * Initialize the i8254 before the console so that console
1248 * initialization can use DELAY().
1249 */
1250 i8254_init();
1251
1252 /*
1253 * Initialize the console before we print anything out.
1254 */
1255 cninit();
1256
1257 #ifdef DEV_ISA
1258 #ifdef DEV_ATPIC
1259 elcr_probe();
1260 atpic_startup();
1261 #else
1262 /* Reset and mask the atpics and leave them shut down. */
1263 atpic_reset();
1264
1265 /*
1266 * Point the ICU spurious interrupt vectors at the APIC spurious
1267 * interrupt handler.
1268 */
1269 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1270 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1271 #endif
1272 #else
1273 #error "have you forgotten the isa device?";
1274 #endif
1275
1276 kdb_init();
1277
1278 #ifdef KDB
1279 if (boothowto & RB_KDB)
1280 kdb_enter("Boot flags requested debugger");
1281 #endif
1282
1283 identify_cpu(); /* Final stage of CPU initialization */
1284 initializecpu(); /* Initialize CPU registers */
1285
1286 /* make an initial tss so cpu can get interrupt stack on syscall! */
1287 common_tss[0].tss_rsp0 = thread0.td_kstack + \
1288 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb);
1289 /* Ensure the stack is aligned to 16 bytes */
1290 common_tss[0].tss_rsp0 &= ~0xFul;
1291 PCPU_SET(rsp0, common_tss[0].tss_rsp0);
1292
1293 /* doublefault stack space, runs on ist1 */
1294 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1295
1296 /* Set the IO permission bitmap (empty due to tss seg limit) */
1297 common_tss[0].tss_iobase = sizeof(struct amd64tss);
1298
1299 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1300 ltr(gsel_tss);
1301
1302 /* Set up the fast syscall stuff */
1303 msr = rdmsr(MSR_EFER) | EFER_SCE;
1304 wrmsr(MSR_EFER, msr);
1305 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1306 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1307 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1308 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1309 wrmsr(MSR_STAR, msr);
1310 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1311
1312 getmemsize(kmdp, physfree);
1313 init_param2(physmem);
1314
1315 /* now running on new page tables, configured,and u/iom is accessible */
1316
1317 msgbufinit(msgbufp, MSGBUF_SIZE);
1318 fpuinit();
1319
1320 /* transfer to user mode */
1321
1322 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1323 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1324 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1325
1326 /* setup proc 0's pcb */
1327 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */
1328 thread0.td_pcb->pcb_cr3 = KPML4phys;
1329 thread0.td_frame = &proc0_tf;
1330
1331 env = getenv("kernelname");
1332 if (env != NULL)
1333 strlcpy(kernelname, env, sizeof(kernelname));
1334
1335 /* Location of kernel stack for locore */
1336 return ((u_int64_t)thread0.td_pcb);
1337 }
1338
1339 void
1340 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
1341 {
1342
1343 pcpu->pc_acpi_id = 0xffffffff;
1344 }
1345
1346 void
1347 spinlock_enter(void)
1348 {
1349 struct thread *td;
1350
1351 td = curthread;
1352 if (td->td_md.md_spinlock_count == 0)
1353 td->td_md.md_saved_flags = intr_disable();
1354 td->td_md.md_spinlock_count++;
1355 critical_enter();
1356 }
1357
1358 void
1359 spinlock_exit(void)
1360 {
1361 struct thread *td;
1362
1363 td = curthread;
1364 critical_exit();
1365 td->td_md.md_spinlock_count--;
1366 if (td->td_md.md_spinlock_count == 0)
1367 intr_restore(td->td_md.md_saved_flags);
1368 }
1369
1370 /*
1371 * Construct a PCB from a trapframe. This is called from kdb_trap() where
1372 * we want to start a backtrace from the function that caused us to enter
1373 * the debugger. We have the context in the trapframe, but base the trace
1374 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1375 * enough for a backtrace.
1376 */
1377 void
1378 makectx(struct trapframe *tf, struct pcb *pcb)
1379 {
1380
1381 pcb->pcb_r12 = tf->tf_r12;
1382 pcb->pcb_r13 = tf->tf_r13;
1383 pcb->pcb_r14 = tf->tf_r14;
1384 pcb->pcb_r15 = tf->tf_r15;
1385 pcb->pcb_rbp = tf->tf_rbp;
1386 pcb->pcb_rbx = tf->tf_rbx;
1387 pcb->pcb_rip = tf->tf_rip;
1388 pcb->pcb_rsp = (ISPL(tf->tf_cs)) ? tf->tf_rsp : (long)(tf + 1) - 8;
1389 }
1390
1391 int
1392 ptrace_set_pc(struct thread *td, unsigned long addr)
1393 {
1394 td->td_frame->tf_rip = addr;
1395 return (0);
1396 }
1397
1398 int
1399 ptrace_single_step(struct thread *td)
1400 {
1401 td->td_frame->tf_rflags |= PSL_T;
1402 return (0);
1403 }
1404
1405 int
1406 ptrace_clear_single_step(struct thread *td)
1407 {
1408 td->td_frame->tf_rflags &= ~PSL_T;
1409 return (0);
1410 }
1411
1412 int
1413 fill_regs(struct thread *td, struct reg *regs)
1414 {
1415 struct trapframe *tp;
1416
1417 tp = td->td_frame;
1418 regs->r_r15 = tp->tf_r15;
1419 regs->r_r14 = tp->tf_r14;
1420 regs->r_r13 = tp->tf_r13;
1421 regs->r_r12 = tp->tf_r12;
1422 regs->r_r11 = tp->tf_r11;
1423 regs->r_r10 = tp->tf_r10;
1424 regs->r_r9 = tp->tf_r9;
1425 regs->r_r8 = tp->tf_r8;
1426 regs->r_rdi = tp->tf_rdi;
1427 regs->r_rsi = tp->tf_rsi;
1428 regs->r_rbp = tp->tf_rbp;
1429 regs->r_rbx = tp->tf_rbx;
1430 regs->r_rdx = tp->tf_rdx;
1431 regs->r_rcx = tp->tf_rcx;
1432 regs->r_rax = tp->tf_rax;
1433 regs->r_rip = tp->tf_rip;
1434 regs->r_cs = tp->tf_cs;
1435 regs->r_rflags = tp->tf_rflags;
1436 regs->r_rsp = tp->tf_rsp;
1437 regs->r_ss = tp->tf_ss;
1438 return (0);
1439 }
1440
1441 int
1442 set_regs(struct thread *td, struct reg *regs)
1443 {
1444 struct trapframe *tp;
1445 register_t rflags;
1446
1447 tp = td->td_frame;
1448 rflags = regs->r_rflags & 0xffffffff;
1449 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
1450 return (EINVAL);
1451 tp->tf_r15 = regs->r_r15;
1452 tp->tf_r14 = regs->r_r14;
1453 tp->tf_r13 = regs->r_r13;
1454 tp->tf_r12 = regs->r_r12;
1455 tp->tf_r11 = regs->r_r11;
1456 tp->tf_r10 = regs->r_r10;
1457 tp->tf_r9 = regs->r_r9;
1458 tp->tf_r8 = regs->r_r8;
1459 tp->tf_rdi = regs->r_rdi;
1460 tp->tf_rsi = regs->r_rsi;
1461 tp->tf_rbp = regs->r_rbp;
1462 tp->tf_rbx = regs->r_rbx;
1463 tp->tf_rdx = regs->r_rdx;
1464 tp->tf_rcx = regs->r_rcx;
1465 tp->tf_rax = regs->r_rax;
1466 tp->tf_rip = regs->r_rip;
1467 tp->tf_cs = regs->r_cs;
1468 tp->tf_rflags = rflags;
1469 tp->tf_rsp = regs->r_rsp;
1470 tp->tf_ss = regs->r_ss;
1471 td->td_pcb->pcb_flags |= PCB_FULLCTX;
1472 return (0);
1473 }
1474
1475 /* XXX check all this stuff! */
1476 /* externalize from sv_xmm */
1477 static void
1478 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
1479 {
1480 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
1481 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1482 int i;
1483
1484 /* pcb -> fpregs */
1485 bzero(fpregs, sizeof(*fpregs));
1486
1487 /* FPU control/status */
1488 penv_fpreg->en_cw = penv_xmm->en_cw;
1489 penv_fpreg->en_sw = penv_xmm->en_sw;
1490 penv_fpreg->en_tw = penv_xmm->en_tw;
1491 penv_fpreg->en_opcode = penv_xmm->en_opcode;
1492 penv_fpreg->en_rip = penv_xmm->en_rip;
1493 penv_fpreg->en_rdp = penv_xmm->en_rdp;
1494 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
1495 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
1496
1497 /* FPU registers */
1498 for (i = 0; i < 8; ++i)
1499 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
1500
1501 /* SSE registers */
1502 for (i = 0; i < 16; ++i)
1503 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
1504 }
1505
1506 /* internalize from fpregs into sv_xmm */
1507 static void
1508 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
1509 {
1510 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1511 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
1512 int i;
1513
1514 /* fpregs -> pcb */
1515 /* FPU control/status */
1516 penv_xmm->en_cw = penv_fpreg->en_cw;
1517 penv_xmm->en_sw = penv_fpreg->en_sw;
1518 penv_xmm->en_tw = penv_fpreg->en_tw;
1519 penv_xmm->en_opcode = penv_fpreg->en_opcode;
1520 penv_xmm->en_rip = penv_fpreg->en_rip;
1521 penv_xmm->en_rdp = penv_fpreg->en_rdp;
1522 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
1523 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
1524
1525 /* FPU registers */
1526 for (i = 0; i < 8; ++i)
1527 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
1528
1529 /* SSE registers */
1530 for (i = 0; i < 16; ++i)
1531 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
1532 }
1533
1534 /* externalize from td->pcb */
1535 int
1536 fill_fpregs(struct thread *td, struct fpreg *fpregs)
1537 {
1538
1539 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs);
1540 return (0);
1541 }
1542
1543 /* internalize to td->pcb */
1544 int
1545 set_fpregs(struct thread *td, struct fpreg *fpregs)
1546 {
1547
1548 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save);
1549 return (0);
1550 }
1551
1552 /*
1553 * Get machine context.
1554 */
1555 int
1556 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
1557 {
1558 struct trapframe *tp;
1559
1560 tp = td->td_frame;
1561 PROC_LOCK(curthread->td_proc);
1562 mcp->mc_onstack = sigonstack(tp->tf_rsp);
1563 PROC_UNLOCK(curthread->td_proc);
1564 mcp->mc_r15 = tp->tf_r15;
1565 mcp->mc_r14 = tp->tf_r14;
1566 mcp->mc_r13 = tp->tf_r13;
1567 mcp->mc_r12 = tp->tf_r12;
1568 mcp->mc_r11 = tp->tf_r11;
1569 mcp->mc_r10 = tp->tf_r10;
1570 mcp->mc_r9 = tp->tf_r9;
1571 mcp->mc_r8 = tp->tf_r8;
1572 mcp->mc_rdi = tp->tf_rdi;
1573 mcp->mc_rsi = tp->tf_rsi;
1574 mcp->mc_rbp = tp->tf_rbp;
1575 mcp->mc_rbx = tp->tf_rbx;
1576 mcp->mc_rcx = tp->tf_rcx;
1577 mcp->mc_rflags = tp->tf_rflags;
1578 if (flags & GET_MC_CLEAR_RET) {
1579 mcp->mc_rax = 0;
1580 mcp->mc_rdx = 0;
1581 mcp->mc_rflags &= ~PSL_C;
1582 } else {
1583 mcp->mc_rax = tp->tf_rax;
1584 mcp->mc_rdx = tp->tf_rdx;
1585 }
1586 mcp->mc_rip = tp->tf_rip;
1587 mcp->mc_cs = tp->tf_cs;
1588 mcp->mc_rsp = tp->tf_rsp;
1589 mcp->mc_ss = tp->tf_ss;
1590 mcp->mc_len = sizeof(*mcp);
1591 get_fpcontext(td, mcp);
1592 return (0);
1593 }
1594
1595 /*
1596 * Set machine context.
1597 *
1598 * However, we don't set any but the user modifiable flags, and we won't
1599 * touch the cs selector.
1600 */
1601 int
1602 set_mcontext(struct thread *td, const mcontext_t *mcp)
1603 {
1604 struct trapframe *tp;
1605 long rflags;
1606 int ret;
1607
1608 tp = td->td_frame;
1609 if (mcp->mc_len != sizeof(*mcp))
1610 return (EINVAL);
1611 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
1612 (tp->tf_rflags & ~PSL_USERCHANGE);
1613 ret = set_fpcontext(td, mcp);
1614 if (ret != 0)
1615 return (ret);
1616 tp->tf_r15 = mcp->mc_r15;
1617 tp->tf_r14 = mcp->mc_r14;
1618 tp->tf_r13 = mcp->mc_r13;
1619 tp->tf_r12 = mcp->mc_r12;
1620 tp->tf_r11 = mcp->mc_r11;
1621 tp->tf_r10 = mcp->mc_r10;
1622 tp->tf_r9 = mcp->mc_r9;
1623 tp->tf_r8 = mcp->mc_r8;
1624 tp->tf_rdi = mcp->mc_rdi;
1625 tp->tf_rsi = mcp->mc_rsi;
1626 tp->tf_rbp = mcp->mc_rbp;
1627 tp->tf_rbx = mcp->mc_rbx;
1628 tp->tf_rdx = mcp->mc_rdx;
1629 tp->tf_rcx = mcp->mc_rcx;
1630 tp->tf_rax = mcp->mc_rax;
1631 tp->tf_rip = mcp->mc_rip;
1632 tp->tf_rflags = rflags;
1633 tp->tf_rsp = mcp->mc_rsp;
1634 tp->tf_ss = mcp->mc_ss;
1635 td->td_pcb->pcb_flags |= PCB_FULLCTX;
1636 return (0);
1637 }
1638
1639 static void
1640 get_fpcontext(struct thread *td, mcontext_t *mcp)
1641 {
1642
1643 mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate);
1644 mcp->mc_fpformat = fpuformat();
1645 }
1646
1647 static int
1648 set_fpcontext(struct thread *td, const mcontext_t *mcp)
1649 {
1650 struct savefpu *fpstate;
1651
1652 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
1653 return (0);
1654 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
1655 return (EINVAL);
1656 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
1657 /* We don't care what state is left in the FPU or PCB. */
1658 fpstate_drop(td);
1659 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
1660 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
1661 /*
1662 * XXX we violate the dubious requirement that fpusetregs()
1663 * be called with interrupts disabled.
1664 * XXX obsolete on trap-16 systems?
1665 */
1666 fpstate = (struct savefpu *)&mcp->mc_fpstate;
1667 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask;
1668 fpusetregs(td, fpstate);
1669 } else
1670 return (EINVAL);
1671 return (0);
1672 }
1673
1674 void
1675 fpstate_drop(struct thread *td)
1676 {
1677 register_t s;
1678
1679 s = intr_disable();
1680 if (PCPU_GET(fpcurthread) == td)
1681 fpudrop();
1682 /*
1683 * XXX force a full drop of the fpu. The above only drops it if we
1684 * owned it.
1685 *
1686 * XXX I don't much like fpugetregs()'s semantics of doing a full
1687 * drop. Dropping only to the pcb matches fnsave's behaviour.
1688 * We only need to drop to !PCB_INITDONE in sendsig(). But
1689 * sendsig() is the only caller of fpugetregs()... perhaps we just
1690 * have too many layers.
1691 */
1692 curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE;
1693 intr_restore(s);
1694 }
1695
1696 int
1697 fill_dbregs(struct thread *td, struct dbreg *dbregs)
1698 {
1699 struct pcb *pcb;
1700
1701 if (td == NULL) {
1702 dbregs->dr[0] = rdr0();
1703 dbregs->dr[1] = rdr1();
1704 dbregs->dr[2] = rdr2();
1705 dbregs->dr[3] = rdr3();
1706 dbregs->dr[6] = rdr6();
1707 dbregs->dr[7] = rdr7();
1708 } else {
1709 pcb = td->td_pcb;
1710 dbregs->dr[0] = pcb->pcb_dr0;
1711 dbregs->dr[1] = pcb->pcb_dr1;
1712 dbregs->dr[2] = pcb->pcb_dr2;
1713 dbregs->dr[3] = pcb->pcb_dr3;
1714 dbregs->dr[6] = pcb->pcb_dr6;
1715 dbregs->dr[7] = pcb->pcb_dr7;
1716 }
1717 dbregs->dr[4] = 0;
1718 dbregs->dr[5] = 0;
1719 dbregs->dr[8] = 0;
1720 dbregs->dr[9] = 0;
1721 dbregs->dr[10] = 0;
1722 dbregs->dr[11] = 0;
1723 dbregs->dr[12] = 0;
1724 dbregs->dr[13] = 0;
1725 dbregs->dr[14] = 0;
1726 dbregs->dr[15] = 0;
1727 return (0);
1728 }
1729
1730 int
1731 set_dbregs(struct thread *td, struct dbreg *dbregs)
1732 {
1733 struct pcb *pcb;
1734 int i;
1735
1736 if (td == NULL) {
1737 load_dr0(dbregs->dr[0]);
1738 load_dr1(dbregs->dr[1]);
1739 load_dr2(dbregs->dr[2]);
1740 load_dr3(dbregs->dr[3]);
1741 load_dr6(dbregs->dr[6]);
1742 load_dr7(dbregs->dr[7]);
1743 } else {
1744 /*
1745 * Don't let an illegal value for dr7 get set. Specifically,
1746 * check for undefined settings. Setting these bit patterns
1747 * result in undefined behaviour and can lead to an unexpected
1748 * TRCTRAP or a general protection fault right here.
1749 * Upper bits of dr6 and dr7 must not be set
1750 */
1751 for (i = 0; i < 4; i++) {
1752 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
1753 return (EINVAL);
1754 if (td->td_frame->tf_cs == _ucode32sel &&
1755 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
1756 return (EINVAL);
1757 }
1758 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
1759 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
1760 return (EINVAL);
1761
1762 pcb = td->td_pcb;
1763
1764 /*
1765 * Don't let a process set a breakpoint that is not within the
1766 * process's address space. If a process could do this, it
1767 * could halt the system by setting a breakpoint in the kernel
1768 * (if ddb was enabled). Thus, we need to check to make sure
1769 * that no breakpoints are being enabled for addresses outside
1770 * process's address space.
1771 *
1772 * XXX - what about when the watched area of the user's
1773 * address space is written into from within the kernel
1774 * ... wouldn't that still cause a breakpoint to be generated
1775 * from within kernel mode?
1776 */
1777
1778 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
1779 /* dr0 is enabled */
1780 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
1781 return (EINVAL);
1782 }
1783 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
1784 /* dr1 is enabled */
1785 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
1786 return (EINVAL);
1787 }
1788 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
1789 /* dr2 is enabled */
1790 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
1791 return (EINVAL);
1792 }
1793 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
1794 /* dr3 is enabled */
1795 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
1796 return (EINVAL);
1797 }
1798
1799 pcb->pcb_dr0 = dbregs->dr[0];
1800 pcb->pcb_dr1 = dbregs->dr[1];
1801 pcb->pcb_dr2 = dbregs->dr[2];
1802 pcb->pcb_dr3 = dbregs->dr[3];
1803 pcb->pcb_dr6 = dbregs->dr[6];
1804 pcb->pcb_dr7 = dbregs->dr[7];
1805
1806 pcb->pcb_flags |= PCB_DBREGS;
1807 }
1808
1809 return (0);
1810 }
1811
1812 void
1813 reset_dbregs(void)
1814 {
1815
1816 load_dr7(0); /* Turn off the control bits first */
1817 load_dr0(0);
1818 load_dr1(0);
1819 load_dr2(0);
1820 load_dr3(0);
1821 load_dr6(0);
1822 }
1823
1824 /*
1825 * Return > 0 if a hardware breakpoint has been hit, and the
1826 * breakpoint was in user space. Return 0, otherwise.
1827 */
1828 int
1829 user_dbreg_trap(void)
1830 {
1831 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
1832 u_int64_t bp; /* breakpoint bits extracted from dr6 */
1833 int nbp; /* number of breakpoints that triggered */
1834 caddr_t addr[4]; /* breakpoint addresses */
1835 int i;
1836
1837 dr7 = rdr7();
1838 if ((dr7 & 0x000000ff) == 0) {
1839 /*
1840 * all GE and LE bits in the dr7 register are zero,
1841 * thus the trap couldn't have been caused by the
1842 * hardware debug registers
1843 */
1844 return 0;
1845 }
1846
1847 nbp = 0;
1848 dr6 = rdr6();
1849 bp = dr6 & 0x0000000f;
1850
1851 if (!bp) {
1852 /*
1853 * None of the breakpoint bits are set meaning this
1854 * trap was not caused by any of the debug registers
1855 */
1856 return 0;
1857 }
1858
1859 /*
1860 * at least one of the breakpoints were hit, check to see
1861 * which ones and if any of them are user space addresses
1862 */
1863
1864 if (bp & 0x01) {
1865 addr[nbp++] = (caddr_t)rdr0();
1866 }
1867 if (bp & 0x02) {
1868 addr[nbp++] = (caddr_t)rdr1();
1869 }
1870 if (bp & 0x04) {
1871 addr[nbp++] = (caddr_t)rdr2();
1872 }
1873 if (bp & 0x08) {
1874 addr[nbp++] = (caddr_t)rdr3();
1875 }
1876
1877 for (i = 0; i < nbp; i++) {
1878 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
1879 /*
1880 * addr[i] is in user space
1881 */
1882 return nbp;
1883 }
1884 }
1885
1886 /*
1887 * None of the breakpoints are in user space.
1888 */
1889 return 0;
1890 }
1891
1892 #ifdef KDB
1893
1894 /*
1895 * Provide inb() and outb() as functions. They are normally only
1896 * available as macros calling inlined functions, thus cannot be
1897 * called from the debugger.
1898 *
1899 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
1900 */
1901
1902 #undef inb
1903 #undef outb
1904
1905 /* silence compiler warnings */
1906 u_char inb(u_int);
1907 void outb(u_int, u_char);
1908
1909 u_char
1910 inb(u_int port)
1911 {
1912 u_char data;
1913 /*
1914 * We use %%dx and not %1 here because i/o is done at %dx and not at
1915 * %edx, while gcc generates inferior code (movw instead of movl)
1916 * if we tell it to load (u_short) port.
1917 */
1918 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
1919 return (data);
1920 }
1921
1922 void
1923 outb(u_int port, u_char data)
1924 {
1925 u_char al;
1926 /*
1927 * Use an unnecessary assignment to help gcc's register allocator.
1928 * This make a large difference for gcc-1.40 and a tiny difference
1929 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
1930 * best results. gcc-2.6.0 can't handle this.
1931 */
1932 al = data;
1933 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
1934 }
1935
1936 #endif /* KDB */
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