Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/amd64/amd64/machdep.c
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1 /*- 2 * Copyright (c) 2003 Peter Wemm. 3 * Copyright (c) 1992 Terrence R. Lambert. 4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 39 */ 40 41 #include <sys/cdefs.h> 42 __FBSDID("$FreeBSD$"); 43 44 #include "opt_atalk.h" 45 #include "opt_atpic.h" 46 #include "opt_compat.h" 47 #include "opt_cpu.h" 48 #include "opt_ddb.h" 49 #include "opt_inet.h" 50 #include "opt_ipx.h" 51 #include "opt_isa.h" 52 #include "opt_kstack_pages.h" 53 #include "opt_maxmem.h" 54 #include "opt_msgbuf.h" 55 #include "opt_perfmon.h" 56 57 #include <sys/param.h> 58 #include <sys/proc.h> 59 #include <sys/systm.h> 60 #include <sys/bio.h> 61 #include <sys/buf.h> 62 #include <sys/bus.h> 63 #include <sys/callout.h> 64 #include <sys/clock.h> 65 #include <sys/cons.h> 66 #include <sys/cpu.h> 67 #include <sys/eventhandler.h> 68 #include <sys/exec.h> 69 #include <sys/imgact.h> 70 #include <sys/kdb.h> 71 #include <sys/kernel.h> 72 #include <sys/ktr.h> 73 #include <sys/linker.h> 74 #include <sys/lock.h> 75 #include <sys/malloc.h> 76 #include <sys/memrange.h> 77 #include <sys/msgbuf.h> 78 #include <sys/mutex.h> 79 #include <sys/pcpu.h> 80 #include <sys/ptrace.h> 81 #include <sys/reboot.h> 82 #include <sys/sched.h> 83 #include <sys/signalvar.h> 84 #include <sys/sysctl.h> 85 #include <sys/sysent.h> 86 #include <sys/sysproto.h> 87 #include <sys/ucontext.h> 88 #include <sys/vmmeter.h> 89 90 #include <vm/vm.h> 91 #include <vm/vm_extern.h> 92 #include <vm/vm_kern.h> 93 #include <vm/vm_page.h> 94 #include <vm/vm_map.h> 95 #include <vm/vm_object.h> 96 #include <vm/vm_pager.h> 97 #include <vm/vm_param.h> 98 99 #ifdef DDB 100 #ifndef KDB 101 #error KDB must be enabled in order for DDB to work! 102 #endif 103 #endif 104 #include <ddb/ddb.h> 105 106 #include <net/netisr.h> 107 108 #include <machine/clock.h> 109 #include <machine/cpu.h> 110 #include <machine/cputypes.h> 111 #include <machine/intr_machdep.h> 112 #include <machine/md_var.h> 113 #include <machine/metadata.h> 114 #include <machine/pc/bios.h> 115 #include <machine/pcb.h> 116 #include <machine/proc.h> 117 #include <machine/reg.h> 118 #include <machine/sigframe.h> 119 #include <machine/specialreg.h> 120 #ifdef PERFMON 121 #include <machine/perfmon.h> 122 #endif 123 #include <machine/tss.h> 124 #ifdef SMP 125 #include <machine/smp.h> 126 #endif 127 128 #ifdef DEV_ATPIC 129 #include <amd64/isa/icu.h> 130 #else 131 #include <machine/apicvar.h> 132 #endif 133 134 #include <isa/isareg.h> 135 #include <isa/rtc.h> 136 137 /* Sanity check for __curthread() */ 138 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 139 140 extern u_int64_t hammer_time(u_int64_t, u_int64_t); 141 142 extern void printcpuinfo(void); /* XXX header file */ 143 extern void identify_cpu(void); 144 extern void panicifcpuunsupported(void); 145 146 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 147 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 148 149 static void cpu_startup(void *); 150 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 151 static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 152 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 153 154 #ifdef DDB 155 extern vm_offset_t ksym_start, ksym_end; 156 #endif 157 158 /* Intel ICH registers */ 159 #define ICH_PMBASE 0x400 160 #define ICH_SMI_EN ICH_PMBASE + 0x30 161 162 int _udatasel, _ucodesel, _ucode32sel; 163 164 int cold = 1; 165 166 long Maxmem = 0; 167 long realmem = 0; 168 169 /* 170 * The number of PHYSMAP entries must be one less than the number of 171 * PHYSSEG entries because the PHYSMAP entry that spans the largest 172 * physical address that is accessible by ISA DMA is split into two 173 * PHYSSEG entries. 174 */ 175 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 176 177 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 178 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 179 180 /* must be 2 less so 0 0 can signal end of chunks */ 181 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 182 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 183 184 struct kva_md_info kmi; 185 186 static struct trapframe proc0_tf; 187 struct region_descriptor r_gdt, r_idt; 188 189 struct pcpu __pcpu[MAXCPU]; 190 191 struct mtx icu_lock; 192 193 struct mem_range_softc mem_range_softc; 194 195 static void 196 cpu_startup(dummy) 197 void *dummy; 198 { 199 char *sysenv; 200 201 /* 202 * On MacBooks, we need to disallow the legacy USB circuit to 203 * generate an SMI# because this can cause several problems, 204 * namely: incorrect CPU frequency detection and failure to 205 * start the APs. 206 * We do this by disabling a bit in the SMI_EN (SMI Control and 207 * Enable register) of the Intel ICH LPC Interface Bridge. 208 */ 209 sysenv = getenv("smbios.system.product"); 210 if (sysenv != NULL) { 211 if (strncmp(sysenv, "MacBook", 7) == 0) { 212 if (bootverbose) 213 printf("Disabling LEGACY_USB_EN bit on " 214 "Intel ICH.\n"); 215 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8); 216 } 217 freeenv(sysenv); 218 } 219 220 /* 221 * Good {morning,afternoon,evening,night}. 222 */ 223 startrtclock(); 224 printcpuinfo(); 225 panicifcpuunsupported(); 226 #ifdef PERFMON 227 perfmon_init(); 228 #endif 229 printf("usable memory = %ju (%ju MB)\n", ptoa((uintmax_t)physmem), 230 ptoa((uintmax_t)physmem) / 1048576); 231 realmem = Maxmem; 232 /* 233 * Display any holes after the first chunk of extended memory. 234 */ 235 if (bootverbose) { 236 int indx; 237 238 printf("Physical memory chunk(s):\n"); 239 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 240 vm_paddr_t size; 241 242 size = phys_avail[indx + 1] - phys_avail[indx]; 243 printf( 244 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 245 (uintmax_t)phys_avail[indx], 246 (uintmax_t)phys_avail[indx + 1] - 1, 247 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 248 } 249 } 250 251 vm_ksubmap_init(&kmi); 252 253 printf("avail memory = %ju (%ju MB)\n", 254 ptoa((uintmax_t)cnt.v_free_count), 255 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 256 257 /* 258 * Set up buffers, so they can be used to read disk labels. 259 */ 260 bufinit(); 261 vm_pager_bufferinit(); 262 263 cpu_setregs(); 264 } 265 266 /* 267 * Send an interrupt to process. 268 * 269 * Stack is set up to allow sigcode stored 270 * at top to call routine, followed by kcall 271 * to sigreturn routine below. After sigreturn 272 * resets the signal mask, the stack, and the 273 * frame pointer, it returns to the user 274 * specified pc, psl. 275 */ 276 void 277 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 278 { 279 struct sigframe sf, *sfp; 280 struct proc *p; 281 struct thread *td; 282 struct sigacts *psp; 283 char *sp; 284 struct trapframe *regs; 285 int sig; 286 int oonstack; 287 288 td = curthread; 289 p = td->td_proc; 290 PROC_LOCK_ASSERT(p, MA_OWNED); 291 sig = ksi->ksi_signo; 292 psp = p->p_sigacts; 293 mtx_assert(&psp->ps_mtx, MA_OWNED); 294 regs = td->td_frame; 295 oonstack = sigonstack(regs->tf_rsp); 296 297 /* Save user context. */ 298 bzero(&sf, sizeof(sf)); 299 sf.sf_uc.uc_sigmask = *mask; 300 sf.sf_uc.uc_stack = td->td_sigstk; 301 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 302 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 303 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 304 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs)); 305 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 306 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 307 fpstate_drop(td); 308 309 /* Allocate space for the signal handler context. */ 310 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 311 SIGISMEMBER(psp->ps_sigonstack, sig)) { 312 sp = td->td_sigstk.ss_sp + 313 td->td_sigstk.ss_size - sizeof(struct sigframe); 314 #if defined(COMPAT_43) 315 td->td_sigstk.ss_flags |= SS_ONSTACK; 316 #endif 317 } else 318 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128; 319 /* Align to 16 bytes. */ 320 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); 321 322 /* Translate the signal if appropriate. */ 323 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 324 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 325 326 /* Build the argument list for the signal handler. */ 327 regs->tf_rdi = sig; /* arg 1 in %rdi */ 328 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ 329 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 330 /* Signal handler installed with SA_SIGINFO. */ 331 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ 332 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 333 334 /* Fill in POSIX parts */ 335 sf.sf_si = ksi->ksi_info; 336 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 337 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 338 } else { 339 /* Old FreeBSD-style arguments. */ 340 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */ 341 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */ 342 sf.sf_ahu.sf_handler = catcher; 343 } 344 mtx_unlock(&psp->ps_mtx); 345 PROC_UNLOCK(p); 346 347 /* 348 * Copy the sigframe out to the user's stack. 349 */ 350 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 351 #ifdef DEBUG 352 printf("process %ld has trashed its stack\n", (long)p->p_pid); 353 #endif 354 PROC_LOCK(p); 355 sigexit(td, SIGILL); 356 } 357 358 regs->tf_rsp = (long)sfp; 359 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 360 regs->tf_rflags &= ~(PSL_T | PSL_D); 361 regs->tf_cs = _ucodesel; 362 PROC_LOCK(p); 363 mtx_lock(&psp->ps_mtx); 364 } 365 366 /* 367 * System call to cleanup state after a signal 368 * has been taken. Reset signal mask and 369 * stack state from context left by sendsig (above). 370 * Return to previous pc and psl as specified by 371 * context left by sendsig. Check carefully to 372 * make sure that the user has not modified the 373 * state to gain improper privileges. 374 * 375 * MPSAFE 376 */ 377 int 378 sigreturn(td, uap) 379 struct thread *td; 380 struct sigreturn_args /* { 381 const struct __ucontext *sigcntxp; 382 } */ *uap; 383 { 384 ucontext_t uc; 385 struct proc *p = td->td_proc; 386 struct trapframe *regs; 387 const ucontext_t *ucp; 388 long rflags; 389 int cs, error, ret; 390 ksiginfo_t ksi; 391 392 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 393 if (error != 0) 394 return (error); 395 ucp = &uc; 396 regs = td->td_frame; 397 rflags = ucp->uc_mcontext.mc_rflags; 398 /* 399 * Don't allow users to change privileged or reserved flags. 400 */ 401 /* 402 * XXX do allow users to change the privileged flag PSL_RF. 403 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers 404 * should sometimes set it there too. tf_rflags is kept in 405 * the signal context during signal handling and there is no 406 * other place to remember it, so the PSL_RF bit may be 407 * corrupted by the signal handler without us knowing. 408 * Corruption of the PSL_RF bit at worst causes one more or 409 * one less debugger trap, so allowing it is fairly harmless. 410 */ 411 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { 412 printf("sigreturn: rflags = 0x%lx\n", rflags); 413 return (EINVAL); 414 } 415 416 /* 417 * Don't allow users to load a valid privileged %cs. Let the 418 * hardware check for invalid selectors, excess privilege in 419 * other selectors, invalid %eip's and invalid %esp's. 420 */ 421 cs = ucp->uc_mcontext.mc_cs; 422 if (!CS_SECURE(cs)) { 423 printf("sigreturn: cs = 0x%x\n", cs); 424 ksiginfo_init_trap(&ksi); 425 ksi.ksi_signo = SIGBUS; 426 ksi.ksi_code = BUS_OBJERR; 427 ksi.ksi_trapno = T_PROTFLT; 428 ksi.ksi_addr = (void *)regs->tf_rip; 429 trapsignal(td, &ksi); 430 return (EINVAL); 431 } 432 433 ret = set_fpcontext(td, &ucp->uc_mcontext); 434 if (ret != 0) 435 return (ret); 436 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs)); 437 438 PROC_LOCK(p); 439 #if defined(COMPAT_43) 440 if (ucp->uc_mcontext.mc_onstack & 1) 441 td->td_sigstk.ss_flags |= SS_ONSTACK; 442 else 443 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 444 #endif 445 446 td->td_sigmask = ucp->uc_sigmask; 447 SIG_CANTMASK(td->td_sigmask); 448 signotify(td); 449 PROC_UNLOCK(p); 450 td->td_pcb->pcb_flags |= PCB_FULLCTX; 451 return (EJUSTRETURN); 452 } 453 454 #ifdef COMPAT_FREEBSD4 455 int 456 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 457 { 458 459 return sigreturn(td, (struct sigreturn_args *)uap); 460 } 461 #endif 462 463 464 /* 465 * Machine dependent boot() routine 466 * 467 * I haven't seen anything to put here yet 468 * Possibly some stuff might be grafted back here from boot() 469 */ 470 void 471 cpu_boot(int howto) 472 { 473 } 474 475 /* Get current clock frequency for the given cpu id. */ 476 int 477 cpu_est_clockrate(int cpu_id, uint64_t *rate) 478 { 479 register_t reg; 480 uint64_t tsc1, tsc2; 481 482 if (pcpu_find(cpu_id) == NULL || rate == NULL) 483 return (EINVAL); 484 485 /* If we're booting, trust the rate calibrated moments ago. */ 486 if (cold) { 487 *rate = tsc_freq; 488 return (0); 489 } 490 491 #ifdef SMP 492 /* Schedule ourselves on the indicated cpu. */ 493 thread_lock(curthread); 494 sched_bind(curthread, cpu_id); 495 thread_unlock(curthread); 496 #endif 497 498 /* Calibrate by measuring a short delay. */ 499 reg = intr_disable(); 500 tsc1 = rdtsc(); 501 DELAY(1000); 502 tsc2 = rdtsc(); 503 intr_restore(reg); 504 505 #ifdef SMP 506 thread_lock(curthread); 507 sched_unbind(curthread); 508 thread_unlock(curthread); 509 #endif 510 511 /* 512 * Calculate the difference in readings, convert to Mhz, and 513 * subtract 0.5% of the total. Empirical testing has shown that 514 * overhead in DELAY() works out to approximately this value. 515 */ 516 tsc2 -= tsc1; 517 *rate = tsc2 * 1000 - tsc2 * 5; 518 return (0); 519 } 520 521 /* 522 * Shutdown the CPU as much as possible 523 */ 524 void 525 cpu_halt(void) 526 { 527 for (;;) 528 __asm__ ("hlt"); 529 } 530 531 /* 532 * Hook to idle the CPU when possible. In the SMP case we default to 533 * off because a halted cpu will not currently pick up a new thread in the 534 * run queue until the next timer tick. If turned on this will result in 535 * approximately a 4.2% loss in real time performance in buildworld tests 536 * (but improves user and sys times oddly enough), and saves approximately 537 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 538 * 539 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 540 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 541 * Then we can have our cake and eat it too. 542 * 543 * XXX I'm turning it on for SMP as well by default for now. It seems to 544 * help lock contention somewhat, and this is critical for HTT. -Peter 545 */ 546 static int cpu_idle_hlt = 1; 547 TUNABLE_INT("machdep.cpu_idle_hlt", &cpu_idle_hlt); 548 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 549 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 550 551 static void 552 cpu_idle_default(void) 553 { 554 /* 555 * we must absolutely guarentee that hlt is the 556 * absolute next instruction after sti or we 557 * introduce a timing window. 558 */ 559 __asm __volatile("sti; hlt"); 560 } 561 562 /* 563 * Note that we have to be careful here to avoid a race between checking 564 * sched_runnable() and actually halting. If we don't do this, we may waste 565 * the time between calling hlt and the next interrupt even though there 566 * is a runnable process. 567 */ 568 void 569 cpu_idle(void) 570 { 571 572 #ifdef SMP 573 if (mp_grab_cpu_hlt()) 574 return; 575 #endif 576 if (cpu_idle_hlt) { 577 disable_intr(); 578 if (sched_runnable()) 579 enable_intr(); 580 else 581 (*cpu_idle_hook)(); 582 } 583 } 584 585 /* Other subsystems (e.g., ACPI) can hook this later. */ 586 void (*cpu_idle_hook)(void) = cpu_idle_default; 587 588 /* 589 * Clear registers on exec 590 */ 591 void 592 exec_setregs(td, entry, stack, ps_strings) 593 struct thread *td; 594 u_long entry; 595 u_long stack; 596 u_long ps_strings; 597 { 598 struct trapframe *regs = td->td_frame; 599 struct pcb *pcb = td->td_pcb; 600 601 critical_enter(); 602 wrmsr(MSR_FSBASE, 0); 603 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */ 604 pcb->pcb_fsbase = 0; 605 pcb->pcb_gsbase = 0; 606 critical_exit(); 607 pcb->pcb_flags &= ~(PCB_32BIT | PCB_GS32BIT); 608 load_ds(_udatasel); 609 load_es(_udatasel); 610 load_fs(_udatasel); 611 load_gs(_udatasel); 612 pcb->pcb_ds = _udatasel; 613 pcb->pcb_es = _udatasel; 614 pcb->pcb_fs = _udatasel; 615 pcb->pcb_gs = _udatasel; 616 617 bzero((char *)regs, sizeof(struct trapframe)); 618 regs->tf_rip = entry; 619 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; 620 regs->tf_rdi = stack; /* argv */ 621 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); 622 regs->tf_ss = _udatasel; 623 regs->tf_cs = _ucodesel; 624 625 /* 626 * Reset the hardware debug registers if they were in use. 627 * They won't have any meaning for the newly exec'd process. 628 */ 629 if (pcb->pcb_flags & PCB_DBREGS) { 630 pcb->pcb_dr0 = 0; 631 pcb->pcb_dr1 = 0; 632 pcb->pcb_dr2 = 0; 633 pcb->pcb_dr3 = 0; 634 pcb->pcb_dr6 = 0; 635 pcb->pcb_dr7 = 0; 636 if (pcb == PCPU_GET(curpcb)) { 637 /* 638 * Clear the debug registers on the running 639 * CPU, otherwise they will end up affecting 640 * the next process we switch to. 641 */ 642 reset_dbregs(); 643 } 644 pcb->pcb_flags &= ~PCB_DBREGS; 645 } 646 647 /* 648 * Drop the FP state if we hold it, so that the process gets a 649 * clean FP state if it uses the FPU again. 650 */ 651 fpstate_drop(td); 652 } 653 654 void 655 cpu_setregs(void) 656 { 657 register_t cr0; 658 659 cr0 = rcr0(); 660 /* 661 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the 662 * BSP. See the comments there about why we set them. 663 */ 664 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 665 load_cr0(cr0); 666 } 667 668 /* 669 * Initialize amd64 and configure to run kernel 670 */ 671 672 /* 673 * Initialize segments & interrupt table 674 */ 675 676 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */ 677 static struct gate_descriptor idt0[NIDT]; 678 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 679 680 static char dblfault_stack[PAGE_SIZE] __aligned(16); 681 682 struct amd64tss common_tss[MAXCPU]; 683 684 /* software prototypes -- in more palatable form */ 685 struct soft_segment_descriptor gdt_segs[] = { 686 /* GNULL_SEL 0 Null Descriptor */ 687 { 0x0, /* segment base address */ 688 0x0, /* length */ 689 0, /* segment type */ 690 0, /* segment descriptor priority level */ 691 0, /* segment descriptor present */ 692 0, /* long */ 693 0, /* default 32 vs 16 bit size */ 694 0 /* limit granularity (byte/page units)*/ }, 695 /* GCODE_SEL 1 Code Descriptor for kernel */ 696 { 0x0, /* segment base address */ 697 0xfffff, /* length - all address space */ 698 SDT_MEMERA, /* segment type */ 699 SEL_KPL, /* segment descriptor priority level */ 700 1, /* segment descriptor present */ 701 1, /* long */ 702 0, /* default 32 vs 16 bit size */ 703 1 /* limit granularity (byte/page units)*/ }, 704 /* GDATA_SEL 2 Data Descriptor for kernel */ 705 { 0x0, /* segment base address */ 706 0xfffff, /* length - all address space */ 707 SDT_MEMRWA, /* segment type */ 708 SEL_KPL, /* segment descriptor priority level */ 709 1, /* segment descriptor present */ 710 1, /* long */ 711 0, /* default 32 vs 16 bit size */ 712 1 /* limit granularity (byte/page units)*/ }, 713 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */ 714 { 0x0, /* segment base address */ 715 0xfffff, /* length - all address space */ 716 SDT_MEMERA, /* segment type */ 717 SEL_UPL, /* segment descriptor priority level */ 718 1, /* segment descriptor present */ 719 0, /* long */ 720 1, /* default 32 vs 16 bit size */ 721 1 /* limit granularity (byte/page units)*/ }, 722 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */ 723 { 0x0, /* segment base address */ 724 0xfffff, /* length - all address space */ 725 SDT_MEMRWA, /* segment type */ 726 SEL_UPL, /* segment descriptor priority level */ 727 1, /* segment descriptor present */ 728 0, /* long */ 729 1, /* default 32 vs 16 bit size */ 730 1 /* limit granularity (byte/page units)*/ }, 731 /* GUCODE_SEL 5 64 bit Code Descriptor for user */ 732 { 0x0, /* segment base address */ 733 0xfffff, /* length - all address space */ 734 SDT_MEMERA, /* segment type */ 735 SEL_UPL, /* segment descriptor priority level */ 736 1, /* segment descriptor present */ 737 1, /* long */ 738 0, /* default 32 vs 16 bit size */ 739 1 /* limit granularity (byte/page units)*/ }, 740 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */ 741 { 742 0x0, /* segment base address */ 743 sizeof(struct amd64tss)-1,/* length */ 744 SDT_SYSTSS, /* segment type */ 745 SEL_KPL, /* segment descriptor priority level */ 746 1, /* segment descriptor present */ 747 0, /* long */ 748 0, /* unused - default 32 vs 16 bit size */ 749 0 /* limit granularity (byte/page units)*/ }, 750 /* Actually, the TSS is a system descriptor which is double size */ 751 { 0x0, /* segment base address */ 752 0x0, /* length */ 753 0, /* segment type */ 754 0, /* segment descriptor priority level */ 755 0, /* segment descriptor present */ 756 0, /* long */ 757 0, /* default 32 vs 16 bit size */ 758 0 /* limit granularity (byte/page units)*/ }, 759 /* GUGS32_SEL 8 32 bit GS Descriptor for user */ 760 { 0x0, /* segment base address */ 761 0xfffff, /* length - all address space */ 762 SDT_MEMRWA, /* segment type */ 763 SEL_UPL, /* segment descriptor priority level */ 764 1, /* segment descriptor present */ 765 0, /* long */ 766 1, /* default 32 vs 16 bit size */ 767 1 /* limit granularity (byte/page units)*/ }, 768 }; 769 770 void 771 setidt(idx, func, typ, dpl, ist) 772 int idx; 773 inthand_t *func; 774 int typ; 775 int dpl; 776 int ist; 777 { 778 struct gate_descriptor *ip; 779 780 ip = idt + idx; 781 ip->gd_looffset = (uintptr_t)func; 782 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL); 783 ip->gd_ist = ist; 784 ip->gd_xx = 0; 785 ip->gd_type = typ; 786 ip->gd_dpl = dpl; 787 ip->gd_p = 1; 788 ip->gd_hioffset = ((uintptr_t)func)>>16 ; 789 } 790 791 extern inthand_t 792 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 793 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 794 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 795 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 796 IDTVEC(xmm), IDTVEC(dblfault), 797 IDTVEC(fast_syscall), IDTVEC(fast_syscall32); 798 799 void 800 sdtossd(sd, ssd) 801 struct user_segment_descriptor *sd; 802 struct soft_segment_descriptor *ssd; 803 { 804 805 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 806 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 807 ssd->ssd_type = sd->sd_type; 808 ssd->ssd_dpl = sd->sd_dpl; 809 ssd->ssd_p = sd->sd_p; 810 ssd->ssd_long = sd->sd_long; 811 ssd->ssd_def32 = sd->sd_def32; 812 ssd->ssd_gran = sd->sd_gran; 813 } 814 815 void 816 ssdtosd(ssd, sd) 817 struct soft_segment_descriptor *ssd; 818 struct user_segment_descriptor *sd; 819 { 820 821 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 822 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff; 823 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 824 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 825 sd->sd_type = ssd->ssd_type; 826 sd->sd_dpl = ssd->ssd_dpl; 827 sd->sd_p = ssd->ssd_p; 828 sd->sd_long = ssd->ssd_long; 829 sd->sd_def32 = ssd->ssd_def32; 830 sd->sd_gran = ssd->ssd_gran; 831 } 832 833 void 834 ssdtosyssd(ssd, sd) 835 struct soft_segment_descriptor *ssd; 836 struct system_segment_descriptor *sd; 837 { 838 839 sd->sd_lobase = (ssd->ssd_base) & 0xffffff; 840 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful; 841 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff; 842 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf; 843 sd->sd_type = ssd->ssd_type; 844 sd->sd_dpl = ssd->ssd_dpl; 845 sd->sd_p = ssd->ssd_p; 846 sd->sd_gran = ssd->ssd_gran; 847 } 848 849 #if !defined(DEV_ATPIC) && defined(DEV_ISA) 850 #include <isa/isavar.h> 851 u_int 852 isa_irq_pending(void) 853 { 854 855 return (0); 856 } 857 #endif 858 859 u_int basemem; 860 861 /* 862 * Populate the (physmap) array with base/bound pairs describing the 863 * available physical memory in the system, then test this memory and 864 * build the phys_avail array describing the actually-available memory. 865 * 866 * If we cannot accurately determine the physical memory map, then use 867 * value from the 0xE801 call, and failing that, the RTC. 868 * 869 * Total memory size may be set by the kernel environment variable 870 * hw.physmem or the compile-time define MAXMEM. 871 * 872 * XXX first should be vm_paddr_t. 873 */ 874 static void 875 getmemsize(caddr_t kmdp, u_int64_t first) 876 { 877 int i, off, physmap_idx, pa_indx, da_indx; 878 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 879 u_long physmem_tunable; 880 pt_entry_t *pte; 881 struct bios_smap *smapbase, *smap, *smapend; 882 u_int32_t smapsize; 883 quad_t dcons_addr, dcons_size; 884 885 bzero(physmap, sizeof(physmap)); 886 basemem = 0; 887 physmap_idx = 0; 888 889 /* 890 * get memory map from INT 15:E820, kindly supplied by the loader. 891 * 892 * subr_module.c says: 893 * "Consumer may safely assume that size value precedes data." 894 * ie: an int32_t immediately precedes smap. 895 */ 896 smapbase = (struct bios_smap *)preload_search_info(kmdp, 897 MODINFO_METADATA | MODINFOMD_SMAP); 898 if (smapbase == NULL) 899 panic("No BIOS smap info from loader!"); 900 901 smapsize = *((u_int32_t *)smapbase - 1); 902 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 903 904 for (smap = smapbase; smap < smapend; smap++) { 905 if (boothowto & RB_VERBOSE) 906 printf("SMAP type=%02x base=%016lx len=%016lx\n", 907 smap->type, smap->base, smap->length); 908 909 if (smap->type != SMAP_TYPE_MEMORY) 910 continue; 911 912 if (smap->length == 0) 913 continue; 914 915 for (i = 0; i <= physmap_idx; i += 2) { 916 if (smap->base < physmap[i + 1]) { 917 if (boothowto & RB_VERBOSE) 918 printf( 919 "Overlapping or non-monotonic memory region, ignoring second region\n"); 920 continue; 921 } 922 } 923 924 if (smap->base == physmap[physmap_idx + 1]) { 925 physmap[physmap_idx + 1] += smap->length; 926 continue; 927 } 928 929 physmap_idx += 2; 930 if (physmap_idx == PHYSMAP_SIZE) { 931 printf( 932 "Too many segments in the physical address map, giving up\n"); 933 break; 934 } 935 physmap[physmap_idx] = smap->base; 936 physmap[physmap_idx + 1] = smap->base + smap->length; 937 } 938 939 /* 940 * Find the 'base memory' segment for SMP 941 */ 942 basemem = 0; 943 for (i = 0; i <= physmap_idx; i += 2) { 944 if (physmap[i] == 0x00000000) { 945 basemem = physmap[i + 1] / 1024; 946 break; 947 } 948 } 949 if (basemem == 0) 950 panic("BIOS smap did not include a basemem segment!"); 951 952 #ifdef SMP 953 /* make hole for AP bootstrap code */ 954 physmap[1] = mp_bootaddress(physmap[1] / 1024); 955 #endif 956 957 /* 958 * Maxmem isn't the "maximum memory", it's one larger than the 959 * highest page of the physical address space. It should be 960 * called something like "Maxphyspage". We may adjust this 961 * based on ``hw.physmem'' and the results of the memory test. 962 */ 963 Maxmem = atop(physmap[physmap_idx + 1]); 964 965 #ifdef MAXMEM 966 Maxmem = MAXMEM / 4; 967 #endif 968 969 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 970 Maxmem = atop(physmem_tunable); 971 972 /* 973 * Don't allow MAXMEM or hw.physmem to extend the amount of memory 974 * in the system. 975 */ 976 if (Maxmem > atop(physmap[physmap_idx + 1])) 977 Maxmem = atop(physmap[physmap_idx + 1]); 978 979 if (atop(physmap[physmap_idx + 1]) != Maxmem && 980 (boothowto & RB_VERBOSE)) 981 printf("Physical memory use set to %ldK\n", Maxmem * 4); 982 983 /* call pmap initialization to make new kernel address space */ 984 pmap_bootstrap(&first); 985 986 /* 987 * Size up each available chunk of physical memory. 988 */ 989 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 990 pa_indx = 0; 991 da_indx = 1; 992 phys_avail[pa_indx++] = physmap[0]; 993 phys_avail[pa_indx] = physmap[0]; 994 dump_avail[da_indx] = physmap[0]; 995 pte = CMAP1; 996 997 /* 998 * Get dcons buffer address 999 */ 1000 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1001 getenv_quad("dcons.size", &dcons_size) == 0) 1002 dcons_addr = 0; 1003 1004 /* 1005 * physmap is in bytes, so when converting to page boundaries, 1006 * round up the start address and round down the end address. 1007 */ 1008 for (i = 0; i <= physmap_idx; i += 2) { 1009 vm_paddr_t end; 1010 1011 end = ptoa((vm_paddr_t)Maxmem); 1012 if (physmap[i + 1] < end) 1013 end = trunc_page(physmap[i + 1]); 1014 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1015 int tmp, page_bad, full; 1016 int *ptr = (int *)CADDR1; 1017 1018 full = FALSE; 1019 /* 1020 * block out kernel memory as not available. 1021 */ 1022 if (pa >= 0x100000 && pa < first) 1023 goto do_dump_avail; 1024 1025 /* 1026 * block out dcons buffer 1027 */ 1028 if (dcons_addr > 0 1029 && pa >= trunc_page(dcons_addr) 1030 && pa < dcons_addr + dcons_size) 1031 goto do_dump_avail; 1032 1033 page_bad = FALSE; 1034 1035 /* 1036 * map page into kernel: valid, read/write,non-cacheable 1037 */ 1038 *pte = pa | PG_V | PG_RW | PG_N; 1039 invltlb(); 1040 1041 tmp = *(int *)ptr; 1042 /* 1043 * Test for alternating 1's and 0's 1044 */ 1045 *(volatile int *)ptr = 0xaaaaaaaa; 1046 if (*(volatile int *)ptr != 0xaaaaaaaa) 1047 page_bad = TRUE; 1048 /* 1049 * Test for alternating 0's and 1's 1050 */ 1051 *(volatile int *)ptr = 0x55555555; 1052 if (*(volatile int *)ptr != 0x55555555) 1053 page_bad = TRUE; 1054 /* 1055 * Test for all 1's 1056 */ 1057 *(volatile int *)ptr = 0xffffffff; 1058 if (*(volatile int *)ptr != 0xffffffff) 1059 page_bad = TRUE; 1060 /* 1061 * Test for all 0's 1062 */ 1063 *(volatile int *)ptr = 0x0; 1064 if (*(volatile int *)ptr != 0x0) 1065 page_bad = TRUE; 1066 /* 1067 * Restore original value. 1068 */ 1069 *(int *)ptr = tmp; 1070 1071 /* 1072 * Adjust array of valid/good pages. 1073 */ 1074 if (page_bad == TRUE) 1075 continue; 1076 /* 1077 * If this good page is a continuation of the 1078 * previous set of good pages, then just increase 1079 * the end pointer. Otherwise start a new chunk. 1080 * Note that "end" points one higher than end, 1081 * making the range >= start and < end. 1082 * If we're also doing a speculative memory 1083 * test and we at or past the end, bump up Maxmem 1084 * so that we keep going. The first bad page 1085 * will terminate the loop. 1086 */ 1087 if (phys_avail[pa_indx] == pa) { 1088 phys_avail[pa_indx] += PAGE_SIZE; 1089 } else { 1090 pa_indx++; 1091 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1092 printf( 1093 "Too many holes in the physical address space, giving up\n"); 1094 pa_indx--; 1095 full = TRUE; 1096 goto do_dump_avail; 1097 } 1098 phys_avail[pa_indx++] = pa; /* start */ 1099 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1100 } 1101 physmem++; 1102 do_dump_avail: 1103 if (dump_avail[da_indx] == pa) { 1104 dump_avail[da_indx] += PAGE_SIZE; 1105 } else { 1106 da_indx++; 1107 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1108 da_indx--; 1109 goto do_next; 1110 } 1111 dump_avail[da_indx++] = pa; /* start */ 1112 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1113 } 1114 do_next: 1115 if (full) 1116 break; 1117 } 1118 } 1119 *pte = 0; 1120 invltlb(); 1121 1122 /* 1123 * XXX 1124 * The last chunk must contain at least one page plus the message 1125 * buffer to avoid complicating other code (message buffer address 1126 * calculation, etc.). 1127 */ 1128 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1129 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1130 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1131 phys_avail[pa_indx--] = 0; 1132 phys_avail[pa_indx--] = 0; 1133 } 1134 1135 Maxmem = atop(phys_avail[pa_indx]); 1136 1137 /* Trim off space for the message buffer. */ 1138 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1139 1140 /* Map the message buffer. */ 1141 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1142 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] + 1143 off); 1144 } 1145 1146 u_int64_t 1147 hammer_time(u_int64_t modulep, u_int64_t physfree) 1148 { 1149 caddr_t kmdp; 1150 int gsel_tss, x; 1151 struct pcpu *pc; 1152 u_int64_t msr; 1153 char *env; 1154 1155 thread0.td_kstack = physfree + KERNBASE; 1156 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE); 1157 physfree += KSTACK_PAGES * PAGE_SIZE; 1158 thread0.td_pcb = (struct pcb *) 1159 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1160 1161 /* 1162 * This may be done better later if it gets more high level 1163 * components in it. If so just link td->td_proc here. 1164 */ 1165 proc_linkup0(&proc0, &thread0); 1166 1167 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE); 1168 preload_bootstrap_relocate(KERNBASE); 1169 kmdp = preload_search_by_type("elf kernel"); 1170 if (kmdp == NULL) 1171 kmdp = preload_search_by_type("elf64 kernel"); 1172 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); 1173 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE; 1174 #ifdef DDB 1175 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); 1176 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); 1177 #endif 1178 1179 /* Init basic tunables, hz etc */ 1180 init_param1(); 1181 1182 /* 1183 * make gdt memory segments 1184 */ 1185 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0]; 1186 1187 for (x = 0; x < NGDT; x++) { 1188 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1)) 1189 ssdtosd(&gdt_segs[x], &gdt[x]); 1190 } 1191 ssdtosyssd(&gdt_segs[GPROC0_SEL], 1192 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]); 1193 1194 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1195 r_gdt.rd_base = (long) gdt; 1196 lgdt(&r_gdt); 1197 pc = &__pcpu[0]; 1198 1199 wrmsr(MSR_FSBASE, 0); /* User value */ 1200 wrmsr(MSR_GSBASE, (u_int64_t)pc); 1201 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */ 1202 1203 pcpu_init(pc, 0, sizeof(struct pcpu)); 1204 PCPU_SET(prvspace, pc); 1205 PCPU_SET(curthread, &thread0); 1206 PCPU_SET(curpcb, thread0.td_pcb); 1207 PCPU_SET(tssp, &common_tss[0]); 1208 PCPU_SET(gs32p, &gdt[GUGS32_SEL]); 1209 1210 /* 1211 * Initialize mutexes. 1212 * 1213 * icu_lock: in order to allow an interrupt to occur in a critical 1214 * section, to set pcpu->ipending (etc...) properly, we 1215 * must be able to get the icu lock, so it can't be 1216 * under witness. 1217 */ 1218 mutex_init(); 1219 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1220 1221 /* exceptions */ 1222 for (x = 0; x < NIDT; x++) 1223 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0); 1224 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0); 1225 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0); 1226 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1); 1227 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0); 1228 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0); 1229 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0); 1230 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0); 1231 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0); 1232 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1); 1233 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0); 1234 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0); 1235 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0); 1236 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0); 1237 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0); 1238 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0); 1239 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0); 1240 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0); 1241 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0); 1242 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0); 1243 1244 r_idt.rd_limit = sizeof(idt0) - 1; 1245 r_idt.rd_base = (long) idt; 1246 lidt(&r_idt); 1247 1248 /* 1249 * Initialize the i8254 before the console so that console 1250 * initialization can use DELAY(). 1251 */ 1252 i8254_init(); 1253 1254 /* 1255 * Initialize the console before we print anything out. 1256 */ 1257 cninit(); 1258 1259 #ifdef DEV_ISA 1260 #ifdef DEV_ATPIC 1261 elcr_probe(); 1262 atpic_startup(); 1263 #else 1264 /* Reset and mask the atpics and leave them shut down. */ 1265 atpic_reset(); 1266 1267 /* 1268 * Point the ICU spurious interrupt vectors at the APIC spurious 1269 * interrupt handler. 1270 */ 1271 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1272 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0); 1273 #endif 1274 #else 1275 #error "have you forgotten the isa device?"; 1276 #endif 1277 1278 kdb_init(); 1279 1280 #ifdef KDB 1281 if (boothowto & RB_KDB) 1282 kdb_enter_why(KDB_WHY_BOOTFLAGS, 1283 "Boot flags requested debugger"); 1284 #endif 1285 1286 identify_cpu(); /* Final stage of CPU initialization */ 1287 initializecpu(); /* Initialize CPU registers */ 1288 1289 /* make an initial tss so cpu can get interrupt stack on syscall! */ 1290 common_tss[0].tss_rsp0 = thread0.td_kstack + \ 1291 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb); 1292 /* Ensure the stack is aligned to 16 bytes */ 1293 common_tss[0].tss_rsp0 &= ~0xFul; 1294 PCPU_SET(rsp0, common_tss[0].tss_rsp0); 1295 1296 /* doublefault stack space, runs on ist1 */ 1297 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)]; 1298 1299 /* Set the IO permission bitmap (empty due to tss seg limit) */ 1300 common_tss[0].tss_iobase = sizeof(struct amd64tss); 1301 1302 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 1303 ltr(gsel_tss); 1304 1305 /* Set up the fast syscall stuff */ 1306 msr = rdmsr(MSR_EFER) | EFER_SCE; 1307 wrmsr(MSR_EFER, msr); 1308 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall)); 1309 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32)); 1310 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) | 1311 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48); 1312 wrmsr(MSR_STAR, msr); 1313 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D); 1314 1315 getmemsize(kmdp, physfree); 1316 init_param2(physmem); 1317 1318 /* now running on new page tables, configured,and u/iom is accessible */ 1319 1320 msgbufinit(msgbufp, MSGBUF_SIZE); 1321 fpuinit(); 1322 1323 /* transfer to user mode */ 1324 1325 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 1326 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 1327 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL); 1328 1329 /* setup proc 0's pcb */ 1330 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 1331 thread0.td_pcb->pcb_cr3 = KPML4phys; 1332 thread0.td_frame = &proc0_tf; 1333 1334 env = getenv("kernelname"); 1335 if (env != NULL) 1336 strlcpy(kernelname, env, sizeof(kernelname)); 1337 1338 /* Location of kernel stack for locore */ 1339 return ((u_int64_t)thread0.td_pcb); 1340 } 1341 1342 void 1343 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 1344 { 1345 1346 pcpu->pc_acpi_id = 0xffffffff; 1347 } 1348 1349 void 1350 spinlock_enter(void) 1351 { 1352 struct thread *td; 1353 1354 td = curthread; 1355 if (td->td_md.md_spinlock_count == 0) 1356 td->td_md.md_saved_flags = intr_disable(); 1357 td->td_md.md_spinlock_count++; 1358 critical_enter(); 1359 } 1360 1361 void 1362 spinlock_exit(void) 1363 { 1364 struct thread *td; 1365 1366 td = curthread; 1367 critical_exit(); 1368 td->td_md.md_spinlock_count--; 1369 if (td->td_md.md_spinlock_count == 0) 1370 intr_restore(td->td_md.md_saved_flags); 1371 } 1372 1373 /* 1374 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1375 * we want to start a backtrace from the function that caused us to enter 1376 * the debugger. We have the context in the trapframe, but base the trace 1377 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1378 * enough for a backtrace. 1379 */ 1380 void 1381 makectx(struct trapframe *tf, struct pcb *pcb) 1382 { 1383 1384 pcb->pcb_r12 = tf->tf_r12; 1385 pcb->pcb_r13 = tf->tf_r13; 1386 pcb->pcb_r14 = tf->tf_r14; 1387 pcb->pcb_r15 = tf->tf_r15; 1388 pcb->pcb_rbp = tf->tf_rbp; 1389 pcb->pcb_rbx = tf->tf_rbx; 1390 pcb->pcb_rip = tf->tf_rip; 1391 pcb->pcb_rsp = (ISPL(tf->tf_cs)) ? tf->tf_rsp : (long)(tf + 1) - 8; 1392 } 1393 1394 int 1395 ptrace_set_pc(struct thread *td, unsigned long addr) 1396 { 1397 td->td_frame->tf_rip = addr; 1398 return (0); 1399 } 1400 1401 int 1402 ptrace_single_step(struct thread *td) 1403 { 1404 td->td_frame->tf_rflags |= PSL_T; 1405 return (0); 1406 } 1407 1408 int 1409 ptrace_clear_single_step(struct thread *td) 1410 { 1411 td->td_frame->tf_rflags &= ~PSL_T; 1412 return (0); 1413 } 1414 1415 int 1416 fill_regs(struct thread *td, struct reg *regs) 1417 { 1418 struct trapframe *tp; 1419 1420 tp = td->td_frame; 1421 regs->r_r15 = tp->tf_r15; 1422 regs->r_r14 = tp->tf_r14; 1423 regs->r_r13 = tp->tf_r13; 1424 regs->r_r12 = tp->tf_r12; 1425 regs->r_r11 = tp->tf_r11; 1426 regs->r_r10 = tp->tf_r10; 1427 regs->r_r9 = tp->tf_r9; 1428 regs->r_r8 = tp->tf_r8; 1429 regs->r_rdi = tp->tf_rdi; 1430 regs->r_rsi = tp->tf_rsi; 1431 regs->r_rbp = tp->tf_rbp; 1432 regs->r_rbx = tp->tf_rbx; 1433 regs->r_rdx = tp->tf_rdx; 1434 regs->r_rcx = tp->tf_rcx; 1435 regs->r_rax = tp->tf_rax; 1436 regs->r_rip = tp->tf_rip; 1437 regs->r_cs = tp->tf_cs; 1438 regs->r_rflags = tp->tf_rflags; 1439 regs->r_rsp = tp->tf_rsp; 1440 regs->r_ss = tp->tf_ss; 1441 return (0); 1442 } 1443 1444 int 1445 set_regs(struct thread *td, struct reg *regs) 1446 { 1447 struct trapframe *tp; 1448 register_t rflags; 1449 1450 tp = td->td_frame; 1451 rflags = regs->r_rflags & 0xffffffff; 1452 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs)) 1453 return (EINVAL); 1454 tp->tf_r15 = regs->r_r15; 1455 tp->tf_r14 = regs->r_r14; 1456 tp->tf_r13 = regs->r_r13; 1457 tp->tf_r12 = regs->r_r12; 1458 tp->tf_r11 = regs->r_r11; 1459 tp->tf_r10 = regs->r_r10; 1460 tp->tf_r9 = regs->r_r9; 1461 tp->tf_r8 = regs->r_r8; 1462 tp->tf_rdi = regs->r_rdi; 1463 tp->tf_rsi = regs->r_rsi; 1464 tp->tf_rbp = regs->r_rbp; 1465 tp->tf_rbx = regs->r_rbx; 1466 tp->tf_rdx = regs->r_rdx; 1467 tp->tf_rcx = regs->r_rcx; 1468 tp->tf_rax = regs->r_rax; 1469 tp->tf_rip = regs->r_rip; 1470 tp->tf_cs = regs->r_cs; 1471 tp->tf_rflags = rflags; 1472 tp->tf_rsp = regs->r_rsp; 1473 tp->tf_ss = regs->r_ss; 1474 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1475 return (0); 1476 } 1477 1478 /* XXX check all this stuff! */ 1479 /* externalize from sv_xmm */ 1480 static void 1481 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs) 1482 { 1483 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1484 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1485 int i; 1486 1487 /* pcb -> fpregs */ 1488 bzero(fpregs, sizeof(*fpregs)); 1489 1490 /* FPU control/status */ 1491 penv_fpreg->en_cw = penv_xmm->en_cw; 1492 penv_fpreg->en_sw = penv_xmm->en_sw; 1493 penv_fpreg->en_tw = penv_xmm->en_tw; 1494 penv_fpreg->en_opcode = penv_xmm->en_opcode; 1495 penv_fpreg->en_rip = penv_xmm->en_rip; 1496 penv_fpreg->en_rdp = penv_xmm->en_rdp; 1497 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr; 1498 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask; 1499 1500 /* FPU registers */ 1501 for (i = 0; i < 8; ++i) 1502 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10); 1503 1504 /* SSE registers */ 1505 for (i = 0; i < 16; ++i) 1506 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16); 1507 } 1508 1509 /* internalize from fpregs into sv_xmm */ 1510 static void 1511 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm) 1512 { 1513 struct envxmm *penv_xmm = &sv_xmm->sv_env; 1514 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env; 1515 int i; 1516 1517 /* fpregs -> pcb */ 1518 /* FPU control/status */ 1519 penv_xmm->en_cw = penv_fpreg->en_cw; 1520 penv_xmm->en_sw = penv_fpreg->en_sw; 1521 penv_xmm->en_tw = penv_fpreg->en_tw; 1522 penv_xmm->en_opcode = penv_fpreg->en_opcode; 1523 penv_xmm->en_rip = penv_fpreg->en_rip; 1524 penv_xmm->en_rdp = penv_fpreg->en_rdp; 1525 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr; 1526 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask; 1527 1528 /* FPU registers */ 1529 for (i = 0; i < 8; ++i) 1530 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10); 1531 1532 /* SSE registers */ 1533 for (i = 0; i < 16; ++i) 1534 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16); 1535 } 1536 1537 /* externalize from td->pcb */ 1538 int 1539 fill_fpregs(struct thread *td, struct fpreg *fpregs) 1540 { 1541 1542 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs); 1543 return (0); 1544 } 1545 1546 /* internalize to td->pcb */ 1547 int 1548 set_fpregs(struct thread *td, struct fpreg *fpregs) 1549 { 1550 1551 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save); 1552 return (0); 1553 } 1554 1555 /* 1556 * Get machine context. 1557 */ 1558 int 1559 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 1560 { 1561 struct trapframe *tp; 1562 1563 tp = td->td_frame; 1564 PROC_LOCK(curthread->td_proc); 1565 mcp->mc_onstack = sigonstack(tp->tf_rsp); 1566 PROC_UNLOCK(curthread->td_proc); 1567 mcp->mc_r15 = tp->tf_r15; 1568 mcp->mc_r14 = tp->tf_r14; 1569 mcp->mc_r13 = tp->tf_r13; 1570 mcp->mc_r12 = tp->tf_r12; 1571 mcp->mc_r11 = tp->tf_r11; 1572 mcp->mc_r10 = tp->tf_r10; 1573 mcp->mc_r9 = tp->tf_r9; 1574 mcp->mc_r8 = tp->tf_r8; 1575 mcp->mc_rdi = tp->tf_rdi; 1576 mcp->mc_rsi = tp->tf_rsi; 1577 mcp->mc_rbp = tp->tf_rbp; 1578 mcp->mc_rbx = tp->tf_rbx; 1579 mcp->mc_rcx = tp->tf_rcx; 1580 mcp->mc_rflags = tp->tf_rflags; 1581 if (flags & GET_MC_CLEAR_RET) { 1582 mcp->mc_rax = 0; 1583 mcp->mc_rdx = 0; 1584 mcp->mc_rflags &= ~PSL_C; 1585 } else { 1586 mcp->mc_rax = tp->tf_rax; 1587 mcp->mc_rdx = tp->tf_rdx; 1588 } 1589 mcp->mc_rip = tp->tf_rip; 1590 mcp->mc_cs = tp->tf_cs; 1591 mcp->mc_rsp = tp->tf_rsp; 1592 mcp->mc_ss = tp->tf_ss; 1593 mcp->mc_len = sizeof(*mcp); 1594 get_fpcontext(td, mcp); 1595 return (0); 1596 } 1597 1598 /* 1599 * Set machine context. 1600 * 1601 * However, we don't set any but the user modifiable flags, and we won't 1602 * touch the cs selector. 1603 */ 1604 int 1605 set_mcontext(struct thread *td, const mcontext_t *mcp) 1606 { 1607 struct trapframe *tp; 1608 long rflags; 1609 int ret; 1610 1611 tp = td->td_frame; 1612 if (mcp->mc_len != sizeof(*mcp)) 1613 return (EINVAL); 1614 rflags = (mcp->mc_rflags & PSL_USERCHANGE) | 1615 (tp->tf_rflags & ~PSL_USERCHANGE); 1616 ret = set_fpcontext(td, mcp); 1617 if (ret != 0) 1618 return (ret); 1619 tp->tf_r15 = mcp->mc_r15; 1620 tp->tf_r14 = mcp->mc_r14; 1621 tp->tf_r13 = mcp->mc_r13; 1622 tp->tf_r12 = mcp->mc_r12; 1623 tp->tf_r11 = mcp->mc_r11; 1624 tp->tf_r10 = mcp->mc_r10; 1625 tp->tf_r9 = mcp->mc_r9; 1626 tp->tf_r8 = mcp->mc_r8; 1627 tp->tf_rdi = mcp->mc_rdi; 1628 tp->tf_rsi = mcp->mc_rsi; 1629 tp->tf_rbp = mcp->mc_rbp; 1630 tp->tf_rbx = mcp->mc_rbx; 1631 tp->tf_rdx = mcp->mc_rdx; 1632 tp->tf_rcx = mcp->mc_rcx; 1633 tp->tf_rax = mcp->mc_rax; 1634 tp->tf_rip = mcp->mc_rip; 1635 tp->tf_rflags = rflags; 1636 tp->tf_rsp = mcp->mc_rsp; 1637 tp->tf_ss = mcp->mc_ss; 1638 td->td_pcb->pcb_flags |= PCB_FULLCTX; 1639 return (0); 1640 } 1641 1642 static void 1643 get_fpcontext(struct thread *td, mcontext_t *mcp) 1644 { 1645 1646 mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate); 1647 mcp->mc_fpformat = fpuformat(); 1648 } 1649 1650 static int 1651 set_fpcontext(struct thread *td, const mcontext_t *mcp) 1652 { 1653 struct savefpu *fpstate; 1654 1655 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 1656 return (0); 1657 else if (mcp->mc_fpformat != _MC_FPFMT_XMM) 1658 return (EINVAL); 1659 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 1660 /* We don't care what state is left in the FPU or PCB. */ 1661 fpstate_drop(td); 1662 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 1663 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 1664 /* 1665 * XXX we violate the dubious requirement that fpusetregs() 1666 * be called with interrupts disabled. 1667 * XXX obsolete on trap-16 systems? 1668 */ 1669 fpstate = (struct savefpu *)&mcp->mc_fpstate; 1670 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask; 1671 fpusetregs(td, fpstate); 1672 } else 1673 return (EINVAL); 1674 return (0); 1675 } 1676 1677 void 1678 fpstate_drop(struct thread *td) 1679 { 1680 register_t s; 1681 1682 s = intr_disable(); 1683 if (PCPU_GET(fpcurthread) == td) 1684 fpudrop(); 1685 /* 1686 * XXX force a full drop of the fpu. The above only drops it if we 1687 * owned it. 1688 * 1689 * XXX I don't much like fpugetregs()'s semantics of doing a full 1690 * drop. Dropping only to the pcb matches fnsave's behaviour. 1691 * We only need to drop to !PCB_INITDONE in sendsig(). But 1692 * sendsig() is the only caller of fpugetregs()... perhaps we just 1693 * have too many layers. 1694 */ 1695 curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE; 1696 intr_restore(s); 1697 } 1698 1699 int 1700 fill_dbregs(struct thread *td, struct dbreg *dbregs) 1701 { 1702 struct pcb *pcb; 1703 1704 if (td == NULL) { 1705 dbregs->dr[0] = rdr0(); 1706 dbregs->dr[1] = rdr1(); 1707 dbregs->dr[2] = rdr2(); 1708 dbregs->dr[3] = rdr3(); 1709 dbregs->dr[6] = rdr6(); 1710 dbregs->dr[7] = rdr7(); 1711 } else { 1712 pcb = td->td_pcb; 1713 dbregs->dr[0] = pcb->pcb_dr0; 1714 dbregs->dr[1] = pcb->pcb_dr1; 1715 dbregs->dr[2] = pcb->pcb_dr2; 1716 dbregs->dr[3] = pcb->pcb_dr3; 1717 dbregs->dr[6] = pcb->pcb_dr6; 1718 dbregs->dr[7] = pcb->pcb_dr7; 1719 } 1720 dbregs->dr[4] = 0; 1721 dbregs->dr[5] = 0; 1722 dbregs->dr[8] = 0; 1723 dbregs->dr[9] = 0; 1724 dbregs->dr[10] = 0; 1725 dbregs->dr[11] = 0; 1726 dbregs->dr[12] = 0; 1727 dbregs->dr[13] = 0; 1728 dbregs->dr[14] = 0; 1729 dbregs->dr[15] = 0; 1730 return (0); 1731 } 1732 1733 int 1734 set_dbregs(struct thread *td, struct dbreg *dbregs) 1735 { 1736 struct pcb *pcb; 1737 int i; 1738 1739 if (td == NULL) { 1740 load_dr0(dbregs->dr[0]); 1741 load_dr1(dbregs->dr[1]); 1742 load_dr2(dbregs->dr[2]); 1743 load_dr3(dbregs->dr[3]); 1744 load_dr6(dbregs->dr[6]); 1745 load_dr7(dbregs->dr[7]); 1746 } else { 1747 /* 1748 * Don't let an illegal value for dr7 get set. Specifically, 1749 * check for undefined settings. Setting these bit patterns 1750 * result in undefined behaviour and can lead to an unexpected 1751 * TRCTRAP or a general protection fault right here. 1752 * Upper bits of dr6 and dr7 must not be set 1753 */ 1754 for (i = 0; i < 4; i++) { 1755 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 1756 return (EINVAL); 1757 if (td->td_frame->tf_cs == _ucode32sel && 1758 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8) 1759 return (EINVAL); 1760 } 1761 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 || 1762 (dbregs->dr[7] & 0xffffffff00000000ul) != 0) 1763 return (EINVAL); 1764 1765 pcb = td->td_pcb; 1766 1767 /* 1768 * Don't let a process set a breakpoint that is not within the 1769 * process's address space. If a process could do this, it 1770 * could halt the system by setting a breakpoint in the kernel 1771 * (if ddb was enabled). Thus, we need to check to make sure 1772 * that no breakpoints are being enabled for addresses outside 1773 * process's address space. 1774 * 1775 * XXX - what about when the watched area of the user's 1776 * address space is written into from within the kernel 1777 * ... wouldn't that still cause a breakpoint to be generated 1778 * from within kernel mode? 1779 */ 1780 1781 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 1782 /* dr0 is enabled */ 1783 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 1784 return (EINVAL); 1785 } 1786 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 1787 /* dr1 is enabled */ 1788 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 1789 return (EINVAL); 1790 } 1791 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 1792 /* dr2 is enabled */ 1793 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 1794 return (EINVAL); 1795 } 1796 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 1797 /* dr3 is enabled */ 1798 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 1799 return (EINVAL); 1800 } 1801 1802 pcb->pcb_dr0 = dbregs->dr[0]; 1803 pcb->pcb_dr1 = dbregs->dr[1]; 1804 pcb->pcb_dr2 = dbregs->dr[2]; 1805 pcb->pcb_dr3 = dbregs->dr[3]; 1806 pcb->pcb_dr6 = dbregs->dr[6]; 1807 pcb->pcb_dr7 = dbregs->dr[7]; 1808 1809 pcb->pcb_flags |= PCB_DBREGS; 1810 } 1811 1812 return (0); 1813 } 1814 1815 void 1816 reset_dbregs(void) 1817 { 1818 1819 load_dr7(0); /* Turn off the control bits first */ 1820 load_dr0(0); 1821 load_dr1(0); 1822 load_dr2(0); 1823 load_dr3(0); 1824 load_dr6(0); 1825 } 1826 1827 /* 1828 * Return > 0 if a hardware breakpoint has been hit, and the 1829 * breakpoint was in user space. Return 0, otherwise. 1830 */ 1831 int 1832 user_dbreg_trap(void) 1833 { 1834 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */ 1835 u_int64_t bp; /* breakpoint bits extracted from dr6 */ 1836 int nbp; /* number of breakpoints that triggered */ 1837 caddr_t addr[4]; /* breakpoint addresses */ 1838 int i; 1839 1840 dr7 = rdr7(); 1841 if ((dr7 & 0x000000ff) == 0) { 1842 /* 1843 * all GE and LE bits in the dr7 register are zero, 1844 * thus the trap couldn't have been caused by the 1845 * hardware debug registers 1846 */ 1847 return 0; 1848 } 1849 1850 nbp = 0; 1851 dr6 = rdr6(); 1852 bp = dr6 & 0x0000000f; 1853 1854 if (!bp) { 1855 /* 1856 * None of the breakpoint bits are set meaning this 1857 * trap was not caused by any of the debug registers 1858 */ 1859 return 0; 1860 } 1861 1862 /* 1863 * at least one of the breakpoints were hit, check to see 1864 * which ones and if any of them are user space addresses 1865 */ 1866 1867 if (bp & 0x01) { 1868 addr[nbp++] = (caddr_t)rdr0(); 1869 } 1870 if (bp & 0x02) { 1871 addr[nbp++] = (caddr_t)rdr1(); 1872 } 1873 if (bp & 0x04) { 1874 addr[nbp++] = (caddr_t)rdr2(); 1875 } 1876 if (bp & 0x08) { 1877 addr[nbp++] = (caddr_t)rdr3(); 1878 } 1879 1880 for (i = 0; i < nbp; i++) { 1881 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 1882 /* 1883 * addr[i] is in user space 1884 */ 1885 return nbp; 1886 } 1887 } 1888 1889 /* 1890 * None of the breakpoints are in user space. 1891 */ 1892 return 0; 1893 } 1894 1895 #ifdef KDB 1896 1897 /* 1898 * Provide inb() and outb() as functions. They are normally only 1899 * available as macros calling inlined functions, thus cannot be 1900 * called from the debugger. 1901 * 1902 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 1903 */ 1904 1905 #undef inb 1906 #undef outb 1907 1908 /* silence compiler warnings */ 1909 u_char inb(u_int); 1910 void outb(u_int, u_char); 1911 1912 u_char 1913 inb(u_int port) 1914 { 1915 u_char data; 1916 /* 1917 * We use %%dx and not %1 here because i/o is done at %dx and not at 1918 * %edx, while gcc generates inferior code (movw instead of movl) 1919 * if we tell it to load (u_short) port. 1920 */ 1921 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 1922 return (data); 1923 } 1924 1925 void 1926 outb(u_int port, u_char data) 1927 { 1928 u_char al; 1929 /* 1930 * Use an unnecessary assignment to help gcc's register allocator. 1931 * This make a large difference for gcc-1.40 and a tiny difference 1932 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 1933 * best results. gcc-2.6.0 can't handle this. 1934 */ 1935 al = data; 1936 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 1937 } 1938 1939 #endif /* KDB */
Cache object: dc4d574c3006db2b0d2a5bcbca478469
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