The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/amd64/amd64/machdep.c

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    1 /*-
    2  * Copyright (c) 2003 Peter Wemm.
    3  * Copyright (c) 1992 Terrence R. Lambert.
    4  * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to Berkeley by
    8  * William Jolitz.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *      This product includes software developed by the University of
   21  *      California, Berkeley and its contributors.
   22  * 4. Neither the name of the University nor the names of its contributors
   23  *    may be used to endorse or promote products derived from this software
   24  *    without specific prior written permission.
   25  *
   26  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   27  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   29  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   30  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   31  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   32  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   36  * SUCH DAMAGE.
   37  *
   38  *      from: @(#)machdep.c     7.4 (Berkeley) 6/3/91
   39  */
   40 
   41 #include <sys/cdefs.h>
   42 __FBSDID("$FreeBSD: releng/9.0/sys/amd64/amd64/machdep.c 225617 2011-09-16 13:58:51Z kmacy $");
   43 
   44 #include "opt_atalk.h"
   45 #include "opt_atpic.h"
   46 #include "opt_compat.h"
   47 #include "opt_cpu.h"
   48 #include "opt_ddb.h"
   49 #include "opt_inet.h"
   50 #include "opt_ipx.h"
   51 #include "opt_isa.h"
   52 #include "opt_kstack_pages.h"
   53 #include "opt_maxmem.h"
   54 #include "opt_mp_watchdog.h"
   55 #include "opt_perfmon.h"
   56 #include "opt_sched.h"
   57 #include "opt_kdtrace.h"
   58 
   59 #include <sys/param.h>
   60 #include <sys/proc.h>
   61 #include <sys/systm.h>
   62 #include <sys/bio.h>
   63 #include <sys/buf.h>
   64 #include <sys/bus.h>
   65 #include <sys/callout.h>
   66 #include <sys/cons.h>
   67 #include <sys/cpu.h>
   68 #include <sys/eventhandler.h>
   69 #include <sys/exec.h>
   70 #include <sys/imgact.h>
   71 #include <sys/kdb.h>
   72 #include <sys/kernel.h>
   73 #include <sys/ktr.h>
   74 #include <sys/linker.h>
   75 #include <sys/lock.h>
   76 #include <sys/malloc.h>
   77 #include <sys/msgbuf.h>
   78 #include <sys/mutex.h>
   79 #include <sys/pcpu.h>
   80 #include <sys/ptrace.h>
   81 #include <sys/reboot.h>
   82 #include <sys/sched.h>
   83 #include <sys/signalvar.h>
   84 #ifdef SMP
   85 #include <sys/smp.h>
   86 #endif
   87 #include <sys/syscallsubr.h>
   88 #include <sys/sysctl.h>
   89 #include <sys/sysent.h>
   90 #include <sys/sysproto.h>
   91 #include <sys/ucontext.h>
   92 #include <sys/vmmeter.h>
   93 
   94 #include <vm/vm.h>
   95 #include <vm/vm_extern.h>
   96 #include <vm/vm_kern.h>
   97 #include <vm/vm_page.h>
   98 #include <vm/vm_map.h>
   99 #include <vm/vm_object.h>
  100 #include <vm/vm_pager.h>
  101 #include <vm/vm_param.h>
  102 
  103 #ifdef DDB
  104 #ifndef KDB
  105 #error KDB must be enabled in order for DDB to work!
  106 #endif
  107 #include <ddb/ddb.h>
  108 #include <ddb/db_sym.h>
  109 #endif
  110 
  111 #include <net/netisr.h>
  112 
  113 #include <machine/clock.h>
  114 #include <machine/cpu.h>
  115 #include <machine/cputypes.h>
  116 #include <machine/intr_machdep.h>
  117 #include <x86/mca.h>
  118 #include <machine/md_var.h>
  119 #include <machine/metadata.h>
  120 #include <machine/mp_watchdog.h>
  121 #include <machine/pc/bios.h>
  122 #include <machine/pcb.h>
  123 #include <machine/proc.h>
  124 #include <machine/reg.h>
  125 #include <machine/sigframe.h>
  126 #include <machine/specialreg.h>
  127 #ifdef PERFMON
  128 #include <machine/perfmon.h>
  129 #endif
  130 #include <machine/tss.h>
  131 #ifdef SMP
  132 #include <machine/smp.h>
  133 #endif
  134 
  135 #ifdef DEV_ATPIC
  136 #include <x86/isa/icu.h>
  137 #else
  138 #include <machine/apicvar.h>
  139 #endif
  140 
  141 #include <isa/isareg.h>
  142 #include <isa/rtc.h>
  143 
  144 /* Sanity check for __curthread() */
  145 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
  146 
  147 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
  148 
  149 extern void printcpuinfo(void); /* XXX header file */
  150 extern void identify_cpu(void);
  151 extern void panicifcpuunsupported(void);
  152 
  153 #define CS_SECURE(cs)           (ISPL(cs) == SEL_UPL)
  154 #define EFL_SECURE(ef, oef)     ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
  155 
  156 static void cpu_startup(void *);
  157 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
  158 static int  set_fpcontext(struct thread *td, const mcontext_t *mcp);
  159 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
  160 
  161 /*
  162  * The file "conf/ldscript.amd64" defines the symbol "kernphys".  Its value is
  163  * the physical address at which the kernel is loaded.
  164  */
  165 extern char kernphys[];
  166 #ifdef DDB
  167 extern vm_offset_t ksym_start, ksym_end;
  168 #endif
  169 
  170 struct msgbuf *msgbufp;
  171 
  172 /* Intel ICH registers */
  173 #define ICH_PMBASE      0x400
  174 #define ICH_SMI_EN      ICH_PMBASE + 0x30
  175 
  176 int     _udatasel, _ucodesel, _ucode32sel, _ufssel, _ugssel;
  177 
  178 int cold = 1;
  179 
  180 long Maxmem = 0;
  181 long realmem = 0;
  182 
  183 /*
  184  * The number of PHYSMAP entries must be one less than the number of
  185  * PHYSSEG entries because the PHYSMAP entry that spans the largest
  186  * physical address that is accessible by ISA DMA is split into two
  187  * PHYSSEG entries.
  188  */
  189 #define PHYSMAP_SIZE    (2 * (VM_PHYSSEG_MAX - 1))
  190 
  191 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
  192 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
  193 
  194 /* must be 2 less so 0 0 can signal end of chunks */
  195 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
  196 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
  197 
  198 struct kva_md_info kmi;
  199 
  200 static struct trapframe proc0_tf;
  201 struct region_descriptor r_gdt, r_idt;
  202 
  203 struct pcpu __pcpu[MAXCPU];
  204 
  205 struct mtx icu_lock;
  206 
  207 struct mtx dt_lock;     /* lock for GDT and LDT */
  208 
  209 static void
  210 cpu_startup(dummy)
  211         void *dummy;
  212 {
  213         uintmax_t memsize;
  214         char *sysenv;
  215 
  216         /*
  217          * On MacBooks, we need to disallow the legacy USB circuit to
  218          * generate an SMI# because this can cause several problems,
  219          * namely: incorrect CPU frequency detection and failure to
  220          * start the APs.
  221          * We do this by disabling a bit in the SMI_EN (SMI Control and
  222          * Enable register) of the Intel ICH LPC Interface Bridge. 
  223          */
  224         sysenv = getenv("smbios.system.product");
  225         if (sysenv != NULL) {
  226                 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
  227                     strncmp(sysenv, "MacBook3,1", 10) == 0 ||
  228                     strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
  229                     strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
  230                     strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
  231                     strncmp(sysenv, "Macmini1,1", 10) == 0) {
  232                         if (bootverbose)
  233                                 printf("Disabling LEGACY_USB_EN bit on "
  234                                     "Intel ICH.\n");
  235                         outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
  236                 }
  237                 freeenv(sysenv);
  238         }
  239 
  240         /*
  241          * Good {morning,afternoon,evening,night}.
  242          */
  243         startrtclock();
  244         printcpuinfo();
  245         panicifcpuunsupported();
  246 #ifdef PERFMON
  247         perfmon_init();
  248 #endif
  249         realmem = Maxmem;
  250 
  251         /*
  252          * Display physical memory if SMBIOS reports reasonable amount.
  253          */
  254         memsize = 0;
  255         sysenv = getenv("smbios.memory.enabled");
  256         if (sysenv != NULL) {
  257                 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
  258                 freeenv(sysenv);
  259         }
  260         if (memsize < ptoa((uintmax_t)cnt.v_free_count))
  261                 memsize = ptoa((uintmax_t)Maxmem);
  262         printf("real memory  = %ju (%ju MB)\n", memsize, memsize >> 20);
  263 
  264         /*
  265          * Display any holes after the first chunk of extended memory.
  266          */
  267         if (bootverbose) {
  268                 int indx;
  269 
  270                 printf("Physical memory chunk(s):\n");
  271                 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
  272                         vm_paddr_t size;
  273 
  274                         size = phys_avail[indx + 1] - phys_avail[indx];
  275                         printf(
  276                             "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
  277                             (uintmax_t)phys_avail[indx],
  278                             (uintmax_t)phys_avail[indx + 1] - 1,
  279                             (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
  280                 }
  281         }
  282 
  283         vm_ksubmap_init(&kmi);
  284 
  285         printf("avail memory = %ju (%ju MB)\n",
  286             ptoa((uintmax_t)cnt.v_free_count),
  287             ptoa((uintmax_t)cnt.v_free_count) / 1048576);
  288 
  289         /*
  290          * Set up buffers, so they can be used to read disk labels.
  291          */
  292         bufinit();
  293         vm_pager_bufferinit();
  294 
  295         cpu_setregs();
  296 }
  297 
  298 /*
  299  * Send an interrupt to process.
  300  *
  301  * Stack is set up to allow sigcode stored
  302  * at top to call routine, followed by call
  303  * to sigreturn routine below.  After sigreturn
  304  * resets the signal mask, the stack, and the
  305  * frame pointer, it returns to the user
  306  * specified pc, psl.
  307  */
  308 void
  309 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
  310 {
  311         struct sigframe sf, *sfp;
  312         struct pcb *pcb;
  313         struct proc *p;
  314         struct thread *td;
  315         struct sigacts *psp;
  316         char *sp;
  317         struct trapframe *regs;
  318         int sig;
  319         int oonstack;
  320 
  321         td = curthread;
  322         pcb = td->td_pcb;
  323         p = td->td_proc;
  324         PROC_LOCK_ASSERT(p, MA_OWNED);
  325         sig = ksi->ksi_signo;
  326         psp = p->p_sigacts;
  327         mtx_assert(&psp->ps_mtx, MA_OWNED);
  328         regs = td->td_frame;
  329         oonstack = sigonstack(regs->tf_rsp);
  330 
  331         /* Save user context. */
  332         bzero(&sf, sizeof(sf));
  333         sf.sf_uc.uc_sigmask = *mask;
  334         sf.sf_uc.uc_stack = td->td_sigstk;
  335         sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
  336             ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
  337         sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
  338         bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
  339         sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
  340         get_fpcontext(td, &sf.sf_uc.uc_mcontext);
  341         fpstate_drop(td);
  342         sf.sf_uc.uc_mcontext.mc_fsbase = pcb->pcb_fsbase;
  343         sf.sf_uc.uc_mcontext.mc_gsbase = pcb->pcb_gsbase;
  344         bzero(sf.sf_uc.uc_mcontext.mc_spare,
  345             sizeof(sf.sf_uc.uc_mcontext.mc_spare));
  346         bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
  347 
  348         /* Allocate space for the signal handler context. */
  349         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
  350             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  351                 sp = td->td_sigstk.ss_sp +
  352                     td->td_sigstk.ss_size - sizeof(struct sigframe);
  353 #if defined(COMPAT_43)
  354                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  355 #endif
  356         } else
  357                 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
  358         /* Align to 16 bytes. */
  359         sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
  360 
  361         /* Translate the signal if appropriate. */
  362         if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
  363                 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  364 
  365         /* Build the argument list for the signal handler. */
  366         regs->tf_rdi = sig;                     /* arg 1 in %rdi */
  367         regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
  368         bzero(&sf.sf_si, sizeof(sf.sf_si));
  369         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
  370                 /* Signal handler installed with SA_SIGINFO. */
  371                 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
  372                 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
  373 
  374                 /* Fill in POSIX parts */
  375                 sf.sf_si = ksi->ksi_info;
  376                 sf.sf_si.si_signo = sig; /* maybe a translated signal */
  377                 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
  378         } else {
  379                 /* Old FreeBSD-style arguments. */
  380                 regs->tf_rsi = ksi->ksi_code;   /* arg 2 in %rsi */
  381                 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
  382                 sf.sf_ahu.sf_handler = catcher;
  383         }
  384         mtx_unlock(&psp->ps_mtx);
  385         PROC_UNLOCK(p);
  386 
  387         /*
  388          * Copy the sigframe out to the user's stack.
  389          */
  390         if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
  391 #ifdef DEBUG
  392                 printf("process %ld has trashed its stack\n", (long)p->p_pid);
  393 #endif
  394                 PROC_LOCK(p);
  395                 sigexit(td, SIGILL);
  396         }
  397 
  398         regs->tf_rsp = (long)sfp;
  399         regs->tf_rip = p->p_sysent->sv_sigcode_base;
  400         regs->tf_rflags &= ~(PSL_T | PSL_D);
  401         regs->tf_cs = _ucodesel;
  402         regs->tf_ds = _udatasel;
  403         regs->tf_es = _udatasel;
  404         regs->tf_fs = _ufssel;
  405         regs->tf_gs = _ugssel;
  406         regs->tf_flags = TF_HASSEGS;
  407         set_pcb_flags(pcb, PCB_FULL_IRET);
  408         PROC_LOCK(p);
  409         mtx_lock(&psp->ps_mtx);
  410 }
  411 
  412 /*
  413  * System call to cleanup state after a signal
  414  * has been taken.  Reset signal mask and
  415  * stack state from context left by sendsig (above).
  416  * Return to previous pc and psl as specified by
  417  * context left by sendsig. Check carefully to
  418  * make sure that the user has not modified the
  419  * state to gain improper privileges.
  420  *
  421  * MPSAFE
  422  */
  423 int
  424 sys_sigreturn(td, uap)
  425         struct thread *td;
  426         struct sigreturn_args /* {
  427                 const struct __ucontext *sigcntxp;
  428         } */ *uap;
  429 {
  430         ucontext_t uc;
  431         struct pcb *pcb;
  432         struct proc *p;
  433         struct trapframe *regs;
  434         ucontext_t *ucp;
  435         long rflags;
  436         int cs, error, ret;
  437         ksiginfo_t ksi;
  438 
  439         pcb = td->td_pcb;
  440         p = td->td_proc;
  441 
  442         error = copyin(uap->sigcntxp, &uc, sizeof(uc));
  443         if (error != 0) {
  444                 uprintf("pid %d (%s): sigreturn copyin failed\n",
  445                     p->p_pid, td->td_name);
  446                 return (error);
  447         }
  448         ucp = &uc;
  449         if ((ucp->uc_mcontext.mc_flags & ~_MC_FLAG_MASK) != 0) {
  450                 uprintf("pid %d (%s): sigreturn mc_flags %x\n", p->p_pid,
  451                     td->td_name, ucp->uc_mcontext.mc_flags);
  452                 return (EINVAL);
  453         }
  454         regs = td->td_frame;
  455         rflags = ucp->uc_mcontext.mc_rflags;
  456         /*
  457          * Don't allow users to change privileged or reserved flags.
  458          */
  459         /*
  460          * XXX do allow users to change the privileged flag PSL_RF.
  461          * The cpu sets PSL_RF in tf_rflags for faults.  Debuggers
  462          * should sometimes set it there too.  tf_rflags is kept in
  463          * the signal context during signal handling and there is no
  464          * other place to remember it, so the PSL_RF bit may be
  465          * corrupted by the signal handler without us knowing.
  466          * Corruption of the PSL_RF bit at worst causes one more or
  467          * one less debugger trap, so allowing it is fairly harmless.
  468          */
  469         if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
  470                 uprintf("pid %d (%s): sigreturn rflags = 0x%lx\n", p->p_pid,
  471                     td->td_name, rflags);
  472                 return (EINVAL);
  473         }
  474 
  475         /*
  476          * Don't allow users to load a valid privileged %cs.  Let the
  477          * hardware check for invalid selectors, excess privilege in
  478          * other selectors, invalid %eip's and invalid %esp's.
  479          */
  480         cs = ucp->uc_mcontext.mc_cs;
  481         if (!CS_SECURE(cs)) {
  482                 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", p->p_pid,
  483                     td->td_name, cs);
  484                 ksiginfo_init_trap(&ksi);
  485                 ksi.ksi_signo = SIGBUS;
  486                 ksi.ksi_code = BUS_OBJERR;
  487                 ksi.ksi_trapno = T_PROTFLT;
  488                 ksi.ksi_addr = (void *)regs->tf_rip;
  489                 trapsignal(td, &ksi);
  490                 return (EINVAL);
  491         }
  492 
  493         ret = set_fpcontext(td, &ucp->uc_mcontext);
  494         if (ret != 0) {
  495                 uprintf("pid %d (%s): sigreturn set_fpcontext err %d\n",
  496                     p->p_pid, td->td_name, ret);
  497                 return (ret);
  498         }
  499         bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
  500         pcb->pcb_fsbase = ucp->uc_mcontext.mc_fsbase;
  501         pcb->pcb_gsbase = ucp->uc_mcontext.mc_gsbase;
  502 
  503 #if defined(COMPAT_43)
  504         if (ucp->uc_mcontext.mc_onstack & 1)
  505                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  506         else
  507                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
  508 #endif
  509 
  510         kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
  511         set_pcb_flags(pcb, PCB_FULL_IRET);
  512         return (EJUSTRETURN);
  513 }
  514 
  515 #ifdef COMPAT_FREEBSD4
  516 int
  517 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
  518 {
  519  
  520         return sys_sigreturn(td, (struct sigreturn_args *)uap);
  521 }
  522 #endif
  523 
  524 
  525 /*
  526  * Machine dependent boot() routine
  527  *
  528  * I haven't seen anything to put here yet
  529  * Possibly some stuff might be grafted back here from boot()
  530  */
  531 void
  532 cpu_boot(int howto)
  533 {
  534 }
  535 
  536 /*
  537  * Flush the D-cache for non-DMA I/O so that the I-cache can
  538  * be made coherent later.
  539  */
  540 void
  541 cpu_flush_dcache(void *ptr, size_t len)
  542 {
  543         /* Not applicable */
  544 }
  545 
  546 /* Get current clock frequency for the given cpu id. */
  547 int
  548 cpu_est_clockrate(int cpu_id, uint64_t *rate)
  549 {
  550         uint64_t tsc1, tsc2;
  551         uint64_t acnt, mcnt, perf;
  552         register_t reg;
  553 
  554         if (pcpu_find(cpu_id) == NULL || rate == NULL)
  555                 return (EINVAL);
  556 
  557         /*
  558          * If TSC is P-state invariant and APERF/MPERF MSRs do not exist,
  559          * DELAY(9) based logic fails.
  560          */
  561         if (tsc_is_invariant && !tsc_perf_stat)
  562                 return (EOPNOTSUPP);
  563 
  564 #ifdef SMP
  565         if (smp_cpus > 1) {
  566                 /* Schedule ourselves on the indicated cpu. */
  567                 thread_lock(curthread);
  568                 sched_bind(curthread, cpu_id);
  569                 thread_unlock(curthread);
  570         }
  571 #endif
  572 
  573         /* Calibrate by measuring a short delay. */
  574         reg = intr_disable();
  575         if (tsc_is_invariant) {
  576                 wrmsr(MSR_MPERF, 0);
  577                 wrmsr(MSR_APERF, 0);
  578                 tsc1 = rdtsc();
  579                 DELAY(1000);
  580                 mcnt = rdmsr(MSR_MPERF);
  581                 acnt = rdmsr(MSR_APERF);
  582                 tsc2 = rdtsc();
  583                 intr_restore(reg);
  584                 perf = 1000 * acnt / mcnt;
  585                 *rate = (tsc2 - tsc1) * perf;
  586         } else {
  587                 tsc1 = rdtsc();
  588                 DELAY(1000);
  589                 tsc2 = rdtsc();
  590                 intr_restore(reg);
  591                 *rate = (tsc2 - tsc1) * 1000;
  592         }
  593 
  594 #ifdef SMP
  595         if (smp_cpus > 1) {
  596                 thread_lock(curthread);
  597                 sched_unbind(curthread);
  598                 thread_unlock(curthread);
  599         }
  600 #endif
  601 
  602         return (0);
  603 }
  604 
  605 /*
  606  * Shutdown the CPU as much as possible
  607  */
  608 void
  609 cpu_halt(void)
  610 {
  611         for (;;)
  612                 __asm__ ("hlt");
  613 }
  614 
  615 void (*cpu_idle_hook)(void) = NULL;     /* ACPI idle hook. */
  616 static int      cpu_ident_amdc1e = 0;   /* AMD C1E supported. */
  617 static int      idle_mwait = 1;         /* Use MONITOR/MWAIT for short idle. */
  618 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
  619 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
  620     0, "Use MONITOR/MWAIT for short idle");
  621 
  622 #define STATE_RUNNING   0x0
  623 #define STATE_MWAIT     0x1
  624 #define STATE_SLEEPING  0x2
  625 
  626 static void
  627 cpu_idle_acpi(int busy)
  628 {
  629         int *state;
  630 
  631         state = (int *)PCPU_PTR(monitorbuf);
  632         *state = STATE_SLEEPING;
  633         disable_intr();
  634         if (sched_runnable())
  635                 enable_intr();
  636         else if (cpu_idle_hook)
  637                 cpu_idle_hook();
  638         else
  639                 __asm __volatile("sti; hlt");
  640         *state = STATE_RUNNING;
  641 }
  642 
  643 static void
  644 cpu_idle_hlt(int busy)
  645 {
  646         int *state;
  647 
  648         state = (int *)PCPU_PTR(monitorbuf);
  649         *state = STATE_SLEEPING;
  650         /*
  651          * We must absolutely guarentee that hlt is the next instruction
  652          * after sti or we introduce a timing window.
  653          */
  654         disable_intr();
  655         if (sched_runnable())
  656                 enable_intr();
  657         else
  658                 __asm __volatile("sti; hlt");
  659         *state = STATE_RUNNING;
  660 }
  661 
  662 /*
  663  * MWAIT cpu power states.  Lower 4 bits are sub-states.
  664  */
  665 #define MWAIT_C0        0xf0
  666 #define MWAIT_C1        0x00
  667 #define MWAIT_C2        0x10
  668 #define MWAIT_C3        0x20
  669 #define MWAIT_C4        0x30
  670 
  671 static void
  672 cpu_idle_mwait(int busy)
  673 {
  674         int *state;
  675 
  676         state = (int *)PCPU_PTR(monitorbuf);
  677         *state = STATE_MWAIT;
  678         if (!sched_runnable()) {
  679                 cpu_monitor(state, 0, 0);
  680                 if (*state == STATE_MWAIT)
  681                         cpu_mwait(0, MWAIT_C1);
  682         }
  683         *state = STATE_RUNNING;
  684 }
  685 
  686 static void
  687 cpu_idle_spin(int busy)
  688 {
  689         int *state;
  690         int i;
  691 
  692         state = (int *)PCPU_PTR(monitorbuf);
  693         *state = STATE_RUNNING;
  694         for (i = 0; i < 1000; i++) {
  695                 if (sched_runnable())
  696                         return;
  697                 cpu_spinwait();
  698         }
  699 }
  700 
  701 /*
  702  * C1E renders the local APIC timer dead, so we disable it by
  703  * reading the Interrupt Pending Message register and clearing
  704  * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
  705  * 
  706  * Reference:
  707  *   "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
  708  *   #32559 revision 3.00+
  709  */
  710 #define MSR_AMDK8_IPM           0xc0010055
  711 #define AMDK8_SMIONCMPHALT      (1ULL << 27)
  712 #define AMDK8_C1EONCMPHALT      (1ULL << 28)
  713 #define AMDK8_CMPHALT           (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
  714 
  715 static void
  716 cpu_probe_amdc1e(void)
  717 {
  718 
  719         /*
  720          * Detect the presence of C1E capability mostly on latest
  721          * dual-cores (or future) k8 family.
  722          */
  723         if (cpu_vendor_id == CPU_VENDOR_AMD &&
  724             (cpu_id & 0x00000f00) == 0x00000f00 &&
  725             (cpu_id & 0x0fff0000) >=  0x00040000) {
  726                 cpu_ident_amdc1e = 1;
  727         }
  728 }
  729 
  730 void (*cpu_idle_fn)(int) = cpu_idle_acpi;
  731 
  732 void
  733 cpu_idle(int busy)
  734 {
  735         uint64_t msr;
  736 
  737         CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
  738             busy, curcpu);
  739 #ifdef MP_WATCHDOG
  740         ap_watchdog(PCPU_GET(cpuid));
  741 #endif
  742         /* If we are busy - try to use fast methods. */
  743         if (busy) {
  744                 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
  745                         cpu_idle_mwait(busy);
  746                         goto out;
  747                 }
  748         }
  749 
  750         /* If we have time - switch timers into idle mode. */
  751         if (!busy) {
  752                 critical_enter();
  753                 cpu_idleclock();
  754         }
  755 
  756         /* Apply AMD APIC timer C1E workaround. */
  757         if (cpu_ident_amdc1e && cpu_disable_deep_sleep) {
  758                 msr = rdmsr(MSR_AMDK8_IPM);
  759                 if (msr & AMDK8_CMPHALT)
  760                         wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
  761         }
  762 
  763         /* Call main idle method. */
  764         cpu_idle_fn(busy);
  765 
  766         /* Switch timers mack into active mode. */
  767         if (!busy) {
  768                 cpu_activeclock();
  769                 critical_exit();
  770         }
  771 out:
  772         CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
  773             busy, curcpu);
  774 }
  775 
  776 int
  777 cpu_idle_wakeup(int cpu)
  778 {
  779         struct pcpu *pcpu;
  780         int *state;
  781 
  782         pcpu = pcpu_find(cpu);
  783         state = (int *)pcpu->pc_monitorbuf;
  784         /*
  785          * This doesn't need to be atomic since missing the race will
  786          * simply result in unnecessary IPIs.
  787          */
  788         if (*state == STATE_SLEEPING)
  789                 return (0);
  790         if (*state == STATE_MWAIT)
  791                 *state = STATE_RUNNING;
  792         return (1);
  793 }
  794 
  795 /*
  796  * Ordered by speed/power consumption.
  797  */
  798 struct {
  799         void    *id_fn;
  800         char    *id_name;
  801 } idle_tbl[] = {
  802         { cpu_idle_spin, "spin" },
  803         { cpu_idle_mwait, "mwait" },
  804         { cpu_idle_hlt, "hlt" },
  805         { cpu_idle_acpi, "acpi" },
  806         { NULL, NULL }
  807 };
  808 
  809 static int
  810 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
  811 {
  812         char *avail, *p;
  813         int error;
  814         int i;
  815 
  816         avail = malloc(256, M_TEMP, M_WAITOK);
  817         p = avail;
  818         for (i = 0; idle_tbl[i].id_name != NULL; i++) {
  819                 if (strstr(idle_tbl[i].id_name, "mwait") &&
  820                     (cpu_feature2 & CPUID2_MON) == 0)
  821                         continue;
  822                 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
  823                     cpu_idle_hook == NULL)
  824                         continue;
  825                 p += sprintf(p, "%s%s", p != avail ? ", " : "",
  826                     idle_tbl[i].id_name);
  827         }
  828         error = sysctl_handle_string(oidp, avail, 0, req);
  829         free(avail, M_TEMP);
  830         return (error);
  831 }
  832 
  833 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
  834     0, 0, idle_sysctl_available, "A", "list of available idle functions");
  835 
  836 static int
  837 idle_sysctl(SYSCTL_HANDLER_ARGS)
  838 {
  839         char buf[16];
  840         int error;
  841         char *p;
  842         int i;
  843 
  844         p = "unknown";
  845         for (i = 0; idle_tbl[i].id_name != NULL; i++) {
  846                 if (idle_tbl[i].id_fn == cpu_idle_fn) {
  847                         p = idle_tbl[i].id_name;
  848                         break;
  849                 }
  850         }
  851         strncpy(buf, p, sizeof(buf));
  852         error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
  853         if (error != 0 || req->newptr == NULL)
  854                 return (error);
  855         for (i = 0; idle_tbl[i].id_name != NULL; i++) {
  856                 if (strstr(idle_tbl[i].id_name, "mwait") &&
  857                     (cpu_feature2 & CPUID2_MON) == 0)
  858                         continue;
  859                 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
  860                     cpu_idle_hook == NULL)
  861                         continue;
  862                 if (strcmp(idle_tbl[i].id_name, buf))
  863                         continue;
  864                 cpu_idle_fn = idle_tbl[i].id_fn;
  865                 return (0);
  866         }
  867         return (EINVAL);
  868 }
  869 
  870 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
  871     idle_sysctl, "A", "currently selected idle function");
  872 
  873 /*
  874  * Reset registers to default values on exec.
  875  */
  876 void
  877 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
  878 {
  879         struct trapframe *regs = td->td_frame;
  880         struct pcb *pcb = td->td_pcb;
  881 
  882         mtx_lock(&dt_lock);
  883         if (td->td_proc->p_md.md_ldt != NULL)
  884                 user_ldt_free(td);
  885         else
  886                 mtx_unlock(&dt_lock);
  887         
  888         pcb->pcb_fsbase = 0;
  889         pcb->pcb_gsbase = 0;
  890         clear_pcb_flags(pcb, PCB_32BIT | PCB_GS32BIT);
  891         pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
  892         set_pcb_flags(pcb, PCB_FULL_IRET);
  893 
  894         bzero((char *)regs, sizeof(struct trapframe));
  895         regs->tf_rip = imgp->entry_addr;
  896         regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
  897         regs->tf_rdi = stack;           /* argv */
  898         regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
  899         regs->tf_ss = _udatasel;
  900         regs->tf_cs = _ucodesel;
  901         regs->tf_ds = _udatasel;
  902         regs->tf_es = _udatasel;
  903         regs->tf_fs = _ufssel;
  904         regs->tf_gs = _ugssel;
  905         regs->tf_flags = TF_HASSEGS;
  906         td->td_retval[1] = 0;
  907 
  908         /*
  909          * Reset the hardware debug registers if they were in use.
  910          * They won't have any meaning for the newly exec'd process.
  911          */
  912         if (pcb->pcb_flags & PCB_DBREGS) {
  913                 pcb->pcb_dr0 = 0;
  914                 pcb->pcb_dr1 = 0;
  915                 pcb->pcb_dr2 = 0;
  916                 pcb->pcb_dr3 = 0;
  917                 pcb->pcb_dr6 = 0;
  918                 pcb->pcb_dr7 = 0;
  919                 if (pcb == PCPU_GET(curpcb)) {
  920                         /*
  921                          * Clear the debug registers on the running
  922                          * CPU, otherwise they will end up affecting
  923                          * the next process we switch to.
  924                          */
  925                         reset_dbregs();
  926                 }
  927                 clear_pcb_flags(pcb, PCB_DBREGS);
  928         }
  929 
  930         /*
  931          * Drop the FP state if we hold it, so that the process gets a
  932          * clean FP state if it uses the FPU again.
  933          */
  934         fpstate_drop(td);
  935 }
  936 
  937 void
  938 cpu_setregs(void)
  939 {
  940         register_t cr0;
  941 
  942         cr0 = rcr0();
  943         /*
  944          * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
  945          * BSP.  See the comments there about why we set them.
  946          */
  947         cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
  948         load_cr0(cr0);
  949 }
  950 
  951 /*
  952  * Initialize amd64 and configure to run kernel
  953  */
  954 
  955 /*
  956  * Initialize segments & interrupt table
  957  */
  958 
  959 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
  960 static struct gate_descriptor idt0[NIDT];
  961 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
  962 
  963 static char dblfault_stack[PAGE_SIZE] __aligned(16);
  964 
  965 static char nmi0_stack[PAGE_SIZE] __aligned(16);
  966 CTASSERT(sizeof(struct nmi_pcpu) == 16);
  967 
  968 struct amd64tss common_tss[MAXCPU];
  969 
  970 /*
  971  * Software prototypes -- in more palatable form.
  972  *
  973  * Keep GUFS32, GUGS32, GUCODE32 and GUDATA at the same
  974  * slots as corresponding segments for i386 kernel.
  975  */
  976 struct soft_segment_descriptor gdt_segs[] = {
  977 /* GNULL_SEL    0 Null Descriptor */
  978 {       .ssd_base = 0x0,
  979         .ssd_limit = 0x0,
  980         .ssd_type = 0,
  981         .ssd_dpl = 0,
  982         .ssd_p = 0,
  983         .ssd_long = 0,
  984         .ssd_def32 = 0,
  985         .ssd_gran = 0           },
  986 /* GNULL2_SEL   1 Null Descriptor */
  987 {       .ssd_base = 0x0,
  988         .ssd_limit = 0x0,
  989         .ssd_type = 0,
  990         .ssd_dpl = 0,
  991         .ssd_p = 0,
  992         .ssd_long = 0,
  993         .ssd_def32 = 0,
  994         .ssd_gran = 0           },
  995 /* GUFS32_SEL   2 32 bit %gs Descriptor for user */
  996 {       .ssd_base = 0x0,
  997         .ssd_limit = 0xfffff,
  998         .ssd_type = SDT_MEMRWA,
  999         .ssd_dpl = SEL_UPL,
 1000         .ssd_p = 1,
 1001         .ssd_long = 0,
 1002         .ssd_def32 = 1,
 1003         .ssd_gran = 1           },
 1004 /* GUGS32_SEL   3 32 bit %fs Descriptor for user */
 1005 {       .ssd_base = 0x0,
 1006         .ssd_limit = 0xfffff,
 1007         .ssd_type = SDT_MEMRWA,
 1008         .ssd_dpl = SEL_UPL,
 1009         .ssd_p = 1,
 1010         .ssd_long = 0,
 1011         .ssd_def32 = 1,
 1012         .ssd_gran = 1           },
 1013 /* GCODE_SEL    4 Code Descriptor for kernel */
 1014 {       .ssd_base = 0x0,
 1015         .ssd_limit = 0xfffff,
 1016         .ssd_type = SDT_MEMERA,
 1017         .ssd_dpl = SEL_KPL,
 1018         .ssd_p = 1,
 1019         .ssd_long = 1,
 1020         .ssd_def32 = 0,
 1021         .ssd_gran = 1           },
 1022 /* GDATA_SEL    5 Data Descriptor for kernel */
 1023 {       .ssd_base = 0x0,
 1024         .ssd_limit = 0xfffff,
 1025         .ssd_type = SDT_MEMRWA,
 1026         .ssd_dpl = SEL_KPL,
 1027         .ssd_p = 1,
 1028         .ssd_long = 1,
 1029         .ssd_def32 = 0,
 1030         .ssd_gran = 1           },
 1031 /* GUCODE32_SEL 6 32 bit Code Descriptor for user */
 1032 {       .ssd_base = 0x0,
 1033         .ssd_limit = 0xfffff,
 1034         .ssd_type = SDT_MEMERA,
 1035         .ssd_dpl = SEL_UPL,
 1036         .ssd_p = 1,
 1037         .ssd_long = 0,
 1038         .ssd_def32 = 1,
 1039         .ssd_gran = 1           },
 1040 /* GUDATA_SEL   7 32/64 bit Data Descriptor for user */
 1041 {       .ssd_base = 0x0,
 1042         .ssd_limit = 0xfffff,
 1043         .ssd_type = SDT_MEMRWA,
 1044         .ssd_dpl = SEL_UPL,
 1045         .ssd_p = 1,
 1046         .ssd_long = 0,
 1047         .ssd_def32 = 1,
 1048         .ssd_gran = 1           },
 1049 /* GUCODE_SEL   8 64 bit Code Descriptor for user */
 1050 {       .ssd_base = 0x0,
 1051         .ssd_limit = 0xfffff,
 1052         .ssd_type = SDT_MEMERA,
 1053         .ssd_dpl = SEL_UPL,
 1054         .ssd_p = 1,
 1055         .ssd_long = 1,
 1056         .ssd_def32 = 0,
 1057         .ssd_gran = 1           },
 1058 /* GPROC0_SEL   9 Proc 0 Tss Descriptor */
 1059 {       .ssd_base = 0x0,
 1060         .ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1,
 1061         .ssd_type = SDT_SYSTSS,
 1062         .ssd_dpl = SEL_KPL,
 1063         .ssd_p = 1,
 1064         .ssd_long = 0,
 1065         .ssd_def32 = 0,
 1066         .ssd_gran = 0           },
 1067 /* Actually, the TSS is a system descriptor which is double size */
 1068 {       .ssd_base = 0x0,
 1069         .ssd_limit = 0x0,
 1070         .ssd_type = 0,
 1071         .ssd_dpl = 0,
 1072         .ssd_p = 0,
 1073         .ssd_long = 0,
 1074         .ssd_def32 = 0,
 1075         .ssd_gran = 0           },
 1076 /* GUSERLDT_SEL 11 LDT Descriptor */
 1077 {       .ssd_base = 0x0,
 1078         .ssd_limit = 0x0,
 1079         .ssd_type = 0,
 1080         .ssd_dpl = 0,
 1081         .ssd_p = 0,
 1082         .ssd_long = 0,
 1083         .ssd_def32 = 0,
 1084         .ssd_gran = 0           },
 1085 /* GUSERLDT_SEL 12 LDT Descriptor, double size */
 1086 {       .ssd_base = 0x0,
 1087         .ssd_limit = 0x0,
 1088         .ssd_type = 0,
 1089         .ssd_dpl = 0,
 1090         .ssd_p = 0,
 1091         .ssd_long = 0,
 1092         .ssd_def32 = 0,
 1093         .ssd_gran = 0           },
 1094 };
 1095 
 1096 void
 1097 setidt(idx, func, typ, dpl, ist)
 1098         int idx;
 1099         inthand_t *func;
 1100         int typ;
 1101         int dpl;
 1102         int ist;
 1103 {
 1104         struct gate_descriptor *ip;
 1105 
 1106         ip = idt + idx;
 1107         ip->gd_looffset = (uintptr_t)func;
 1108         ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
 1109         ip->gd_ist = ist;
 1110         ip->gd_xx = 0;
 1111         ip->gd_type = typ;
 1112         ip->gd_dpl = dpl;
 1113         ip->gd_p = 1;
 1114         ip->gd_hioffset = ((uintptr_t)func)>>16 ;
 1115 }
 1116 
 1117 extern inthand_t
 1118         IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
 1119         IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
 1120         IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
 1121         IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
 1122         IDTVEC(xmm), IDTVEC(dblfault),
 1123 #ifdef KDTRACE_HOOKS
 1124         IDTVEC(dtrace_ret),
 1125 #endif
 1126         IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
 1127 
 1128 #ifdef DDB
 1129 /*
 1130  * Display the index and function name of any IDT entries that don't use
 1131  * the default 'rsvd' entry point.
 1132  */
 1133 DB_SHOW_COMMAND(idt, db_show_idt)
 1134 {
 1135         struct gate_descriptor *ip;
 1136         int idx;
 1137         uintptr_t func;
 1138 
 1139         ip = idt;
 1140         for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
 1141                 func = ((long)ip->gd_hioffset << 16 | ip->gd_looffset);
 1142                 if (func != (uintptr_t)&IDTVEC(rsvd)) {
 1143                         db_printf("%3d\t", idx);
 1144                         db_printsym(func, DB_STGY_PROC);
 1145                         db_printf("\n");
 1146                 }
 1147                 ip++;
 1148         }
 1149 }
 1150 #endif
 1151 
 1152 void
 1153 sdtossd(sd, ssd)
 1154         struct user_segment_descriptor *sd;
 1155         struct soft_segment_descriptor *ssd;
 1156 {
 1157 
 1158         ssd->ssd_base  = (sd->sd_hibase << 24) | sd->sd_lobase;
 1159         ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
 1160         ssd->ssd_type  = sd->sd_type;
 1161         ssd->ssd_dpl   = sd->sd_dpl;
 1162         ssd->ssd_p     = sd->sd_p;
 1163         ssd->ssd_long  = sd->sd_long;
 1164         ssd->ssd_def32 = sd->sd_def32;
 1165         ssd->ssd_gran  = sd->sd_gran;
 1166 }
 1167 
 1168 void
 1169 ssdtosd(ssd, sd)
 1170         struct soft_segment_descriptor *ssd;
 1171         struct user_segment_descriptor *sd;
 1172 {
 1173 
 1174         sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
 1175         sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
 1176         sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
 1177         sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
 1178         sd->sd_type  = ssd->ssd_type;
 1179         sd->sd_dpl   = ssd->ssd_dpl;
 1180         sd->sd_p     = ssd->ssd_p;
 1181         sd->sd_long  = ssd->ssd_long;
 1182         sd->sd_def32 = ssd->ssd_def32;
 1183         sd->sd_gran  = ssd->ssd_gran;
 1184 }
 1185 
 1186 void
 1187 ssdtosyssd(ssd, sd)
 1188         struct soft_segment_descriptor *ssd;
 1189         struct system_segment_descriptor *sd;
 1190 {
 1191 
 1192         sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
 1193         sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
 1194         sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
 1195         sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
 1196         sd->sd_type  = ssd->ssd_type;
 1197         sd->sd_dpl   = ssd->ssd_dpl;
 1198         sd->sd_p     = ssd->ssd_p;
 1199         sd->sd_gran  = ssd->ssd_gran;
 1200 }
 1201 
 1202 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
 1203 #include <isa/isavar.h>
 1204 #include <isa/isareg.h>
 1205 /*
 1206  * Return a bitmap of the current interrupt requests.  This is 8259-specific
 1207  * and is only suitable for use at probe time.
 1208  * This is only here to pacify sio.  It is NOT FATAL if this doesn't work.
 1209  * It shouldn't be here.  There should probably be an APIC centric
 1210  * implementation in the apic driver code, if at all.
 1211  */
 1212 intrmask_t
 1213 isa_irq_pending(void)
 1214 {
 1215         u_char irr1;
 1216         u_char irr2;
 1217 
 1218         irr1 = inb(IO_ICU1);
 1219         irr2 = inb(IO_ICU2);
 1220         return ((irr2 << 8) | irr1);
 1221 }
 1222 #endif
 1223 
 1224 u_int basemem;
 1225 
 1226 static int
 1227 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
 1228 {
 1229         int i, insert_idx, physmap_idx;
 1230 
 1231         physmap_idx = *physmap_idxp;
 1232 
 1233         if (boothowto & RB_VERBOSE)
 1234                 printf("SMAP type=%02x base=%016lx len=%016lx\n",
 1235                     smap->type, smap->base, smap->length);
 1236 
 1237         if (smap->type != SMAP_TYPE_MEMORY)
 1238                 return (1);
 1239 
 1240         if (smap->length == 0)
 1241                 return (0);
 1242 
 1243         /*
 1244          * Find insertion point while checking for overlap.  Start off by
 1245          * assuming the new entry will be added to the end.
 1246          */
 1247         insert_idx = physmap_idx + 2;
 1248         for (i = 0; i <= physmap_idx; i += 2) {
 1249                 if (smap->base < physmap[i + 1]) {
 1250                         if (smap->base + smap->length <= physmap[i]) {
 1251                                 insert_idx = i;
 1252                                 break;
 1253                         }
 1254                         if (boothowto & RB_VERBOSE)
 1255                                 printf(
 1256                     "Overlapping memory regions, ignoring second region\n");
 1257                         return (1);
 1258                 }
 1259         }
 1260 
 1261         /* See if we can prepend to the next entry. */
 1262         if (insert_idx <= physmap_idx &&
 1263             smap->base + smap->length == physmap[insert_idx]) {
 1264                 physmap[insert_idx] = smap->base;
 1265                 return (1);
 1266         }
 1267 
 1268         /* See if we can append to the previous entry. */
 1269         if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) {
 1270                 physmap[insert_idx - 1] += smap->length;
 1271                 return (1);
 1272         }
 1273 
 1274         physmap_idx += 2;
 1275         *physmap_idxp = physmap_idx;
 1276         if (physmap_idx == PHYSMAP_SIZE) {
 1277                 printf(
 1278                 "Too many segments in the physical address map, giving up\n");
 1279                 return (0);
 1280         }
 1281 
 1282         /*
 1283          * Move the last 'N' entries down to make room for the new
 1284          * entry if needed.
 1285          */
 1286         for (i = physmap_idx; i > insert_idx; i -= 2) {
 1287                 physmap[i] = physmap[i - 2];
 1288                 physmap[i + 1] = physmap[i - 1];
 1289         }
 1290 
 1291         /* Insert the new entry. */
 1292         physmap[insert_idx] = smap->base;
 1293         physmap[insert_idx + 1] = smap->base + smap->length;
 1294         return (1);
 1295 }
 1296 
 1297 /*
 1298  * Populate the (physmap) array with base/bound pairs describing the
 1299  * available physical memory in the system, then test this memory and
 1300  * build the phys_avail array describing the actually-available memory.
 1301  *
 1302  * Total memory size may be set by the kernel environment variable
 1303  * hw.physmem or the compile-time define MAXMEM.
 1304  *
 1305  * XXX first should be vm_paddr_t.
 1306  */
 1307 static void
 1308 getmemsize(caddr_t kmdp, u_int64_t first)
 1309 {
 1310         int i, physmap_idx, pa_indx, da_indx;
 1311         vm_paddr_t pa, physmap[PHYSMAP_SIZE];
 1312         u_long physmem_tunable, memtest;
 1313         pt_entry_t *pte;
 1314         struct bios_smap *smapbase, *smap, *smapend;
 1315         u_int32_t smapsize;
 1316         quad_t dcons_addr, dcons_size;
 1317 
 1318         bzero(physmap, sizeof(physmap));
 1319         basemem = 0;
 1320         physmap_idx = 0;
 1321 
 1322         /*
 1323          * get memory map from INT 15:E820, kindly supplied by the loader.
 1324          *
 1325          * subr_module.c says:
 1326          * "Consumer may safely assume that size value precedes data."
 1327          * ie: an int32_t immediately precedes smap.
 1328          */
 1329         smapbase = (struct bios_smap *)preload_search_info(kmdp,
 1330             MODINFO_METADATA | MODINFOMD_SMAP);
 1331         if (smapbase == NULL)
 1332                 panic("No BIOS smap info from loader!");
 1333 
 1334         smapsize = *((u_int32_t *)smapbase - 1);
 1335         smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
 1336 
 1337         for (smap = smapbase; smap < smapend; smap++)
 1338                 if (!add_smap_entry(smap, physmap, &physmap_idx))
 1339                         break;
 1340 
 1341         /*
 1342          * Find the 'base memory' segment for SMP
 1343          */
 1344         basemem = 0;
 1345         for (i = 0; i <= physmap_idx; i += 2) {
 1346                 if (physmap[i] == 0x00000000) {
 1347                         basemem = physmap[i + 1] / 1024;
 1348                         break;
 1349                 }
 1350         }
 1351         if (basemem == 0)
 1352                 panic("BIOS smap did not include a basemem segment!");
 1353 
 1354 #ifdef SMP
 1355         /* make hole for AP bootstrap code */
 1356         physmap[1] = mp_bootaddress(physmap[1] / 1024);
 1357 #endif
 1358 
 1359         /*
 1360          * Maxmem isn't the "maximum memory", it's one larger than the
 1361          * highest page of the physical address space.  It should be
 1362          * called something like "Maxphyspage".  We may adjust this
 1363          * based on ``hw.physmem'' and the results of the memory test.
 1364          */
 1365         Maxmem = atop(physmap[physmap_idx + 1]);
 1366 
 1367 #ifdef MAXMEM
 1368         Maxmem = MAXMEM / 4;
 1369 #endif
 1370 
 1371         if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
 1372                 Maxmem = atop(physmem_tunable);
 1373 
 1374         /*
 1375          * By default keep the memtest enabled.  Use a general name so that
 1376          * one could eventually do more with the code than just disable it.
 1377          */
 1378         memtest = 1;
 1379         TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
 1380 
 1381         /*
 1382          * Don't allow MAXMEM or hw.physmem to extend the amount of memory
 1383          * in the system.
 1384          */
 1385         if (Maxmem > atop(physmap[physmap_idx + 1]))
 1386                 Maxmem = atop(physmap[physmap_idx + 1]);
 1387 
 1388         if (atop(physmap[physmap_idx + 1]) != Maxmem &&
 1389             (boothowto & RB_VERBOSE))
 1390                 printf("Physical memory use set to %ldK\n", Maxmem * 4);
 1391 
 1392         /* call pmap initialization to make new kernel address space */
 1393         pmap_bootstrap(&first);
 1394 
 1395         /*
 1396          * Size up each available chunk of physical memory.
 1397          */
 1398         physmap[0] = PAGE_SIZE;         /* mask off page 0 */
 1399         pa_indx = 0;
 1400         da_indx = 1;
 1401         phys_avail[pa_indx++] = physmap[0];
 1402         phys_avail[pa_indx] = physmap[0];
 1403         dump_avail[da_indx] = physmap[0];
 1404         pte = CMAP1;
 1405 
 1406         /*
 1407          * Get dcons buffer address
 1408          */
 1409         if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
 1410             getenv_quad("dcons.size", &dcons_size) == 0)
 1411                 dcons_addr = 0;
 1412 
 1413         /*
 1414          * physmap is in bytes, so when converting to page boundaries,
 1415          * round up the start address and round down the end address.
 1416          */
 1417         for (i = 0; i <= physmap_idx; i += 2) {
 1418                 vm_paddr_t end;
 1419 
 1420                 end = ptoa((vm_paddr_t)Maxmem);
 1421                 if (physmap[i + 1] < end)
 1422                         end = trunc_page(physmap[i + 1]);
 1423                 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
 1424                         int tmp, page_bad, full;
 1425                         int *ptr = (int *)CADDR1;
 1426 
 1427                         full = FALSE;
 1428                         /*
 1429                          * block out kernel memory as not available.
 1430                          */
 1431                         if (pa >= (vm_paddr_t)kernphys && pa < first)
 1432                                 goto do_dump_avail;
 1433 
 1434                         /*
 1435                          * block out dcons buffer
 1436                          */
 1437                         if (dcons_addr > 0
 1438                             && pa >= trunc_page(dcons_addr)
 1439                             && pa < dcons_addr + dcons_size)
 1440                                 goto do_dump_avail;
 1441 
 1442                         page_bad = FALSE;
 1443                         if (memtest == 0)
 1444                                 goto skip_memtest;
 1445 
 1446                         /*
 1447                          * map page into kernel: valid, read/write,non-cacheable
 1448                          */
 1449                         *pte = pa | PG_V | PG_RW | PG_N;
 1450                         invltlb();
 1451 
 1452                         tmp = *(int *)ptr;
 1453                         /*
 1454                          * Test for alternating 1's and 0's
 1455                          */
 1456                         *(volatile int *)ptr = 0xaaaaaaaa;
 1457                         if (*(volatile int *)ptr != 0xaaaaaaaa)
 1458                                 page_bad = TRUE;
 1459                         /*
 1460                          * Test for alternating 0's and 1's
 1461                          */
 1462                         *(volatile int *)ptr = 0x55555555;
 1463                         if (*(volatile int *)ptr != 0x55555555)
 1464                                 page_bad = TRUE;
 1465                         /*
 1466                          * Test for all 1's
 1467                          */
 1468                         *(volatile int *)ptr = 0xffffffff;
 1469                         if (*(volatile int *)ptr != 0xffffffff)
 1470                                 page_bad = TRUE;
 1471                         /*
 1472                          * Test for all 0's
 1473                          */
 1474                         *(volatile int *)ptr = 0x0;
 1475                         if (*(volatile int *)ptr != 0x0)
 1476                                 page_bad = TRUE;
 1477                         /*
 1478                          * Restore original value.
 1479                          */
 1480                         *(int *)ptr = tmp;
 1481 
 1482 skip_memtest:
 1483                         /*
 1484                          * Adjust array of valid/good pages.
 1485                          */
 1486                         if (page_bad == TRUE)
 1487                                 continue;
 1488                         /*
 1489                          * If this good page is a continuation of the
 1490                          * previous set of good pages, then just increase
 1491                          * the end pointer. Otherwise start a new chunk.
 1492                          * Note that "end" points one higher than end,
 1493                          * making the range >= start and < end.
 1494                          * If we're also doing a speculative memory
 1495                          * test and we at or past the end, bump up Maxmem
 1496                          * so that we keep going. The first bad page
 1497                          * will terminate the loop.
 1498                          */
 1499                         if (phys_avail[pa_indx] == pa) {
 1500                                 phys_avail[pa_indx] += PAGE_SIZE;
 1501                         } else {
 1502                                 pa_indx++;
 1503                                 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
 1504                                         printf(
 1505                 "Too many holes in the physical address space, giving up\n");
 1506                                         pa_indx--;
 1507                                         full = TRUE;
 1508                                         goto do_dump_avail;
 1509                                 }
 1510                                 phys_avail[pa_indx++] = pa;     /* start */
 1511                                 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
 1512                         }
 1513                         physmem++;
 1514 do_dump_avail:
 1515                         if (dump_avail[da_indx] == pa) {
 1516                                 dump_avail[da_indx] += PAGE_SIZE;
 1517                         } else {
 1518                                 da_indx++;
 1519                                 if (da_indx == DUMP_AVAIL_ARRAY_END) {
 1520                                         da_indx--;
 1521                                         goto do_next;
 1522                                 }
 1523                                 dump_avail[da_indx++] = pa; /* start */
 1524                                 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
 1525                         }
 1526 do_next:
 1527                         if (full)
 1528                                 break;
 1529                 }
 1530         }
 1531         *pte = 0;
 1532         invltlb();
 1533 
 1534         /*
 1535          * XXX
 1536          * The last chunk must contain at least one page plus the message
 1537          * buffer to avoid complicating other code (message buffer address
 1538          * calculation, etc.).
 1539          */
 1540         while (phys_avail[pa_indx - 1] + PAGE_SIZE +
 1541             round_page(msgbufsize) >= phys_avail[pa_indx]) {
 1542                 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
 1543                 phys_avail[pa_indx--] = 0;
 1544                 phys_avail[pa_indx--] = 0;
 1545         }
 1546 
 1547         Maxmem = atop(phys_avail[pa_indx]);
 1548 
 1549         /* Trim off space for the message buffer. */
 1550         phys_avail[pa_indx] -= round_page(msgbufsize);
 1551 
 1552         /* Map the message buffer. */
 1553         msgbufp = (struct msgbuf *)PHYS_TO_DMAP(phys_avail[pa_indx]);
 1554 }
 1555 
 1556 u_int64_t
 1557 hammer_time(u_int64_t modulep, u_int64_t physfree)
 1558 {
 1559         caddr_t kmdp;
 1560         int gsel_tss, x;
 1561         struct pcpu *pc;
 1562         struct nmi_pcpu *np;
 1563         u_int64_t msr;
 1564         char *env;
 1565         size_t kstack0_sz;
 1566 
 1567         thread0.td_kstack = physfree + KERNBASE;
 1568         thread0.td_kstack_pages = KSTACK_PAGES;
 1569         kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
 1570         bzero((void *)thread0.td_kstack, kstack0_sz);
 1571         physfree += kstack0_sz;
 1572         thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
 1573 
 1574         /*
 1575          * This may be done better later if it gets more high level
 1576          * components in it. If so just link td->td_proc here.
 1577          */
 1578         proc_linkup0(&proc0, &thread0);
 1579 
 1580         preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
 1581         preload_bootstrap_relocate(KERNBASE);
 1582         kmdp = preload_search_by_type("elf kernel");
 1583         if (kmdp == NULL)
 1584                 kmdp = preload_search_by_type("elf64 kernel");
 1585         boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
 1586         kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE;
 1587 #ifdef DDB
 1588         ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
 1589         ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
 1590 #endif
 1591 
 1592         /* Init basic tunables, hz etc */
 1593         init_param1();
 1594 
 1595         /*
 1596          * make gdt memory segments
 1597          */
 1598         for (x = 0; x < NGDT; x++) {
 1599                 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1) &&
 1600                     x != GUSERLDT_SEL && x != (GUSERLDT_SEL) + 1)
 1601                         ssdtosd(&gdt_segs[x], &gdt[x]);
 1602         }
 1603         gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
 1604         ssdtosyssd(&gdt_segs[GPROC0_SEL],
 1605             (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
 1606 
 1607         r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
 1608         r_gdt.rd_base =  (long) gdt;
 1609         lgdt(&r_gdt);
 1610         pc = &__pcpu[0];
 1611 
 1612         wrmsr(MSR_FSBASE, 0);           /* User value */
 1613         wrmsr(MSR_GSBASE, (u_int64_t)pc);
 1614         wrmsr(MSR_KGSBASE, 0);          /* User value while in the kernel */
 1615 
 1616         pcpu_init(pc, 0, sizeof(struct pcpu));
 1617         dpcpu_init((void *)(physfree + KERNBASE), 0);
 1618         physfree += DPCPU_SIZE;
 1619         PCPU_SET(prvspace, pc);
 1620         PCPU_SET(curthread, &thread0);
 1621         PCPU_SET(curpcb, thread0.td_pcb);
 1622         PCPU_SET(tssp, &common_tss[0]);
 1623         PCPU_SET(commontssp, &common_tss[0]);
 1624         PCPU_SET(tss, (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
 1625         PCPU_SET(ldt, (struct system_segment_descriptor *)&gdt[GUSERLDT_SEL]);
 1626         PCPU_SET(fs32p, &gdt[GUFS32_SEL]);
 1627         PCPU_SET(gs32p, &gdt[GUGS32_SEL]);
 1628 
 1629         /*
 1630          * Initialize mutexes.
 1631          *
 1632          * icu_lock: in order to allow an interrupt to occur in a critical
 1633          *           section, to set pcpu->ipending (etc...) properly, we
 1634          *           must be able to get the icu lock, so it can't be
 1635          *           under witness.
 1636          */
 1637         mutex_init();
 1638         mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
 1639         mtx_init(&dt_lock, "descriptor tables", NULL, MTX_DEF);
 1640 
 1641         /* exceptions */
 1642         for (x = 0; x < NIDT; x++)
 1643                 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
 1644         setidt(IDT_DE, &IDTVEC(div),  SDT_SYSIGT, SEL_KPL, 0);
 1645         setidt(IDT_DB, &IDTVEC(dbg),  SDT_SYSIGT, SEL_KPL, 0);
 1646         setidt(IDT_NMI, &IDTVEC(nmi),  SDT_SYSIGT, SEL_KPL, 2);
 1647         setidt(IDT_BP, &IDTVEC(bpt),  SDT_SYSIGT, SEL_UPL, 0);
 1648         setidt(IDT_OF, &IDTVEC(ofl),  SDT_SYSIGT, SEL_KPL, 0);
 1649         setidt(IDT_BR, &IDTVEC(bnd),  SDT_SYSIGT, SEL_KPL, 0);
 1650         setidt(IDT_UD, &IDTVEC(ill),  SDT_SYSIGT, SEL_KPL, 0);
 1651         setidt(IDT_NM, &IDTVEC(dna),  SDT_SYSIGT, SEL_KPL, 0);
 1652         setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
 1653         setidt(IDT_FPUGP, &IDTVEC(fpusegm),  SDT_SYSIGT, SEL_KPL, 0);
 1654         setidt(IDT_TS, &IDTVEC(tss),  SDT_SYSIGT, SEL_KPL, 0);
 1655         setidt(IDT_NP, &IDTVEC(missing),  SDT_SYSIGT, SEL_KPL, 0);
 1656         setidt(IDT_SS, &IDTVEC(stk),  SDT_SYSIGT, SEL_KPL, 0);
 1657         setidt(IDT_GP, &IDTVEC(prot),  SDT_SYSIGT, SEL_KPL, 0);
 1658         setidt(IDT_PF, &IDTVEC(page),  SDT_SYSIGT, SEL_KPL, 0);
 1659         setidt(IDT_MF, &IDTVEC(fpu),  SDT_SYSIGT, SEL_KPL, 0);
 1660         setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
 1661         setidt(IDT_MC, &IDTVEC(mchk),  SDT_SYSIGT, SEL_KPL, 0);
 1662         setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
 1663 #ifdef KDTRACE_HOOKS
 1664         setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYSIGT, SEL_UPL, 0);
 1665 #endif
 1666 
 1667         r_idt.rd_limit = sizeof(idt0) - 1;
 1668         r_idt.rd_base = (long) idt;
 1669         lidt(&r_idt);
 1670 
 1671         /*
 1672          * Initialize the i8254 before the console so that console
 1673          * initialization can use DELAY().
 1674          */
 1675         i8254_init();
 1676 
 1677         /*
 1678          * Initialize the console before we print anything out.
 1679          */
 1680         cninit();
 1681 
 1682 #ifdef DEV_ISA
 1683 #ifdef DEV_ATPIC
 1684         elcr_probe();
 1685         atpic_startup();
 1686 #else
 1687         /* Reset and mask the atpics and leave them shut down. */
 1688         atpic_reset();
 1689 
 1690         /*
 1691          * Point the ICU spurious interrupt vectors at the APIC spurious
 1692          * interrupt handler.
 1693          */
 1694         setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
 1695         setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
 1696 #endif
 1697 #else
 1698 #error "have you forgotten the isa device?";
 1699 #endif
 1700 
 1701         kdb_init();
 1702 
 1703 #ifdef KDB
 1704         if (boothowto & RB_KDB)
 1705                 kdb_enter(KDB_WHY_BOOTFLAGS,
 1706                     "Boot flags requested debugger");
 1707 #endif
 1708 
 1709         identify_cpu();         /* Final stage of CPU initialization */
 1710         initializecpu();        /* Initialize CPU registers */
 1711         initializecpucache();
 1712 
 1713         /* make an initial tss so cpu can get interrupt stack on syscall! */
 1714         common_tss[0].tss_rsp0 = thread0.td_kstack +
 1715             kstack0_sz - sizeof(struct pcb);
 1716         /* Ensure the stack is aligned to 16 bytes */
 1717         common_tss[0].tss_rsp0 &= ~0xFul;
 1718         PCPU_SET(rsp0, common_tss[0].tss_rsp0);
 1719 
 1720         /* doublefault stack space, runs on ist1 */
 1721         common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
 1722 
 1723         /*
 1724          * NMI stack, runs on ist2.  The pcpu pointer is stored just
 1725          * above the start of the ist2 stack.
 1726          */
 1727         np = ((struct nmi_pcpu *) &nmi0_stack[sizeof(nmi0_stack)]) - 1;
 1728         np->np_pcpu = (register_t) pc;
 1729         common_tss[0].tss_ist2 = (long) np;
 1730 
 1731         /* Set the IO permission bitmap (empty due to tss seg limit) */
 1732         common_tss[0].tss_iobase = sizeof(struct amd64tss) +
 1733             IOPAGES * PAGE_SIZE;
 1734 
 1735         gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
 1736         ltr(gsel_tss);
 1737 
 1738         /* Set up the fast syscall stuff */
 1739         msr = rdmsr(MSR_EFER) | EFER_SCE;
 1740         wrmsr(MSR_EFER, msr);
 1741         wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
 1742         wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
 1743         msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
 1744               ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
 1745         wrmsr(MSR_STAR, msr);
 1746         wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
 1747 
 1748         getmemsize(kmdp, physfree);
 1749         init_param2(physmem);
 1750 
 1751         /* now running on new page tables, configured,and u/iom is accessible */
 1752 
 1753         msgbufinit(msgbufp, msgbufsize);
 1754         fpuinit();
 1755 
 1756         /* transfer to user mode */
 1757 
 1758         _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
 1759         _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
 1760         _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
 1761         _ufssel = GSEL(GUFS32_SEL, SEL_UPL);
 1762         _ugssel = GSEL(GUGS32_SEL, SEL_UPL);
 1763 
 1764         load_ds(_udatasel);
 1765         load_es(_udatasel);
 1766         load_fs(_ufssel);
 1767 
 1768         /* setup proc 0's pcb */
 1769         thread0.td_pcb->pcb_flags = 0;
 1770         thread0.td_pcb->pcb_cr3 = KPML4phys;
 1771         thread0.td_frame = &proc0_tf;
 1772 
 1773         env = getenv("kernelname");
 1774         if (env != NULL)
 1775                 strlcpy(kernelname, env, sizeof(kernelname));
 1776 
 1777 #ifdef XENHVM
 1778         if (inw(0x10) == 0x49d2) {
 1779                 if (bootverbose)
 1780                         printf("Xen detected: disabling emulated block and network devices\n");
 1781                 outw(0x10, 3);
 1782         }
 1783 #endif
 1784 
 1785         cpu_probe_amdc1e();
 1786 
 1787         /* Location of kernel stack for locore */
 1788         return ((u_int64_t)thread0.td_pcb);
 1789 }
 1790 
 1791 void
 1792 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
 1793 {
 1794 
 1795         pcpu->pc_acpi_id = 0xffffffff;
 1796 }
 1797 
 1798 void
 1799 spinlock_enter(void)
 1800 {
 1801         struct thread *td;
 1802         register_t flags;
 1803 
 1804         td = curthread;
 1805         if (td->td_md.md_spinlock_count == 0) {
 1806                 flags = intr_disable();
 1807                 td->td_md.md_spinlock_count = 1;
 1808                 td->td_md.md_saved_flags = flags;
 1809         } else
 1810                 td->td_md.md_spinlock_count++;
 1811         critical_enter();
 1812 }
 1813 
 1814 void
 1815 spinlock_exit(void)
 1816 {
 1817         struct thread *td;
 1818         register_t flags;
 1819 
 1820         td = curthread;
 1821         critical_exit();
 1822         flags = td->td_md.md_saved_flags;
 1823         td->td_md.md_spinlock_count--;
 1824         if (td->td_md.md_spinlock_count == 0)
 1825                 intr_restore(flags);
 1826 }
 1827 
 1828 /*
 1829  * Construct a PCB from a trapframe. This is called from kdb_trap() where
 1830  * we want to start a backtrace from the function that caused us to enter
 1831  * the debugger. We have the context in the trapframe, but base the trace
 1832  * on the PCB. The PCB doesn't have to be perfect, as long as it contains
 1833  * enough for a backtrace.
 1834  */
 1835 void
 1836 makectx(struct trapframe *tf, struct pcb *pcb)
 1837 {
 1838 
 1839         pcb->pcb_r12 = tf->tf_r12;
 1840         pcb->pcb_r13 = tf->tf_r13;
 1841         pcb->pcb_r14 = tf->tf_r14;
 1842         pcb->pcb_r15 = tf->tf_r15;
 1843         pcb->pcb_rbp = tf->tf_rbp;
 1844         pcb->pcb_rbx = tf->tf_rbx;
 1845         pcb->pcb_rip = tf->tf_rip;
 1846         pcb->pcb_rsp = tf->tf_rsp;
 1847 }
 1848 
 1849 int
 1850 ptrace_set_pc(struct thread *td, unsigned long addr)
 1851 {
 1852         td->td_frame->tf_rip = addr;
 1853         return (0);
 1854 }
 1855 
 1856 int
 1857 ptrace_single_step(struct thread *td)
 1858 {
 1859         td->td_frame->tf_rflags |= PSL_T;
 1860         return (0);
 1861 }
 1862 
 1863 int
 1864 ptrace_clear_single_step(struct thread *td)
 1865 {
 1866         td->td_frame->tf_rflags &= ~PSL_T;
 1867         return (0);
 1868 }
 1869 
 1870 int
 1871 fill_regs(struct thread *td, struct reg *regs)
 1872 {
 1873         struct trapframe *tp;
 1874 
 1875         tp = td->td_frame;
 1876         return (fill_frame_regs(tp, regs));
 1877 }
 1878 
 1879 int
 1880 fill_frame_regs(struct trapframe *tp, struct reg *regs)
 1881 {
 1882         regs->r_r15 = tp->tf_r15;
 1883         regs->r_r14 = tp->tf_r14;
 1884         regs->r_r13 = tp->tf_r13;
 1885         regs->r_r12 = tp->tf_r12;
 1886         regs->r_r11 = tp->tf_r11;
 1887         regs->r_r10 = tp->tf_r10;
 1888         regs->r_r9  = tp->tf_r9;
 1889         regs->r_r8  = tp->tf_r8;
 1890         regs->r_rdi = tp->tf_rdi;
 1891         regs->r_rsi = tp->tf_rsi;
 1892         regs->r_rbp = tp->tf_rbp;
 1893         regs->r_rbx = tp->tf_rbx;
 1894         regs->r_rdx = tp->tf_rdx;
 1895         regs->r_rcx = tp->tf_rcx;
 1896         regs->r_rax = tp->tf_rax;
 1897         regs->r_rip = tp->tf_rip;
 1898         regs->r_cs = tp->tf_cs;
 1899         regs->r_rflags = tp->tf_rflags;
 1900         regs->r_rsp = tp->tf_rsp;
 1901         regs->r_ss = tp->tf_ss;
 1902         if (tp->tf_flags & TF_HASSEGS) {
 1903                 regs->r_ds = tp->tf_ds;
 1904                 regs->r_es = tp->tf_es;
 1905                 regs->r_fs = tp->tf_fs;
 1906                 regs->r_gs = tp->tf_gs;
 1907         } else {
 1908                 regs->r_ds = 0;
 1909                 regs->r_es = 0;
 1910                 regs->r_fs = 0;
 1911                 regs->r_gs = 0;
 1912         }
 1913         return (0);
 1914 }
 1915 
 1916 int
 1917 set_regs(struct thread *td, struct reg *regs)
 1918 {
 1919         struct trapframe *tp;
 1920         register_t rflags;
 1921 
 1922         tp = td->td_frame;
 1923         rflags = regs->r_rflags & 0xffffffff;
 1924         if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
 1925                 return (EINVAL);
 1926         tp->tf_r15 = regs->r_r15;
 1927         tp->tf_r14 = regs->r_r14;
 1928         tp->tf_r13 = regs->r_r13;
 1929         tp->tf_r12 = regs->r_r12;
 1930         tp->tf_r11 = regs->r_r11;
 1931         tp->tf_r10 = regs->r_r10;
 1932         tp->tf_r9  = regs->r_r9;
 1933         tp->tf_r8  = regs->r_r8;
 1934         tp->tf_rdi = regs->r_rdi;
 1935         tp->tf_rsi = regs->r_rsi;
 1936         tp->tf_rbp = regs->r_rbp;
 1937         tp->tf_rbx = regs->r_rbx;
 1938         tp->tf_rdx = regs->r_rdx;
 1939         tp->tf_rcx = regs->r_rcx;
 1940         tp->tf_rax = regs->r_rax;
 1941         tp->tf_rip = regs->r_rip;
 1942         tp->tf_cs = regs->r_cs;
 1943         tp->tf_rflags = rflags;
 1944         tp->tf_rsp = regs->r_rsp;
 1945         tp->tf_ss = regs->r_ss;
 1946         if (0) {        /* XXXKIB */
 1947                 tp->tf_ds = regs->r_ds;
 1948                 tp->tf_es = regs->r_es;
 1949                 tp->tf_fs = regs->r_fs;
 1950                 tp->tf_gs = regs->r_gs;
 1951                 tp->tf_flags = TF_HASSEGS;
 1952                 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
 1953         }
 1954         return (0);
 1955 }
 1956 
 1957 /* XXX check all this stuff! */
 1958 /* externalize from sv_xmm */
 1959 static void
 1960 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
 1961 {
 1962         struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
 1963         struct envxmm *penv_xmm = &sv_xmm->sv_env;
 1964         int i;
 1965 
 1966         /* pcb -> fpregs */
 1967         bzero(fpregs, sizeof(*fpregs));
 1968 
 1969         /* FPU control/status */
 1970         penv_fpreg->en_cw = penv_xmm->en_cw;
 1971         penv_fpreg->en_sw = penv_xmm->en_sw;
 1972         penv_fpreg->en_tw = penv_xmm->en_tw;
 1973         penv_fpreg->en_opcode = penv_xmm->en_opcode;
 1974         penv_fpreg->en_rip = penv_xmm->en_rip;
 1975         penv_fpreg->en_rdp = penv_xmm->en_rdp;
 1976         penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
 1977         penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
 1978 
 1979         /* FPU registers */
 1980         for (i = 0; i < 8; ++i)
 1981                 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
 1982 
 1983         /* SSE registers */
 1984         for (i = 0; i < 16; ++i)
 1985                 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
 1986 }
 1987 
 1988 /* internalize from fpregs into sv_xmm */
 1989 static void
 1990 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
 1991 {
 1992         struct envxmm *penv_xmm = &sv_xmm->sv_env;
 1993         struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
 1994         int i;
 1995 
 1996         /* fpregs -> pcb */
 1997         /* FPU control/status */
 1998         penv_xmm->en_cw = penv_fpreg->en_cw;
 1999         penv_xmm->en_sw = penv_fpreg->en_sw;
 2000         penv_xmm->en_tw = penv_fpreg->en_tw;
 2001         penv_xmm->en_opcode = penv_fpreg->en_opcode;
 2002         penv_xmm->en_rip = penv_fpreg->en_rip;
 2003         penv_xmm->en_rdp = penv_fpreg->en_rdp;
 2004         penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
 2005         penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
 2006 
 2007         /* FPU registers */
 2008         for (i = 0; i < 8; ++i)
 2009                 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
 2010 
 2011         /* SSE registers */
 2012         for (i = 0; i < 16; ++i)
 2013                 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
 2014 }
 2015 
 2016 /* externalize from td->pcb */
 2017 int
 2018 fill_fpregs(struct thread *td, struct fpreg *fpregs)
 2019 {
 2020 
 2021         KASSERT(td == curthread || TD_IS_SUSPENDED(td),
 2022             ("not suspended thread %p", td));
 2023         fpugetregs(td);
 2024         fill_fpregs_xmm(&td->td_pcb->pcb_user_save, fpregs);
 2025         return (0);
 2026 }
 2027 
 2028 /* internalize to td->pcb */
 2029 int
 2030 set_fpregs(struct thread *td, struct fpreg *fpregs)
 2031 {
 2032 
 2033         set_fpregs_xmm(fpregs, &td->td_pcb->pcb_user_save);
 2034         fpuuserinited(td);
 2035         return (0);
 2036 }
 2037 
 2038 /*
 2039  * Get machine context.
 2040  */
 2041 int
 2042 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
 2043 {
 2044         struct pcb *pcb;
 2045         struct trapframe *tp;
 2046 
 2047         pcb = td->td_pcb;
 2048         tp = td->td_frame;
 2049         PROC_LOCK(curthread->td_proc);
 2050         mcp->mc_onstack = sigonstack(tp->tf_rsp);
 2051         PROC_UNLOCK(curthread->td_proc);
 2052         mcp->mc_r15 = tp->tf_r15;
 2053         mcp->mc_r14 = tp->tf_r14;
 2054         mcp->mc_r13 = tp->tf_r13;
 2055         mcp->mc_r12 = tp->tf_r12;
 2056         mcp->mc_r11 = tp->tf_r11;
 2057         mcp->mc_r10 = tp->tf_r10;
 2058         mcp->mc_r9  = tp->tf_r9;
 2059         mcp->mc_r8  = tp->tf_r8;
 2060         mcp->mc_rdi = tp->tf_rdi;
 2061         mcp->mc_rsi = tp->tf_rsi;
 2062         mcp->mc_rbp = tp->tf_rbp;
 2063         mcp->mc_rbx = tp->tf_rbx;
 2064         mcp->mc_rcx = tp->tf_rcx;
 2065         mcp->mc_rflags = tp->tf_rflags;
 2066         if (flags & GET_MC_CLEAR_RET) {
 2067                 mcp->mc_rax = 0;
 2068                 mcp->mc_rdx = 0;
 2069                 mcp->mc_rflags &= ~PSL_C;
 2070         } else {
 2071                 mcp->mc_rax = tp->tf_rax;
 2072                 mcp->mc_rdx = tp->tf_rdx;
 2073         }
 2074         mcp->mc_rip = tp->tf_rip;
 2075         mcp->mc_cs = tp->tf_cs;
 2076         mcp->mc_rsp = tp->tf_rsp;
 2077         mcp->mc_ss = tp->tf_ss;
 2078         mcp->mc_ds = tp->tf_ds;
 2079         mcp->mc_es = tp->tf_es;
 2080         mcp->mc_fs = tp->tf_fs;
 2081         mcp->mc_gs = tp->tf_gs;
 2082         mcp->mc_flags = tp->tf_flags;
 2083         mcp->mc_len = sizeof(*mcp);
 2084         get_fpcontext(td, mcp);
 2085         mcp->mc_fsbase = pcb->pcb_fsbase;
 2086         mcp->mc_gsbase = pcb->pcb_gsbase;
 2087         bzero(mcp->mc_spare, sizeof(mcp->mc_spare));
 2088         return (0);
 2089 }
 2090 
 2091 /*
 2092  * Set machine context.
 2093  *
 2094  * However, we don't set any but the user modifiable flags, and we won't
 2095  * touch the cs selector.
 2096  */
 2097 int
 2098 set_mcontext(struct thread *td, const mcontext_t *mcp)
 2099 {
 2100         struct pcb *pcb;
 2101         struct trapframe *tp;
 2102         long rflags;
 2103         int ret;
 2104 
 2105         pcb = td->td_pcb;
 2106         tp = td->td_frame;
 2107         if (mcp->mc_len != sizeof(*mcp) ||
 2108             (mcp->mc_flags & ~_MC_FLAG_MASK) != 0)
 2109                 return (EINVAL);
 2110         rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
 2111             (tp->tf_rflags & ~PSL_USERCHANGE);
 2112         ret = set_fpcontext(td, mcp);
 2113         if (ret != 0)
 2114                 return (ret);
 2115         tp->tf_r15 = mcp->mc_r15;
 2116         tp->tf_r14 = mcp->mc_r14;
 2117         tp->tf_r13 = mcp->mc_r13;
 2118         tp->tf_r12 = mcp->mc_r12;
 2119         tp->tf_r11 = mcp->mc_r11;
 2120         tp->tf_r10 = mcp->mc_r10;
 2121         tp->tf_r9  = mcp->mc_r9;
 2122         tp->tf_r8  = mcp->mc_r8;
 2123         tp->tf_rdi = mcp->mc_rdi;
 2124         tp->tf_rsi = mcp->mc_rsi;
 2125         tp->tf_rbp = mcp->mc_rbp;
 2126         tp->tf_rbx = mcp->mc_rbx;
 2127         tp->tf_rdx = mcp->mc_rdx;
 2128         tp->tf_rcx = mcp->mc_rcx;
 2129         tp->tf_rax = mcp->mc_rax;
 2130         tp->tf_rip = mcp->mc_rip;
 2131         tp->tf_rflags = rflags;
 2132         tp->tf_rsp = mcp->mc_rsp;
 2133         tp->tf_ss = mcp->mc_ss;
 2134         tp->tf_flags = mcp->mc_flags;
 2135         if (tp->tf_flags & TF_HASSEGS) {
 2136                 tp->tf_ds = mcp->mc_ds;
 2137                 tp->tf_es = mcp->mc_es;
 2138                 tp->tf_fs = mcp->mc_fs;
 2139                 tp->tf_gs = mcp->mc_gs;
 2140         }
 2141         if (mcp->mc_flags & _MC_HASBASES) {
 2142                 pcb->pcb_fsbase = mcp->mc_fsbase;
 2143                 pcb->pcb_gsbase = mcp->mc_gsbase;
 2144         }
 2145         set_pcb_flags(pcb, PCB_FULL_IRET);
 2146         return (0);
 2147 }
 2148 
 2149 static void
 2150 get_fpcontext(struct thread *td, mcontext_t *mcp)
 2151 {
 2152 
 2153         mcp->mc_ownedfp = fpugetregs(td);
 2154         bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate,
 2155             sizeof(mcp->mc_fpstate));
 2156         mcp->mc_fpformat = fpuformat();
 2157 }
 2158 
 2159 static int
 2160 set_fpcontext(struct thread *td, const mcontext_t *mcp)
 2161 {
 2162         struct savefpu *fpstate;
 2163 
 2164         if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
 2165                 return (0);
 2166         else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
 2167                 return (EINVAL);
 2168         else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
 2169                 /* We don't care what state is left in the FPU or PCB. */
 2170                 fpstate_drop(td);
 2171         else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
 2172             mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
 2173                 fpstate = (struct savefpu *)&mcp->mc_fpstate;
 2174                 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask;
 2175                 fpusetregs(td, fpstate);
 2176         } else
 2177                 return (EINVAL);
 2178         return (0);
 2179 }
 2180 
 2181 void
 2182 fpstate_drop(struct thread *td)
 2183 {
 2184 
 2185         KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
 2186         critical_enter();
 2187         if (PCPU_GET(fpcurthread) == td)
 2188                 fpudrop();
 2189         /*
 2190          * XXX force a full drop of the fpu.  The above only drops it if we
 2191          * owned it.
 2192          *
 2193          * XXX I don't much like fpugetuserregs()'s semantics of doing a full
 2194          * drop.  Dropping only to the pcb matches fnsave's behaviour.
 2195          * We only need to drop to !PCB_INITDONE in sendsig().  But
 2196          * sendsig() is the only caller of fpugetuserregs()... perhaps we just
 2197          * have too many layers.
 2198          */
 2199         clear_pcb_flags(curthread->td_pcb,
 2200             PCB_FPUINITDONE | PCB_USERFPUINITDONE);
 2201         critical_exit();
 2202 }
 2203 
 2204 int
 2205 fill_dbregs(struct thread *td, struct dbreg *dbregs)
 2206 {
 2207         struct pcb *pcb;
 2208 
 2209         if (td == NULL) {
 2210                 dbregs->dr[0] = rdr0();
 2211                 dbregs->dr[1] = rdr1();
 2212                 dbregs->dr[2] = rdr2();
 2213                 dbregs->dr[3] = rdr3();
 2214                 dbregs->dr[6] = rdr6();
 2215                 dbregs->dr[7] = rdr7();
 2216         } else {
 2217                 pcb = td->td_pcb;
 2218                 dbregs->dr[0] = pcb->pcb_dr0;
 2219                 dbregs->dr[1] = pcb->pcb_dr1;
 2220                 dbregs->dr[2] = pcb->pcb_dr2;
 2221                 dbregs->dr[3] = pcb->pcb_dr3;
 2222                 dbregs->dr[6] = pcb->pcb_dr6;
 2223                 dbregs->dr[7] = pcb->pcb_dr7;
 2224         }
 2225         dbregs->dr[4] = 0;
 2226         dbregs->dr[5] = 0;
 2227         dbregs->dr[8] = 0;
 2228         dbregs->dr[9] = 0;
 2229         dbregs->dr[10] = 0;
 2230         dbregs->dr[11] = 0;
 2231         dbregs->dr[12] = 0;
 2232         dbregs->dr[13] = 0;
 2233         dbregs->dr[14] = 0;
 2234         dbregs->dr[15] = 0;
 2235         return (0);
 2236 }
 2237 
 2238 int
 2239 set_dbregs(struct thread *td, struct dbreg *dbregs)
 2240 {
 2241         struct pcb *pcb;
 2242         int i;
 2243 
 2244         if (td == NULL) {
 2245                 load_dr0(dbregs->dr[0]);
 2246                 load_dr1(dbregs->dr[1]);
 2247                 load_dr2(dbregs->dr[2]);
 2248                 load_dr3(dbregs->dr[3]);
 2249                 load_dr6(dbregs->dr[6]);
 2250                 load_dr7(dbregs->dr[7]);
 2251         } else {
 2252                 /*
 2253                  * Don't let an illegal value for dr7 get set.  Specifically,
 2254                  * check for undefined settings.  Setting these bit patterns
 2255                  * result in undefined behaviour and can lead to an unexpected
 2256                  * TRCTRAP or a general protection fault right here.
 2257                  * Upper bits of dr6 and dr7 must not be set
 2258                  */
 2259                 for (i = 0; i < 4; i++) {
 2260                         if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
 2261                                 return (EINVAL);
 2262                         if (td->td_frame->tf_cs == _ucode32sel &&
 2263                             DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
 2264                                 return (EINVAL);
 2265                 }
 2266                 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
 2267                     (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
 2268                         return (EINVAL);
 2269 
 2270                 pcb = td->td_pcb;
 2271 
 2272                 /*
 2273                  * Don't let a process set a breakpoint that is not within the
 2274                  * process's address space.  If a process could do this, it
 2275                  * could halt the system by setting a breakpoint in the kernel
 2276                  * (if ddb was enabled).  Thus, we need to check to make sure
 2277                  * that no breakpoints are being enabled for addresses outside
 2278                  * process's address space.
 2279                  *
 2280                  * XXX - what about when the watched area of the user's
 2281                  * address space is written into from within the kernel
 2282                  * ... wouldn't that still cause a breakpoint to be generated
 2283                  * from within kernel mode?
 2284                  */
 2285 
 2286                 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
 2287                         /* dr0 is enabled */
 2288                         if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
 2289                                 return (EINVAL);
 2290                 }
 2291                 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
 2292                         /* dr1 is enabled */
 2293                         if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
 2294                                 return (EINVAL);
 2295                 }
 2296                 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
 2297                         /* dr2 is enabled */
 2298                         if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
 2299                                 return (EINVAL);
 2300                 }
 2301                 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
 2302                         /* dr3 is enabled */
 2303                         if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
 2304                                 return (EINVAL);
 2305                 }
 2306 
 2307                 pcb->pcb_dr0 = dbregs->dr[0];
 2308                 pcb->pcb_dr1 = dbregs->dr[1];
 2309                 pcb->pcb_dr2 = dbregs->dr[2];
 2310                 pcb->pcb_dr3 = dbregs->dr[3];
 2311                 pcb->pcb_dr6 = dbregs->dr[6];
 2312                 pcb->pcb_dr7 = dbregs->dr[7];
 2313 
 2314                 set_pcb_flags(pcb, PCB_DBREGS);
 2315         }
 2316 
 2317         return (0);
 2318 }
 2319 
 2320 void
 2321 reset_dbregs(void)
 2322 {
 2323 
 2324         load_dr7(0);    /* Turn off the control bits first */
 2325         load_dr0(0);
 2326         load_dr1(0);
 2327         load_dr2(0);
 2328         load_dr3(0);
 2329         load_dr6(0);
 2330 }
 2331 
 2332 /*
 2333  * Return > 0 if a hardware breakpoint has been hit, and the
 2334  * breakpoint was in user space.  Return 0, otherwise.
 2335  */
 2336 int
 2337 user_dbreg_trap(void)
 2338 {
 2339         u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
 2340         u_int64_t bp;       /* breakpoint bits extracted from dr6 */
 2341         int nbp;            /* number of breakpoints that triggered */
 2342         caddr_t addr[4];    /* breakpoint addresses */
 2343         int i;
 2344         
 2345         dr7 = rdr7();
 2346         if ((dr7 & 0x000000ff) == 0) {
 2347                 /*
 2348                  * all GE and LE bits in the dr7 register are zero,
 2349                  * thus the trap couldn't have been caused by the
 2350                  * hardware debug registers
 2351                  */
 2352                 return 0;
 2353         }
 2354 
 2355         nbp = 0;
 2356         dr6 = rdr6();
 2357         bp = dr6 & 0x0000000f;
 2358 
 2359         if (!bp) {
 2360                 /*
 2361                  * None of the breakpoint bits are set meaning this
 2362                  * trap was not caused by any of the debug registers
 2363                  */
 2364                 return 0;
 2365         }
 2366 
 2367         /*
 2368          * at least one of the breakpoints were hit, check to see
 2369          * which ones and if any of them are user space addresses
 2370          */
 2371 
 2372         if (bp & 0x01) {
 2373                 addr[nbp++] = (caddr_t)rdr0();
 2374         }
 2375         if (bp & 0x02) {
 2376                 addr[nbp++] = (caddr_t)rdr1();
 2377         }
 2378         if (bp & 0x04) {
 2379                 addr[nbp++] = (caddr_t)rdr2();
 2380         }
 2381         if (bp & 0x08) {
 2382                 addr[nbp++] = (caddr_t)rdr3();
 2383         }
 2384 
 2385         for (i = 0; i < nbp; i++) {
 2386                 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
 2387                         /*
 2388                          * addr[i] is in user space
 2389                          */
 2390                         return nbp;
 2391                 }
 2392         }
 2393 
 2394         /*
 2395          * None of the breakpoints are in user space.
 2396          */
 2397         return 0;
 2398 }
 2399 
 2400 #ifdef KDB
 2401 
 2402 /*
 2403  * Provide inb() and outb() as functions.  They are normally only available as
 2404  * inline functions, thus cannot be called from the debugger.
 2405  */
 2406 
 2407 /* silence compiler warnings */
 2408 u_char inb_(u_short);
 2409 void outb_(u_short, u_char);
 2410 
 2411 u_char
 2412 inb_(u_short port)
 2413 {
 2414         return inb(port);
 2415 }
 2416 
 2417 void
 2418 outb_(u_short port, u_char data)
 2419 {
 2420         outb(port, data);
 2421 }
 2422 
 2423 #endif /* KDB */

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