1 /*-
2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * Copyright (c) 1996, by Steve Passe
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. The name of the developer may NOT be used to endorse or promote products
12 * derived from this software without specific prior written permission.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD: releng/5.3/sys/amd64/amd64/mptable.c 131778 2004-07-08 01:42:49Z peter $");
29
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/malloc.h>
35
36 #include <vm/vm.h>
37 #include <vm/vm_param.h>
38 #include <vm/pmap.h>
39
40 #include <machine/apicreg.h>
41 #include <machine/frame.h>
42 #include <machine/intr_machdep.h>
43 #include <machine/apicvar.h>
44 #include <machine/md_var.h>
45 #include <machine/mptable.h>
46 #include <machine/specialreg.h>
47
48 #include <dev/pci/pcivar.h>
49
50 /* string defined by the Intel MP Spec as identifying the MP table */
51 #define MP_SIG 0x5f504d5f /* _MP_ */
52
53 #define NAPICID 32 /* Max number of APIC's */
54
55 #define BIOS_BASE (0xf0000)
56 #define BIOS_SIZE (0x10000)
57 #define BIOS_COUNT (BIOS_SIZE/4)
58
59 typedef void mptable_entry_handler(u_char *entry, void *arg);
60
61 static basetable_entry basetable_entry_types[] =
62 {
63 {0, 20, "Processor"},
64 {1, 8, "Bus"},
65 {2, 8, "I/O APIC"},
66 {3, 8, "I/O INT"},
67 {4, 8, "Local INT"}
68 };
69
70 typedef struct BUSDATA {
71 u_char bus_id;
72 enum busTypes bus_type;
73 } bus_datum;
74
75 typedef struct INTDATA {
76 u_char int_type;
77 u_short int_flags;
78 u_char src_bus_id;
79 u_char src_bus_irq;
80 u_char dst_apic_id;
81 u_char dst_apic_int;
82 u_char int_vector;
83 } io_int, local_int;
84
85 typedef struct BUSTYPENAME {
86 u_char type;
87 char name[7];
88 } bus_type_name;
89
90 /* From MP spec v1.4, table 4-8. */
91 static bus_type_name bus_type_table[] =
92 {
93 {UNKNOWN_BUSTYPE, "CBUS "},
94 {UNKNOWN_BUSTYPE, "CBUSII"},
95 {EISA, "EISA "},
96 {UNKNOWN_BUSTYPE, "FUTURE"},
97 {UNKNOWN_BUSTYPE, "INTERN"},
98 {ISA, "ISA "},
99 {UNKNOWN_BUSTYPE, "MBI "},
100 {UNKNOWN_BUSTYPE, "MBII "},
101 {MCA, "MCA "},
102 {UNKNOWN_BUSTYPE, "MPI "},
103 {UNKNOWN_BUSTYPE, "MPSA "},
104 {UNKNOWN_BUSTYPE, "NUBUS "},
105 {PCI, "PCI "},
106 {UNKNOWN_BUSTYPE, "PCMCIA"},
107 {UNKNOWN_BUSTYPE, "TC "},
108 {UNKNOWN_BUSTYPE, "VL "},
109 {UNKNOWN_BUSTYPE, "VME "},
110 {UNKNOWN_BUSTYPE, "XPRESS"}
111 };
112
113 /* From MP spec v1.4, table 5-1. */
114 static int default_data[7][5] =
115 {
116 /* nbus, id0, type0, id1, type1 */
117 {1, 0, ISA, 255, NOBUS},
118 {1, 0, EISA, 255, NOBUS},
119 {1, 0, EISA, 255, NOBUS},
120 {1, 0, MCA, 255, NOBUS},
121 {2, 0, ISA, 1, PCI},
122 {2, 0, EISA, 1, PCI},
123 {2, 0, MCA, 1, PCI}
124 };
125
126 struct pci_probe_table_args {
127 u_char bus;
128 u_char found;
129 };
130
131 struct pci_route_interrupt_args {
132 u_char bus; /* Source bus. */
133 u_char irq; /* Source slot:pin. */
134 int vector; /* Return value. */
135 };
136
137 static mpfps_t mpfps;
138 static mpcth_t mpct;
139 static void *ioapics[NAPICID];
140 static bus_datum *busses;
141 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
142 static int pci0 = -1;
143
144 MALLOC_DEFINE(M_MPTABLE, "MP Table", "MP Table Items");
145
146 static enum intr_polarity conforming_polarity(u_char src_bus,
147 u_char src_bus_irq);
148 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
149 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
150 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
151 static int lookup_bus_type(char *name);
152 static void mptable_count_items(void);
153 static void mptable_count_items_handler(u_char *entry, void *arg);
154 #ifdef MPTABLE_FORCE_HTT
155 static void mptable_hyperthread_fixup(u_int id_mask);
156 #endif
157 static void mptable_parse_apics_and_busses(void);
158 static void mptable_parse_apics_and_busses_handler(u_char *entry,
159 void *arg);
160 static void mptable_parse_ints(void);
161 static void mptable_parse_ints_handler(u_char *entry, void *arg);
162 static void mptable_parse_io_int(int_entry_ptr intr);
163 static void mptable_parse_local_int(int_entry_ptr intr);
164 static void mptable_pci_probe_table_handler(u_char *entry, void *arg);
165 static void mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
166 static void mptable_pci_setup(void);
167 static int mptable_probe(void);
168 static int mptable_probe_cpus(void);
169 static void mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
170 static void mptable_register(void *dummy);
171 static int mptable_setup_local(void);
172 static int mptable_setup_io(void);
173 static void mptable_walk_table(mptable_entry_handler *handler, void *arg);
174 static int search_for_sig(u_int32_t target, int count);
175
176 static struct apic_enumerator mptable_enumerator = {
177 "MPTable",
178 mptable_probe,
179 mptable_probe_cpus,
180 mptable_setup_local,
181 mptable_setup_io
182 };
183
184 /*
185 * look for the MP spec signature
186 */
187
188 static int
189 search_for_sig(u_int32_t target, int count)
190 {
191 int x;
192 u_int32_t *addr = (u_int32_t *) (KERNBASE + target);
193
194 for (x = 0; x < count; x += 4)
195 if (addr[x] == MP_SIG)
196 /* make array index a byte index */
197 return (target + (x * sizeof(u_int32_t)));
198 return (-1);
199 }
200
201 static int
202 lookup_bus_type(char *name)
203 {
204 int x;
205
206 for (x = 0; x < MAX_BUSTYPE; ++x)
207 if (strncmp(bus_type_table[x].name, name, 6) == 0)
208 return (bus_type_table[x].type);
209
210 return (UNKNOWN_BUSTYPE);
211 }
212
213 /*
214 * Look for an Intel MP spec table (ie, SMP capable hardware).
215 */
216 static int
217 mptable_probe(void)
218 {
219 int x;
220 u_int32_t segment;
221 u_int32_t target;
222
223 /* see if EBDA exists */
224 segment = (u_int32_t) *(u_short *)(KERNBASE + 0x40e);
225 if (segment != 0) {
226 /* search first 1K of EBDA */
227 target = (u_int32_t) (segment << 4);
228 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
229 goto found;
230 } else {
231 /* last 1K of base memory, effective 'top of base' passed in */
232 target = (u_int32_t) ((basemem * 1024) - 0x400);
233 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
234 goto found;
235 }
236
237 /* search the BIOS */
238 target = (u_int32_t) BIOS_BASE;
239 if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
240 goto found;
241
242 /* nothing found */
243 return (ENXIO);
244
245 found:
246 mpfps = (mpfps_t)(KERNBASE + x);
247
248 /* Map in the configuration table if it exists. */
249 if (mpfps->config_type != 0)
250 mpct = NULL;
251 else {
252 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
253 printf("%s: Unable to map MP Configuration Table\n",
254 __func__);
255 return (ENXIO);
256 }
257 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap);
258 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
259 1024 * 1024) {
260 printf("%s: Unable to map end of MP Config Table\n",
261 __func__);
262 return (ENXIO);
263 }
264 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
265 mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
266 printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
267 __func__, mpct->signature[0], mpct->signature[1],
268 mpct->signature[2], mpct->signature[3]);
269 return (ENXIO);
270 }
271 if (bootverbose)
272 printf(
273 "MP Configuration Table version 1.%d found at %p\n",
274 mpct->spec_rev, mpct);
275 }
276
277 return (-100);
278 }
279
280 /*
281 * Run through the MP table enumerating CPUs.
282 */
283 static int
284 mptable_probe_cpus(void)
285 {
286 u_int cpu_mask;
287
288 /* Is this a pre-defined config? */
289 if (mpfps->config_type != 0) {
290 lapic_create(0, 1);
291 lapic_create(1, 0);
292 } else {
293 cpu_mask = 0;
294 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
295 #ifdef MPTABLE_FORCE_HTT
296 mptable_hyperthread_fixup(cpu_mask);
297 #endif
298 }
299 return (0);
300 }
301
302 /*
303 * Initialize the local APIC on the BSP.
304 */
305 static int
306 mptable_setup_local(void)
307 {
308
309 /* Is this a pre-defined config? */
310 printf("MPTable: <");
311 if (mpfps->config_type != 0) {
312 lapic_init(DEFAULT_APIC_BASE);
313 printf("Preset Config %d", mpfps->config_type);
314 } else {
315 lapic_init((uintptr_t)mpct->apic_address);
316 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
317 (int)sizeof(mpct->product_id), mpct->product_id);
318 }
319 printf(">\n");
320 return (0);
321 }
322
323 /*
324 * Run through the MP table enumerating I/O APICs.
325 */
326 static int
327 mptable_setup_io(void)
328 {
329 int i;
330 u_char byte;
331
332 /* First, we count individual items and allocate arrays. */
333 mptable_count_items();
334 busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
335 M_WAITOK);
336 for (i = 0; i <= mptable_maxbusid; i++)
337 busses[i].bus_type = NOBUS;
338
339 /* Second, we run through adding I/O APIC's and busses. */
340 ioapic_enable_mixed_mode();
341 mptable_parse_apics_and_busses();
342
343 /* Third, we run through the table tweaking interrupt sources. */
344 mptable_parse_ints();
345
346 /* Fourth, we register all the I/O APIC's. */
347 for (i = 0; i < NAPICID; i++)
348 if (ioapics[i] != NULL)
349 ioapic_register(ioapics[i]);
350
351 /* Fifth, we setup data structures to handle PCI interrupt routing. */
352 mptable_pci_setup();
353
354 /* Finally, we throw the switch to enable the I/O APIC's. */
355 if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
356 outb(0x22, 0x70); /* select IMCR */
357 byte = inb(0x23); /* current contents */
358 byte |= 0x01; /* mask external INTR */
359 outb(0x23, byte); /* disconnect 8259s/NMI */
360 }
361
362 return (0);
363 }
364
365 static void
366 mptable_register(void *dummy __unused)
367 {
368
369 apic_register_enumerator(&mptable_enumerator);
370 }
371 SYSINIT(mptable_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST,
372 mptable_register, NULL)
373
374 /*
375 * Call the handler routine for each entry in the MP config table.
376 */
377 static void
378 mptable_walk_table(mptable_entry_handler *handler, void *arg)
379 {
380 u_int i;
381 u_char *entry;
382
383 entry = (u_char *)(mpct + 1);
384 for (i = 0; i < mpct->entry_count; i++) {
385 switch (*entry) {
386 case MPCT_ENTRY_PROCESSOR:
387 case MPCT_ENTRY_IOAPIC:
388 case MPCT_ENTRY_BUS:
389 case MPCT_ENTRY_INT:
390 case MPCT_ENTRY_LOCAL_INT:
391 break;
392 default:
393 panic("%s: Unknown MP Config Entry %d\n", __func__,
394 (int)*entry);
395 }
396 handler(entry, arg);
397 entry += basetable_entry_types[*entry].length;
398 }
399 }
400
401 static void
402 mptable_probe_cpus_handler(u_char *entry, void *arg)
403 {
404 proc_entry_ptr proc;
405 u_int *cpu_mask;
406
407 switch (*entry) {
408 case MPCT_ENTRY_PROCESSOR:
409 proc = (proc_entry_ptr)entry;
410 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
411 lapic_create(proc->apic_id, proc->cpu_flags &
412 PROCENTRY_FLAG_BP);
413 cpu_mask = (u_int *)arg;
414 *cpu_mask |= (1 << proc->apic_id);
415 }
416 break;
417 }
418 }
419
420 static void
421 mptable_count_items_handler(u_char *entry, void *arg __unused)
422 {
423 io_apic_entry_ptr apic;
424 bus_entry_ptr bus;
425
426 switch (*entry) {
427 case MPCT_ENTRY_BUS:
428 bus = (bus_entry_ptr)entry;
429 mptable_nbusses++;
430 if (bus->bus_id > mptable_maxbusid)
431 mptable_maxbusid = bus->bus_id;
432 break;
433 case MPCT_ENTRY_IOAPIC:
434 apic = (io_apic_entry_ptr)entry;
435 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
436 mptable_nioapics++;
437 break;
438 }
439 }
440
441 /*
442 * Count items in the table.
443 */
444 static void
445 mptable_count_items(void)
446 {
447
448 /* Is this a pre-defined config? */
449 if (mpfps->config_type != 0) {
450 mptable_nioapics = 1;
451 switch (mpfps->config_type) {
452 case 1:
453 case 2:
454 case 3:
455 case 4:
456 mptable_nbusses = 1;
457 break;
458 case 5:
459 case 6:
460 case 7:
461 mptable_nbusses = 2;
462 break;
463 default:
464 panic("Unknown pre-defined MP Table config type %d",
465 mpfps->config_type);
466 }
467 mptable_maxbusid = mptable_nbusses - 1;
468 } else
469 mptable_walk_table(mptable_count_items_handler, NULL);
470 }
471
472 /*
473 * Add a bus or I/O APIC from an entry in the table.
474 */
475 static void
476 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
477 {
478 io_apic_entry_ptr apic;
479 bus_entry_ptr bus;
480 enum busTypes bus_type;
481 int i;
482
483
484 switch (*entry) {
485 case MPCT_ENTRY_BUS:
486 bus = (bus_entry_ptr)entry;
487 bus_type = lookup_bus_type(bus->bus_type);
488 if (bus_type == UNKNOWN_BUSTYPE) {
489 printf("MPTable: Unknown bus %d type \"", bus->bus_id);
490 for (i = 0; i < 6; i++)
491 printf("%c", bus->bus_type[i]);
492 printf("\"\n");
493 }
494 busses[bus->bus_id].bus_id = bus->bus_id;
495 busses[bus->bus_id].bus_type = bus_type;
496 break;
497 case MPCT_ENTRY_IOAPIC:
498 apic = (io_apic_entry_ptr)entry;
499 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
500 break;
501 if (apic->apic_id >= NAPICID)
502 panic("%s: I/O APIC ID %d too high", __func__,
503 apic->apic_id);
504 if (ioapics[apic->apic_id] != NULL)
505 panic("%s: Double APIC ID %d", __func__,
506 apic->apic_id);
507 ioapics[apic->apic_id] = ioapic_create(
508 (uintptr_t)apic->apic_address, apic->apic_id, -1);
509 break;
510 default:
511 break;
512 }
513 }
514
515 /*
516 * Enumerate I/O APIC's and busses.
517 */
518 static void
519 mptable_parse_apics_and_busses(void)
520 {
521
522 /* Is this a pre-defined config? */
523 if (mpfps->config_type != 0) {
524 ioapics[0] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
525 busses[0].bus_id = 0;
526 busses[0].bus_type = default_data[mpfps->config_type][2];
527 if (mptable_nbusses > 1) {
528 busses[1].bus_id = 1;
529 busses[1].bus_type =
530 default_data[mpfps->config_type][4];
531 }
532 } else
533 mptable_walk_table(mptable_parse_apics_and_busses_handler,
534 NULL);
535 }
536
537 /*
538 * Determine conforming polarity for a given bus type.
539 */
540 static enum intr_polarity
541 conforming_polarity(u_char src_bus, u_char src_bus_irq)
542 {
543
544 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
545 switch (busses[src_bus].bus_type) {
546 case ISA:
547 case EISA:
548 return (INTR_POLARITY_HIGH);
549 case PCI:
550 return (INTR_POLARITY_LOW);
551 default:
552 panic("%s: unknown bus type %d", __func__,
553 busses[src_bus].bus_type);
554 }
555 }
556
557 /*
558 * Determine conforming trigger for a given bus type.
559 */
560 static enum intr_trigger
561 conforming_trigger(u_char src_bus, u_char src_bus_irq)
562 {
563
564 KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
565 switch (busses[src_bus].bus_type) {
566 case ISA:
567 return (INTR_TRIGGER_EDGE);
568 case PCI:
569 return (INTR_TRIGGER_LEVEL);
570 case EISA:
571 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
572 return (elcr_read_trigger(src_bus_irq));
573 default:
574 panic("%s: unknown bus type %d", __func__,
575 busses[src_bus].bus_type);
576 }
577 }
578
579 static enum intr_polarity
580 intentry_polarity(int_entry_ptr intr)
581 {
582
583 switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
584 case INTENTRY_FLAGS_POLARITY_CONFORM:
585 return (conforming_polarity(intr->src_bus_id,
586 intr->src_bus_irq));
587 case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
588 return (INTR_POLARITY_HIGH);
589 case INTENTRY_FLAGS_POLARITY_ACTIVELO:
590 return (INTR_POLARITY_LOW);
591 default:
592 panic("Bogus interrupt flags");
593 }
594 }
595
596 static enum intr_trigger
597 intentry_trigger(int_entry_ptr intr)
598 {
599
600 switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
601 case INTENTRY_FLAGS_TRIGGER_CONFORM:
602 return (conforming_trigger(intr->src_bus_id,
603 intr->src_bus_irq));
604 case INTENTRY_FLAGS_TRIGGER_EDGE:
605 return (INTR_TRIGGER_EDGE);
606 case INTENTRY_FLAGS_TRIGGER_LEVEL:
607 return (INTR_TRIGGER_LEVEL);
608 default:
609 panic("Bogus interrupt flags");
610 }
611 }
612
613 /*
614 * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
615 */
616 static void
617 mptable_parse_io_int(int_entry_ptr intr)
618 {
619 void *ioapic;
620 u_int pin;
621
622 if (intr->dst_apic_id == 0xff) {
623 printf("MPTable: Ignoring global interrupt entry for pin %d\n",
624 intr->dst_apic_int);
625 return;
626 }
627 if (intr->dst_apic_id >= NAPICID) {
628 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
629 intr->dst_apic_id);
630 return;
631 }
632 ioapic = ioapics[intr->dst_apic_id];
633 if (ioapic == NULL) {
634 printf(
635 "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
636 intr->dst_apic_id);
637 return;
638 }
639 pin = intr->dst_apic_int;
640 switch (intr->int_type) {
641 case INTENTRY_TYPE_INT:
642 switch (busses[intr->src_bus_id].bus_type) {
643 case NOBUS:
644 panic("interrupt from missing bus");
645 case ISA:
646 case EISA:
647 if (busses[intr->src_bus_id].bus_type == ISA)
648 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
649 else
650 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
651 if (intr->src_bus_irq == pin)
652 break;
653 ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
654 if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
655 intr->src_bus_irq)
656 ioapic_disable_pin(ioapic, intr->src_bus_irq);
657 break;
658 case PCI:
659 ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
660 break;
661 default:
662 ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
663 break;
664 }
665 break;
666 case INTENTRY_TYPE_NMI:
667 ioapic_set_nmi(ioapic, pin);
668 break;
669 case INTENTRY_TYPE_SMI:
670 ioapic_set_smi(ioapic, pin);
671 break;
672 case INTENTRY_TYPE_EXTINT:
673 ioapic_set_extint(ioapic, pin);
674 break;
675 default:
676 panic("%s: invalid interrupt entry type %d\n", __func__,
677 intr->int_type);
678 }
679 if (intr->int_type == INTENTRY_TYPE_INT ||
680 (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
681 INTENTRY_FLAGS_TRIGGER_CONFORM)
682 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
683 if (intr->int_type == INTENTRY_TYPE_INT ||
684 (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
685 INTENTRY_FLAGS_POLARITY_CONFORM)
686 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
687 }
688
689 /*
690 * Parse an interrupt entry for a local APIC LVT pin.
691 */
692 static void
693 mptable_parse_local_int(int_entry_ptr intr)
694 {
695 u_int apic_id, pin;
696
697 if (intr->dst_apic_id == 0xff)
698 apic_id = APIC_ID_ALL;
699 else
700 apic_id = intr->dst_apic_id;
701 if (intr->dst_apic_int == 0)
702 pin = LVT_LINT0;
703 else
704 pin = LVT_LINT1;
705 switch (intr->int_type) {
706 case INTENTRY_TYPE_INT:
707 #if 1
708 printf(
709 "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
710 intr->dst_apic_int, intr->src_bus_irq);
711 return;
712 #else
713 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
714 break;
715 #endif
716 case INTENTRY_TYPE_NMI:
717 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
718 break;
719 case INTENTRY_TYPE_SMI:
720 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
721 break;
722 case INTENTRY_TYPE_EXTINT:
723 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
724 break;
725 default:
726 panic("%s: invalid interrupt entry type %d\n", __func__,
727 intr->int_type);
728 }
729 if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
730 INTENTRY_FLAGS_TRIGGER_CONFORM)
731 lapic_set_lvt_triggermode(apic_id, pin,
732 intentry_trigger(intr));
733 if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
734 INTENTRY_FLAGS_POLARITY_CONFORM)
735 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
736 }
737
738 /*
739 * Parse interrupt entries.
740 */
741 static void
742 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
743 {
744 int_entry_ptr intr;
745
746 intr = (int_entry_ptr)entry;
747 switch (*entry) {
748 case MPCT_ENTRY_INT:
749 mptable_parse_io_int(intr);
750 break;
751 case MPCT_ENTRY_LOCAL_INT:
752 mptable_parse_local_int(intr);
753 break;
754 }
755 }
756
757 /*
758 * Configure the interrupt pins
759 */
760 static void
761 mptable_parse_ints(void)
762 {
763
764 /* Is this a pre-defined config? */
765 if (mpfps->config_type != 0) {
766 /* Configure LINT pins. */
767 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT0, APIC_LVT_DM_EXTINT);
768 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT1, APIC_LVT_DM_NMI);
769
770 /* Configure I/O APIC pins. */
771 if (mpfps->config_type != 7)
772 ioapic_set_extint(ioapics[0], 0);
773 else
774 ioapic_disable_pin(ioapics[0], 0);
775 if (mpfps->config_type != 2)
776 ioapic_remap_vector(ioapics[0], 2, 0);
777 else
778 ioapic_disable_pin(ioapics[0], 2);
779 if (mpfps->config_type == 2)
780 ioapic_disable_pin(ioapics[0], 13);
781 } else
782 mptable_walk_table(mptable_parse_ints_handler, NULL);
783 }
784
785 #ifdef MPTABLE_FORCE_HTT
786 /*
787 * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
788 * that aren't already listed in the table.
789 *
790 * XXX: We assume that all of the physical CPUs in the
791 * system have the same number of logical CPUs.
792 *
793 * XXX: We assume that APIC ID's are allocated such that
794 * the APIC ID's for a physical processor are aligned
795 * with the number of logical CPU's in the processor.
796 */
797 static void
798 mptable_hyperthread_fixup(u_int id_mask)
799 {
800 u_int i, id, logical_cpus;
801
802 /* Nothing to do if there is no HTT support. */
803 if ((cpu_feature & CPUID_HTT) == 0)
804 return;
805 logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
806 if (logical_cpus <= 1)
807 return;
808
809 /*
810 * For each APIC ID of a CPU that is set in the mask,
811 * scan the other candidate APIC ID's for this
812 * physical processor. If any of those ID's are
813 * already in the table, then kill the fixup.
814 */
815 for (id = 0; id < NAPICID; id++) {
816 if ((id_mask & 1 << id) == 0)
817 continue;
818 /* First, make sure we are on a logical_cpus boundary. */
819 if (id % logical_cpus != 0)
820 return;
821 for (i = id + 1; i < id + logical_cpus; i++)
822 if ((id_mask & 1 << i) != 0)
823 return;
824 }
825
826 /*
827 * Ok, the ID's checked out, so perform the fixup by
828 * adding the logical CPUs.
829 */
830 while ((id = ffs(id_mask)) != 0) {
831 id--;
832 for (i = id + 1; i < id + logical_cpus; i++) {
833 if (bootverbose)
834 printf(
835 "MPTable: Adding logical CPU %d from main CPU %d\n",
836 i, id);
837 lapic_create(i, 0);
838 }
839 id_mask &= ~(1 << id);
840 }
841 }
842 #endif /* MPTABLE_FORCE_HTT */
843
844 /*
845 * Support code for routing PCI interrupts using the MP Table.
846 */
847 static void
848 mptable_pci_setup(void)
849 {
850 int i;
851
852 /*
853 * Find the first pci bus and call it 0. Panic if pci0 is not
854 * bus zero and there are multiple PCI busses.
855 */
856 for (i = 0; i <= mptable_maxbusid; i++)
857 if (busses[i].bus_type == PCI) {
858 if (pci0 == -1)
859 pci0 = i;
860 else if (pci0 != 0)
861 panic(
862 "MPTable contains multiple PCI busses but no PCI bus 0");
863 }
864 }
865
866 static void
867 mptable_pci_probe_table_handler(u_char *entry, void *arg)
868 {
869 struct pci_probe_table_args *args;
870 int_entry_ptr intr;
871
872 if (*entry != MPCT_ENTRY_INT)
873 return;
874 intr = (int_entry_ptr)entry;
875 args = (struct pci_probe_table_args *)arg;
876 KASSERT(args->bus <= mptable_maxbusid,
877 ("bus %d is too big", args->bus));
878 KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
879 if (intr->src_bus_id == args->bus)
880 args->found = 1;
881 }
882
883 int
884 mptable_pci_probe_table(int bus)
885 {
886 struct pci_probe_table_args args;
887
888 if (bus < 0)
889 return (EINVAL);
890 if (pci0 == -1 || pci0 + bus > mptable_maxbusid)
891 return (ENXIO);
892 if (busses[pci0 + bus].bus_type != PCI)
893 return (ENXIO);
894 args.bus = pci0 + bus;
895 args.found = 0;
896 mptable_walk_table(mptable_pci_probe_table_handler, &args);
897 if (args.found == 0)
898 return (ENXIO);
899 return (0);
900 }
901
902 static void
903 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
904 {
905 struct pci_route_interrupt_args *args;
906 int_entry_ptr intr;
907 int vector;
908
909 if (*entry != MPCT_ENTRY_INT)
910 return;
911 intr = (int_entry_ptr)entry;
912 args = (struct pci_route_interrupt_args *)arg;
913 if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
914 return;
915
916 /* Make sure the APIC maps to a known APIC. */
917 KASSERT(ioapics[intr->dst_apic_id] != NULL,
918 ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
919
920 /*
921 * Look up the vector for this APIC / pin combination. If we
922 * have previously matched an entry for this PCI IRQ but it
923 * has the same vector as this entry, just return. Otherwise,
924 * we use the vector for this APIC / pin combination.
925 */
926 vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
927 intr->dst_apic_int);
928 if (args->vector == vector)
929 return;
930 KASSERT(args->vector == -1,
931 ("Multiple entries for PCI IRQ %d", args->vector));
932 args->vector = vector;
933 }
934
935 int
936 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
937 {
938 struct pci_route_interrupt_args args;
939 int slot;
940
941 /* Like ACPI, pin numbers are 0-3, not 1-4. */
942 pin--;
943 KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
944 args.bus = pci_get_bus(dev) + pci0;
945 slot = pci_get_slot(dev);
946
947 /*
948 * PCI interrupt entries in the MP Table encode both the slot and
949 * pin into the IRQ with the pin being the two least significant
950 * bits, the slot being the next five bits, and the most significant
951 * bit being reserved.
952 */
953 args.irq = slot << 2 | pin;
954 args.vector = -1;
955 mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
956 if (args.vector < 0) {
957 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
958 'A' + pin);
959 return (PCI_INVALID_IRQ);
960 }
961 if (bootverbose)
962 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
963 'A' + pin, args.vector);
964 return (args.vector);
965 }
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