The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/amd64/amd64/mptable.c

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    1 /*-
    2  * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
    3  * Copyright (c) 1996, by Steve Passe
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. The name of the developer may NOT be used to endorse or promote products
   12  *    derived from this software without specific prior written permission.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/5.4/sys/amd64/amd64/mptable.c 145335 2005-04-20 19:11:07Z cvs2svn $");
   29 
   30 #include <sys/param.h>
   31 #include <sys/systm.h>
   32 #include <sys/bus.h>
   33 #include <sys/kernel.h>
   34 #include <sys/malloc.h>
   35 
   36 #include <vm/vm.h>
   37 #include <vm/vm_param.h>
   38 #include <vm/pmap.h>
   39 
   40 #include <machine/apicreg.h>
   41 #include <machine/frame.h>
   42 #include <machine/intr_machdep.h>
   43 #include <machine/apicvar.h>
   44 #include <machine/md_var.h>
   45 #include <machine/mptable.h>
   46 #include <machine/specialreg.h>
   47 
   48 #include <dev/pci/pcivar.h>
   49 
   50 /* string defined by the Intel MP Spec as identifying the MP table */
   51 #define MP_SIG                  0x5f504d5f      /* _MP_ */
   52 
   53 #define NAPICID                 32      /* Max number of APIC's */
   54 
   55 #define BIOS_BASE               (0xf0000)
   56 #define BIOS_SIZE               (0x10000)
   57 #define BIOS_COUNT              (BIOS_SIZE/4)
   58 
   59 typedef void mptable_entry_handler(u_char *entry, void *arg);
   60 
   61 static basetable_entry basetable_entry_types[] =
   62 {
   63         {0, 20, "Processor"},
   64         {1, 8, "Bus"},
   65         {2, 8, "I/O APIC"},
   66         {3, 8, "I/O INT"},
   67         {4, 8, "Local INT"}
   68 };
   69 
   70 typedef struct BUSDATA {
   71         u_char  bus_id;
   72         enum busTypes bus_type;
   73 }       bus_datum;
   74 
   75 typedef struct INTDATA {
   76         u_char  int_type;
   77         u_short int_flags;
   78         u_char  src_bus_id;
   79         u_char  src_bus_irq;
   80         u_char  dst_apic_id;
   81         u_char  dst_apic_int;
   82         u_char  int_vector;
   83 }       io_int, local_int;
   84 
   85 typedef struct BUSTYPENAME {
   86         u_char  type;
   87         char    name[7];
   88 }       bus_type_name;
   89 
   90 /* From MP spec v1.4, table 4-8. */
   91 static bus_type_name bus_type_table[] =
   92 {
   93         {UNKNOWN_BUSTYPE, "CBUS  "},
   94         {UNKNOWN_BUSTYPE, "CBUSII"},
   95         {EISA, "EISA  "},
   96         {UNKNOWN_BUSTYPE, "FUTURE"},
   97         {UNKNOWN_BUSTYPE, "INTERN"},
   98         {ISA, "ISA   "},
   99         {UNKNOWN_BUSTYPE, "MBI   "},
  100         {UNKNOWN_BUSTYPE, "MBII  "},
  101         {MCA, "MCA   "},
  102         {UNKNOWN_BUSTYPE, "MPI   "},
  103         {UNKNOWN_BUSTYPE, "MPSA  "},
  104         {UNKNOWN_BUSTYPE, "NUBUS "},
  105         {PCI, "PCI   "},
  106         {UNKNOWN_BUSTYPE, "PCMCIA"},
  107         {UNKNOWN_BUSTYPE, "TC    "},
  108         {UNKNOWN_BUSTYPE, "VL    "},
  109         {UNKNOWN_BUSTYPE, "VME   "},
  110         {UNKNOWN_BUSTYPE, "XPRESS"}
  111 };
  112 
  113 /* From MP spec v1.4, table 5-1. */
  114 static int default_data[7][5] =
  115 {
  116 /*   nbus, id0, type0, id1, type1 */
  117         {1, 0, ISA, 255, NOBUS},
  118         {1, 0, EISA, 255, NOBUS},
  119         {1, 0, EISA, 255, NOBUS},
  120         {1, 0, MCA, 255, NOBUS},
  121         {2, 0, ISA, 1, PCI},
  122         {2, 0, EISA, 1, PCI},
  123         {2, 0, MCA, 1, PCI}
  124 };
  125 
  126 struct pci_probe_table_args {
  127         u_char bus;
  128         u_char found;
  129 };
  130 
  131 struct pci_route_interrupt_args {
  132         u_char bus;             /* Source bus. */
  133         u_char irq;             /* Source slot:pin. */
  134         int vector;             /* Return value. */
  135 };
  136 
  137 static mpfps_t mpfps;
  138 static mpcth_t mpct;
  139 static void *ioapics[NAPICID];
  140 static bus_datum *busses;
  141 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
  142 static int pci0 = -1;
  143 
  144 MALLOC_DEFINE(M_MPTABLE, "MP Table", "MP Table Items");
  145 
  146 static enum intr_polarity conforming_polarity(u_char src_bus,
  147             u_char src_bus_irq);
  148 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
  149 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
  150 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
  151 static int      lookup_bus_type(char *name);
  152 static void     mptable_count_items(void);
  153 static void     mptable_count_items_handler(u_char *entry, void *arg);
  154 #ifdef MPTABLE_FORCE_HTT
  155 static void     mptable_hyperthread_fixup(u_int id_mask);
  156 #endif
  157 static void     mptable_parse_apics_and_busses(void);
  158 static void     mptable_parse_apics_and_busses_handler(u_char *entry,
  159     void *arg);
  160 static void     mptable_parse_default_config_ints(void);
  161 static void     mptable_parse_ints(void);
  162 static void     mptable_parse_ints_handler(u_char *entry, void *arg);
  163 static void     mptable_parse_io_int(int_entry_ptr intr);
  164 static void     mptable_parse_local_int(int_entry_ptr intr);
  165 static void     mptable_pci_probe_table_handler(u_char *entry, void *arg);
  166 static void     mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
  167 static void     mptable_pci_setup(void);
  168 static int      mptable_probe(void);
  169 static int      mptable_probe_cpus(void);
  170 static void     mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
  171 static void     mptable_register(void *dummy);
  172 static int      mptable_setup_local(void);
  173 static int      mptable_setup_io(void);
  174 static void     mptable_walk_table(mptable_entry_handler *handler, void *arg);
  175 static int      search_for_sig(u_int32_t target, int count);
  176 
  177 static struct apic_enumerator mptable_enumerator = {
  178         "MPTable",
  179         mptable_probe,
  180         mptable_probe_cpus,
  181         mptable_setup_local,
  182         mptable_setup_io
  183 };
  184 
  185 /*
  186  * look for the MP spec signature
  187  */
  188 
  189 static int
  190 search_for_sig(u_int32_t target, int count)
  191 {
  192         int     x;
  193         u_int32_t *addr = (u_int32_t *) (KERNBASE + target);
  194 
  195         for (x = 0; x < count; x += 4)
  196                 if (addr[x] == MP_SIG)
  197                         /* make array index a byte index */
  198                         return (target + (x * sizeof(u_int32_t)));
  199         return (-1);
  200 }
  201 
  202 static int
  203 lookup_bus_type(char *name)
  204 {
  205         int     x;
  206 
  207         for (x = 0; x < MAX_BUSTYPE; ++x)
  208                 if (strncmp(bus_type_table[x].name, name, 6) == 0)
  209                         return (bus_type_table[x].type);
  210 
  211         return (UNKNOWN_BUSTYPE);
  212 }
  213 
  214 /*
  215  * Look for an Intel MP spec table (ie, SMP capable hardware).
  216  */
  217 static int
  218 mptable_probe(void)
  219 {
  220         int     x;
  221         u_int32_t segment;
  222         u_int32_t target;
  223 
  224         /* see if EBDA exists */
  225         segment = (u_int32_t) *(u_short *)(KERNBASE + 0x40e);
  226         if (segment != 0) {
  227                 /* search first 1K of EBDA */
  228                 target = (u_int32_t) (segment << 4);
  229                 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
  230                         goto found;
  231         } else {
  232                 /* last 1K of base memory, effective 'top of base' passed in */
  233                 target = (u_int32_t) ((basemem * 1024) - 0x400);
  234                 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
  235                         goto found;
  236         }
  237 
  238         /* search the BIOS */
  239         target = (u_int32_t) BIOS_BASE;
  240         if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
  241                 goto found;
  242 
  243         /* nothing found */
  244         return (ENXIO);
  245 
  246 found:
  247         mpfps = (mpfps_t)(KERNBASE + x);
  248 
  249         /* Map in the configuration table if it exists. */
  250         if (mpfps->config_type != 0) {
  251                 if (bootverbose)
  252                         printf(
  253                 "MP Table version 1.%d found using Default Configuration %d\n",
  254                             mpfps->spec_rev, mpfps->config_type);
  255                 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
  256                         printf(
  257                         "MP Table Default Configuration %d is unsupported\n",
  258                             mpfps->config_type);
  259                         return (ENXIO);
  260                 }
  261                 mpct = NULL;
  262         } else {
  263                 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
  264                         printf("%s: Unable to map MP Configuration Table\n",
  265                             __func__);
  266                         return (ENXIO);
  267                 }
  268                 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap);
  269                 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
  270                     1024 * 1024) {
  271                         printf("%s: Unable to map end of MP Config Table\n",
  272                             __func__);
  273                         return (ENXIO);
  274                 }
  275                 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
  276                     mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
  277                         printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
  278                             __func__, mpct->signature[0], mpct->signature[1],
  279                             mpct->signature[2], mpct->signature[3]);
  280                         return (ENXIO);
  281                 }
  282                 if (bootverbose)
  283                         printf(
  284                         "MP Configuration Table version 1.%d found at %p\n",
  285                             mpct->spec_rev, mpct);
  286         }
  287 
  288         return (-100);
  289 }
  290 
  291 /*
  292  * Run through the MP table enumerating CPUs.
  293  */
  294 static int
  295 mptable_probe_cpus(void)
  296 {
  297         u_int cpu_mask;
  298 
  299         /* Is this a pre-defined config? */
  300         if (mpfps->config_type != 0) {
  301                 lapic_create(0, 1);
  302                 lapic_create(1, 0);
  303         } else {
  304                 cpu_mask = 0;
  305                 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
  306 #ifdef MPTABLE_FORCE_HTT
  307                 mptable_hyperthread_fixup(cpu_mask);
  308 #endif
  309         }
  310         return (0);
  311 }
  312 
  313 /*
  314  * Initialize the local APIC on the BSP.
  315  */
  316 static int
  317 mptable_setup_local(void)
  318 {
  319 
  320         /* Is this a pre-defined config? */
  321         printf("MPTable: <");
  322         if (mpfps->config_type != 0) {
  323                 lapic_init(DEFAULT_APIC_BASE);
  324                 printf("Default Configuration %d", mpfps->config_type);
  325         } else {
  326                 lapic_init((uintptr_t)mpct->apic_address);
  327                 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
  328                     (int)sizeof(mpct->product_id), mpct->product_id);
  329         }
  330         printf(">\n");
  331         return (0);
  332 }
  333 
  334 /*
  335  * Run through the MP table enumerating I/O APICs.
  336  */
  337 static int
  338 mptable_setup_io(void)
  339 {
  340         int i;
  341         u_char byte;
  342 
  343         /* First, we count individual items and allocate arrays. */
  344         mptable_count_items();
  345         busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
  346             M_WAITOK);
  347         for (i = 0; i <= mptable_maxbusid; i++)
  348                 busses[i].bus_type = NOBUS;
  349 
  350         /* Second, we run through adding I/O APIC's and busses. */
  351         ioapic_enable_mixed_mode();
  352         mptable_parse_apics_and_busses();       
  353 
  354         /* Third, we run through the table tweaking interrupt sources. */
  355         mptable_parse_ints();
  356 
  357         /* Fourth, we register all the I/O APIC's. */
  358         for (i = 0; i < NAPICID; i++)
  359                 if (ioapics[i] != NULL)
  360                         ioapic_register(ioapics[i]);
  361 
  362         /* Fifth, we setup data structures to handle PCI interrupt routing. */
  363         mptable_pci_setup();
  364 
  365         /* Finally, we throw the switch to enable the I/O APIC's. */
  366         if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
  367                 outb(0x22, 0x70);       /* select IMCR */
  368                 byte = inb(0x23);       /* current contents */
  369                 byte |= 0x01;           /* mask external INTR */
  370                 outb(0x23, byte);       /* disconnect 8259s/NMI */
  371         }
  372 
  373         return (0);
  374 }
  375 
  376 static void
  377 mptable_register(void *dummy __unused)
  378 {
  379 
  380         apic_register_enumerator(&mptable_enumerator);
  381 }
  382 SYSINIT(mptable_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST,
  383     mptable_register, NULL)
  384 
  385 /*
  386  * Call the handler routine for each entry in the MP config table.
  387  */
  388 static void
  389 mptable_walk_table(mptable_entry_handler *handler, void *arg)
  390 {
  391         u_int i;
  392         u_char *entry;
  393 
  394         entry = (u_char *)(mpct + 1);
  395         for (i = 0; i < mpct->entry_count; i++) {
  396                 switch (*entry) {
  397                 case MPCT_ENTRY_PROCESSOR:
  398                 case MPCT_ENTRY_IOAPIC:
  399                 case MPCT_ENTRY_BUS:
  400                 case MPCT_ENTRY_INT:
  401                 case MPCT_ENTRY_LOCAL_INT:
  402                         break;
  403                 default:
  404                         panic("%s: Unknown MP Config Entry %d\n", __func__,
  405                             (int)*entry);
  406                 }
  407                 handler(entry, arg);
  408                 entry += basetable_entry_types[*entry].length;
  409         }
  410 }
  411 
  412 static void
  413 mptable_probe_cpus_handler(u_char *entry, void *arg)
  414 {
  415         proc_entry_ptr proc;
  416         u_int *cpu_mask;
  417 
  418         switch (*entry) {
  419         case MPCT_ENTRY_PROCESSOR:
  420                 proc = (proc_entry_ptr)entry;
  421                 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
  422                         lapic_create(proc->apic_id, proc->cpu_flags &
  423                             PROCENTRY_FLAG_BP);
  424                         cpu_mask = (u_int *)arg;
  425                         *cpu_mask |= (1 << proc->apic_id);
  426                 }
  427                 break;
  428         }
  429 }
  430 
  431 static void
  432 mptable_count_items_handler(u_char *entry, void *arg __unused)
  433 {
  434         io_apic_entry_ptr apic;
  435         bus_entry_ptr bus;
  436 
  437         switch (*entry) {
  438         case MPCT_ENTRY_BUS:
  439                 bus = (bus_entry_ptr)entry;
  440                 mptable_nbusses++;
  441                 if (bus->bus_id > mptable_maxbusid)
  442                         mptable_maxbusid = bus->bus_id;
  443                 break;
  444         case MPCT_ENTRY_IOAPIC:
  445                 apic = (io_apic_entry_ptr)entry;
  446                 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
  447                         mptable_nioapics++;
  448                 break;
  449         }
  450 }
  451 
  452 /*
  453  * Count items in the table.
  454  */
  455 static void
  456 mptable_count_items(void)
  457 {
  458 
  459         /* Is this a pre-defined config? */
  460         if (mpfps->config_type != 0) {
  461                 mptable_nioapics = 1;
  462                 switch (mpfps->config_type) {
  463                 case 1:
  464                 case 2:
  465                 case 3:
  466                 case 4:
  467                         mptable_nbusses = 1;
  468                         break;
  469                 case 5:
  470                 case 6:
  471                 case 7:
  472                         mptable_nbusses = 2;
  473                         break;
  474                 default:
  475                         panic("Unknown pre-defined MP Table config type %d",
  476                             mpfps->config_type);
  477                 }
  478                 mptable_maxbusid = mptable_nbusses - 1;
  479         } else
  480                 mptable_walk_table(mptable_count_items_handler, NULL);
  481 }
  482 
  483 /*
  484  * Add a bus or I/O APIC from an entry in the table.
  485  */
  486 static void
  487 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
  488 {
  489         io_apic_entry_ptr apic;
  490         bus_entry_ptr bus;
  491         enum busTypes bus_type;
  492         int i;
  493 
  494 
  495         switch (*entry) {
  496         case MPCT_ENTRY_BUS:
  497                 bus = (bus_entry_ptr)entry;
  498                 bus_type = lookup_bus_type(bus->bus_type);
  499                 if (bus_type == UNKNOWN_BUSTYPE) {
  500                         printf("MPTable: Unknown bus %d type \"", bus->bus_id);
  501                         for (i = 0; i < 6; i++)
  502                                 printf("%c", bus->bus_type[i]);
  503                         printf("\"\n");
  504                 }
  505                 busses[bus->bus_id].bus_id = bus->bus_id;
  506                 busses[bus->bus_id].bus_type = bus_type;
  507                 break;
  508         case MPCT_ENTRY_IOAPIC:
  509                 apic = (io_apic_entry_ptr)entry;
  510                 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
  511                         break;
  512                 if (apic->apic_id >= NAPICID)
  513                         panic("%s: I/O APIC ID %d too high", __func__,
  514                             apic->apic_id);
  515                 if (ioapics[apic->apic_id] != NULL)
  516                         panic("%s: Double APIC ID %d", __func__,
  517                             apic->apic_id);
  518                 ioapics[apic->apic_id] = ioapic_create(
  519                         (uintptr_t)apic->apic_address, apic->apic_id, -1);
  520                 break;
  521         default:
  522                 break;
  523         }
  524 }
  525 
  526 /*
  527  * Enumerate I/O APIC's and busses.
  528  */
  529 static void
  530 mptable_parse_apics_and_busses(void)
  531 {
  532 
  533         /* Is this a pre-defined config? */
  534         if (mpfps->config_type != 0) {
  535                 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
  536                 busses[0].bus_id = 0;
  537                 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
  538                 if (mptable_nbusses > 1) {
  539                         busses[1].bus_id = 1;
  540                         busses[1].bus_type =
  541                             default_data[mpfps->config_type - 1][4];
  542                 }
  543         } else
  544                 mptable_walk_table(mptable_parse_apics_and_busses_handler,
  545                     NULL);
  546 }
  547 
  548 /*
  549  * Determine conforming polarity for a given bus type.
  550  */
  551 static enum intr_polarity
  552 conforming_polarity(u_char src_bus, u_char src_bus_irq)
  553 {
  554 
  555         KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
  556         switch (busses[src_bus].bus_type) {
  557         case ISA:
  558         case EISA:
  559                 return (INTR_POLARITY_HIGH);
  560         case PCI:
  561                 return (INTR_POLARITY_LOW);
  562         default:
  563                 panic("%s: unknown bus type %d", __func__,
  564                     busses[src_bus].bus_type);
  565         }
  566 }
  567 
  568 /*
  569  * Determine conforming trigger for a given bus type.
  570  */
  571 static enum intr_trigger
  572 conforming_trigger(u_char src_bus, u_char src_bus_irq)
  573 {
  574 
  575         KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
  576         switch (busses[src_bus].bus_type) {
  577         case ISA:
  578                 if (elcr_found)
  579                         return (elcr_read_trigger(src_bus_irq));
  580                 else
  581                         return (INTR_TRIGGER_EDGE);
  582         case PCI:
  583                 return (INTR_TRIGGER_LEVEL);
  584         case EISA:
  585                 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
  586                 KASSERT(elcr_found, ("Missing ELCR"));
  587                 return (elcr_read_trigger(src_bus_irq));
  588         default:
  589                 panic("%s: unknown bus type %d", __func__,
  590                     busses[src_bus].bus_type);
  591         }
  592 }
  593 
  594 static enum intr_polarity
  595 intentry_polarity(int_entry_ptr intr)
  596 {
  597 
  598         switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
  599         case INTENTRY_FLAGS_POLARITY_CONFORM:
  600                 return (conforming_polarity(intr->src_bus_id,
  601                             intr->src_bus_irq));
  602         case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
  603                 return (INTR_POLARITY_HIGH);
  604         case INTENTRY_FLAGS_POLARITY_ACTIVELO:
  605                 return (INTR_POLARITY_LOW);
  606         default:
  607                 panic("Bogus interrupt flags");
  608         }
  609 }
  610 
  611 static enum intr_trigger
  612 intentry_trigger(int_entry_ptr intr)
  613 {
  614 
  615         switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
  616         case INTENTRY_FLAGS_TRIGGER_CONFORM:
  617                 return (conforming_trigger(intr->src_bus_id,
  618                             intr->src_bus_irq));
  619         case INTENTRY_FLAGS_TRIGGER_EDGE:
  620                 return (INTR_TRIGGER_EDGE);
  621         case INTENTRY_FLAGS_TRIGGER_LEVEL:
  622                 return (INTR_TRIGGER_LEVEL);
  623         default:
  624                 panic("Bogus interrupt flags");
  625         }
  626 }
  627 
  628 /*
  629  * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
  630  */
  631 static void
  632 mptable_parse_io_int(int_entry_ptr intr)
  633 {
  634         void *ioapic;
  635         u_int pin, apic_id;
  636 
  637         apic_id = intr->dst_apic_id;
  638         if (intr->dst_apic_id == 0xff) {
  639                 /*
  640                  * An APIC ID of 0xff means that the interrupt is connected
  641                  * to the specified pin on all I/O APICs in the system.  If
  642                  * there is only one I/O APIC, then use that APIC to route
  643                  * the interrupts.  If there is more than one I/O APIC, then
  644                  * punt.
  645                  */
  646                 if (mptable_nioapics == 1) {
  647                         apic_id = 0;
  648                         while (ioapics[apic_id] == NULL)
  649                                 apic_id++;
  650                 } else {
  651                         printf(
  652                         "MPTable: Ignoring global interrupt entry for pin %d\n",
  653                             intr->dst_apic_int);
  654                         return;
  655                 }
  656         }
  657         if (apic_id >= NAPICID) {
  658                 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
  659                     intr->dst_apic_id);
  660                 return;
  661         }
  662         ioapic = ioapics[apic_id];
  663         if (ioapic == NULL) {
  664                 printf(
  665         "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
  666                     apic_id);
  667                 return;
  668         }
  669         pin = intr->dst_apic_int;
  670         switch (intr->int_type) {
  671         case INTENTRY_TYPE_INT:
  672                 switch (busses[intr->src_bus_id].bus_type) {
  673                 case NOBUS:
  674                         panic("interrupt from missing bus");
  675                 case ISA:
  676                 case EISA:
  677                         if (busses[intr->src_bus_id].bus_type == ISA)
  678                                 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
  679                         else
  680                                 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
  681                         if (intr->src_bus_irq == pin)
  682                                 break;
  683                         ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
  684                         if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
  685                             intr->src_bus_irq)
  686                                 ioapic_disable_pin(ioapic, intr->src_bus_irq);
  687                         break;
  688                 case PCI:
  689                         ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
  690                         break;
  691                 default:
  692                         ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
  693                         break;
  694                 }
  695                 break;
  696         case INTENTRY_TYPE_NMI:
  697                 ioapic_set_nmi(ioapic, pin);
  698                 break;
  699         case INTENTRY_TYPE_SMI:
  700                 ioapic_set_smi(ioapic, pin);
  701                 break;
  702         case INTENTRY_TYPE_EXTINT:
  703                 ioapic_set_extint(ioapic, pin);
  704                 break;
  705         default:
  706                 panic("%s: invalid interrupt entry type %d\n", __func__,
  707                     intr->int_type);
  708         }
  709         if (intr->int_type == INTENTRY_TYPE_INT ||
  710             (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
  711             INTENTRY_FLAGS_TRIGGER_CONFORM)
  712                 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
  713         if (intr->int_type == INTENTRY_TYPE_INT ||
  714             (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
  715             INTENTRY_FLAGS_POLARITY_CONFORM)
  716                 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
  717 }
  718 
  719 /*
  720  * Parse an interrupt entry for a local APIC LVT pin.
  721  */
  722 static void
  723 mptable_parse_local_int(int_entry_ptr intr)
  724 {
  725         u_int apic_id, pin;
  726 
  727         if (intr->dst_apic_id == 0xff)
  728                 apic_id = APIC_ID_ALL;
  729         else
  730                 apic_id = intr->dst_apic_id;
  731         if (intr->dst_apic_int == 0)
  732                 pin = LVT_LINT0;
  733         else
  734                 pin = LVT_LINT1;
  735         switch (intr->int_type) {
  736         case INTENTRY_TYPE_INT:
  737 #if 1
  738                 printf(
  739         "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
  740                     intr->dst_apic_int, intr->src_bus_irq);
  741                 return;
  742 #else
  743                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
  744                 break;
  745 #endif
  746         case INTENTRY_TYPE_NMI:
  747                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
  748                 break;
  749         case INTENTRY_TYPE_SMI:
  750                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
  751                 break;
  752         case INTENTRY_TYPE_EXTINT:
  753                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
  754                 break;
  755         default:
  756                 panic("%s: invalid interrupt entry type %d\n", __func__,
  757                     intr->int_type);
  758         }
  759         if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
  760             INTENTRY_FLAGS_TRIGGER_CONFORM)
  761                 lapic_set_lvt_triggermode(apic_id, pin,
  762                     intentry_trigger(intr));
  763         if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
  764             INTENTRY_FLAGS_POLARITY_CONFORM)
  765                 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
  766 }
  767 
  768 /*
  769  * Parse interrupt entries.
  770  */
  771 static void
  772 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
  773 {
  774         int_entry_ptr intr;
  775 
  776         intr = (int_entry_ptr)entry;
  777         switch (*entry) {
  778         case MPCT_ENTRY_INT:
  779                 mptable_parse_io_int(intr);
  780                 break;
  781         case MPCT_ENTRY_LOCAL_INT:
  782                 mptable_parse_local_int(intr);
  783                 break;
  784         }
  785 }
  786 
  787 /*
  788  * Configure interrupt pins for a default configuration.  For details see
  789  * Table 5-2 in Section 5 of the MP Table specification.
  790  */
  791 static void
  792 mptable_parse_default_config_ints(void)
  793 {
  794         struct INTENTRY entry;
  795         int pin;
  796 
  797         /*
  798          * All default configs route IRQs from bus 0 to the first 16 pins
  799          * of the first I/O APIC with an APIC ID of 2.
  800          */
  801         entry.type = MPCT_ENTRY_INT;
  802         entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
  803             INTENTRY_FLAGS_TRIGGER_CONFORM;
  804         entry.src_bus_id = 0;
  805         entry.dst_apic_id = 2;
  806 
  807         /* Run through all 16 pins. */
  808         for (pin = 0; pin < 16; pin++) {
  809                 entry.dst_apic_int = pin;
  810                 switch (pin) {
  811                 case 0:
  812                         /* Pin 0 is an ExtINT pin. */
  813                         entry.int_type = INTENTRY_TYPE_EXTINT;
  814                         break;
  815                 case 2:
  816                         /* IRQ 0 is routed to pin 2. */
  817                         entry.int_type = INTENTRY_TYPE_INT;
  818                         entry.src_bus_irq = 0;
  819                         break;
  820                 default:
  821                         /* All other pins are identity mapped. */
  822                         entry.int_type = INTENTRY_TYPE_INT;
  823                         entry.src_bus_irq = pin;
  824                         break;
  825                 }
  826                 mptable_parse_io_int(&entry);
  827         }
  828 
  829         /* Certain configs disable certain pins. */
  830         if (mpfps->config_type == 7)
  831                 ioapic_disable_pin(ioapics[2], 0);
  832         if (mpfps->config_type == 2) {
  833                 ioapic_disable_pin(ioapics[2], 2);
  834                 ioapic_disable_pin(ioapics[2], 13);
  835         }
  836 }
  837 
  838 /*
  839  * Configure the interrupt pins
  840  */
  841 static void
  842 mptable_parse_ints(void)
  843 {
  844 
  845         /* Is this a pre-defined config? */
  846         if (mpfps->config_type != 0) {
  847                 /* Configure LINT pins. */
  848                 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT0, APIC_LVT_DM_EXTINT);
  849                 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT1, APIC_LVT_DM_NMI);
  850 
  851                 /* Configure I/O APIC pins. */
  852                 mptable_parse_default_config_ints();
  853         } else
  854                 mptable_walk_table(mptable_parse_ints_handler, NULL);
  855 }
  856 
  857 #ifdef MPTABLE_FORCE_HTT
  858 /*
  859  * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
  860  * that aren't already listed in the table.
  861  *
  862  * XXX: We assume that all of the physical CPUs in the
  863  * system have the same number of logical CPUs.
  864  *
  865  * XXX: We assume that APIC ID's are allocated such that
  866  * the APIC ID's for a physical processor are aligned
  867  * with the number of logical CPU's in the processor.
  868  */
  869 static void
  870 mptable_hyperthread_fixup(u_int id_mask)
  871 {
  872         u_int i, id, logical_cpus;
  873 
  874         /* Nothing to do if there is no HTT support. */
  875         if ((cpu_feature & CPUID_HTT) == 0)
  876                 return;
  877         logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
  878         if (logical_cpus <= 1)
  879                 return;
  880 
  881         /*
  882          * For each APIC ID of a CPU that is set in the mask,
  883          * scan the other candidate APIC ID's for this
  884          * physical processor.  If any of those ID's are
  885          * already in the table, then kill the fixup.
  886          */
  887         for (id = 0; id < NAPICID; id++) {
  888                 if ((id_mask & 1 << id) == 0)
  889                         continue;
  890                 /* First, make sure we are on a logical_cpus boundary. */
  891                 if (id % logical_cpus != 0)
  892                         return;
  893                 for (i = id + 1; i < id + logical_cpus; i++)
  894                         if ((id_mask & 1 << i) != 0)
  895                                 return;
  896         }
  897 
  898         /*
  899          * Ok, the ID's checked out, so perform the fixup by
  900          * adding the logical CPUs.
  901          */
  902         while ((id = ffs(id_mask)) != 0) {
  903                 id--;
  904                 for (i = id + 1; i < id + logical_cpus; i++) {
  905                         if (bootverbose)
  906                                 printf(
  907                         "MPTable: Adding logical CPU %d from main CPU %d\n",
  908                                     i, id);
  909                         lapic_create(i, 0);
  910                 }
  911                 id_mask &= ~(1 << id);
  912         }
  913 }
  914 #endif /* MPTABLE_FORCE_HTT */
  915 
  916 /*
  917  * Support code for routing PCI interrupts using the MP Table.
  918  */
  919 static void
  920 mptable_pci_setup(void)
  921 {
  922         int i;
  923 
  924         /*
  925          * Find the first pci bus and call it 0.  Panic if pci0 is not
  926          * bus zero and there are multiple PCI busses.
  927          */
  928         for (i = 0; i <= mptable_maxbusid; i++)
  929                 if (busses[i].bus_type == PCI) {
  930                         if (pci0 == -1)
  931                                 pci0 = i;
  932                         else if (pci0 != 0)
  933                                 panic(
  934                 "MPTable contains multiple PCI busses but no PCI bus 0");
  935                 }
  936 }
  937 
  938 static void
  939 mptable_pci_probe_table_handler(u_char *entry, void *arg)
  940 {
  941         struct pci_probe_table_args *args;
  942         int_entry_ptr intr;
  943 
  944         if (*entry != MPCT_ENTRY_INT)
  945                 return;
  946         intr = (int_entry_ptr)entry;
  947         args = (struct pci_probe_table_args *)arg;
  948         KASSERT(args->bus <= mptable_maxbusid,
  949             ("bus %d is too big", args->bus));
  950         KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
  951         if (intr->src_bus_id == args->bus)
  952                 args->found = 1;
  953 }
  954 
  955 int
  956 mptable_pci_probe_table(int bus)
  957 {
  958         struct pci_probe_table_args args;
  959 
  960         if (bus < 0)
  961                 return (EINVAL);
  962         if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
  963                 return (ENXIO);
  964         if (busses[pci0 + bus].bus_type != PCI)
  965                 return (ENXIO);
  966         args.bus = pci0 + bus;
  967         args.found = 0;
  968         mptable_walk_table(mptable_pci_probe_table_handler, &args);
  969         if (args.found == 0)
  970                 return (ENXIO);
  971         return (0);
  972 }
  973 
  974 static void
  975 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
  976 {
  977         struct pci_route_interrupt_args *args;
  978         int_entry_ptr intr;
  979         int vector;
  980 
  981         if (*entry != MPCT_ENTRY_INT)
  982                 return;
  983         intr = (int_entry_ptr)entry;
  984         args = (struct pci_route_interrupt_args *)arg;
  985         if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
  986                 return;
  987 
  988         /* Make sure the APIC maps to a known APIC. */
  989         KASSERT(ioapics[intr->dst_apic_id] != NULL,
  990             ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
  991 
  992         /*
  993          * Look up the vector for this APIC / pin combination.  If we
  994          * have previously matched an entry for this PCI IRQ but it
  995          * has the same vector as this entry, just return.  Otherwise,
  996          * we use the vector for this APIC / pin combination.
  997          */
  998         vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
  999             intr->dst_apic_int);
 1000         if (args->vector == vector)
 1001                 return;
 1002         KASSERT(args->vector == -1,
 1003             ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
 1004             args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
 1005             vector));
 1006         args->vector = vector;
 1007 }
 1008 
 1009 int
 1010 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
 1011 {
 1012         struct pci_route_interrupt_args args;
 1013         int slot;
 1014 
 1015         /* Like ACPI, pin numbers are 0-3, not 1-4. */
 1016         pin--;
 1017         KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
 1018         args.bus = pci_get_bus(dev) + pci0;
 1019         slot = pci_get_slot(dev);
 1020 
 1021         /*
 1022          * PCI interrupt entries in the MP Table encode both the slot and
 1023          * pin into the IRQ with the pin being the two least significant
 1024          * bits, the slot being the next five bits, and the most significant
 1025          * bit being reserved.
 1026          */
 1027         args.irq = slot << 2 | pin;
 1028         args.vector = -1;
 1029         mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
 1030         if (args.vector < 0) {
 1031                 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
 1032                     'A' + pin);
 1033                 return (PCI_INVALID_IRQ);
 1034         }
 1035         if (bootverbose)
 1036                 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
 1037                     'A' + pin, args.vector);
 1038         return (args.vector);
 1039 }

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