The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/amd64/amd64/mptable.c

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    1 /*-
    2  * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
    3  * Copyright (c) 1996, by Steve Passe
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. The name of the developer may NOT be used to endorse or promote products
   12  *    derived from this software without specific prior written permission.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/6.1/sys/amd64/amd64/mptable.c 158179 2006-04-30 16:44:43Z cvs2svn $");
   29 
   30 #include <sys/param.h>
   31 #include <sys/systm.h>
   32 #include <sys/bus.h>
   33 #include <sys/kernel.h>
   34 #include <sys/malloc.h>
   35 
   36 #include <vm/vm.h>
   37 #include <vm/vm_param.h>
   38 #include <vm/pmap.h>
   39 
   40 #include <machine/apicreg.h>
   41 #include <machine/frame.h>
   42 #include <machine/intr_machdep.h>
   43 #include <machine/apicvar.h>
   44 #include <machine/md_var.h>
   45 #include <machine/mptable.h>
   46 #include <machine/specialreg.h>
   47 
   48 #include <dev/pci/pcivar.h>
   49 
   50 /* string defined by the Intel MP Spec as identifying the MP table */
   51 #define MP_SIG                  0x5f504d5f      /* _MP_ */
   52 
   53 #define NAPICID                 32      /* Max number of APIC's */
   54 
   55 #define BIOS_BASE               (0xf0000)
   56 #define BIOS_SIZE               (0x10000)
   57 #define BIOS_COUNT              (BIOS_SIZE/4)
   58 
   59 typedef void mptable_entry_handler(u_char *entry, void *arg);
   60 
   61 static basetable_entry basetable_entry_types[] =
   62 {
   63         {0, 20, "Processor"},
   64         {1, 8, "Bus"},
   65         {2, 8, "I/O APIC"},
   66         {3, 8, "I/O INT"},
   67         {4, 8, "Local INT"}
   68 };
   69 
   70 typedef struct BUSDATA {
   71         u_char  bus_id;
   72         enum busTypes bus_type;
   73 }       bus_datum;
   74 
   75 typedef struct INTDATA {
   76         u_char  int_type;
   77         u_short int_flags;
   78         u_char  src_bus_id;
   79         u_char  src_bus_irq;
   80         u_char  dst_apic_id;
   81         u_char  dst_apic_int;
   82         u_char  int_vector;
   83 }       io_int, local_int;
   84 
   85 typedef struct BUSTYPENAME {
   86         u_char  type;
   87         char    name[7];
   88 }       bus_type_name;
   89 
   90 /* From MP spec v1.4, table 4-8. */
   91 static bus_type_name bus_type_table[] =
   92 {
   93         {UNKNOWN_BUSTYPE, "CBUS  "},
   94         {UNKNOWN_BUSTYPE, "CBUSII"},
   95         {EISA, "EISA  "},
   96         {UNKNOWN_BUSTYPE, "FUTURE"},
   97         {UNKNOWN_BUSTYPE, "INTERN"},
   98         {ISA, "ISA   "},
   99         {UNKNOWN_BUSTYPE, "MBI   "},
  100         {UNKNOWN_BUSTYPE, "MBII  "},
  101         {MCA, "MCA   "},
  102         {UNKNOWN_BUSTYPE, "MPI   "},
  103         {UNKNOWN_BUSTYPE, "MPSA  "},
  104         {UNKNOWN_BUSTYPE, "NUBUS "},
  105         {PCI, "PCI   "},
  106         {UNKNOWN_BUSTYPE, "PCMCIA"},
  107         {UNKNOWN_BUSTYPE, "TC    "},
  108         {UNKNOWN_BUSTYPE, "VL    "},
  109         {UNKNOWN_BUSTYPE, "VME   "},
  110         {UNKNOWN_BUSTYPE, "XPRESS"}
  111 };
  112 
  113 /* From MP spec v1.4, table 5-1. */
  114 static int default_data[7][5] =
  115 {
  116 /*   nbus, id0, type0, id1, type1 */
  117         {1, 0, ISA, 255, NOBUS},
  118         {1, 0, EISA, 255, NOBUS},
  119         {1, 0, EISA, 255, NOBUS},
  120         {1, 0, MCA, 255, NOBUS},
  121         {2, 0, ISA, 1, PCI},
  122         {2, 0, EISA, 1, PCI},
  123         {2, 0, MCA, 1, PCI}
  124 };
  125 
  126 struct pci_probe_table_args {
  127         u_char bus;
  128         u_char found;
  129 };
  130 
  131 struct pci_route_interrupt_args {
  132         u_char bus;             /* Source bus. */
  133         u_char irq;             /* Source slot:pin. */
  134         int vector;             /* Return value. */
  135 };
  136 
  137 static mpfps_t mpfps;
  138 static mpcth_t mpct;
  139 static void *ioapics[NAPICID];
  140 static bus_datum *busses;
  141 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
  142 static int pci0 = -1;
  143 
  144 static MALLOC_DEFINE(M_MPTABLE, "MP Table", "MP Table Items");
  145 
  146 static enum intr_polarity conforming_polarity(u_char src_bus,
  147             u_char src_bus_irq);
  148 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
  149 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
  150 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
  151 static int      lookup_bus_type(char *name);
  152 static void     mptable_count_items(void);
  153 static void     mptable_count_items_handler(u_char *entry, void *arg);
  154 #ifdef MPTABLE_FORCE_HTT
  155 static void     mptable_hyperthread_fixup(u_int id_mask);
  156 #endif
  157 static void     mptable_parse_apics_and_busses(void);
  158 static void     mptable_parse_apics_and_busses_handler(u_char *entry,
  159     void *arg);
  160 static void     mptable_parse_default_config_ints(void);
  161 static void     mptable_parse_ints(void);
  162 static void     mptable_parse_ints_handler(u_char *entry, void *arg);
  163 static void     mptable_parse_io_int(int_entry_ptr intr);
  164 static void     mptable_parse_local_int(int_entry_ptr intr);
  165 static void     mptable_pci_probe_table_handler(u_char *entry, void *arg);
  166 static void     mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
  167 static void     mptable_pci_setup(void);
  168 static int      mptable_probe(void);
  169 static int      mptable_probe_cpus(void);
  170 static void     mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
  171 static void     mptable_register(void *dummy);
  172 static int      mptable_setup_local(void);
  173 static int      mptable_setup_io(void);
  174 static void     mptable_walk_table(mptable_entry_handler *handler, void *arg);
  175 static int      search_for_sig(u_int32_t target, int count);
  176 
  177 static struct apic_enumerator mptable_enumerator = {
  178         "MPTable",
  179         mptable_probe,
  180         mptable_probe_cpus,
  181         mptable_setup_local,
  182         mptable_setup_io
  183 };
  184 
  185 /*
  186  * look for the MP spec signature
  187  */
  188 
  189 static int
  190 search_for_sig(u_int32_t target, int count)
  191 {
  192         int     x;
  193         u_int32_t *addr = (u_int32_t *) (KERNBASE + target);
  194 
  195         for (x = 0; x < count; x += 4)
  196                 if (addr[x] == MP_SIG)
  197                         /* make array index a byte index */
  198                         return (target + (x * sizeof(u_int32_t)));
  199         return (-1);
  200 }
  201 
  202 static int
  203 lookup_bus_type(char *name)
  204 {
  205         int     x;
  206 
  207         for (x = 0; x < MAX_BUSTYPE; ++x)
  208                 if (strncmp(bus_type_table[x].name, name, 6) == 0)
  209                         return (bus_type_table[x].type);
  210 
  211         return (UNKNOWN_BUSTYPE);
  212 }
  213 
  214 /*
  215  * Look for an Intel MP spec table (ie, SMP capable hardware).
  216  */
  217 static int
  218 mptable_probe(void)
  219 {
  220         int     x;
  221         u_int32_t segment;
  222         u_int32_t target;
  223 
  224         /* see if EBDA exists */
  225         segment = (u_int32_t) *(u_short *)(KERNBASE + 0x40e);
  226         if (segment != 0) {
  227                 /* search first 1K of EBDA */
  228                 target = (u_int32_t) (segment << 4);
  229                 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
  230                         goto found;
  231         } else {
  232                 /* last 1K of base memory, effective 'top of base' passed in */
  233                 target = (u_int32_t) ((basemem * 1024) - 0x400);
  234                 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
  235                         goto found;
  236         }
  237 
  238         /* search the BIOS */
  239         target = (u_int32_t) BIOS_BASE;
  240         if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
  241                 goto found;
  242 
  243         /* nothing found */
  244         return (ENXIO);
  245 
  246 found:
  247         mpfps = (mpfps_t)(KERNBASE + x);
  248 
  249         /* Map in the configuration table if it exists. */
  250         if (mpfps->config_type != 0) {
  251                 if (bootverbose)
  252                         printf(
  253                 "MP Table version 1.%d found using Default Configuration %d\n",
  254                             mpfps->spec_rev, mpfps->config_type);
  255                 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
  256                         printf(
  257                         "MP Table Default Configuration %d is unsupported\n",
  258                             mpfps->config_type);
  259                         return (ENXIO);
  260                 }
  261                 mpct = NULL;
  262         } else {
  263                 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
  264                         printf("%s: Unable to map MP Configuration Table\n",
  265                             __func__);
  266                         return (ENXIO);
  267                 }
  268                 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap);
  269                 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
  270                     1024 * 1024) {
  271                         printf("%s: Unable to map end of MP Config Table\n",
  272                             __func__);
  273                         return (ENXIO);
  274                 }
  275                 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
  276                     mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
  277                         printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
  278                             __func__, mpct->signature[0], mpct->signature[1],
  279                             mpct->signature[2], mpct->signature[3]);
  280                         return (ENXIO);
  281                 }
  282                 if (bootverbose)
  283                         printf(
  284                         "MP Configuration Table version 1.%d found at %p\n",
  285                             mpct->spec_rev, mpct);
  286         }
  287 
  288         return (-100);
  289 }
  290 
  291 /*
  292  * Run through the MP table enumerating CPUs.
  293  */
  294 static int
  295 mptable_probe_cpus(void)
  296 {
  297         u_int cpu_mask;
  298 
  299         /* Is this a pre-defined config? */
  300         if (mpfps->config_type != 0) {
  301                 lapic_create(0, 1);
  302                 lapic_create(1, 0);
  303         } else {
  304                 cpu_mask = 0;
  305                 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
  306 #ifdef MPTABLE_FORCE_HTT
  307                 mptable_hyperthread_fixup(cpu_mask);
  308 #endif
  309         }
  310         return (0);
  311 }
  312 
  313 /*
  314  * Initialize the local APIC on the BSP.
  315  */
  316 static int
  317 mptable_setup_local(void)
  318 {
  319 
  320         /* Is this a pre-defined config? */
  321         printf("MPTable: <");
  322         if (mpfps->config_type != 0) {
  323                 lapic_init(DEFAULT_APIC_BASE);
  324                 printf("Default Configuration %d", mpfps->config_type);
  325         } else {
  326                 lapic_init((uintptr_t)mpct->apic_address);
  327                 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
  328                     (int)sizeof(mpct->product_id), mpct->product_id);
  329         }
  330         printf(">\n");
  331         return (0);
  332 }
  333 
  334 /*
  335  * Run through the MP table enumerating I/O APICs.
  336  */
  337 static int
  338 mptable_setup_io(void)
  339 {
  340         int i;
  341         u_char byte;
  342 
  343         /* First, we count individual items and allocate arrays. */
  344         mptable_count_items();
  345         busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
  346             M_WAITOK);
  347         for (i = 0; i <= mptable_maxbusid; i++)
  348                 busses[i].bus_type = NOBUS;
  349 
  350         /* Second, we run through adding I/O APIC's and busses. */
  351         mptable_parse_apics_and_busses();       
  352 
  353         /* Third, we run through the table tweaking interrupt sources. */
  354         mptable_parse_ints();
  355 
  356         /* Fourth, we register all the I/O APIC's. */
  357         for (i = 0; i < NAPICID; i++)
  358                 if (ioapics[i] != NULL)
  359                         ioapic_register(ioapics[i]);
  360 
  361         /* Fifth, we setup data structures to handle PCI interrupt routing. */
  362         mptable_pci_setup();
  363 
  364         /* Finally, we throw the switch to enable the I/O APIC's. */
  365         if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
  366                 outb(0x22, 0x70);       /* select IMCR */
  367                 byte = inb(0x23);       /* current contents */
  368                 byte |= 0x01;           /* mask external INTR */
  369                 outb(0x23, byte);       /* disconnect 8259s/NMI */
  370         }
  371 
  372         return (0);
  373 }
  374 
  375 static void
  376 mptable_register(void *dummy __unused)
  377 {
  378 
  379         apic_register_enumerator(&mptable_enumerator);
  380 }
  381 SYSINIT(mptable_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST,
  382     mptable_register, NULL)
  383 
  384 /*
  385  * Call the handler routine for each entry in the MP config table.
  386  */
  387 static void
  388 mptable_walk_table(mptable_entry_handler *handler, void *arg)
  389 {
  390         u_int i;
  391         u_char *entry;
  392 
  393         entry = (u_char *)(mpct + 1);
  394         for (i = 0; i < mpct->entry_count; i++) {
  395                 switch (*entry) {
  396                 case MPCT_ENTRY_PROCESSOR:
  397                 case MPCT_ENTRY_IOAPIC:
  398                 case MPCT_ENTRY_BUS:
  399                 case MPCT_ENTRY_INT:
  400                 case MPCT_ENTRY_LOCAL_INT:
  401                         break;
  402                 default:
  403                         panic("%s: Unknown MP Config Entry %d\n", __func__,
  404                             (int)*entry);
  405                 }
  406                 handler(entry, arg);
  407                 entry += basetable_entry_types[*entry].length;
  408         }
  409 }
  410 
  411 static void
  412 mptable_probe_cpus_handler(u_char *entry, void *arg)
  413 {
  414         proc_entry_ptr proc;
  415         u_int *cpu_mask;
  416 
  417         switch (*entry) {
  418         case MPCT_ENTRY_PROCESSOR:
  419                 proc = (proc_entry_ptr)entry;
  420                 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
  421                         lapic_create(proc->apic_id, proc->cpu_flags &
  422                             PROCENTRY_FLAG_BP);
  423                         cpu_mask = (u_int *)arg;
  424                         *cpu_mask |= (1 << proc->apic_id);
  425                 }
  426                 break;
  427         }
  428 }
  429 
  430 static void
  431 mptable_count_items_handler(u_char *entry, void *arg __unused)
  432 {
  433         io_apic_entry_ptr apic;
  434         bus_entry_ptr bus;
  435 
  436         switch (*entry) {
  437         case MPCT_ENTRY_BUS:
  438                 bus = (bus_entry_ptr)entry;
  439                 mptable_nbusses++;
  440                 if (bus->bus_id > mptable_maxbusid)
  441                         mptable_maxbusid = bus->bus_id;
  442                 break;
  443         case MPCT_ENTRY_IOAPIC:
  444                 apic = (io_apic_entry_ptr)entry;
  445                 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
  446                         mptable_nioapics++;
  447                 break;
  448         }
  449 }
  450 
  451 /*
  452  * Count items in the table.
  453  */
  454 static void
  455 mptable_count_items(void)
  456 {
  457 
  458         /* Is this a pre-defined config? */
  459         if (mpfps->config_type != 0) {
  460                 mptable_nioapics = 1;
  461                 switch (mpfps->config_type) {
  462                 case 1:
  463                 case 2:
  464                 case 3:
  465                 case 4:
  466                         mptable_nbusses = 1;
  467                         break;
  468                 case 5:
  469                 case 6:
  470                 case 7:
  471                         mptable_nbusses = 2;
  472                         break;
  473                 default:
  474                         panic("Unknown pre-defined MP Table config type %d",
  475                             mpfps->config_type);
  476                 }
  477                 mptable_maxbusid = mptable_nbusses - 1;
  478         } else
  479                 mptable_walk_table(mptable_count_items_handler, NULL);
  480 }
  481 
  482 /*
  483  * Add a bus or I/O APIC from an entry in the table.
  484  */
  485 static void
  486 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
  487 {
  488         io_apic_entry_ptr apic;
  489         bus_entry_ptr bus;
  490         enum busTypes bus_type;
  491         int i;
  492 
  493 
  494         switch (*entry) {
  495         case MPCT_ENTRY_BUS:
  496                 bus = (bus_entry_ptr)entry;
  497                 bus_type = lookup_bus_type(bus->bus_type);
  498                 if (bus_type == UNKNOWN_BUSTYPE) {
  499                         printf("MPTable: Unknown bus %d type \"", bus->bus_id);
  500                         for (i = 0; i < 6; i++)
  501                                 printf("%c", bus->bus_type[i]);
  502                         printf("\"\n");
  503                 }
  504                 busses[bus->bus_id].bus_id = bus->bus_id;
  505                 busses[bus->bus_id].bus_type = bus_type;
  506                 break;
  507         case MPCT_ENTRY_IOAPIC:
  508                 apic = (io_apic_entry_ptr)entry;
  509                 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
  510                         break;
  511                 if (apic->apic_id >= NAPICID)
  512                         panic("%s: I/O APIC ID %d too high", __func__,
  513                             apic->apic_id);
  514                 if (ioapics[apic->apic_id] != NULL)
  515                         panic("%s: Double APIC ID %d", __func__,
  516                             apic->apic_id);
  517                 ioapics[apic->apic_id] = ioapic_create(
  518                         (uintptr_t)apic->apic_address, apic->apic_id, -1);
  519                 break;
  520         default:
  521                 break;
  522         }
  523 }
  524 
  525 /*
  526  * Enumerate I/O APIC's and busses.
  527  */
  528 static void
  529 mptable_parse_apics_and_busses(void)
  530 {
  531 
  532         /* Is this a pre-defined config? */
  533         if (mpfps->config_type != 0) {
  534                 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
  535                 busses[0].bus_id = 0;
  536                 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
  537                 if (mptable_nbusses > 1) {
  538                         busses[1].bus_id = 1;
  539                         busses[1].bus_type =
  540                             default_data[mpfps->config_type - 1][4];
  541                 }
  542         } else
  543                 mptable_walk_table(mptable_parse_apics_and_busses_handler,
  544                     NULL);
  545 }
  546 
  547 /*
  548  * Determine conforming polarity for a given bus type.
  549  */
  550 static enum intr_polarity
  551 conforming_polarity(u_char src_bus, u_char src_bus_irq)
  552 {
  553 
  554         KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
  555         switch (busses[src_bus].bus_type) {
  556         case ISA:
  557         case EISA:
  558                 return (INTR_POLARITY_HIGH);
  559         case PCI:
  560                 return (INTR_POLARITY_LOW);
  561         default:
  562                 panic("%s: unknown bus type %d", __func__,
  563                     busses[src_bus].bus_type);
  564         }
  565 }
  566 
  567 /*
  568  * Determine conforming trigger for a given bus type.
  569  */
  570 static enum intr_trigger
  571 conforming_trigger(u_char src_bus, u_char src_bus_irq)
  572 {
  573 
  574         KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
  575         switch (busses[src_bus].bus_type) {
  576         case ISA:
  577                 if (elcr_found)
  578                         return (elcr_read_trigger(src_bus_irq));
  579                 else
  580                         return (INTR_TRIGGER_EDGE);
  581         case PCI:
  582                 return (INTR_TRIGGER_LEVEL);
  583         case EISA:
  584                 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
  585                 KASSERT(elcr_found, ("Missing ELCR"));
  586                 return (elcr_read_trigger(src_bus_irq));
  587         default:
  588                 panic("%s: unknown bus type %d", __func__,
  589                     busses[src_bus].bus_type);
  590         }
  591 }
  592 
  593 static enum intr_polarity
  594 intentry_polarity(int_entry_ptr intr)
  595 {
  596 
  597         switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
  598         case INTENTRY_FLAGS_POLARITY_CONFORM:
  599                 return (conforming_polarity(intr->src_bus_id,
  600                             intr->src_bus_irq));
  601         case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
  602                 return (INTR_POLARITY_HIGH);
  603         case INTENTRY_FLAGS_POLARITY_ACTIVELO:
  604                 return (INTR_POLARITY_LOW);
  605         default:
  606                 panic("Bogus interrupt flags");
  607         }
  608 }
  609 
  610 static enum intr_trigger
  611 intentry_trigger(int_entry_ptr intr)
  612 {
  613 
  614         switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
  615         case INTENTRY_FLAGS_TRIGGER_CONFORM:
  616                 return (conforming_trigger(intr->src_bus_id,
  617                             intr->src_bus_irq));
  618         case INTENTRY_FLAGS_TRIGGER_EDGE:
  619                 return (INTR_TRIGGER_EDGE);
  620         case INTENTRY_FLAGS_TRIGGER_LEVEL:
  621                 return (INTR_TRIGGER_LEVEL);
  622         default:
  623                 panic("Bogus interrupt flags");
  624         }
  625 }
  626 
  627 /*
  628  * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
  629  */
  630 static void
  631 mptable_parse_io_int(int_entry_ptr intr)
  632 {
  633         void *ioapic;
  634         u_int pin, apic_id;
  635 
  636         apic_id = intr->dst_apic_id;
  637         if (intr->dst_apic_id == 0xff) {
  638                 /*
  639                  * An APIC ID of 0xff means that the interrupt is connected
  640                  * to the specified pin on all I/O APICs in the system.  If
  641                  * there is only one I/O APIC, then use that APIC to route
  642                  * the interrupts.  If there is more than one I/O APIC, then
  643                  * punt.
  644                  */
  645                 if (mptable_nioapics == 1) {
  646                         apic_id = 0;
  647                         while (ioapics[apic_id] == NULL)
  648                                 apic_id++;
  649                 } else {
  650                         printf(
  651                         "MPTable: Ignoring global interrupt entry for pin %d\n",
  652                             intr->dst_apic_int);
  653                         return;
  654                 }
  655         }
  656         if (apic_id >= NAPICID) {
  657                 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
  658                     intr->dst_apic_id);
  659                 return;
  660         }
  661         ioapic = ioapics[apic_id];
  662         if (ioapic == NULL) {
  663                 printf(
  664         "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
  665                     apic_id);
  666                 return;
  667         }
  668         pin = intr->dst_apic_int;
  669         switch (intr->int_type) {
  670         case INTENTRY_TYPE_INT:
  671                 switch (busses[intr->src_bus_id].bus_type) {
  672                 case NOBUS:
  673                         panic("interrupt from missing bus");
  674                 case ISA:
  675                 case EISA:
  676                         if (busses[intr->src_bus_id].bus_type == ISA)
  677                                 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
  678                         else
  679                                 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
  680                         if (intr->src_bus_irq == pin)
  681                                 break;
  682                         ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
  683                         if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
  684                             intr->src_bus_irq)
  685                                 ioapic_disable_pin(ioapic, intr->src_bus_irq);
  686                         break;
  687                 case PCI:
  688                         ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
  689                         break;
  690                 default:
  691                         ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
  692                         break;
  693                 }
  694                 break;
  695         case INTENTRY_TYPE_NMI:
  696                 ioapic_set_nmi(ioapic, pin);
  697                 break;
  698         case INTENTRY_TYPE_SMI:
  699                 ioapic_set_smi(ioapic, pin);
  700                 break;
  701         case INTENTRY_TYPE_EXTINT:
  702                 ioapic_set_extint(ioapic, pin);
  703                 break;
  704         default:
  705                 panic("%s: invalid interrupt entry type %d\n", __func__,
  706                     intr->int_type);
  707         }
  708         if (intr->int_type == INTENTRY_TYPE_INT ||
  709             (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
  710             INTENTRY_FLAGS_TRIGGER_CONFORM)
  711                 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
  712         if (intr->int_type == INTENTRY_TYPE_INT ||
  713             (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
  714             INTENTRY_FLAGS_POLARITY_CONFORM)
  715                 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
  716 }
  717 
  718 /*
  719  * Parse an interrupt entry for a local APIC LVT pin.
  720  */
  721 static void
  722 mptable_parse_local_int(int_entry_ptr intr)
  723 {
  724         u_int apic_id, pin;
  725 
  726         if (intr->dst_apic_id == 0xff)
  727                 apic_id = APIC_ID_ALL;
  728         else
  729                 apic_id = intr->dst_apic_id;
  730         if (intr->dst_apic_int == 0)
  731                 pin = LVT_LINT0;
  732         else
  733                 pin = LVT_LINT1;
  734         switch (intr->int_type) {
  735         case INTENTRY_TYPE_INT:
  736 #if 1
  737                 printf(
  738         "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
  739                     intr->dst_apic_int, intr->src_bus_irq);
  740                 return;
  741 #else
  742                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
  743                 break;
  744 #endif
  745         case INTENTRY_TYPE_NMI:
  746                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
  747                 break;
  748         case INTENTRY_TYPE_SMI:
  749                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
  750                 break;
  751         case INTENTRY_TYPE_EXTINT:
  752                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
  753                 break;
  754         default:
  755                 panic("%s: invalid interrupt entry type %d\n", __func__,
  756                     intr->int_type);
  757         }
  758         if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
  759             INTENTRY_FLAGS_TRIGGER_CONFORM)
  760                 lapic_set_lvt_triggermode(apic_id, pin,
  761                     intentry_trigger(intr));
  762         if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
  763             INTENTRY_FLAGS_POLARITY_CONFORM)
  764                 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
  765 }
  766 
  767 /*
  768  * Parse interrupt entries.
  769  */
  770 static void
  771 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
  772 {
  773         int_entry_ptr intr;
  774 
  775         intr = (int_entry_ptr)entry;
  776         switch (*entry) {
  777         case MPCT_ENTRY_INT:
  778                 mptable_parse_io_int(intr);
  779                 break;
  780         case MPCT_ENTRY_LOCAL_INT:
  781                 mptable_parse_local_int(intr);
  782                 break;
  783         }
  784 }
  785 
  786 /*
  787  * Configure interrupt pins for a default configuration.  For details see
  788  * Table 5-2 in Section 5 of the MP Table specification.
  789  */
  790 static void
  791 mptable_parse_default_config_ints(void)
  792 {
  793         struct INTENTRY entry;
  794         int pin;
  795 
  796         /*
  797          * All default configs route IRQs from bus 0 to the first 16 pins
  798          * of the first I/O APIC with an APIC ID of 2.
  799          */
  800         entry.type = MPCT_ENTRY_INT;
  801         entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
  802             INTENTRY_FLAGS_TRIGGER_CONFORM;
  803         entry.src_bus_id = 0;
  804         entry.dst_apic_id = 2;
  805 
  806         /* Run through all 16 pins. */
  807         for (pin = 0; pin < 16; pin++) {
  808                 entry.dst_apic_int = pin;
  809                 switch (pin) {
  810                 case 0:
  811                         /* Pin 0 is an ExtINT pin. */
  812                         entry.int_type = INTENTRY_TYPE_EXTINT;
  813                         break;
  814                 case 2:
  815                         /* IRQ 0 is routed to pin 2. */
  816                         entry.int_type = INTENTRY_TYPE_INT;
  817                         entry.src_bus_irq = 0;
  818                         break;
  819                 default:
  820                         /* All other pins are identity mapped. */
  821                         entry.int_type = INTENTRY_TYPE_INT;
  822                         entry.src_bus_irq = pin;
  823                         break;
  824                 }
  825                 mptable_parse_io_int(&entry);
  826         }
  827 
  828         /* Certain configs disable certain pins. */
  829         if (mpfps->config_type == 7)
  830                 ioapic_disable_pin(ioapics[2], 0);
  831         if (mpfps->config_type == 2) {
  832                 ioapic_disable_pin(ioapics[2], 2);
  833                 ioapic_disable_pin(ioapics[2], 13);
  834         }
  835 }
  836 
  837 /*
  838  * Configure the interrupt pins
  839  */
  840 static void
  841 mptable_parse_ints(void)
  842 {
  843 
  844         /* Is this a pre-defined config? */
  845         if (mpfps->config_type != 0) {
  846                 /* Configure LINT pins. */
  847                 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT0, APIC_LVT_DM_EXTINT);
  848                 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT1, APIC_LVT_DM_NMI);
  849 
  850                 /* Configure I/O APIC pins. */
  851                 mptable_parse_default_config_ints();
  852         } else
  853                 mptable_walk_table(mptable_parse_ints_handler, NULL);
  854 }
  855 
  856 #ifdef MPTABLE_FORCE_HTT
  857 /*
  858  * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
  859  * that aren't already listed in the table.
  860  *
  861  * XXX: We assume that all of the physical CPUs in the
  862  * system have the same number of logical CPUs.
  863  *
  864  * XXX: We assume that APIC ID's are allocated such that
  865  * the APIC ID's for a physical processor are aligned
  866  * with the number of logical CPU's in the processor.
  867  */
  868 static void
  869 mptable_hyperthread_fixup(u_int id_mask)
  870 {
  871         u_int i, id, logical_cpus;
  872 
  873         /* Nothing to do if there is no HTT support. */
  874         if ((cpu_feature & CPUID_HTT) == 0)
  875                 return;
  876         logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
  877         if (logical_cpus <= 1)
  878                 return;
  879 
  880         /*
  881          * For each APIC ID of a CPU that is set in the mask,
  882          * scan the other candidate APIC ID's for this
  883          * physical processor.  If any of those ID's are
  884          * already in the table, then kill the fixup.
  885          */
  886         for (id = 0; id < NAPICID; id++) {
  887                 if ((id_mask & 1 << id) == 0)
  888                         continue;
  889                 /* First, make sure we are on a logical_cpus boundary. */
  890                 if (id % logical_cpus != 0)
  891                         return;
  892                 for (i = id + 1; i < id + logical_cpus; i++)
  893                         if ((id_mask & 1 << i) != 0)
  894                                 return;
  895         }
  896 
  897         /*
  898          * Ok, the ID's checked out, so perform the fixup by
  899          * adding the logical CPUs.
  900          */
  901         while ((id = ffs(id_mask)) != 0) {
  902                 id--;
  903                 for (i = id + 1; i < id + logical_cpus; i++) {
  904                         if (bootverbose)
  905                                 printf(
  906                         "MPTable: Adding logical CPU %d from main CPU %d\n",
  907                                     i, id);
  908                         lapic_create(i, 0);
  909                 }
  910                 id_mask &= ~(1 << id);
  911         }
  912 }
  913 #endif /* MPTABLE_FORCE_HTT */
  914 
  915 /*
  916  * Support code for routing PCI interrupts using the MP Table.
  917  */
  918 static void
  919 mptable_pci_setup(void)
  920 {
  921         int i;
  922 
  923         /*
  924          * Find the first pci bus and call it 0.  Panic if pci0 is not
  925          * bus zero and there are multiple PCI busses.
  926          */
  927         for (i = 0; i <= mptable_maxbusid; i++)
  928                 if (busses[i].bus_type == PCI) {
  929                         if (pci0 == -1)
  930                                 pci0 = i;
  931                         else if (pci0 != 0)
  932                                 panic(
  933                 "MPTable contains multiple PCI busses but no PCI bus 0");
  934                 }
  935 }
  936 
  937 static void
  938 mptable_pci_probe_table_handler(u_char *entry, void *arg)
  939 {
  940         struct pci_probe_table_args *args;
  941         int_entry_ptr intr;
  942 
  943         if (*entry != MPCT_ENTRY_INT)
  944                 return;
  945         intr = (int_entry_ptr)entry;
  946         args = (struct pci_probe_table_args *)arg;
  947         KASSERT(args->bus <= mptable_maxbusid,
  948             ("bus %d is too big", args->bus));
  949         KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
  950         if (intr->src_bus_id == args->bus)
  951                 args->found = 1;
  952 }
  953 
  954 int
  955 mptable_pci_probe_table(int bus)
  956 {
  957         struct pci_probe_table_args args;
  958 
  959         if (bus < 0)
  960                 return (EINVAL);
  961         if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
  962                 return (ENXIO);
  963         if (busses[pci0 + bus].bus_type != PCI)
  964                 return (ENXIO);
  965         args.bus = pci0 + bus;
  966         args.found = 0;
  967         mptable_walk_table(mptable_pci_probe_table_handler, &args);
  968         if (args.found == 0)
  969                 return (ENXIO);
  970         return (0);
  971 }
  972 
  973 static void
  974 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
  975 {
  976         struct pci_route_interrupt_args *args;
  977         int_entry_ptr intr;
  978         int vector;
  979 
  980         if (*entry != MPCT_ENTRY_INT)
  981                 return;
  982         intr = (int_entry_ptr)entry;
  983         args = (struct pci_route_interrupt_args *)arg;
  984         if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
  985                 return;
  986 
  987         /* Make sure the APIC maps to a known APIC. */
  988         KASSERT(ioapics[intr->dst_apic_id] != NULL,
  989             ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
  990 
  991         /*
  992          * Look up the vector for this APIC / pin combination.  If we
  993          * have previously matched an entry for this PCI IRQ but it
  994          * has the same vector as this entry, just return.  Otherwise,
  995          * we use the vector for this APIC / pin combination.
  996          */
  997         vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
  998             intr->dst_apic_int);
  999         if (args->vector == vector)
 1000                 return;
 1001         KASSERT(args->vector == -1,
 1002             ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
 1003             args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
 1004             vector));
 1005         args->vector = vector;
 1006 }
 1007 
 1008 int
 1009 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
 1010 {
 1011         struct pci_route_interrupt_args args;
 1012         int slot;
 1013 
 1014         /* Like ACPI, pin numbers are 0-3, not 1-4. */
 1015         pin--;
 1016         KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
 1017         args.bus = pci_get_bus(dev) + pci0;
 1018         slot = pci_get_slot(dev);
 1019 
 1020         /*
 1021          * PCI interrupt entries in the MP Table encode both the slot and
 1022          * pin into the IRQ with the pin being the two least significant
 1023          * bits, the slot being the next five bits, and the most significant
 1024          * bit being reserved.
 1025          */
 1026         args.irq = slot << 2 | pin;
 1027         args.vector = -1;
 1028         mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
 1029         if (args.vector < 0) {
 1030                 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
 1031                     'A' + pin);
 1032                 return (PCI_INVALID_IRQ);
 1033         }
 1034         if (bootverbose)
 1035                 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
 1036                     'A' + pin, args.vector);
 1037         return (args.vector);
 1038 }

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