The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/amd64/amd64/mptable.c

Version: -  FREEBSD  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-2  -  FREEBSD-11-1  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-4  -  FREEBSD-10-3  -  FREEBSD-10-2  -  FREEBSD-10-1  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-3  -  FREEBSD-9-2  -  FREEBSD-9-1  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-4  -  FREEBSD-8-3  -  FREEBSD-8-2  -  FREEBSD-8-1  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-4  -  FREEBSD-7-3  -  FREEBSD-7-2  -  FREEBSD-7-1  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-4  -  FREEBSD-6-3  -  FREEBSD-6-2  -  FREEBSD-6-1  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-5  -  FREEBSD-5-4  -  FREEBSD-5-3  -  FREEBSD-5-2  -  FREEBSD-5-1  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  linux-2.6  -  linux-2.4.22  -  MK83  -  MK84  -  PLAN9  -  DFBSD  -  NETBSD  -  NETBSD5  -  NETBSD4  -  NETBSD3  -  NETBSD20  -  OPENBSD  -  xnu-517  -  xnu-792  -  xnu-792.6.70  -  xnu-1228  -  xnu-1456.1.26  -  xnu-1699.24.8  -  xnu-2050.18.24  -  OPENSOLARIS  -  minix-3-1-1 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
    3  * Copyright (c) 1996, by Steve Passe
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. The name of the developer may NOT be used to endorse or promote products
   12  *    derived from this software without specific prior written permission.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/6.4/sys/amd64/amd64/mptable.c 172452 2007-10-05 15:22:37Z jhb $");
   29 
   30 #include <sys/param.h>
   31 #include <sys/systm.h>
   32 #include <sys/bus.h>
   33 #include <sys/kernel.h>
   34 #include <sys/malloc.h>
   35 
   36 #include <vm/vm.h>
   37 #include <vm/vm_param.h>
   38 #include <vm/pmap.h>
   39 
   40 #include <machine/apicreg.h>
   41 #include <machine/frame.h>
   42 #include <machine/intr_machdep.h>
   43 #include <machine/apicvar.h>
   44 #include <machine/md_var.h>
   45 #include <machine/mptable.h>
   46 #include <machine/specialreg.h>
   47 
   48 #include <dev/pci/pcivar.h>
   49 
   50 /* string defined by the Intel MP Spec as identifying the MP table */
   51 #define MP_SIG                  0x5f504d5f      /* _MP_ */
   52 
   53 #define MAX_LAPIC_ID            63      /* Max local APIC ID for HTT fixup */
   54 
   55 #define BIOS_BASE               (0xf0000)
   56 #define BIOS_SIZE               (0x10000)
   57 #define BIOS_COUNT              (BIOS_SIZE/4)
   58 
   59 typedef void mptable_entry_handler(u_char *entry, void *arg);
   60 
   61 static basetable_entry basetable_entry_types[] =
   62 {
   63         {0, 20, "Processor"},
   64         {1, 8, "Bus"},
   65         {2, 8, "I/O APIC"},
   66         {3, 8, "I/O INT"},
   67         {4, 8, "Local INT"}
   68 };
   69 
   70 typedef struct BUSDATA {
   71         u_char  bus_id;
   72         enum busTypes bus_type;
   73 }       bus_datum;
   74 
   75 typedef struct INTDATA {
   76         u_char  int_type;
   77         u_short int_flags;
   78         u_char  src_bus_id;
   79         u_char  src_bus_irq;
   80         u_char  dst_apic_id;
   81         u_char  dst_apic_int;
   82         u_char  int_vector;
   83 }       io_int, local_int;
   84 
   85 typedef struct BUSTYPENAME {
   86         u_char  type;
   87         char    name[7];
   88 }       bus_type_name;
   89 
   90 /* From MP spec v1.4, table 4-8. */
   91 static bus_type_name bus_type_table[] =
   92 {
   93         {UNKNOWN_BUSTYPE, "CBUS  "},
   94         {UNKNOWN_BUSTYPE, "CBUSII"},
   95         {EISA, "EISA  "},
   96         {UNKNOWN_BUSTYPE, "FUTURE"},
   97         {UNKNOWN_BUSTYPE, "INTERN"},
   98         {ISA, "ISA   "},
   99         {UNKNOWN_BUSTYPE, "MBI   "},
  100         {UNKNOWN_BUSTYPE, "MBII  "},
  101         {MCA, "MCA   "},
  102         {UNKNOWN_BUSTYPE, "MPI   "},
  103         {UNKNOWN_BUSTYPE, "MPSA  "},
  104         {UNKNOWN_BUSTYPE, "NUBUS "},
  105         {PCI, "PCI   "},
  106         {UNKNOWN_BUSTYPE, "PCMCIA"},
  107         {UNKNOWN_BUSTYPE, "TC    "},
  108         {UNKNOWN_BUSTYPE, "VL    "},
  109         {UNKNOWN_BUSTYPE, "VME   "},
  110         {UNKNOWN_BUSTYPE, "XPRESS"}
  111 };
  112 
  113 /* From MP spec v1.4, table 5-1. */
  114 static int default_data[7][5] =
  115 {
  116 /*   nbus, id0, type0, id1, type1 */
  117         {1, 0, ISA, 255, NOBUS},
  118         {1, 0, EISA, 255, NOBUS},
  119         {1, 0, EISA, 255, NOBUS},
  120         {1, 0, MCA, 255, NOBUS},
  121         {2, 0, ISA, 1, PCI},
  122         {2, 0, EISA, 1, PCI},
  123         {2, 0, MCA, 1, PCI}
  124 };
  125 
  126 struct pci_probe_table_args {
  127         u_char bus;
  128         u_char found;
  129 };
  130 
  131 struct pci_route_interrupt_args {
  132         u_char bus;             /* Source bus. */
  133         u_char irq;             /* Source slot:pin. */
  134         int vector;             /* Return value. */
  135 };
  136 
  137 static mpfps_t mpfps;
  138 static mpcth_t mpct;
  139 static void *ioapics[MAX_APIC_ID + 1];
  140 static bus_datum *busses;
  141 static int mptable_nioapics, mptable_nbusses, mptable_maxbusid;
  142 static int pci0 = -1;
  143 
  144 static MALLOC_DEFINE(M_MPTABLE, "MP Table", "MP Table Items");
  145 
  146 static enum intr_polarity conforming_polarity(u_char src_bus,
  147             u_char src_bus_irq);
  148 static enum intr_trigger conforming_trigger(u_char src_bus, u_char src_bus_irq);
  149 static enum intr_polarity intentry_polarity(int_entry_ptr intr);
  150 static enum intr_trigger intentry_trigger(int_entry_ptr intr);
  151 static int      lookup_bus_type(char *name);
  152 static void     mptable_count_items(void);
  153 static void     mptable_count_items_handler(u_char *entry, void *arg);
  154 #ifdef MPTABLE_FORCE_HTT
  155 static void     mptable_hyperthread_fixup(u_long id_mask);
  156 #endif
  157 static void     mptable_parse_apics_and_busses(void);
  158 static void     mptable_parse_apics_and_busses_handler(u_char *entry,
  159     void *arg);
  160 static void     mptable_parse_default_config_ints(void);
  161 static void     mptable_parse_ints(void);
  162 static void     mptable_parse_ints_handler(u_char *entry, void *arg);
  163 static void     mptable_parse_io_int(int_entry_ptr intr);
  164 static void     mptable_parse_local_int(int_entry_ptr intr);
  165 static void     mptable_pci_probe_table_handler(u_char *entry, void *arg);
  166 static void     mptable_pci_route_interrupt_handler(u_char *entry, void *arg);
  167 static void     mptable_pci_setup(void);
  168 static int      mptable_probe(void);
  169 static int      mptable_probe_cpus(void);
  170 static void     mptable_probe_cpus_handler(u_char *entry, void *arg __unused);
  171 static void     mptable_register(void *dummy);
  172 static int      mptable_setup_local(void);
  173 static int      mptable_setup_io(void);
  174 static void     mptable_walk_table(mptable_entry_handler *handler, void *arg);
  175 static int      search_for_sig(u_int32_t target, int count);
  176 
  177 static struct apic_enumerator mptable_enumerator = {
  178         "MPTable",
  179         mptable_probe,
  180         mptable_probe_cpus,
  181         mptable_setup_local,
  182         mptable_setup_io
  183 };
  184 
  185 /*
  186  * look for the MP spec signature
  187  */
  188 
  189 static int
  190 search_for_sig(u_int32_t target, int count)
  191 {
  192         int     x;
  193         u_int32_t *addr = (u_int32_t *) (KERNBASE + target);
  194 
  195         for (x = 0; x < count; x += 4)
  196                 if (addr[x] == MP_SIG)
  197                         /* make array index a byte index */
  198                         return (target + (x * sizeof(u_int32_t)));
  199         return (-1);
  200 }
  201 
  202 static int
  203 lookup_bus_type(char *name)
  204 {
  205         int     x;
  206 
  207         for (x = 0; x < MAX_BUSTYPE; ++x)
  208                 if (strncmp(bus_type_table[x].name, name, 6) == 0)
  209                         return (bus_type_table[x].type);
  210 
  211         return (UNKNOWN_BUSTYPE);
  212 }
  213 
  214 /*
  215  * Look for an Intel MP spec table (ie, SMP capable hardware).
  216  */
  217 static int
  218 mptable_probe(void)
  219 {
  220         int     x;
  221         u_int32_t segment;
  222         u_int32_t target;
  223 
  224         /* see if EBDA exists */
  225         segment = (u_int32_t) *(u_short *)(KERNBASE + 0x40e);
  226         if (segment != 0) {
  227                 /* search first 1K of EBDA */
  228                 target = (u_int32_t) (segment << 4);
  229                 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
  230                         goto found;
  231         } else {
  232                 /* last 1K of base memory, effective 'top of base' passed in */
  233                 target = (u_int32_t) ((basemem * 1024) - 0x400);
  234                 if ((x = search_for_sig(target, 1024 / 4)) >= 0)
  235                         goto found;
  236         }
  237 
  238         /* search the BIOS */
  239         target = (u_int32_t) BIOS_BASE;
  240         if ((x = search_for_sig(target, BIOS_COUNT)) >= 0)
  241                 goto found;
  242 
  243         /* nothing found */
  244         return (ENXIO);
  245 
  246 found:
  247         mpfps = (mpfps_t)(KERNBASE + x);
  248 
  249         /* Map in the configuration table if it exists. */
  250         if (mpfps->config_type != 0) {
  251                 if (bootverbose)
  252                         printf(
  253                 "MP Table version 1.%d found using Default Configuration %d\n",
  254                             mpfps->spec_rev, mpfps->config_type);
  255                 if (mpfps->config_type != 5 && mpfps->config_type != 6) {
  256                         printf(
  257                         "MP Table Default Configuration %d is unsupported\n",
  258                             mpfps->config_type);
  259                         return (ENXIO);
  260                 }
  261                 mpct = NULL;
  262         } else {
  263                 if ((uintptr_t)mpfps->pap >= 1024 * 1024) {
  264                         printf("%s: Unable to map MP Configuration Table\n",
  265                             __func__);
  266                         return (ENXIO);
  267                 }
  268                 mpct = (mpcth_t)(KERNBASE + (uintptr_t)mpfps->pap);
  269                 if (mpct->base_table_length + (uintptr_t)mpfps->pap >=
  270                     1024 * 1024) {
  271                         printf("%s: Unable to map end of MP Config Table\n",
  272                             __func__);
  273                         return (ENXIO);
  274                 }
  275                 if (mpct->signature[0] != 'P' || mpct->signature[1] != 'C' ||
  276                     mpct->signature[2] != 'M' || mpct->signature[3] != 'P') {
  277                         printf("%s: MP Config Table has bad signature: %c%c%c%c\n",
  278                             __func__, mpct->signature[0], mpct->signature[1],
  279                             mpct->signature[2], mpct->signature[3]);
  280                         return (ENXIO);
  281                 }
  282                 if (bootverbose)
  283                         printf(
  284                         "MP Configuration Table version 1.%d found at %p\n",
  285                             mpct->spec_rev, mpct);
  286         }
  287 
  288         return (-100);
  289 }
  290 
  291 /*
  292  * Run through the MP table enumerating CPUs.
  293  */
  294 static int
  295 mptable_probe_cpus(void)
  296 {
  297         u_long cpu_mask;
  298 
  299         /* Is this a pre-defined config? */
  300         if (mpfps->config_type != 0) {
  301                 lapic_create(0, 1);
  302                 lapic_create(1, 0);
  303         } else {
  304                 cpu_mask = 0;
  305                 mptable_walk_table(mptable_probe_cpus_handler, &cpu_mask);
  306 #ifdef MPTABLE_FORCE_HTT
  307                 mptable_hyperthread_fixup(cpu_mask);
  308 #endif
  309         }
  310         return (0);
  311 }
  312 
  313 /*
  314  * Initialize the local APIC on the BSP.
  315  */
  316 static int
  317 mptable_setup_local(void)
  318 {
  319 
  320         /* Is this a pre-defined config? */
  321         printf("MPTable: <");
  322         if (mpfps->config_type != 0) {
  323                 lapic_init(DEFAULT_APIC_BASE);
  324                 printf("Default Configuration %d", mpfps->config_type);
  325         } else {
  326                 lapic_init((uintptr_t)mpct->apic_address);
  327                 printf("%.*s %.*s", (int)sizeof(mpct->oem_id), mpct->oem_id,
  328                     (int)sizeof(mpct->product_id), mpct->product_id);
  329         }
  330         printf(">\n");
  331         return (0);
  332 }
  333 
  334 /*
  335  * Run through the MP table enumerating I/O APICs.
  336  */
  337 static int
  338 mptable_setup_io(void)
  339 {
  340         int i;
  341         u_char byte;
  342 
  343         /* First, we count individual items and allocate arrays. */
  344         mptable_count_items();
  345         busses = malloc((mptable_maxbusid + 1) * sizeof(bus_datum), M_MPTABLE,
  346             M_WAITOK);
  347         for (i = 0; i <= mptable_maxbusid; i++)
  348                 busses[i].bus_type = NOBUS;
  349 
  350         /* Second, we run through adding I/O APIC's and busses. */
  351         mptable_parse_apics_and_busses();       
  352 
  353         /* Third, we run through the table tweaking interrupt sources. */
  354         mptable_parse_ints();
  355 
  356         /* Fourth, we register all the I/O APIC's. */
  357         for (i = 0; i <= MAX_APIC_ID; i++)
  358                 if (ioapics[i] != NULL)
  359                         ioapic_register(ioapics[i]);
  360 
  361         /* Fifth, we setup data structures to handle PCI interrupt routing. */
  362         mptable_pci_setup();
  363 
  364         /* Finally, we throw the switch to enable the I/O APIC's. */
  365         if (mpfps->mpfb2 & MPFB2_IMCR_PRESENT) {
  366                 outb(0x22, 0x70);       /* select IMCR */
  367                 byte = inb(0x23);       /* current contents */
  368                 byte |= 0x01;           /* mask external INTR */
  369                 outb(0x23, byte);       /* disconnect 8259s/NMI */
  370         }
  371 
  372         return (0);
  373 }
  374 
  375 static void
  376 mptable_register(void *dummy __unused)
  377 {
  378 
  379         apic_register_enumerator(&mptable_enumerator);
  380 }
  381 SYSINIT(mptable_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST,
  382     mptable_register, NULL)
  383 
  384 /*
  385  * Call the handler routine for each entry in the MP config table.
  386  */
  387 static void
  388 mptable_walk_table(mptable_entry_handler *handler, void *arg)
  389 {
  390         u_int i;
  391         u_char *entry;
  392 
  393         entry = (u_char *)(mpct + 1);
  394         for (i = 0; i < mpct->entry_count; i++) {
  395                 switch (*entry) {
  396                 case MPCT_ENTRY_PROCESSOR:
  397                 case MPCT_ENTRY_IOAPIC:
  398                 case MPCT_ENTRY_BUS:
  399                 case MPCT_ENTRY_INT:
  400                 case MPCT_ENTRY_LOCAL_INT:
  401                         break;
  402                 default:
  403                         panic("%s: Unknown MP Config Entry %d\n", __func__,
  404                             (int)*entry);
  405                 }
  406                 handler(entry, arg);
  407                 entry += basetable_entry_types[*entry].length;
  408         }
  409 }
  410 
  411 static void
  412 mptable_probe_cpus_handler(u_char *entry, void *arg)
  413 {
  414         proc_entry_ptr proc;
  415         u_long *cpu_mask;
  416 
  417         switch (*entry) {
  418         case MPCT_ENTRY_PROCESSOR:
  419                 proc = (proc_entry_ptr)entry;
  420                 if (proc->cpu_flags & PROCENTRY_FLAG_EN) {
  421                         lapic_create(proc->apic_id, proc->cpu_flags &
  422                             PROCENTRY_FLAG_BP);
  423                         if (proc->apic_id < MAX_LAPIC_ID) {
  424                                 cpu_mask = (u_long *)arg;
  425                                 *cpu_mask |= (1ul << proc->apic_id);
  426                         }
  427                 }
  428                 break;
  429         }
  430 }
  431 
  432 static void
  433 mptable_count_items_handler(u_char *entry, void *arg __unused)
  434 {
  435         io_apic_entry_ptr apic;
  436         bus_entry_ptr bus;
  437 
  438         switch (*entry) {
  439         case MPCT_ENTRY_BUS:
  440                 bus = (bus_entry_ptr)entry;
  441                 mptable_nbusses++;
  442                 if (bus->bus_id > mptable_maxbusid)
  443                         mptable_maxbusid = bus->bus_id;
  444                 break;
  445         case MPCT_ENTRY_IOAPIC:
  446                 apic = (io_apic_entry_ptr)entry;
  447                 if (apic->apic_flags & IOAPICENTRY_FLAG_EN)
  448                         mptable_nioapics++;
  449                 break;
  450         }
  451 }
  452 
  453 /*
  454  * Count items in the table.
  455  */
  456 static void
  457 mptable_count_items(void)
  458 {
  459 
  460         /* Is this a pre-defined config? */
  461         if (mpfps->config_type != 0) {
  462                 mptable_nioapics = 1;
  463                 switch (mpfps->config_type) {
  464                 case 1:
  465                 case 2:
  466                 case 3:
  467                 case 4:
  468                         mptable_nbusses = 1;
  469                         break;
  470                 case 5:
  471                 case 6:
  472                 case 7:
  473                         mptable_nbusses = 2;
  474                         break;
  475                 default:
  476                         panic("Unknown pre-defined MP Table config type %d",
  477                             mpfps->config_type);
  478                 }
  479                 mptable_maxbusid = mptable_nbusses - 1;
  480         } else
  481                 mptable_walk_table(mptable_count_items_handler, NULL);
  482 }
  483 
  484 /*
  485  * Add a bus or I/O APIC from an entry in the table.
  486  */
  487 static void
  488 mptable_parse_apics_and_busses_handler(u_char *entry, void *arg __unused)
  489 {
  490         io_apic_entry_ptr apic;
  491         bus_entry_ptr bus;
  492         enum busTypes bus_type;
  493         int i;
  494 
  495 
  496         switch (*entry) {
  497         case MPCT_ENTRY_BUS:
  498                 bus = (bus_entry_ptr)entry;
  499                 bus_type = lookup_bus_type(bus->bus_type);
  500                 if (bus_type == UNKNOWN_BUSTYPE) {
  501                         printf("MPTable: Unknown bus %d type \"", bus->bus_id);
  502                         for (i = 0; i < 6; i++)
  503                                 printf("%c", bus->bus_type[i]);
  504                         printf("\"\n");
  505                 }
  506                 busses[bus->bus_id].bus_id = bus->bus_id;
  507                 busses[bus->bus_id].bus_type = bus_type;
  508                 break;
  509         case MPCT_ENTRY_IOAPIC:
  510                 apic = (io_apic_entry_ptr)entry;
  511                 if (!(apic->apic_flags & IOAPICENTRY_FLAG_EN))
  512                         break;
  513                 if (apic->apic_id > MAX_APIC_ID)
  514                         panic("%s: I/O APIC ID %d too high", __func__,
  515                             apic->apic_id);
  516                 if (ioapics[apic->apic_id] != NULL)
  517                         panic("%s: Double APIC ID %d", __func__,
  518                             apic->apic_id);
  519                 ioapics[apic->apic_id] = ioapic_create(
  520                         (uintptr_t)apic->apic_address, apic->apic_id, -1);
  521                 break;
  522         default:
  523                 break;
  524         }
  525 }
  526 
  527 /*
  528  * Enumerate I/O APIC's and busses.
  529  */
  530 static void
  531 mptable_parse_apics_and_busses(void)
  532 {
  533 
  534         /* Is this a pre-defined config? */
  535         if (mpfps->config_type != 0) {
  536                 ioapics[2] = ioapic_create(DEFAULT_IO_APIC_BASE, 2, 0);
  537                 busses[0].bus_id = 0;
  538                 busses[0].bus_type = default_data[mpfps->config_type - 1][2];
  539                 if (mptable_nbusses > 1) {
  540                         busses[1].bus_id = 1;
  541                         busses[1].bus_type =
  542                             default_data[mpfps->config_type - 1][4];
  543                 }
  544         } else
  545                 mptable_walk_table(mptable_parse_apics_and_busses_handler,
  546                     NULL);
  547 }
  548 
  549 /*
  550  * Determine conforming polarity for a given bus type.
  551  */
  552 static enum intr_polarity
  553 conforming_polarity(u_char src_bus, u_char src_bus_irq)
  554 {
  555 
  556         KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
  557         switch (busses[src_bus].bus_type) {
  558         case ISA:
  559         case EISA:
  560                 return (INTR_POLARITY_HIGH);
  561         case PCI:
  562                 return (INTR_POLARITY_LOW);
  563         default:
  564                 panic("%s: unknown bus type %d", __func__,
  565                     busses[src_bus].bus_type);
  566         }
  567 }
  568 
  569 /*
  570  * Determine conforming trigger for a given bus type.
  571  */
  572 static enum intr_trigger
  573 conforming_trigger(u_char src_bus, u_char src_bus_irq)
  574 {
  575 
  576         KASSERT(src_bus <= mptable_maxbusid, ("bus id %d too large", src_bus));
  577         switch (busses[src_bus].bus_type) {
  578         case ISA:
  579                 if (elcr_found)
  580                         return (elcr_read_trigger(src_bus_irq));
  581                 else
  582                         return (INTR_TRIGGER_EDGE);
  583         case PCI:
  584                 return (INTR_TRIGGER_LEVEL);
  585         case EISA:
  586                 KASSERT(src_bus_irq < 16, ("Invalid EISA IRQ %d", src_bus_irq));
  587                 KASSERT(elcr_found, ("Missing ELCR"));
  588                 return (elcr_read_trigger(src_bus_irq));
  589         default:
  590                 panic("%s: unknown bus type %d", __func__,
  591                     busses[src_bus].bus_type);
  592         }
  593 }
  594 
  595 static enum intr_polarity
  596 intentry_polarity(int_entry_ptr intr)
  597 {
  598 
  599         switch (intr->int_flags & INTENTRY_FLAGS_POLARITY) {
  600         case INTENTRY_FLAGS_POLARITY_CONFORM:
  601                 return (conforming_polarity(intr->src_bus_id,
  602                             intr->src_bus_irq));
  603         case INTENTRY_FLAGS_POLARITY_ACTIVEHI:
  604                 return (INTR_POLARITY_HIGH);
  605         case INTENTRY_FLAGS_POLARITY_ACTIVELO:
  606                 return (INTR_POLARITY_LOW);
  607         default:
  608                 panic("Bogus interrupt flags");
  609         }
  610 }
  611 
  612 static enum intr_trigger
  613 intentry_trigger(int_entry_ptr intr)
  614 {
  615 
  616         switch (intr->int_flags & INTENTRY_FLAGS_TRIGGER) {
  617         case INTENTRY_FLAGS_TRIGGER_CONFORM:
  618                 return (conforming_trigger(intr->src_bus_id,
  619                             intr->src_bus_irq));
  620         case INTENTRY_FLAGS_TRIGGER_EDGE:
  621                 return (INTR_TRIGGER_EDGE);
  622         case INTENTRY_FLAGS_TRIGGER_LEVEL:
  623                 return (INTR_TRIGGER_LEVEL);
  624         default:
  625                 panic("Bogus interrupt flags");
  626         }
  627 }
  628 
  629 /*
  630  * Parse an interrupt entry for an I/O interrupt routed to a pin on an I/O APIC.
  631  */
  632 static void
  633 mptable_parse_io_int(int_entry_ptr intr)
  634 {
  635         void *ioapic;
  636         u_int pin, apic_id;
  637 
  638         apic_id = intr->dst_apic_id;
  639         if (intr->dst_apic_id == 0xff) {
  640                 /*
  641                  * An APIC ID of 0xff means that the interrupt is connected
  642                  * to the specified pin on all I/O APICs in the system.  If
  643                  * there is only one I/O APIC, then use that APIC to route
  644                  * the interrupts.  If there is more than one I/O APIC, then
  645                  * punt.
  646                  */
  647                 if (mptable_nioapics == 1) {
  648                         apic_id = 0;
  649                         while (ioapics[apic_id] == NULL)
  650                                 apic_id++;
  651                 } else {
  652                         printf(
  653                         "MPTable: Ignoring global interrupt entry for pin %d\n",
  654                             intr->dst_apic_int);
  655                         return;
  656                 }
  657         }
  658         if (apic_id > MAX_APIC_ID) {
  659                 printf("MPTable: Ignoring interrupt entry for ioapic%d\n",
  660                     intr->dst_apic_id);
  661                 return;
  662         }
  663         ioapic = ioapics[apic_id];
  664         if (ioapic == NULL) {
  665                 printf(
  666         "MPTable: Ignoring interrupt entry for missing ioapic%d\n",
  667                     apic_id);
  668                 return;
  669         }
  670         pin = intr->dst_apic_int;
  671         switch (intr->int_type) {
  672         case INTENTRY_TYPE_INT:
  673                 switch (busses[intr->src_bus_id].bus_type) {
  674                 case NOBUS:
  675                         panic("interrupt from missing bus");
  676                 case ISA:
  677                 case EISA:
  678                         if (busses[intr->src_bus_id].bus_type == ISA)
  679                                 ioapic_set_bus(ioapic, pin, APIC_BUS_ISA);
  680                         else
  681                                 ioapic_set_bus(ioapic, pin, APIC_BUS_EISA);
  682                         if (intr->src_bus_irq == pin)
  683                                 break;
  684                         ioapic_remap_vector(ioapic, pin, intr->src_bus_irq);
  685                         if (ioapic_get_vector(ioapic, intr->src_bus_irq) ==
  686                             intr->src_bus_irq)
  687                                 ioapic_disable_pin(ioapic, intr->src_bus_irq);
  688                         break;
  689                 case PCI:
  690                         ioapic_set_bus(ioapic, pin, APIC_BUS_PCI);
  691                         break;
  692                 default:
  693                         ioapic_set_bus(ioapic, pin, APIC_BUS_UNKNOWN);
  694                         break;
  695                 }
  696                 break;
  697         case INTENTRY_TYPE_NMI:
  698                 ioapic_set_nmi(ioapic, pin);
  699                 break;
  700         case INTENTRY_TYPE_SMI:
  701                 ioapic_set_smi(ioapic, pin);
  702                 break;
  703         case INTENTRY_TYPE_EXTINT:
  704                 ioapic_set_extint(ioapic, pin);
  705                 break;
  706         default:
  707                 panic("%s: invalid interrupt entry type %d\n", __func__,
  708                     intr->int_type);
  709         }
  710         if (intr->int_type == INTENTRY_TYPE_INT ||
  711             (intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
  712             INTENTRY_FLAGS_TRIGGER_CONFORM)
  713                 ioapic_set_triggermode(ioapic, pin, intentry_trigger(intr));
  714         if (intr->int_type == INTENTRY_TYPE_INT ||
  715             (intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
  716             INTENTRY_FLAGS_POLARITY_CONFORM)
  717                 ioapic_set_polarity(ioapic, pin, intentry_polarity(intr));
  718 }
  719 
  720 /*
  721  * Parse an interrupt entry for a local APIC LVT pin.
  722  */
  723 static void
  724 mptable_parse_local_int(int_entry_ptr intr)
  725 {
  726         u_int apic_id, pin;
  727 
  728         if (intr->dst_apic_id == 0xff)
  729                 apic_id = APIC_ID_ALL;
  730         else
  731                 apic_id = intr->dst_apic_id;
  732         if (intr->dst_apic_int == 0)
  733                 pin = LVT_LINT0;
  734         else
  735                 pin = LVT_LINT1;
  736         switch (intr->int_type) {
  737         case INTENTRY_TYPE_INT:
  738 #if 1
  739                 printf(
  740         "MPTable: Ignoring vectored local interrupt for LINTIN%d vector %d\n",
  741                     intr->dst_apic_int, intr->src_bus_irq);
  742                 return;
  743 #else
  744                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_FIXED);
  745                 break;
  746 #endif
  747         case INTENTRY_TYPE_NMI:
  748                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI);
  749                 break;
  750         case INTENTRY_TYPE_SMI:
  751                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_SMI);
  752                 break;
  753         case INTENTRY_TYPE_EXTINT:
  754                 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_EXTINT);
  755                 break;
  756         default:
  757                 panic("%s: invalid interrupt entry type %d\n", __func__,
  758                     intr->int_type);
  759         }
  760         if ((intr->int_flags & INTENTRY_FLAGS_TRIGGER) !=
  761             INTENTRY_FLAGS_TRIGGER_CONFORM)
  762                 lapic_set_lvt_triggermode(apic_id, pin,
  763                     intentry_trigger(intr));
  764         if ((intr->int_flags & INTENTRY_FLAGS_POLARITY) !=
  765             INTENTRY_FLAGS_POLARITY_CONFORM)
  766                 lapic_set_lvt_polarity(apic_id, pin, intentry_polarity(intr));
  767 }
  768 
  769 /*
  770  * Parse interrupt entries.
  771  */
  772 static void
  773 mptable_parse_ints_handler(u_char *entry, void *arg __unused)
  774 {
  775         int_entry_ptr intr;
  776 
  777         intr = (int_entry_ptr)entry;
  778         switch (*entry) {
  779         case MPCT_ENTRY_INT:
  780                 mptable_parse_io_int(intr);
  781                 break;
  782         case MPCT_ENTRY_LOCAL_INT:
  783                 mptable_parse_local_int(intr);
  784                 break;
  785         }
  786 }
  787 
  788 /*
  789  * Configure interrupt pins for a default configuration.  For details see
  790  * Table 5-2 in Section 5 of the MP Table specification.
  791  */
  792 static void
  793 mptable_parse_default_config_ints(void)
  794 {
  795         struct INTENTRY entry;
  796         int pin;
  797 
  798         /*
  799          * All default configs route IRQs from bus 0 to the first 16 pins
  800          * of the first I/O APIC with an APIC ID of 2.
  801          */
  802         entry.type = MPCT_ENTRY_INT;
  803         entry.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
  804             INTENTRY_FLAGS_TRIGGER_CONFORM;
  805         entry.src_bus_id = 0;
  806         entry.dst_apic_id = 2;
  807 
  808         /* Run through all 16 pins. */
  809         for (pin = 0; pin < 16; pin++) {
  810                 entry.dst_apic_int = pin;
  811                 switch (pin) {
  812                 case 0:
  813                         /* Pin 0 is an ExtINT pin. */
  814                         entry.int_type = INTENTRY_TYPE_EXTINT;
  815                         break;
  816                 case 2:
  817                         /* IRQ 0 is routed to pin 2. */
  818                         entry.int_type = INTENTRY_TYPE_INT;
  819                         entry.src_bus_irq = 0;
  820                         break;
  821                 default:
  822                         /* All other pins are identity mapped. */
  823                         entry.int_type = INTENTRY_TYPE_INT;
  824                         entry.src_bus_irq = pin;
  825                         break;
  826                 }
  827                 mptable_parse_io_int(&entry);
  828         }
  829 
  830         /* Certain configs disable certain pins. */
  831         if (mpfps->config_type == 7)
  832                 ioapic_disable_pin(ioapics[2], 0);
  833         if (mpfps->config_type == 2) {
  834                 ioapic_disable_pin(ioapics[2], 2);
  835                 ioapic_disable_pin(ioapics[2], 13);
  836         }
  837 }
  838 
  839 /*
  840  * Configure the interrupt pins
  841  */
  842 static void
  843 mptable_parse_ints(void)
  844 {
  845 
  846         /* Is this a pre-defined config? */
  847         if (mpfps->config_type != 0) {
  848                 /* Configure LINT pins. */
  849                 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT0, APIC_LVT_DM_EXTINT);
  850                 lapic_set_lvt_mode(APIC_ID_ALL, LVT_LINT1, APIC_LVT_DM_NMI);
  851 
  852                 /* Configure I/O APIC pins. */
  853                 mptable_parse_default_config_ints();
  854         } else
  855                 mptable_walk_table(mptable_parse_ints_handler, NULL);
  856 }
  857 
  858 #ifdef MPTABLE_FORCE_HTT
  859 /*
  860  * Perform a hyperthreading "fix-up" to enumerate any logical CPU's
  861  * that aren't already listed in the table.
  862  *
  863  * XXX: We assume that all of the physical CPUs in the
  864  * system have the same number of logical CPUs.
  865  *
  866  * XXX: We assume that APIC ID's are allocated such that
  867  * the APIC ID's for a physical processor are aligned
  868  * with the number of logical CPU's in the processor.
  869  */
  870 static void
  871 mptable_hyperthread_fixup(u_long id_mask)
  872 {
  873         u_int i, id, logical_cpus;
  874 
  875         /* Nothing to do if there is no HTT support. */
  876         if ((cpu_feature & CPUID_HTT) == 0)
  877                 return;
  878         logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16;
  879         if (logical_cpus <= 1)
  880                 return;
  881 
  882         /*
  883          * For each APIC ID of a CPU that is set in the mask,
  884          * scan the other candidate APIC ID's for this
  885          * physical processor.  If any of those ID's are
  886          * already in the table, then kill the fixup.
  887          */
  888         for (id = 0; id <= MAX_LAPIC_ID; id++) {
  889                 if ((id_mask & 1 << id) == 0)
  890                         continue;
  891                 /* First, make sure we are on a logical_cpus boundary. */
  892                 if (id % logical_cpus != 0)
  893                         return;
  894                 for (i = id + 1; i < id + logical_cpus; i++)
  895                         if ((id_mask & 1 << i) != 0)
  896                                 return;
  897         }
  898 
  899         /*
  900          * Ok, the ID's checked out, so perform the fixup by
  901          * adding the logical CPUs.
  902          */
  903         while ((id = ffsl(id_mask)) != 0) {
  904                 id--;
  905                 for (i = id + 1; i < id + logical_cpus; i++) {
  906                         if (bootverbose)
  907                                 printf(
  908                         "MPTable: Adding logical CPU %d from main CPU %d\n",
  909                                     i, id);
  910                         lapic_create(i, 0);
  911                 }
  912                 id_mask &= ~(1 << id);
  913         }
  914 }
  915 #endif /* MPTABLE_FORCE_HTT */
  916 
  917 /*
  918  * Support code for routing PCI interrupts using the MP Table.
  919  */
  920 static void
  921 mptable_pci_setup(void)
  922 {
  923         int i;
  924 
  925         /*
  926          * Find the first pci bus and call it 0.  Panic if pci0 is not
  927          * bus zero and there are multiple PCI busses.
  928          */
  929         for (i = 0; i <= mptable_maxbusid; i++)
  930                 if (busses[i].bus_type == PCI) {
  931                         if (pci0 == -1)
  932                                 pci0 = i;
  933                         else if (pci0 != 0)
  934                                 panic(
  935                 "MPTable contains multiple PCI busses but no PCI bus 0");
  936                 }
  937 }
  938 
  939 static void
  940 mptable_pci_probe_table_handler(u_char *entry, void *arg)
  941 {
  942         struct pci_probe_table_args *args;
  943         int_entry_ptr intr;
  944 
  945         if (*entry != MPCT_ENTRY_INT)
  946                 return;
  947         intr = (int_entry_ptr)entry;
  948         args = (struct pci_probe_table_args *)arg;
  949         KASSERT(args->bus <= mptable_maxbusid,
  950             ("bus %d is too big", args->bus));
  951         KASSERT(busses[args->bus].bus_type == PCI, ("probing for non-PCI bus"));
  952         if (intr->src_bus_id == args->bus)
  953                 args->found = 1;
  954 }
  955 
  956 int
  957 mptable_pci_probe_table(int bus)
  958 {
  959         struct pci_probe_table_args args;
  960 
  961         if (bus < 0)
  962                 return (EINVAL);
  963         if (mpct == NULL || pci0 == -1 || pci0 + bus > mptable_maxbusid)
  964                 return (ENXIO);
  965         if (busses[pci0 + bus].bus_type != PCI)
  966                 return (ENXIO);
  967         args.bus = pci0 + bus;
  968         args.found = 0;
  969         mptable_walk_table(mptable_pci_probe_table_handler, &args);
  970         if (args.found == 0)
  971                 return (ENXIO);
  972         return (0);
  973 }
  974 
  975 static void
  976 mptable_pci_route_interrupt_handler(u_char *entry, void *arg)
  977 {
  978         struct pci_route_interrupt_args *args;
  979         int_entry_ptr intr;
  980         int vector;
  981 
  982         if (*entry != MPCT_ENTRY_INT)
  983                 return;
  984         intr = (int_entry_ptr)entry;
  985         args = (struct pci_route_interrupt_args *)arg;
  986         if (intr->src_bus_id != args->bus || intr->src_bus_irq != args->irq)
  987                 return;
  988 
  989         /* Make sure the APIC maps to a known APIC. */
  990         KASSERT(ioapics[intr->dst_apic_id] != NULL,
  991             ("No I/O APIC %d to route interrupt to", intr->dst_apic_id));
  992 
  993         /*
  994          * Look up the vector for this APIC / pin combination.  If we
  995          * have previously matched an entry for this PCI IRQ but it
  996          * has the same vector as this entry, just return.  Otherwise,
  997          * we use the vector for this APIC / pin combination.
  998          */
  999         vector = ioapic_get_vector(ioapics[intr->dst_apic_id],
 1000             intr->dst_apic_int);
 1001         if (args->vector == vector)
 1002                 return;
 1003         KASSERT(args->vector == -1,
 1004             ("Multiple IRQs for PCI interrupt %d.%d.INT%c: %d and %d\n",
 1005             args->bus, args->irq >> 2, 'A' + (args->irq & 0x3), args->vector,
 1006             vector));
 1007         args->vector = vector;
 1008 }
 1009 
 1010 int
 1011 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
 1012 {
 1013         struct pci_route_interrupt_args args;
 1014         int slot;
 1015 
 1016         /* Like ACPI, pin numbers are 0-3, not 1-4. */
 1017         pin--;
 1018         KASSERT(pci0 != -1, ("do not know how to route PCI interrupts"));
 1019         args.bus = pci_get_bus(dev) + pci0;
 1020         slot = pci_get_slot(dev);
 1021 
 1022         /*
 1023          * PCI interrupt entries in the MP Table encode both the slot and
 1024          * pin into the IRQ with the pin being the two least significant
 1025          * bits, the slot being the next five bits, and the most significant
 1026          * bit being reserved.
 1027          */
 1028         args.irq = slot << 2 | pin;
 1029         args.vector = -1;
 1030         mptable_walk_table(mptable_pci_route_interrupt_handler, &args);
 1031         if (args.vector < 0) {
 1032                 device_printf(pcib, "unable to route slot %d INT%c\n", slot,
 1033                     'A' + pin);
 1034                 return (PCI_INVALID_IRQ);
 1035         }
 1036         if (bootverbose)
 1037                 device_printf(pcib, "slot %d INT%c routed to irq %d\n", slot,
 1038                     'A' + pin, args.vector);
 1039         return (args.vector);
 1040 }

Cache object: c7ae8c3aba49dc0f4969390ebce6f1ec


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.