1 /*-
2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 /*
31 * Host to PCI and PCI to PCI bridge drivers that use the MP Table to route
32 * interrupts from PCI devices to I/O APICs.
33 */
34
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD: src/sys/amd64/amd64/mptable_pci.c,v 1.8 2007/05/02 17:50:34 jhb Exp $");
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/bus.h>
41 #include <sys/kernel.h>
42 #include <sys/module.h>
43
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
46 #include <dev/pci/pcib_private.h>
47 #include <machine/legacyvar.h>
48 #include <machine/mptable.h>
49 #include <machine/pci_cfgreg.h>
50
51 #include "pcib_if.h"
52
53 /* Host to PCI bridge driver. */
54
55 static int
56 mptable_hostb_probe(device_t dev)
57 {
58
59 if (pci_cfgregopen() == 0)
60 return (ENXIO);
61 if (mptable_pci_probe_table(pcib_get_bus(dev)) != 0)
62 return (ENXIO);
63 device_set_desc(dev, "MPTable Host-PCI bridge");
64 return (0);
65 }
66
67 static int
68 mptable_hostb_attach(device_t dev)
69 {
70
71 device_add_child(dev, "pci", pcib_get_bus(dev));
72 return (bus_generic_attach(dev));
73 }
74
75 /* Pass MSI requests up to the nexus. */
76 static int
77 mptable_hostb_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
78 int *irqs)
79 {
80 device_t bus;
81
82 bus = device_get_parent(pcib);
83 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
84 irqs));
85 }
86
87 static int
88 mptable_hostb_alloc_msix(device_t pcib, device_t dev, int *irq)
89 {
90 device_t bus;
91
92 bus = device_get_parent(pcib);
93 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
94 }
95
96 static int
97 mptable_hostb_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
98 uint32_t *data)
99 {
100 device_t bus;
101
102 bus = device_get_parent(pcib);
103 return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data));
104 }
105
106 static device_method_t mptable_hostb_methods[] = {
107 /* Device interface */
108 DEVMETHOD(device_probe, mptable_hostb_probe),
109 DEVMETHOD(device_attach, mptable_hostb_attach),
110 DEVMETHOD(device_shutdown, bus_generic_shutdown),
111 DEVMETHOD(device_suspend, bus_generic_suspend),
112 DEVMETHOD(device_resume, bus_generic_resume),
113
114 /* Bus interface */
115 DEVMETHOD(bus_print_child, bus_generic_print_child),
116 DEVMETHOD(bus_read_ivar, legacy_pcib_read_ivar),
117 DEVMETHOD(bus_write_ivar, legacy_pcib_write_ivar),
118 DEVMETHOD(bus_alloc_resource, legacy_pcib_alloc_resource),
119 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
120 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
121 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
122 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
123 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
124
125 /* pcib interface */
126 DEVMETHOD(pcib_maxslots, legacy_pcib_maxslots),
127 DEVMETHOD(pcib_read_config, legacy_pcib_read_config),
128 DEVMETHOD(pcib_write_config, legacy_pcib_write_config),
129 DEVMETHOD(pcib_route_interrupt, mptable_pci_route_interrupt),
130 DEVMETHOD(pcib_alloc_msi, mptable_hostb_alloc_msi),
131 DEVMETHOD(pcib_release_msi, pcib_release_msi),
132 DEVMETHOD(pcib_alloc_msix, mptable_hostb_alloc_msix),
133 DEVMETHOD(pcib_release_msix, pcib_release_msix),
134 DEVMETHOD(pcib_map_msi, mptable_hostb_map_msi),
135
136 { 0, 0 }
137 };
138
139 static devclass_t hostb_devclass;
140
141 DEFINE_CLASS_0(pcib, mptable_hostb_driver, mptable_hostb_methods, 1);
142 DRIVER_MODULE(mptable_pcib, legacy, mptable_hostb_driver, hostb_devclass, 0, 0);
143
144 /* PCI to PCI bridge driver. */
145
146 static int
147 mptable_pcib_probe(device_t dev)
148 {
149 int bus;
150
151 if ((pci_get_class(dev) != PCIC_BRIDGE) ||
152 (pci_get_subclass(dev) != PCIS_BRIDGE_PCI))
153 return (ENXIO);
154 bus = pci_read_config(dev, PCIR_SECBUS_1, 1);
155 if (bus == 0)
156 return (ENXIO);
157 if (mptable_pci_probe_table(bus) != 0)
158 return (ENXIO);
159 device_set_desc(dev, "MPTable PCI-PCI bridge");
160 return (-1000);
161 }
162
163 static device_method_t mptable_pcib_pci_methods[] = {
164 /* Device interface */
165 DEVMETHOD(device_probe, mptable_pcib_probe),
166 DEVMETHOD(device_attach, pcib_attach),
167 DEVMETHOD(device_shutdown, bus_generic_shutdown),
168 DEVMETHOD(device_suspend, bus_generic_suspend),
169 DEVMETHOD(device_resume, bus_generic_resume),
170
171 /* Bus interface */
172 DEVMETHOD(bus_print_child, bus_generic_print_child),
173 DEVMETHOD(bus_read_ivar, pcib_read_ivar),
174 DEVMETHOD(bus_write_ivar, pcib_write_ivar),
175 DEVMETHOD(bus_alloc_resource, pcib_alloc_resource),
176 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
177 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
178 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
179 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
180 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
181
182 /* pcib interface */
183 DEVMETHOD(pcib_maxslots, pcib_maxslots),
184 DEVMETHOD(pcib_read_config, pcib_read_config),
185 DEVMETHOD(pcib_write_config, pcib_write_config),
186 DEVMETHOD(pcib_route_interrupt, mptable_pci_route_interrupt),
187 DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
188 DEVMETHOD(pcib_release_msi, pcib_release_msi),
189 DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
190 DEVMETHOD(pcib_release_msix, pcib_release_msix),
191 DEVMETHOD(pcib_map_msi, pcib_map_msi),
192
193 {0, 0}
194 };
195
196 static devclass_t pcib_devclass;
197
198 DEFINE_CLASS_0(pcib, mptable_pcib_driver, mptable_pcib_pci_methods,
199 sizeof(struct pcib_softc));
200 DRIVER_MODULE(mptable_pcib, pci, mptable_pcib_driver, pcib_devclass, 0, 0);
201 Cache object: 29671755ac7420778a289bcbcc9dace3
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