The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/amd64/amd64/pmap.c

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    1 /*-
    2  * Copyright (c) 1991 Regents of the University of California.
    3  * All rights reserved.
    4  * Copyright (c) 1994 John S. Dyson
    5  * All rights reserved.
    6  * Copyright (c) 1994 David Greenman
    7  * All rights reserved.
    8  * Copyright (c) 2003 Peter Wemm
    9  * All rights reserved.
   10  * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu>
   11  * All rights reserved.
   12  *
   13  * This code is derived from software contributed to Berkeley by
   14  * the Systems Programming Group of the University of Utah Computer
   15  * Science Department and William Jolitz of UUNET Technologies Inc.
   16  *
   17  * Redistribution and use in source and binary forms, with or without
   18  * modification, are permitted provided that the following conditions
   19  * are met:
   20  * 1. Redistributions of source code must retain the above copyright
   21  *    notice, this list of conditions and the following disclaimer.
   22  * 2. Redistributions in binary form must reproduce the above copyright
   23  *    notice, this list of conditions and the following disclaimer in the
   24  *    documentation and/or other materials provided with the distribution.
   25  * 3. All advertising materials mentioning features or use of this software
   26  *    must display the following acknowledgement:
   27  *      This product includes software developed by the University of
   28  *      California, Berkeley and its contributors.
   29  * 4. Neither the name of the University nor the names of its contributors
   30  *    may be used to endorse or promote products derived from this software
   31  *    without specific prior written permission.
   32  *
   33  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   34  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   36  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   37  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   38  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   39  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   40  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   41  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   42  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   43  * SUCH DAMAGE.
   44  *
   45  *      from:   @(#)pmap.c      7.7 (Berkeley)  5/12/91
   46  */
   47 /*-
   48  * Copyright (c) 2003 Networks Associates Technology, Inc.
   49  * All rights reserved.
   50  *
   51  * This software was developed for the FreeBSD Project by Jake Burkholder,
   52  * Safeport Network Services, and Network Associates Laboratories, the
   53  * Security Research Division of Network Associates, Inc. under
   54  * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
   55  * CHATS research program.
   56  *
   57  * Redistribution and use in source and binary forms, with or without
   58  * modification, are permitted provided that the following conditions
   59  * are met:
   60  * 1. Redistributions of source code must retain the above copyright
   61  *    notice, this list of conditions and the following disclaimer.
   62  * 2. Redistributions in binary form must reproduce the above copyright
   63  *    notice, this list of conditions and the following disclaimer in the
   64  *    documentation and/or other materials provided with the distribution.
   65  *
   66  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   67  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   68  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   69  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   70  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   71  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   72  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   73  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   74  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   75  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   76  * SUCH DAMAGE.
   77  */
   78 
   79 #include <sys/cdefs.h>
   80 __FBSDID("$FreeBSD$");
   81 
   82 /*
   83  *      Manages physical address maps.
   84  *
   85  *      In addition to hardware address maps, this
   86  *      module is called upon to provide software-use-only
   87  *      maps which may or may not be stored in the same
   88  *      form as hardware maps.  These pseudo-maps are
   89  *      used to store intermediate results from copy
   90  *      operations to and from address spaces.
   91  *
   92  *      Since the information managed by this module is
   93  *      also stored by the logical address mapping module,
   94  *      this module may throw away valid virtual-to-physical
   95  *      mappings at almost any time.  However, invalidations
   96  *      of virtual-to-physical mappings must be done as
   97  *      requested.
   98  *
   99  *      In order to cope with hardware architectures which
  100  *      make virtual-to-physical map invalidates expensive,
  101  *      this module may delay invalidate or reduced protection
  102  *      operations until such time as they are actually
  103  *      necessary.  This module is given full information as
  104  *      to which processors are currently using which maps,
  105  *      and to when physical maps must be made correct.
  106  */
  107 
  108 #include "opt_msgbuf.h"
  109 #include "opt_pmap.h"
  110 
  111 #include <sys/param.h>
  112 #include <sys/systm.h>
  113 #include <sys/kernel.h>
  114 #include <sys/lock.h>
  115 #include <sys/malloc.h>
  116 #include <sys/mman.h>
  117 #include <sys/msgbuf.h>
  118 #include <sys/mutex.h>
  119 #include <sys/proc.h>
  120 #include <sys/sx.h>
  121 #include <sys/vmmeter.h>
  122 #include <sys/sched.h>
  123 #include <sys/sysctl.h>
  124 #ifdef SMP
  125 #include <sys/smp.h>
  126 #endif
  127 
  128 #include <vm/vm.h>
  129 #include <vm/vm_param.h>
  130 #include <vm/vm_kern.h>
  131 #include <vm/vm_page.h>
  132 #include <vm/vm_map.h>
  133 #include <vm/vm_object.h>
  134 #include <vm/vm_extern.h>
  135 #include <vm/vm_pageout.h>
  136 #include <vm/vm_pager.h>
  137 #include <vm/uma.h>
  138 
  139 #include <machine/cpu.h>
  140 #include <machine/cputypes.h>
  141 #include <machine/md_var.h>
  142 #include <machine/pcb.h>
  143 #include <machine/specialreg.h>
  144 #ifdef SMP
  145 #include <machine/smp.h>
  146 #endif
  147 
  148 #ifndef PMAP_SHPGPERPROC
  149 #define PMAP_SHPGPERPROC 200
  150 #endif
  151 
  152 #if defined(DIAGNOSTIC)
  153 #define PMAP_DIAGNOSTIC
  154 #endif
  155 
  156 #if !defined(PMAP_DIAGNOSTIC)
  157 #define PMAP_INLINE     __gnu89_inline
  158 #else
  159 #define PMAP_INLINE
  160 #endif
  161 
  162 #define PV_STATS
  163 #ifdef PV_STATS
  164 #define PV_STAT(x)      do { x ; } while (0)
  165 #else
  166 #define PV_STAT(x)      do { } while (0)
  167 #endif
  168 
  169 struct pmap kernel_pmap_store;
  170 
  171 vm_offset_t virtual_avail;      /* VA of first avail page (after kernel bss) */
  172 vm_offset_t virtual_end;        /* VA of last avail page (end of kernel AS) */
  173 
  174 static int nkpt;
  175 static int ndmpdp;
  176 static vm_paddr_t dmaplimit;
  177 vm_offset_t kernel_vm_end;
  178 pt_entry_t pg_nx;
  179 
  180 static u_int64_t        KPTphys;        /* phys addr of kernel level 1 */
  181 static u_int64_t        KPDphys;        /* phys addr of kernel level 2 */
  182 u_int64_t               KPDPphys;       /* phys addr of kernel level 3 */
  183 u_int64_t               KPML4phys;      /* phys addr of kernel level 4 */
  184 
  185 static u_int64_t        DMPDphys;       /* phys addr of direct mapped level 2 */
  186 static u_int64_t        DMPDPphys;      /* phys addr of direct mapped level 3 */
  187 
  188 /*
  189  * Data for the pv entry allocation mechanism
  190  */
  191 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
  192 static int shpgperproc = PMAP_SHPGPERPROC;
  193 
  194 /*
  195  * All those kernel PT submaps that BSD is so fond of
  196  */
  197 pt_entry_t *CMAP1 = 0;
  198 caddr_t CADDR1 = 0;
  199 struct msgbuf *msgbufp = 0;
  200 
  201 /*
  202  * Crashdump maps.
  203  */
  204 static caddr_t crashdumpmap;
  205 
  206 static void     free_pv_entry(pmap_t pmap, pv_entry_t pv);
  207 static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try);
  208 
  209 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
  210     vm_page_t m, vm_prot_t prot, vm_page_t mpte);
  211 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq,
  212                 vm_offset_t sva, pd_entry_t ptepde, vm_page_t *free);
  213 static void pmap_remove_page(pmap_t pmap, vm_offset_t va, pd_entry_t *pde,
  214     vm_page_t *free);
  215 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
  216                 vm_offset_t va);
  217 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
  218 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
  219     vm_page_t m);
  220 
  221 static vm_page_t pmap_allocpde(pmap_t pmap, vm_offset_t va, int flags);
  222 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
  223 
  224 static vm_page_t _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, int flags);
  225 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
  226                 vm_page_t* free);
  227 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, vm_page_t *);
  228 static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
  229 
  230 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
  231 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
  232 
  233 /*
  234  * Move the kernel virtual free pointer to the next
  235  * 2MB.  This is used to help improve performance
  236  * by using a large (2MB) page for much of the kernel
  237  * (.text, .data, .bss)
  238  */
  239 static vm_offset_t
  240 pmap_kmem_choose(vm_offset_t addr)
  241 {
  242         vm_offset_t newaddr = addr;
  243 
  244         newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
  245         return newaddr;
  246 }
  247 
  248 /********************/
  249 /* Inline functions */
  250 /********************/
  251 
  252 /* Return a non-clipped PD index for a given VA */
  253 static __inline vm_pindex_t
  254 pmap_pde_pindex(vm_offset_t va)
  255 {
  256         return va >> PDRSHIFT;
  257 }
  258 
  259 
  260 /* Return various clipped indexes for a given VA */
  261 static __inline vm_pindex_t
  262 pmap_pte_index(vm_offset_t va)
  263 {
  264 
  265         return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
  266 }
  267 
  268 static __inline vm_pindex_t
  269 pmap_pde_index(vm_offset_t va)
  270 {
  271 
  272         return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
  273 }
  274 
  275 static __inline vm_pindex_t
  276 pmap_pdpe_index(vm_offset_t va)
  277 {
  278 
  279         return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
  280 }
  281 
  282 static __inline vm_pindex_t
  283 pmap_pml4e_index(vm_offset_t va)
  284 {
  285 
  286         return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
  287 }
  288 
  289 /* Return a pointer to the PML4 slot that corresponds to a VA */
  290 static __inline pml4_entry_t *
  291 pmap_pml4e(pmap_t pmap, vm_offset_t va)
  292 {
  293 
  294         if (!pmap)
  295                 return NULL;
  296         return (&pmap->pm_pml4[pmap_pml4e_index(va)]);
  297 }
  298 
  299 /* Return a pointer to the PDP slot that corresponds to a VA */
  300 static __inline pdp_entry_t *
  301 pmap_pml4e_to_pdpe(pml4_entry_t *pml4e, vm_offset_t va)
  302 {
  303         pdp_entry_t *pdpe;
  304 
  305         pdpe = (pdp_entry_t *)PHYS_TO_DMAP(*pml4e & PG_FRAME);
  306         return (&pdpe[pmap_pdpe_index(va)]);
  307 }
  308 
  309 /* Return a pointer to the PDP slot that corresponds to a VA */
  310 static __inline pdp_entry_t *
  311 pmap_pdpe(pmap_t pmap, vm_offset_t va)
  312 {
  313         pml4_entry_t *pml4e;
  314 
  315         pml4e = pmap_pml4e(pmap, va);
  316         if (pml4e == NULL || (*pml4e & PG_V) == 0)
  317                 return NULL;
  318         return (pmap_pml4e_to_pdpe(pml4e, va));
  319 }
  320 
  321 /* Return a pointer to the PD slot that corresponds to a VA */
  322 static __inline pd_entry_t *
  323 pmap_pdpe_to_pde(pdp_entry_t *pdpe, vm_offset_t va)
  324 {
  325         pd_entry_t *pde;
  326 
  327         pde = (pd_entry_t *)PHYS_TO_DMAP(*pdpe & PG_FRAME);
  328         return (&pde[pmap_pde_index(va)]);
  329 }
  330 
  331 /* Return a pointer to the PD slot that corresponds to a VA */
  332 static __inline pd_entry_t *
  333 pmap_pde(pmap_t pmap, vm_offset_t va)
  334 {
  335         pdp_entry_t *pdpe;
  336 
  337         pdpe = pmap_pdpe(pmap, va);
  338         if (pdpe == NULL || (*pdpe & PG_V) == 0)
  339                  return NULL;
  340         return (pmap_pdpe_to_pde(pdpe, va));
  341 }
  342 
  343 /* Return a pointer to the PT slot that corresponds to a VA */
  344 static __inline pt_entry_t *
  345 pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va)
  346 {
  347         pt_entry_t *pte;
  348 
  349         pte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
  350         return (&pte[pmap_pte_index(va)]);
  351 }
  352 
  353 /* Return a pointer to the PT slot that corresponds to a VA */
  354 static __inline pt_entry_t *
  355 pmap_pte(pmap_t pmap, vm_offset_t va)
  356 {
  357         pd_entry_t *pde;
  358 
  359         pde = pmap_pde(pmap, va);
  360         if (pde == NULL || (*pde & PG_V) == 0)
  361                 return NULL;
  362         if ((*pde & PG_PS) != 0)        /* compat with i386 pmap_pte() */
  363                 return ((pt_entry_t *)pde);
  364         return (pmap_pde_to_pte(pde, va));
  365 }
  366 
  367 
  368 static __inline pt_entry_t *
  369 pmap_pte_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *ptepde)
  370 {
  371         pd_entry_t *pde;
  372 
  373         pde = pmap_pde(pmap, va);
  374         if (pde == NULL || (*pde & PG_V) == 0)
  375                 return NULL;
  376         *ptepde = *pde;
  377         if ((*pde & PG_PS) != 0)        /* compat with i386 pmap_pte() */
  378                 return ((pt_entry_t *)pde);
  379         return (pmap_pde_to_pte(pde, va));
  380 }
  381 
  382 
  383 PMAP_INLINE pt_entry_t *
  384 vtopte(vm_offset_t va)
  385 {
  386         u_int64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
  387 
  388         return (PTmap + ((va >> PAGE_SHIFT) & mask));
  389 }
  390 
  391 static __inline pd_entry_t *
  392 vtopde(vm_offset_t va)
  393 {
  394         u_int64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
  395 
  396         return (PDmap + ((va >> PDRSHIFT) & mask));
  397 }
  398 
  399 static u_int64_t
  400 allocpages(vm_paddr_t *firstaddr, int n)
  401 {
  402         u_int64_t ret;
  403 
  404         ret = *firstaddr;
  405         bzero((void *)ret, n * PAGE_SIZE);
  406         *firstaddr += n * PAGE_SIZE;
  407         return (ret);
  408 }
  409 
  410 static void
  411 create_pagetables(vm_paddr_t *firstaddr)
  412 {
  413         int i;
  414 
  415         /* Allocate pages */
  416         KPTphys = allocpages(firstaddr, NKPT);
  417         KPML4phys = allocpages(firstaddr, 1);
  418         KPDPphys = allocpages(firstaddr, NKPML4E);
  419         KPDphys = allocpages(firstaddr, NKPDPE);
  420 
  421         ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
  422         if (ndmpdp < 4)         /* Minimum 4GB of dirmap */
  423                 ndmpdp = 4;
  424         DMPDPphys = allocpages(firstaddr, NDMPML4E);
  425         DMPDphys = allocpages(firstaddr, ndmpdp);
  426         dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
  427 
  428         /* Fill in the underlying page table pages */
  429         /* Read-only from zero to physfree */
  430         /* XXX not fully used, underneath 2M pages */
  431         for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
  432                 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT;
  433                 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V | PG_G;
  434         }
  435 
  436         /* Now map the page tables at their location within PTmap */
  437         for (i = 0; i < NKPT; i++) {
  438                 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
  439                 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V;
  440         }
  441 
  442         /* Map from zero to end of allocations under 2M pages */
  443         /* This replaces some of the KPTphys entries above */
  444         for (i = 0; (i << PDRSHIFT) < *firstaddr; i++) {
  445                 ((pd_entry_t *)KPDphys)[i] = i << PDRSHIFT;
  446                 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
  447         }
  448 
  449         /* And connect up the PD to the PDP */
  450         for (i = 0; i < NKPDPE; i++) {
  451                 ((pdp_entry_t *)KPDPphys)[i + KPDPI] = KPDphys + (i << PAGE_SHIFT);
  452                 ((pdp_entry_t *)KPDPphys)[i + KPDPI] |= PG_RW | PG_V | PG_U;
  453         }
  454 
  455 
  456         /* Now set up the direct map space using 2MB pages */
  457         for (i = 0; i < NPDEPG * ndmpdp; i++) {
  458                 ((pd_entry_t *)DMPDphys)[i] = (vm_paddr_t)i << PDRSHIFT;
  459                 ((pd_entry_t *)DMPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
  460         }
  461 
  462         /* And the direct map space's PDP */
  463         for (i = 0; i < ndmpdp; i++) {
  464                 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys + (i << PAGE_SHIFT);
  465                 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U;
  466         }
  467 
  468         /* And recursively map PML4 to itself in order to get PTmap */
  469         ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
  470         ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
  471 
  472         /* Connect the Direct Map slot up to the PML4 */
  473         ((pdp_entry_t *)KPML4phys)[DMPML4I] = DMPDPphys;
  474         ((pdp_entry_t *)KPML4phys)[DMPML4I] |= PG_RW | PG_V | PG_U;
  475 
  476         /* Connect the KVA slot up to the PML4 */
  477         ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
  478         ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U;
  479 }
  480 
  481 /*
  482  *      Bootstrap the system enough to run with virtual memory.
  483  *
  484  *      On amd64 this is called after mapping has already been enabled
  485  *      and just syncs the pmap module with what has already been done.
  486  *      [We can't call it easily with mapping off since the kernel is not
  487  *      mapped with PA == VA, hence we would have to relocate every address
  488  *      from the linked base (virtual) address "KERNBASE" to the actual
  489  *      (physical) address starting relative to 0]
  490  */
  491 void
  492 pmap_bootstrap(vm_paddr_t *firstaddr)
  493 {
  494         vm_offset_t va;
  495         pt_entry_t *pte, *unused;
  496 
  497         /*
  498          * Create an initial set of page tables to run the kernel in.
  499          */
  500         create_pagetables(firstaddr);
  501 
  502         virtual_avail = (vm_offset_t) KERNBASE + *firstaddr;
  503         virtual_avail = pmap_kmem_choose(virtual_avail);
  504 
  505         virtual_end = VM_MAX_KERNEL_ADDRESS;
  506 
  507 
  508         /* XXX do %cr0 as well */
  509         load_cr4(rcr4() | CR4_PGE | CR4_PSE);
  510         load_cr3(KPML4phys);
  511 
  512         /*
  513          * Initialize the kernel pmap (which is statically allocated).
  514          */
  515         PMAP_LOCK_INIT(kernel_pmap);
  516         kernel_pmap->pm_pml4 = (pdp_entry_t *) (KERNBASE + KPML4phys);
  517         kernel_pmap->pm_active = -1;    /* don't allow deactivation */
  518         TAILQ_INIT(&kernel_pmap->pm_pvchunk);
  519         nkpt = NKPT;
  520 
  521         /*
  522          * Reserve some special page table entries/VA space for temporary
  523          * mapping of pages.
  524          */
  525 #define SYSMAP(c, p, v, n)      \
  526         v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
  527 
  528         va = virtual_avail;
  529         pte = vtopte(va);
  530 
  531         /*
  532          * CMAP1 is only used for the memory test.
  533          */
  534         SYSMAP(caddr_t, CMAP1, CADDR1, 1)
  535 
  536         /*
  537          * Crashdump maps.
  538          */
  539         SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
  540 
  541         /*
  542          * msgbufp is used to map the system message buffer.
  543          */
  544         SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE)))
  545 
  546         virtual_avail = va;
  547 
  548         *CMAP1 = 0;
  549 
  550         invltlb();
  551 
  552         /* Initialize the PAT MSR. */
  553         pmap_init_pat();
  554 }
  555 
  556 /*
  557  * Setup the PAT MSR.
  558  */
  559 void
  560 pmap_init_pat(void)
  561 {
  562         uint64_t pat_msr;
  563 
  564         /* Bail if this CPU doesn't implement PAT. */
  565         if (!(cpu_feature & CPUID_PAT))
  566                 panic("no PAT??");
  567 
  568 #ifdef PAT_WORKS
  569         /*
  570          * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
  571          * Program 4 and 5 as WP and WC.
  572          * Leave 6 and 7 as UC and UC-.
  573          */
  574         pat_msr = rdmsr(MSR_PAT);
  575         pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
  576         pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
  577             PAT_VALUE(5, PAT_WRITE_COMBINING);
  578 #else
  579         /*
  580          * Due to some Intel errata, we can only safely use the lower 4
  581          * PAT entries.  Thus, just replace PAT Index 2 with WC instead
  582          * of UC-.
  583          *
  584          *   Intel Pentium III Processor Specification Update
  585          * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
  586          * or Mode C Paging)
  587          *
  588          *   Intel Pentium IV  Processor Specification Update
  589          * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
  590          */
  591         pat_msr = rdmsr(MSR_PAT);
  592         pat_msr &= ~PAT_MASK(2);
  593         pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
  594 #endif
  595         wrmsr(MSR_PAT, pat_msr);
  596 }
  597 
  598 /*
  599  *      Initialize a vm_page's machine-dependent fields.
  600  */
  601 void
  602 pmap_page_init(vm_page_t m)
  603 {
  604 
  605         TAILQ_INIT(&m->md.pv_list);
  606         m->md.pv_list_count = 0;
  607 }
  608 
  609 /*
  610  *      Initialize the pmap module.
  611  *      Called by vm_init, to initialize any structures that the pmap
  612  *      system needs to map virtual memory.
  613  */
  614 void
  615 pmap_init(void)
  616 {
  617 
  618         /*
  619          * Initialize the address space (zone) for the pv entries.  Set a
  620          * high water mark so that the system can recover from excessive
  621          * numbers of pv entries.
  622          */
  623         TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
  624         pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
  625         TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
  626         pv_entry_high_water = 9 * (pv_entry_max / 10);
  627 }
  628 
  629 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
  630 static int
  631 pmap_pventry_proc(SYSCTL_HANDLER_ARGS)
  632 {
  633         int error;
  634 
  635         error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, req);
  636         if (error == 0 && req->newptr) {
  637                 shpgperproc = (pv_entry_max - cnt.v_page_count) / maxproc;
  638                 pv_entry_high_water = 9 * (pv_entry_max / 10);
  639         }
  640         return (error);
  641 }
  642 SYSCTL_PROC(_vm_pmap, OID_AUTO, pv_entry_max, CTLTYPE_INT|CTLFLAG_RW, 
  643     &pv_entry_max, 0, pmap_pventry_proc, "IU", "Max number of PV entries");
  644 
  645 static int
  646 pmap_shpgperproc_proc(SYSCTL_HANDLER_ARGS)
  647 {
  648         int error;
  649 
  650         error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, req);
  651         if (error == 0 && req->newptr) {
  652                 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
  653                 pv_entry_high_water = 9 * (pv_entry_max / 10);
  654         }
  655         return (error);
  656 }
  657 SYSCTL_PROC(_vm_pmap, OID_AUTO, shpgperproc, CTLTYPE_INT|CTLFLAG_RW, 
  658     &shpgperproc, 0, pmap_shpgperproc_proc, "IU", "Page share factor per proc");
  659 
  660 
  661 /***************************************************
  662  * Low level helper routines.....
  663  ***************************************************/
  664 
  665 /*
  666  * Determine the appropriate bits to set in a PTE or PDE for a specified
  667  * caching mode.
  668  */
  669 static int
  670 pmap_cache_bits(int mode, boolean_t is_pde)
  671 {
  672         int pat_flag, pat_index, cache_bits;
  673 
  674         /* The PAT bit is different for PTE's and PDE's. */
  675         pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
  676 
  677         /* If we don't support PAT, map extended modes to older ones. */
  678         if (!(cpu_feature & CPUID_PAT)) {
  679                 switch (mode) {
  680                 case PAT_UNCACHEABLE:
  681                 case PAT_WRITE_THROUGH:
  682                 case PAT_WRITE_BACK:
  683                         break;
  684                 case PAT_UNCACHED:
  685                 case PAT_WRITE_COMBINING:
  686                 case PAT_WRITE_PROTECTED:
  687                         mode = PAT_UNCACHEABLE;
  688                         break;
  689                 }
  690         }
  691         
  692         /* Map the caching mode to a PAT index. */
  693         switch (mode) {
  694 #ifdef PAT_WORKS
  695         case PAT_UNCACHEABLE:
  696                 pat_index = 3;
  697                 break;
  698         case PAT_WRITE_THROUGH:
  699                 pat_index = 1;
  700                 break;
  701         case PAT_WRITE_BACK:
  702                 pat_index = 0;
  703                 break;
  704         case PAT_UNCACHED:
  705                 pat_index = 2;
  706                 break;
  707         case PAT_WRITE_COMBINING:
  708                 pat_index = 5;
  709                 break;
  710         case PAT_WRITE_PROTECTED:
  711                 pat_index = 4;
  712                 break;
  713 #else
  714         case PAT_UNCACHED:
  715         case PAT_UNCACHEABLE:
  716         case PAT_WRITE_PROTECTED:
  717                 pat_index = 3;
  718                 break;
  719         case PAT_WRITE_THROUGH:
  720                 pat_index = 1;
  721                 break;
  722         case PAT_WRITE_BACK:
  723                 pat_index = 0;
  724                 break;
  725         case PAT_WRITE_COMBINING:
  726                 pat_index = 2;
  727                 break;
  728 #endif
  729         default:
  730                 panic("Unknown caching mode %d\n", mode);
  731         }       
  732 
  733         /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
  734         cache_bits = 0;
  735         if (pat_index & 0x4)
  736                 cache_bits |= pat_flag;
  737         if (pat_index & 0x2)
  738                 cache_bits |= PG_NC_PCD;
  739         if (pat_index & 0x1)
  740                 cache_bits |= PG_NC_PWT;
  741         return (cache_bits);
  742 }
  743 #ifdef SMP
  744 /*
  745  * For SMP, these functions have to use the IPI mechanism for coherence.
  746  *
  747  * N.B.: Before calling any of the following TLB invalidation functions,
  748  * the calling processor must ensure that all stores updating a non-
  749  * kernel page table are globally performed.  Otherwise, another
  750  * processor could cache an old, pre-update entry without being
  751  * invalidated.  This can happen one of two ways: (1) The pmap becomes
  752  * active on another processor after its pm_active field is checked by
  753  * one of the following functions but before a store updating the page
  754  * table is globally performed. (2) The pmap becomes active on another
  755  * processor before its pm_active field is checked but due to
  756  * speculative loads one of the following functions stills reads the
  757  * pmap as inactive on the other processor.
  758  * 
  759  * The kernel page table is exempt because its pm_active field is
  760  * immutable.  The kernel page table is always active on every
  761  * processor.
  762  */
  763 void
  764 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
  765 {
  766         u_int cpumask;
  767         u_int other_cpus;
  768 
  769         sched_pin();
  770         if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
  771                 invlpg(va);
  772                 smp_invlpg(va);
  773         } else {
  774                 cpumask = PCPU_GET(cpumask);
  775                 other_cpus = PCPU_GET(other_cpus);
  776                 if (pmap->pm_active & cpumask)
  777                         invlpg(va);
  778                 if (pmap->pm_active & other_cpus)
  779                         smp_masked_invlpg(pmap->pm_active & other_cpus, va);
  780         }
  781         sched_unpin();
  782 }
  783 
  784 void
  785 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
  786 {
  787         u_int cpumask;
  788         u_int other_cpus;
  789         vm_offset_t addr;
  790 
  791         sched_pin();
  792         if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
  793                 for (addr = sva; addr < eva; addr += PAGE_SIZE)
  794                         invlpg(addr);
  795                 smp_invlpg_range(sva, eva);
  796         } else {
  797                 cpumask = PCPU_GET(cpumask);
  798                 other_cpus = PCPU_GET(other_cpus);
  799                 if (pmap->pm_active & cpumask)
  800                         for (addr = sva; addr < eva; addr += PAGE_SIZE)
  801                                 invlpg(addr);
  802                 if (pmap->pm_active & other_cpus)
  803                         smp_masked_invlpg_range(pmap->pm_active & other_cpus,
  804                             sva, eva);
  805         }
  806         sched_unpin();
  807 }
  808 
  809 void
  810 pmap_invalidate_all(pmap_t pmap)
  811 {
  812         u_int cpumask;
  813         u_int other_cpus;
  814 
  815         sched_pin();
  816         if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
  817                 invltlb();
  818                 smp_invltlb();
  819         } else {
  820                 cpumask = PCPU_GET(cpumask);
  821                 other_cpus = PCPU_GET(other_cpus);
  822                 if (pmap->pm_active & cpumask)
  823                         invltlb();
  824                 if (pmap->pm_active & other_cpus)
  825                         smp_masked_invltlb(pmap->pm_active & other_cpus);
  826         }
  827         sched_unpin();
  828 }
  829 
  830 void
  831 pmap_invalidate_cache(void)
  832 {
  833 
  834         sched_pin();
  835         wbinvd();
  836         smp_cache_flush();
  837         sched_unpin();
  838 }
  839 #else /* !SMP */
  840 /*
  841  * Normal, non-SMP, invalidation functions.
  842  * We inline these within pmap.c for speed.
  843  */
  844 PMAP_INLINE void
  845 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
  846 {
  847 
  848         if (pmap == kernel_pmap || pmap->pm_active)
  849                 invlpg(va);
  850 }
  851 
  852 PMAP_INLINE void
  853 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
  854 {
  855         vm_offset_t addr;
  856 
  857         if (pmap == kernel_pmap || pmap->pm_active)
  858                 for (addr = sva; addr < eva; addr += PAGE_SIZE)
  859                         invlpg(addr);
  860 }
  861 
  862 PMAP_INLINE void
  863 pmap_invalidate_all(pmap_t pmap)
  864 {
  865 
  866         if (pmap == kernel_pmap || pmap->pm_active)
  867                 invltlb();
  868 }
  869 
  870 PMAP_INLINE void
  871 pmap_invalidate_cache(void)
  872 {
  873 
  874         wbinvd();
  875 }
  876 #endif /* !SMP */
  877 
  878 /*
  879  * Are we current address space or kernel?
  880  */
  881 static __inline int
  882 pmap_is_current(pmap_t pmap)
  883 {
  884         return (pmap == kernel_pmap ||
  885             (pmap->pm_pml4[PML4PML4I] & PG_FRAME) == (PML4pml4e[0] & PG_FRAME));
  886 }
  887 
  888 /*
  889  *      Routine:        pmap_extract
  890  *      Function:
  891  *              Extract the physical page address associated
  892  *              with the given map/virtual_address pair.
  893  */
  894 vm_paddr_t 
  895 pmap_extract(pmap_t pmap, vm_offset_t va)
  896 {
  897         vm_paddr_t rtval;
  898         pt_entry_t *pte;
  899         pd_entry_t pde, *pdep;
  900 
  901         rtval = 0;
  902         PMAP_LOCK(pmap);
  903         pdep = pmap_pde(pmap, va);
  904         if (pdep != NULL) {
  905                 pde = *pdep;
  906                 if (pde) {
  907                         if ((pde & PG_PS) != 0) {
  908                                 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
  909                                 PMAP_UNLOCK(pmap);
  910                                 return rtval;
  911                         }
  912                         pte = pmap_pde_to_pte(pdep, va);
  913                         rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
  914                 }
  915         }
  916         PMAP_UNLOCK(pmap);
  917         return (rtval);
  918 }
  919 
  920 /*
  921  *      Routine:        pmap_extract_and_hold
  922  *      Function:
  923  *              Atomically extract and hold the physical page
  924  *              with the given pmap and virtual address pair
  925  *              if that mapping permits the given protection.
  926  */
  927 vm_page_t
  928 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
  929 {
  930         pd_entry_t pde, *pdep;
  931         pt_entry_t pte;
  932         vm_page_t m;
  933 
  934         m = NULL;
  935         vm_page_lock_queues();
  936         PMAP_LOCK(pmap);
  937         pdep = pmap_pde(pmap, va);
  938         if (pdep != NULL && (pde = *pdep)) {
  939                 if (pde & PG_PS) {
  940                         if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
  941                                 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
  942                                     (va & PDRMASK));
  943                                 vm_page_hold(m);
  944                         }
  945                 } else {
  946                         pte = *pmap_pde_to_pte(pdep, va);
  947                         if ((pte & PG_V) &&
  948                             ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
  949                                 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
  950                                 vm_page_hold(m);
  951                         }
  952                 }
  953         }
  954         vm_page_unlock_queues();
  955         PMAP_UNLOCK(pmap);
  956         return (m);
  957 }
  958 
  959 vm_paddr_t
  960 pmap_kextract(vm_offset_t va)
  961 {
  962         pd_entry_t *pde;
  963         vm_paddr_t pa;
  964 
  965         if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
  966                 pa = DMAP_TO_PHYS(va);
  967         } else {
  968                 pde = vtopde(va);
  969                 if (*pde & PG_PS) {
  970                         pa = (*pde & PG_PS_FRAME) | (va & PDRMASK);
  971                 } else {
  972                         pa = *vtopte(va);
  973                         pa = (pa & PG_FRAME) | (va & PAGE_MASK);
  974                 }
  975         }
  976         return pa;
  977 }
  978 
  979 /***************************************************
  980  * Low level mapping routines.....
  981  ***************************************************/
  982 
  983 /*
  984  * Add a wired page to the kva.
  985  * Note: not SMP coherent.
  986  */
  987 PMAP_INLINE void 
  988 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
  989 {
  990         pt_entry_t *pte;
  991 
  992         pte = vtopte(va);
  993         pte_store(pte, pa | PG_RW | PG_V | PG_G);
  994 }
  995 
  996 PMAP_INLINE void 
  997 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
  998 {
  999         pt_entry_t *pte;
 1000 
 1001         pte = vtopte(va);
 1002         pte_store(pte, pa | PG_RW | PG_V | PG_G | pmap_cache_bits(mode, 0));
 1003 }
 1004 
 1005 /*
 1006  * Remove a page from the kernel pagetables.
 1007  * Note: not SMP coherent.
 1008  */
 1009 PMAP_INLINE void
 1010 pmap_kremove(vm_offset_t va)
 1011 {
 1012         pt_entry_t *pte;
 1013 
 1014         pte = vtopte(va);
 1015         pte_clear(pte);
 1016 }
 1017 
 1018 /*
 1019  *      Used to map a range of physical addresses into kernel
 1020  *      virtual address space.
 1021  *
 1022  *      The value passed in '*virt' is a suggested virtual address for
 1023  *      the mapping. Architectures which can support a direct-mapped
 1024  *      physical to virtual region can return the appropriate address
 1025  *      within that region, leaving '*virt' unchanged. Other
 1026  *      architectures should map the pages starting at '*virt' and
 1027  *      update '*virt' with the first usable address after the mapped
 1028  *      region.
 1029  */
 1030 vm_offset_t
 1031 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
 1032 {
 1033         return PHYS_TO_DMAP(start);
 1034 }
 1035 
 1036 
 1037 /*
 1038  * Add a list of wired pages to the kva
 1039  * this routine is only used for temporary
 1040  * kernel mappings that do not need to have
 1041  * page modification or references recorded.
 1042  * Note that old mappings are simply written
 1043  * over.  The page *must* be wired.
 1044  * Note: SMP coherent.  Uses a ranged shootdown IPI.
 1045  */
 1046 void
 1047 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
 1048 {
 1049         pt_entry_t *endpte, oldpte, *pte;
 1050 
 1051         oldpte = 0;
 1052         pte = vtopte(sva);
 1053         endpte = pte + count;
 1054         while (pte < endpte) {
 1055                 oldpte |= *pte;
 1056                 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | PG_G | PG_RW | PG_V);
 1057                 pte++;
 1058                 ma++;
 1059         }
 1060         if ((oldpte & PG_V) != 0)
 1061                 pmap_invalidate_range(kernel_pmap, sva, sva + count *
 1062                     PAGE_SIZE);
 1063 }
 1064 
 1065 /*
 1066  * This routine tears out page mappings from the
 1067  * kernel -- it is meant only for temporary mappings.
 1068  * Note: SMP coherent.  Uses a ranged shootdown IPI.
 1069  */
 1070 void
 1071 pmap_qremove(vm_offset_t sva, int count)
 1072 {
 1073         vm_offset_t va;
 1074 
 1075         va = sva;
 1076         while (count-- > 0) {
 1077                 pmap_kremove(va);
 1078                 va += PAGE_SIZE;
 1079         }
 1080         pmap_invalidate_range(kernel_pmap, sva, va);
 1081 }
 1082 
 1083 /***************************************************
 1084  * Page table page management routines.....
 1085  ***************************************************/
 1086 static __inline void
 1087 pmap_free_zero_pages(vm_page_t free)
 1088 {
 1089         vm_page_t m;
 1090 
 1091         while (free != NULL) {
 1092                 m = free;
 1093                 free = m->right;
 1094                 vm_page_free_zero(m);
 1095         }
 1096 }
 1097 
 1098 /*
 1099  * This routine unholds page table pages, and if the hold count
 1100  * drops to zero, then it decrements the wire count.
 1101  */
 1102 static __inline int
 1103 pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_page_t *free)
 1104 {
 1105 
 1106         --m->wire_count;
 1107         if (m->wire_count == 0)
 1108                 return _pmap_unwire_pte_hold(pmap, va, m, free);
 1109         else
 1110                 return 0;
 1111 }
 1112 
 1113 static int 
 1114 _pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, 
 1115     vm_page_t *free)
 1116 {
 1117         vm_offset_t pteva;
 1118 
 1119         /*
 1120          * unmap the page table page
 1121          */
 1122         if (m->pindex >= (NUPDE + NUPDPE)) {
 1123                 /* PDP page */
 1124                 pml4_entry_t *pml4;
 1125                 pml4 = pmap_pml4e(pmap, va);
 1126                 pteva = (vm_offset_t) PDPmap + amd64_ptob(m->pindex - (NUPDE + NUPDPE));
 1127                 *pml4 = 0;
 1128         } else if (m->pindex >= NUPDE) {
 1129                 /* PD page */
 1130                 pdp_entry_t *pdp;
 1131                 pdp = pmap_pdpe(pmap, va);
 1132                 pteva = (vm_offset_t) PDmap + amd64_ptob(m->pindex - NUPDE);
 1133                 *pdp = 0;
 1134         } else {
 1135                 /* PTE page */
 1136                 pd_entry_t *pd;
 1137                 pd = pmap_pde(pmap, va);
 1138                 pteva = (vm_offset_t) PTmap + amd64_ptob(m->pindex);
 1139                 *pd = 0;
 1140         }
 1141         --pmap->pm_stats.resident_count;
 1142         if (m->pindex < NUPDE) {
 1143                 /* We just released a PT, unhold the matching PD */
 1144                 vm_page_t pdpg;
 1145 
 1146                 pdpg = PHYS_TO_VM_PAGE(*pmap_pdpe(pmap, va) & PG_FRAME);
 1147                 pmap_unwire_pte_hold(pmap, va, pdpg, free);
 1148         }
 1149         if (m->pindex >= NUPDE && m->pindex < (NUPDE + NUPDPE)) {
 1150                 /* We just released a PD, unhold the matching PDP */
 1151                 vm_page_t pdppg;
 1152 
 1153                 pdppg = PHYS_TO_VM_PAGE(*pmap_pml4e(pmap, va) & PG_FRAME);
 1154                 pmap_unwire_pte_hold(pmap, va, pdppg, free);
 1155         }
 1156 
 1157         /*
 1158          * This is a release store so that the ordinary store unmapping
 1159          * the page table page is globally performed before TLB shoot-
 1160          * down is begun.
 1161          */
 1162         atomic_subtract_rel_int(&cnt.v_wire_count, 1);
 1163 
 1164         /*
 1165          * Do an invltlb to make the invalidated mapping
 1166          * take effect immediately.
 1167          */
 1168         pmap_invalidate_page(pmap, pteva);
 1169 
 1170         /* 
 1171          * Put page on a list so that it is released after
 1172          * *ALL* TLB shootdown is done
 1173          */
 1174         m->right = *free;
 1175         *free = m;
 1176         
 1177         return 1;
 1178 }
 1179 
 1180 /*
 1181  * After removing a page table entry, this routine is used to
 1182  * conditionally free the page, and manage the hold/wire counts.
 1183  */
 1184 static int
 1185 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde, vm_page_t *free)
 1186 {
 1187         vm_page_t mpte;
 1188 
 1189         if (va >= VM_MAXUSER_ADDRESS)
 1190                 return 0;
 1191         KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
 1192         mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
 1193         return pmap_unwire_pte_hold(pmap, va, mpte, free);
 1194 }
 1195 
 1196 void
 1197 pmap_pinit0(pmap_t pmap)
 1198 {
 1199 
 1200         PMAP_LOCK_INIT(pmap);
 1201         pmap->pm_pml4 = (pml4_entry_t *)(KERNBASE + KPML4phys);
 1202         pmap->pm_active = 0;
 1203         TAILQ_INIT(&pmap->pm_pvchunk);
 1204         bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
 1205 }
 1206 
 1207 /*
 1208  * Initialize a preallocated and zeroed pmap structure,
 1209  * such as one in a vmspace structure.
 1210  */
 1211 int
 1212 pmap_pinit(pmap_t pmap)
 1213 {
 1214         vm_page_t pml4pg;
 1215         static vm_pindex_t color;
 1216 
 1217         PMAP_LOCK_INIT(pmap);
 1218 
 1219         /*
 1220          * allocate the page directory page
 1221          */
 1222         while ((pml4pg = vm_page_alloc(NULL, color++, VM_ALLOC_NOOBJ |
 1223             VM_ALLOC_NORMAL | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
 1224                 VM_WAIT;
 1225 
 1226         pmap->pm_pml4 = (pml4_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pml4pg));
 1227 
 1228         if ((pml4pg->flags & PG_ZERO) == 0)
 1229                 pagezero(pmap->pm_pml4);
 1230 
 1231         /* Wire in kernel global address entries. */
 1232         pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
 1233         pmap->pm_pml4[DMPML4I] = DMPDPphys | PG_RW | PG_V | PG_U;
 1234 
 1235         /* install self-referential address mapping entry(s) */
 1236         pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(pml4pg) | PG_V | PG_RW | PG_A | PG_M;
 1237 
 1238         pmap->pm_active = 0;
 1239         TAILQ_INIT(&pmap->pm_pvchunk);
 1240         bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
 1241 
 1242         return (1);
 1243 }
 1244 
 1245 /*
 1246  * this routine is called if the page table page is not
 1247  * mapped correctly.
 1248  *
 1249  * Note: If a page allocation fails at page table level two or three,
 1250  * one or two pages may be held during the wait, only to be released
 1251  * afterwards.  This conservative approach is easily argued to avoid
 1252  * race conditions.
 1253  */
 1254 static vm_page_t
 1255 _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, int flags)
 1256 {
 1257         vm_page_t m, pdppg, pdpg;
 1258 
 1259         KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
 1260             (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
 1261             ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
 1262 
 1263         /*
 1264          * Allocate a page table page.
 1265          */
 1266         if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
 1267             VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
 1268                 if (flags & M_WAITOK) {
 1269                         PMAP_UNLOCK(pmap);
 1270                         vm_page_unlock_queues();
 1271                         VM_WAIT;
 1272                         vm_page_lock_queues();
 1273                         PMAP_LOCK(pmap);
 1274                 }
 1275 
 1276                 /*
 1277                  * Indicate the need to retry.  While waiting, the page table
 1278                  * page may have been allocated.
 1279                  */
 1280                 return (NULL);
 1281         }
 1282         if ((m->flags & PG_ZERO) == 0)
 1283                 pmap_zero_page(m);
 1284 
 1285         /*
 1286          * Map the pagetable page into the process address space, if
 1287          * it isn't already there.
 1288          */
 1289 
 1290         pmap->pm_stats.resident_count++;
 1291 
 1292         if (ptepindex >= (NUPDE + NUPDPE)) {
 1293                 pml4_entry_t *pml4;
 1294                 vm_pindex_t pml4index;
 1295 
 1296                 /* Wire up a new PDPE page */
 1297                 pml4index = ptepindex - (NUPDE + NUPDPE);
 1298                 pml4 = &pmap->pm_pml4[pml4index];
 1299                 *pml4 = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
 1300 
 1301         } else if (ptepindex >= NUPDE) {
 1302                 vm_pindex_t pml4index;
 1303                 vm_pindex_t pdpindex;
 1304                 pml4_entry_t *pml4;
 1305                 pdp_entry_t *pdp;
 1306 
 1307                 /* Wire up a new PDE page */
 1308                 pdpindex = ptepindex - NUPDE;
 1309                 pml4index = pdpindex >> NPML4EPGSHIFT;
 1310 
 1311                 pml4 = &pmap->pm_pml4[pml4index];
 1312                 if ((*pml4 & PG_V) == 0) {
 1313                         /* Have to allocate a new pdp, recurse */
 1314                         if (_pmap_allocpte(pmap, NUPDE + NUPDPE + pml4index,
 1315                             flags) == NULL) {
 1316                                 --m->wire_count;
 1317                                 vm_page_free(m);
 1318                                 return (NULL);
 1319                         }
 1320                 } else {
 1321                         /* Add reference to pdp page */
 1322                         pdppg = PHYS_TO_VM_PAGE(*pml4 & PG_FRAME);
 1323                         pdppg->wire_count++;
 1324                 }
 1325                 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
 1326 
 1327                 /* Now find the pdp page */
 1328                 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
 1329                 *pdp = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
 1330 
 1331         } else {
 1332                 vm_pindex_t pml4index;
 1333                 vm_pindex_t pdpindex;
 1334                 pml4_entry_t *pml4;
 1335                 pdp_entry_t *pdp;
 1336                 pd_entry_t *pd;
 1337 
 1338                 /* Wire up a new PTE page */
 1339                 pdpindex = ptepindex >> NPDPEPGSHIFT;
 1340                 pml4index = pdpindex >> NPML4EPGSHIFT;
 1341 
 1342                 /* First, find the pdp and check that its valid. */
 1343                 pml4 = &pmap->pm_pml4[pml4index];
 1344                 if ((*pml4 & PG_V) == 0) {
 1345                         /* Have to allocate a new pd, recurse */
 1346                         if (_pmap_allocpte(pmap, NUPDE + pdpindex,
 1347                             flags) == NULL) {
 1348                                 --m->wire_count;
 1349                                 vm_page_free(m);
 1350                                 return (NULL);
 1351                         }
 1352                         pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
 1353                         pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
 1354                 } else {
 1355                         pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
 1356                         pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
 1357                         if ((*pdp & PG_V) == 0) {
 1358                                 /* Have to allocate a new pd, recurse */
 1359                                 if (_pmap_allocpte(pmap, NUPDE + pdpindex,
 1360                                     flags) == NULL) {
 1361                                         --m->wire_count;
 1362                                         vm_page_free(m);
 1363                                         return (NULL);
 1364                                 }
 1365                         } else {
 1366                                 /* Add reference to the pd page */
 1367                                 pdpg = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
 1368                                 pdpg->wire_count++;
 1369                         }
 1370                 }
 1371                 pd = (pd_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME);
 1372 
 1373                 /* Now we know where the page directory page is */
 1374                 pd = &pd[ptepindex & ((1ul << NPDEPGSHIFT) - 1)];
 1375                 *pd = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
 1376         }
 1377 
 1378         return m;
 1379 }
 1380 
 1381 static vm_page_t
 1382 pmap_allocpde(pmap_t pmap, vm_offset_t va, int flags)
 1383 {
 1384         vm_pindex_t pdpindex, ptepindex;
 1385         pdp_entry_t *pdpe;
 1386         vm_page_t pdpg;
 1387 
 1388         KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
 1389             (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
 1390             ("pmap_allocpde: flags is neither M_NOWAIT nor M_WAITOK"));
 1391 retry:
 1392         pdpe = pmap_pdpe(pmap, va);
 1393         if (pdpe != NULL && (*pdpe & PG_V) != 0) {
 1394                 /* Add a reference to the pd page. */
 1395                 pdpg = PHYS_TO_VM_PAGE(*pdpe & PG_FRAME);
 1396                 pdpg->wire_count++;
 1397         } else {
 1398                 /* Allocate a pd page. */
 1399                 ptepindex = pmap_pde_pindex(va);
 1400                 pdpindex = ptepindex >> NPDPEPGSHIFT;
 1401                 pdpg = _pmap_allocpte(pmap, NUPDE + pdpindex, flags);
 1402                 if (pdpg == NULL && (flags & M_WAITOK))
 1403                         goto retry;
 1404         }
 1405         return (pdpg);
 1406 }
 1407 
 1408 static vm_page_t
 1409 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
 1410 {
 1411         vm_pindex_t ptepindex;
 1412         pd_entry_t *pd;
 1413         vm_page_t m, free;
 1414 
 1415         KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
 1416             (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
 1417             ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
 1418 
 1419         /*
 1420          * Calculate pagetable page index
 1421          */
 1422         ptepindex = pmap_pde_pindex(va);
 1423 retry:
 1424         /*
 1425          * Get the page directory entry
 1426          */
 1427         pd = pmap_pde(pmap, va);
 1428 
 1429         /*
 1430          * This supports switching from a 2MB page to a
 1431          * normal 4K page.
 1432          */
 1433         if (pd != 0 && (*pd & (PG_PS | PG_V)) == (PG_PS | PG_V)) {
 1434                 *pd = 0;
 1435                 pd = 0;
 1436                 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
 1437                 free = NULL;
 1438                 pmap_unuse_pt(pmap, va, *pmap_pdpe(pmap, va), &free);
 1439                 pmap_invalidate_all(kernel_pmap);
 1440                 pmap_free_zero_pages(free);
 1441         }
 1442 
 1443         /*
 1444          * If the page table page is mapped, we just increment the
 1445          * hold count, and activate it.
 1446          */
 1447         if (pd != 0 && (*pd & PG_V) != 0) {
 1448                 m = PHYS_TO_VM_PAGE(*pd & PG_FRAME);
 1449                 m->wire_count++;
 1450         } else {
 1451                 /*
 1452                  * Here if the pte page isn't mapped, or if it has been
 1453                  * deallocated.
 1454                  */
 1455                 m = _pmap_allocpte(pmap, ptepindex, flags);
 1456                 if (m == NULL && (flags & M_WAITOK))
 1457                         goto retry;
 1458         }
 1459         return (m);
 1460 }
 1461 
 1462 
 1463 /***************************************************
 1464  * Pmap allocation/deallocation routines.
 1465  ***************************************************/
 1466 
 1467 /*
 1468  * Release any resources held by the given physical map.
 1469  * Called when a pmap initialized by pmap_pinit is being released.
 1470  * Should only be called if the map contains no valid mappings.
 1471  */
 1472 void
 1473 pmap_release(pmap_t pmap)
 1474 {
 1475         vm_page_t m;
 1476 
 1477         KASSERT(pmap->pm_stats.resident_count == 0,
 1478             ("pmap_release: pmap resident count %ld != 0",
 1479             pmap->pm_stats.resident_count));
 1480 
 1481         m = PHYS_TO_VM_PAGE(pmap->pm_pml4[PML4PML4I] & PG_FRAME);
 1482 
 1483         pmap->pm_pml4[KPML4I] = 0;      /* KVA */
 1484         pmap->pm_pml4[DMPML4I] = 0;     /* Direct Map */
 1485         pmap->pm_pml4[PML4PML4I] = 0;   /* Recursive Mapping */
 1486 
 1487         m->wire_count--;
 1488         atomic_subtract_int(&cnt.v_wire_count, 1);
 1489         vm_page_free_zero(m);
 1490         PMAP_LOCK_DESTROY(pmap);
 1491 }
 1492 
 1493 static int
 1494 kvm_size(SYSCTL_HANDLER_ARGS)
 1495 {
 1496         unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
 1497 
 1498         return sysctl_handle_long(oidp, &ksize, 0, req);
 1499 }
 1500 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 
 1501     0, 0, kvm_size, "LU", "Size of KVM");
 1502 
 1503 static int
 1504 kvm_free(SYSCTL_HANDLER_ARGS)
 1505 {
 1506         unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
 1507 
 1508         return sysctl_handle_long(oidp, &kfree, 0, req);
 1509 }
 1510 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 
 1511     0, 0, kvm_free, "LU", "Amount of KVM free");
 1512 
 1513 /*
 1514  * grow the number of kernel page table entries, if needed
 1515  */
 1516 void
 1517 pmap_growkernel(vm_offset_t addr)
 1518 {
 1519         vm_paddr_t paddr;
 1520         vm_page_t nkpg;
 1521         pd_entry_t *pde, newpdir;
 1522         pdp_entry_t newpdp;
 1523 
 1524         mtx_assert(&kernel_map->system_mtx, MA_OWNED);
 1525         if (kernel_vm_end == 0) {
 1526                 kernel_vm_end = KERNBASE;
 1527                 nkpt = 0;
 1528                 while ((*pmap_pde(kernel_pmap, kernel_vm_end) & PG_V) != 0) {
 1529                         kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
 1530                         nkpt++;
 1531                         if (kernel_vm_end - 1 >= kernel_map->max_offset) {
 1532                                 kernel_vm_end = kernel_map->max_offset;
 1533                                 break;                       
 1534                         }
 1535                 }
 1536         }
 1537         addr = roundup2(addr, PAGE_SIZE * NPTEPG);
 1538         if (addr - 1 >= kernel_map->max_offset)
 1539                 addr = kernel_map->max_offset;
 1540         while (kernel_vm_end < addr) {
 1541                 pde = pmap_pde(kernel_pmap, kernel_vm_end);
 1542                 if (pde == NULL) {
 1543                         /* We need a new PDP entry */
 1544                         nkpg = vm_page_alloc(NULL, nkpt,
 1545                             VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
 1546                             VM_ALLOC_WIRED | VM_ALLOC_ZERO);
 1547                         if (!nkpg)
 1548                                 panic("pmap_growkernel: no memory to grow kernel");
 1549                         if ((nkpg->flags & PG_ZERO) == 0)
 1550                                 pmap_zero_page(nkpg);
 1551                         paddr = VM_PAGE_TO_PHYS(nkpg);
 1552                         newpdp = (pdp_entry_t)
 1553                                 (paddr | PG_V | PG_RW | PG_A | PG_M);
 1554                         *pmap_pdpe(kernel_pmap, kernel_vm_end) = newpdp;
 1555                         continue; /* try again */
 1556                 }
 1557                 if ((*pde & PG_V) != 0) {
 1558                         kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
 1559                         if (kernel_vm_end - 1 >= kernel_map->max_offset) {
 1560                                 kernel_vm_end = kernel_map->max_offset;
 1561                                 break;                       
 1562                         }
 1563                         continue;
 1564                 }
 1565 
 1566                 /*
 1567                  * This index is bogus, but out of the way
 1568                  */
 1569                 nkpg = vm_page_alloc(NULL, nkpt,
 1570                     VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
 1571                     VM_ALLOC_ZERO);
 1572                 if (!nkpg)
 1573                         panic("pmap_growkernel: no memory to grow kernel");
 1574 
 1575                 nkpt++;
 1576 
 1577                 if ((nkpg->flags & PG_ZERO) == 0)
 1578                         pmap_zero_page(nkpg);
 1579                 paddr = VM_PAGE_TO_PHYS(nkpg);
 1580                 newpdir = (pd_entry_t) (paddr | PG_V | PG_RW | PG_A | PG_M);
 1581                 *pmap_pde(kernel_pmap, kernel_vm_end) = newpdir;
 1582 
 1583                 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
 1584                 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
 1585                         kernel_vm_end = kernel_map->max_offset;
 1586                         break;                       
 1587                 }
 1588         }
 1589 }
 1590 
 1591 
 1592 /***************************************************
 1593  * page management routines.
 1594  ***************************************************/
 1595 
 1596 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
 1597 CTASSERT(_NPCM == 3);
 1598 CTASSERT(_NPCPV == 168);
 1599 
 1600 static __inline struct pv_chunk *
 1601 pv_to_chunk(pv_entry_t pv)
 1602 {
 1603 
 1604         return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK);
 1605 }
 1606 
 1607 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
 1608 
 1609 #define PC_FREE0        0xfffffffffffffffful
 1610 #define PC_FREE1        0xfffffffffffffffful
 1611 #define PC_FREE2        0x000000fffffffffful
 1612 
 1613 static uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
 1614 
 1615 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
 1616         "Current number of pv entries");
 1617 
 1618 #ifdef PV_STATS
 1619 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
 1620 
 1621 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
 1622         "Current number of pv entry chunks");
 1623 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
 1624         "Current number of pv entry chunks allocated");
 1625 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
 1626         "Current number of pv entry chunks frees");
 1627 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
 1628         "Number of times tried to get a chunk page but failed.");
 1629 
 1630 static long pv_entry_frees, pv_entry_allocs;
 1631 static int pv_entry_spare;
 1632 
 1633 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
 1634         "Current number of pv entry frees");
 1635 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
 1636         "Current number of pv entry allocs");
 1637 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
 1638         "Current number of spare pv entries");
 1639 
 1640 static int pmap_collect_inactive, pmap_collect_active;
 1641 
 1642 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
 1643         "Current number times pmap_collect called on inactive queue");
 1644 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
 1645         "Current number times pmap_collect called on active queue");
 1646 #endif
 1647 
 1648 /*
 1649  * We are in a serious low memory condition.  Resort to
 1650  * drastic measures to free some pages so we can allocate
 1651  * another pv entry chunk.  This is normally called to
 1652  * unmap inactive pages, and if necessary, active pages.
 1653  */
 1654 static void
 1655 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
 1656 {
 1657         pd_entry_t ptepde;
 1658         pmap_t pmap;
 1659         pt_entry_t *pte, tpte;
 1660         pv_entry_t next_pv, pv;
 1661         vm_offset_t va;
 1662         vm_page_t m, free;
 1663 
 1664         TAILQ_FOREACH(m, &vpq->pl, pageq) {
 1665                 if (m->hold_count || m->busy)
 1666                         continue;
 1667                 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
 1668                         va = pv->pv_va;
 1669                         pmap = PV_PMAP(pv);
 1670                         /* Avoid deadlock and lock recursion. */
 1671                         if (pmap > locked_pmap)
 1672                                 PMAP_LOCK(pmap);
 1673                         else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
 1674                                 continue;
 1675                         pmap->pm_stats.resident_count--;
 1676                         pte = pmap_pte_pde(pmap, va, &ptepde);
 1677                         if (pte == NULL) {
 1678                                 panic("null pte in pmap_collect");
 1679                         }
 1680                         tpte = pte_load_clear(pte);
 1681                         KASSERT((tpte & PG_W) == 0,
 1682                             ("pmap_collect: wired pte %#lx", tpte));
 1683                         if (tpte & PG_A)
 1684                                 vm_page_flag_set(m, PG_REFERENCED);
 1685                         if (tpte & PG_M) {
 1686                                 KASSERT((tpte & PG_RW),
 1687         ("pmap_collect: modified page not writable: va: %#lx, pte: %#lx",
 1688                                     va, tpte));
 1689                                 vm_page_dirty(m);
 1690                         }
 1691                         free = NULL;
 1692                         pmap_unuse_pt(pmap, va, ptepde, &free);
 1693                         pmap_invalidate_page(pmap, va);
 1694                         pmap_free_zero_pages(free);
 1695                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 1696                         if (TAILQ_EMPTY(&m->md.pv_list))
 1697                                 vm_page_flag_clear(m, PG_WRITEABLE);
 1698                         m->md.pv_list_count--;
 1699                         free_pv_entry(pmap, pv);
 1700                         if (pmap != locked_pmap)
 1701                                 PMAP_UNLOCK(pmap);
 1702                 }
 1703         }
 1704 }
 1705 
 1706 
 1707 /*
 1708  * free the pv_entry back to the free list
 1709  */
 1710 static void
 1711 free_pv_entry(pmap_t pmap, pv_entry_t pv)
 1712 {
 1713         vm_page_t m;
 1714         struct pv_chunk *pc;
 1715         int idx, field, bit;
 1716 
 1717         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 1718         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1719         PV_STAT(pv_entry_frees++);
 1720         PV_STAT(pv_entry_spare++);
 1721         pv_entry_count--;
 1722         pc = pv_to_chunk(pv);
 1723         idx = pv - &pc->pc_pventry[0];
 1724         field = idx / 64;
 1725         bit = idx % 64;
 1726         pc->pc_map[field] |= 1ul << bit;
 1727         /* move to head of list */
 1728         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
 1729         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
 1730         if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
 1731             pc->pc_map[2] != PC_FREE2)
 1732                 return;
 1733         PV_STAT(pv_entry_spare -= _NPCPV);
 1734         PV_STAT(pc_chunk_count--);
 1735         PV_STAT(pc_chunk_frees++);
 1736         /* entire chunk is free, return it */
 1737         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
 1738         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
 1739         dump_drop_page(m->phys_addr);
 1740         vm_page_unwire(m, 0);
 1741         vm_page_free(m);
 1742 }
 1743 
 1744 /*
 1745  * get a new pv_entry, allocating a block from the system
 1746  * when needed.
 1747  */
 1748 static pv_entry_t
 1749 get_pv_entry(pmap_t pmap, int try)
 1750 {
 1751         static const struct timeval printinterval = { 60, 0 };
 1752         static struct timeval lastprint;
 1753         static vm_pindex_t colour;
 1754         struct vpgqueues *pq;
 1755         int bit, field;
 1756         pv_entry_t pv;
 1757         struct pv_chunk *pc;
 1758         vm_page_t m;
 1759 
 1760         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1761         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 1762         PV_STAT(pv_entry_allocs++);
 1763         pv_entry_count++;
 1764         if (pv_entry_count > pv_entry_high_water)
 1765                 if (ratecheck(&lastprint, &printinterval))
 1766                         printf("Approaching the limit on PV entries, consider "
 1767                             "increasing either the vm.pmap.shpgperproc or the "
 1768                             "vm.pmap.pv_entry_max sysctl.\n");
 1769         pq = NULL;
 1770 retry:
 1771         pc = TAILQ_FIRST(&pmap->pm_pvchunk);
 1772         if (pc != NULL) {
 1773                 for (field = 0; field < _NPCM; field++) {
 1774                         if (pc->pc_map[field]) {
 1775                                 bit = bsfq(pc->pc_map[field]);
 1776                                 break;
 1777                         }
 1778                 }
 1779                 if (field < _NPCM) {
 1780                         pv = &pc->pc_pventry[field * 64 + bit];
 1781                         pc->pc_map[field] &= ~(1ul << bit);
 1782                         /* If this was the last item, move it to tail */
 1783                         if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
 1784                             pc->pc_map[2] == 0) {
 1785                                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
 1786                                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
 1787                         }
 1788                         PV_STAT(pv_entry_spare--);
 1789                         return (pv);
 1790                 }
 1791         }
 1792         /* No free items, allocate another chunk */
 1793         m = vm_page_alloc(NULL, colour, (pq == &vm_page_queues[PQ_ACTIVE] ?
 1794             VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ |
 1795             VM_ALLOC_WIRED);
 1796         if (m == NULL) {
 1797                 if (try) {
 1798                         pv_entry_count--;
 1799                         PV_STAT(pc_chunk_tryfail++);
 1800                         return (NULL);
 1801                 }
 1802                 /*
 1803                  * Reclaim pv entries: At first, destroy mappings to inactive
 1804                  * pages.  After that, if a pv chunk entry is still needed,
 1805                  * destroy mappings to active pages.
 1806                  */
 1807                 if (pq == NULL) {
 1808                         PV_STAT(pmap_collect_inactive++);
 1809                         pq = &vm_page_queues[PQ_INACTIVE];
 1810                 } else if (pq == &vm_page_queues[PQ_INACTIVE]) {
 1811                         PV_STAT(pmap_collect_active++);
 1812                         pq = &vm_page_queues[PQ_ACTIVE];
 1813                 } else
 1814                         panic("get_pv_entry: increase vm.pmap.shpgperproc");
 1815                 pmap_collect(pmap, pq);
 1816                 goto retry;
 1817         }
 1818         PV_STAT(pc_chunk_count++);
 1819         PV_STAT(pc_chunk_allocs++);
 1820         colour++;
 1821         dump_add_page(m->phys_addr);
 1822         pc = (void *)PHYS_TO_DMAP(m->phys_addr);
 1823         pc->pc_pmap = pmap;
 1824         pc->pc_map[0] = PC_FREE0 & ~1ul;        /* preallocated bit 0 */
 1825         pc->pc_map[1] = PC_FREE1;
 1826         pc->pc_map[2] = PC_FREE2;
 1827         pv = &pc->pc_pventry[0];
 1828         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
 1829         PV_STAT(pv_entry_spare += _NPCPV - 1);
 1830         return (pv);
 1831 }
 1832 
 1833 static void
 1834 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
 1835 {
 1836         pv_entry_t pv;
 1837 
 1838         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1839         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 1840         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 1841                 if (pmap == PV_PMAP(pv) && va == pv->pv_va) 
 1842                         break;
 1843         }
 1844         KASSERT(pv != NULL, ("pmap_remove_entry: pv not found"));
 1845         TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 1846         m->md.pv_list_count--;
 1847         if (TAILQ_EMPTY(&m->md.pv_list))
 1848                 vm_page_flag_clear(m, PG_WRITEABLE);
 1849         free_pv_entry(pmap, pv);
 1850 }
 1851 
 1852 /*
 1853  * Create a pv entry for page at pa for
 1854  * (pmap, va).
 1855  */
 1856 static void
 1857 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
 1858 {
 1859         pv_entry_t pv;
 1860 
 1861         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1862         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 1863         pv = get_pv_entry(pmap, FALSE);
 1864         pv->pv_va = va;
 1865         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
 1866         m->md.pv_list_count++;
 1867 }
 1868 
 1869 /*
 1870  * Conditionally create a pv entry.
 1871  */
 1872 static boolean_t
 1873 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
 1874 {
 1875         pv_entry_t pv;
 1876 
 1877         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1878         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 1879         if (pv_entry_count < pv_entry_high_water && 
 1880             (pv = get_pv_entry(pmap, TRUE)) != NULL) {
 1881                 pv->pv_va = va;
 1882                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
 1883                 m->md.pv_list_count++;
 1884                 return (TRUE);
 1885         } else
 1886                 return (FALSE);
 1887 }
 1888 
 1889 /*
 1890  * pmap_remove_pte: do the things to unmap a page in a process
 1891  */
 1892 static int
 1893 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, 
 1894     pd_entry_t ptepde, vm_page_t *free)
 1895 {
 1896         pt_entry_t oldpte;
 1897         vm_page_t m;
 1898 
 1899         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1900         oldpte = pte_load_clear(ptq);
 1901         if (oldpte & PG_W)
 1902                 pmap->pm_stats.wired_count -= 1;
 1903         /*
 1904          * Machines that don't support invlpg, also don't support
 1905          * PG_G.
 1906          */
 1907         if (oldpte & PG_G)
 1908                 pmap_invalidate_page(kernel_pmap, va);
 1909         pmap->pm_stats.resident_count -= 1;
 1910         if (oldpte & PG_MANAGED) {
 1911                 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME);
 1912                 if (oldpte & PG_M) {
 1913                         KASSERT((oldpte & PG_RW),
 1914         ("pmap_remove_pte: modified page not writable: va: %#lx, pte: %#lx",
 1915                             va, oldpte));
 1916                         vm_page_dirty(m);
 1917                 }
 1918                 if (oldpte & PG_A)
 1919                         vm_page_flag_set(m, PG_REFERENCED);
 1920                 pmap_remove_entry(pmap, m, va);
 1921         }
 1922         return (pmap_unuse_pt(pmap, va, ptepde, free));
 1923 }
 1924 
 1925 /*
 1926  * Remove a single page from a process address space
 1927  */
 1928 static void
 1929 pmap_remove_page(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, vm_page_t *free)
 1930 {
 1931         pt_entry_t *pte;
 1932 
 1933         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1934         if ((*pde & PG_V) == 0)
 1935                 return;
 1936         pte = pmap_pde_to_pte(pde, va);
 1937         if ((*pte & PG_V) == 0)
 1938                 return;
 1939         pmap_remove_pte(pmap, pte, va, *pde, free);
 1940         pmap_invalidate_page(pmap, va);
 1941 }
 1942 
 1943 /*
 1944  *      Remove the given range of addresses from the specified map.
 1945  *
 1946  *      It is assumed that the start and end are properly
 1947  *      rounded to the page size.
 1948  */
 1949 void
 1950 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
 1951 {
 1952         vm_offset_t va_next;
 1953         pml4_entry_t *pml4e;
 1954         pdp_entry_t *pdpe;
 1955         pd_entry_t ptpaddr, *pde;
 1956         pt_entry_t *pte;
 1957         vm_page_t free = NULL;
 1958         int anyvalid;
 1959 
 1960         /*
 1961          * Perform an unsynchronized read.  This is, however, safe.
 1962          */
 1963         if (pmap->pm_stats.resident_count == 0)
 1964                 return;
 1965 
 1966         anyvalid = 0;
 1967 
 1968         vm_page_lock_queues();
 1969         PMAP_LOCK(pmap);
 1970 
 1971         /*
 1972          * special handling of removing one page.  a very
 1973          * common operation and easy to short circuit some
 1974          * code.
 1975          */
 1976         if (sva + PAGE_SIZE == eva) {
 1977                 pde = pmap_pde(pmap, sva);
 1978                 if (pde && (*pde & PG_PS) == 0) {
 1979                         pmap_remove_page(pmap, sva, pde, &free);
 1980                         goto out;
 1981                 }
 1982         }
 1983 
 1984         for (; sva < eva; sva = va_next) {
 1985 
 1986                 if (pmap->pm_stats.resident_count == 0)
 1987                         break;
 1988 
 1989                 pml4e = pmap_pml4e(pmap, sva);
 1990                 if ((*pml4e & PG_V) == 0) {
 1991                         va_next = (sva + NBPML4) & ~PML4MASK;
 1992                         if (va_next < sva)
 1993                                 va_next = eva;
 1994                         continue;
 1995                 }
 1996 
 1997                 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
 1998                 if ((*pdpe & PG_V) == 0) {
 1999                         va_next = (sva + NBPDP) & ~PDPMASK;
 2000                         if (va_next < sva)
 2001                                 va_next = eva;
 2002                         continue;
 2003                 }
 2004 
 2005                 /*
 2006                  * Calculate index for next page table.
 2007                  */
 2008                 va_next = (sva + NBPDR) & ~PDRMASK;
 2009                 if (va_next < sva)
 2010                         va_next = eva;
 2011 
 2012                 pde = pmap_pdpe_to_pde(pdpe, sva);
 2013                 ptpaddr = *pde;
 2014 
 2015                 /*
 2016                  * Weed out invalid mappings.
 2017                  */
 2018                 if (ptpaddr == 0)
 2019                         continue;
 2020 
 2021                 /*
 2022                  * Check for large page.
 2023                  */
 2024                 if ((ptpaddr & PG_PS) != 0) {
 2025                         *pde = 0;
 2026                         pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
 2027                         pmap_unuse_pt(pmap, sva, *pdpe, &free);
 2028                         anyvalid = 1;
 2029                         continue;
 2030                 }
 2031 
 2032                 /*
 2033                  * Limit our scan to either the end of the va represented
 2034                  * by the current page table page, or to the end of the
 2035                  * range being removed.
 2036                  */
 2037                 if (va_next > eva)
 2038                         va_next = eva;
 2039 
 2040                 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
 2041                     sva += PAGE_SIZE) {
 2042                         if (*pte == 0)
 2043                                 continue;
 2044 
 2045                         /*
 2046                          * The TLB entry for a PG_G mapping is invalidated
 2047                          * by pmap_remove_pte().
 2048                          */
 2049                         if ((*pte & PG_G) == 0)
 2050                                 anyvalid = 1;
 2051                         if (pmap_remove_pte(pmap, pte, sva, ptpaddr, &free))
 2052                                 break;
 2053                 }
 2054         }
 2055 out:
 2056         if (anyvalid)
 2057                 pmap_invalidate_all(pmap);
 2058         vm_page_unlock_queues();        
 2059         PMAP_UNLOCK(pmap);
 2060         pmap_free_zero_pages(free);
 2061 }
 2062 
 2063 /*
 2064  *      Routine:        pmap_remove_all
 2065  *      Function:
 2066  *              Removes this physical page from
 2067  *              all physical maps in which it resides.
 2068  *              Reflects back modify bits to the pager.
 2069  *
 2070  *      Notes:
 2071  *              Original versions of this routine were very
 2072  *              inefficient because they iteratively called
 2073  *              pmap_remove (slow...)
 2074  */
 2075 
 2076 void
 2077 pmap_remove_all(vm_page_t m)
 2078 {
 2079         pv_entry_t pv;
 2080         pmap_t pmap;
 2081         pt_entry_t *pte, tpte;
 2082         pd_entry_t ptepde;
 2083         vm_page_t free;
 2084 
 2085 #if defined(PMAP_DIAGNOSTIC)
 2086         /*
 2087          * XXX This makes pmap_remove_all() illegal for non-managed pages!
 2088          */
 2089         if (m->flags & PG_FICTITIOUS) {
 2090                 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%lx",
 2091                     VM_PAGE_TO_PHYS(m));
 2092         }
 2093 #endif
 2094         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2095         while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
 2096                 pmap = PV_PMAP(pv);
 2097                 PMAP_LOCK(pmap);
 2098                 pmap->pm_stats.resident_count--;
 2099                 pte = pmap_pte_pde(pmap, pv->pv_va, &ptepde);
 2100                 if (pte == NULL) {
 2101                         panic("null pte in pmap_remove_all");
 2102                 }
 2103                 tpte = pte_load_clear(pte);
 2104                 if (tpte & PG_W)
 2105                         pmap->pm_stats.wired_count--;
 2106                 if (tpte & PG_A)
 2107                         vm_page_flag_set(m, PG_REFERENCED);
 2108 
 2109                 /*
 2110                  * Update the vm_page_t clean and reference bits.
 2111                  */
 2112                 if (tpte & PG_M) {
 2113                         KASSERT((tpte & PG_RW),
 2114         ("pmap_remove_all: modified page not writable: va: %#lx, pte: %#lx",
 2115                             pv->pv_va, tpte));
 2116                         vm_page_dirty(m);
 2117                 }
 2118                 free = NULL;
 2119                 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
 2120                 pmap_invalidate_page(pmap, pv->pv_va);
 2121                 pmap_free_zero_pages(free);
 2122                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 2123                 m->md.pv_list_count--;
 2124                 free_pv_entry(pmap, pv);
 2125                 PMAP_UNLOCK(pmap);
 2126         }
 2127         vm_page_flag_clear(m, PG_WRITEABLE);
 2128 }
 2129 
 2130 /*
 2131  *      Set the physical protection on the
 2132  *      specified range of this map as requested.
 2133  */
 2134 void
 2135 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
 2136 {
 2137         vm_offset_t va_next;
 2138         pml4_entry_t *pml4e;
 2139         pdp_entry_t *pdpe;
 2140         pd_entry_t ptpaddr, *pde;
 2141         pt_entry_t *pte;
 2142         int anychanged;
 2143 
 2144         if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
 2145                 pmap_remove(pmap, sva, eva);
 2146                 return;
 2147         }
 2148 
 2149         if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
 2150             (VM_PROT_WRITE|VM_PROT_EXECUTE))
 2151                 return;
 2152 
 2153         anychanged = 0;
 2154 
 2155         vm_page_lock_queues();
 2156         PMAP_LOCK(pmap);
 2157         for (; sva < eva; sva = va_next) {
 2158 
 2159                 pml4e = pmap_pml4e(pmap, sva);
 2160                 if ((*pml4e & PG_V) == 0) {
 2161                         va_next = (sva + NBPML4) & ~PML4MASK;
 2162                         if (va_next < sva)
 2163                                 va_next = eva;
 2164                         continue;
 2165                 }
 2166 
 2167                 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
 2168                 if ((*pdpe & PG_V) == 0) {
 2169                         va_next = (sva + NBPDP) & ~PDPMASK;
 2170                         if (va_next < sva)
 2171                                 va_next = eva;
 2172                         continue;
 2173                 }
 2174 
 2175                 va_next = (sva + NBPDR) & ~PDRMASK;
 2176                 if (va_next < sva)
 2177                         va_next = eva;
 2178 
 2179                 pde = pmap_pdpe_to_pde(pdpe, sva);
 2180                 ptpaddr = *pde;
 2181 
 2182                 /*
 2183                  * Weed out invalid mappings.
 2184                  */
 2185                 if (ptpaddr == 0)
 2186                         continue;
 2187 
 2188                 /*
 2189                  * Check for large page.
 2190                  */
 2191                 if ((ptpaddr & PG_PS) != 0) {
 2192                         if ((prot & VM_PROT_WRITE) == 0)
 2193                                 *pde &= ~(PG_M|PG_RW);
 2194                         if ((prot & VM_PROT_EXECUTE) == 0)
 2195                                 *pde |= pg_nx;
 2196                         anychanged = 1;
 2197                         continue;
 2198                 }
 2199 
 2200                 if (va_next > eva)
 2201                         va_next = eva;
 2202 
 2203                 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
 2204                     sva += PAGE_SIZE) {
 2205                         pt_entry_t obits, pbits;
 2206                         vm_page_t m;
 2207 
 2208 retry:
 2209                         obits = pbits = *pte;
 2210                         if ((pbits & PG_V) == 0)
 2211                                 continue;
 2212                         if (pbits & PG_MANAGED) {
 2213                                 m = NULL;
 2214                                 if (pbits & PG_A) {
 2215                                         m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
 2216                                         vm_page_flag_set(m, PG_REFERENCED);
 2217                                         pbits &= ~PG_A;
 2218                                 }
 2219                                 if ((pbits & PG_M) != 0) {
 2220                                         if (m == NULL)
 2221                                                 m = PHYS_TO_VM_PAGE(pbits &
 2222                                                     PG_FRAME);
 2223                                         vm_page_dirty(m);
 2224                                 }
 2225                         }
 2226 
 2227                         if ((prot & VM_PROT_WRITE) == 0)
 2228                                 pbits &= ~(PG_RW | PG_M);
 2229                         if ((prot & VM_PROT_EXECUTE) == 0)
 2230                                 pbits |= pg_nx;
 2231 
 2232                         if (pbits != obits) {
 2233                                 if (!atomic_cmpset_long(pte, obits, pbits))
 2234                                         goto retry;
 2235                                 if (obits & PG_G)
 2236                                         pmap_invalidate_page(pmap, sva);
 2237                                 else
 2238                                         anychanged = 1;
 2239                         }
 2240                 }
 2241         }
 2242         if (anychanged)
 2243                 pmap_invalidate_all(pmap);
 2244         vm_page_unlock_queues();
 2245         PMAP_UNLOCK(pmap);
 2246 }
 2247 
 2248 /*
 2249  *      Insert the given physical page (p) at
 2250  *      the specified virtual address (v) in the
 2251  *      target physical map with the protection requested.
 2252  *
 2253  *      If specified, the page will be wired down, meaning
 2254  *      that the related pte can not be reclaimed.
 2255  *
 2256  *      NB:  This is the only routine which MAY NOT lazy-evaluate
 2257  *      or lose information.  That is, this routine must actually
 2258  *      insert this page into the given map NOW.
 2259  */
 2260 void
 2261 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
 2262            boolean_t wired)
 2263 {
 2264         vm_paddr_t pa;
 2265         pd_entry_t *pde;
 2266         pt_entry_t *pte;
 2267         vm_paddr_t opa;
 2268         pt_entry_t origpte, newpte;
 2269         vm_page_t mpte, om;
 2270         boolean_t invlva;
 2271 
 2272         va = trunc_page(va);
 2273 #ifdef PMAP_DIAGNOSTIC
 2274         if (va > VM_MAX_KERNEL_ADDRESS)
 2275                 panic("pmap_enter: toobig");
 2276         if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
 2277                 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%lx)", va);
 2278 #endif
 2279 
 2280         mpte = NULL;
 2281 
 2282         vm_page_lock_queues();
 2283         PMAP_LOCK(pmap);
 2284 
 2285         /*
 2286          * In the case that a page table page is not
 2287          * resident, we are creating it here.
 2288          */
 2289         if (va < VM_MAXUSER_ADDRESS) {
 2290                 mpte = pmap_allocpte(pmap, va, M_WAITOK);
 2291         }
 2292 #if 0 && defined(PMAP_DIAGNOSTIC)
 2293         else {
 2294                 pd_entry_t *pdeaddr = pmap_pde(pmap, va);
 2295                 origpte = *pdeaddr;
 2296                 if ((origpte & PG_V) == 0) { 
 2297                         panic("pmap_enter: invalid kernel page table page, pde=%p, va=%p\n",
 2298                                 origpte, va);
 2299                 }
 2300         }
 2301 #endif
 2302 
 2303         pde = pmap_pde(pmap, va);
 2304         if (pde != NULL) {
 2305                 if ((*pde & PG_PS) != 0)
 2306                         panic("pmap_enter: attempted pmap_enter on 2MB page");
 2307                 pte = pmap_pde_to_pte(pde, va);
 2308         } else
 2309                 pte = NULL;
 2310 
 2311         /*
 2312          * Page Directory table entry not valid, we need a new PT page
 2313          */
 2314         if (pte == NULL)
 2315                 panic("pmap_enter: invalid page directory va=%#lx\n", va);
 2316 
 2317         pa = VM_PAGE_TO_PHYS(m);
 2318         om = NULL;
 2319         origpte = *pte;
 2320         opa = origpte & PG_FRAME;
 2321 
 2322         /*
 2323          * Mapping has not changed, must be protection or wiring change.
 2324          */
 2325         if (origpte && (opa == pa)) {
 2326                 /*
 2327                  * Wiring change, just update stats. We don't worry about
 2328                  * wiring PT pages as they remain resident as long as there
 2329                  * are valid mappings in them. Hence, if a user page is wired,
 2330                  * the PT page will be also.
 2331                  */
 2332                 if (wired && ((origpte & PG_W) == 0))
 2333                         pmap->pm_stats.wired_count++;
 2334                 else if (!wired && (origpte & PG_W))
 2335                         pmap->pm_stats.wired_count--;
 2336 
 2337                 /*
 2338                  * Remove extra pte reference
 2339                  */
 2340                 if (mpte)
 2341                         mpte->wire_count--;
 2342 
 2343                 /*
 2344                  * We might be turning off write access to the page,
 2345                  * so we go ahead and sense modify status.
 2346                  */
 2347                 if (origpte & PG_MANAGED) {
 2348                         om = m;
 2349                         pa |= PG_MANAGED;
 2350                 }
 2351                 goto validate;
 2352         } 
 2353         /*
 2354          * Mapping has changed, invalidate old range and fall through to
 2355          * handle validating new mapping.
 2356          */
 2357         if (opa) {
 2358                 if (origpte & PG_W)
 2359                         pmap->pm_stats.wired_count--;
 2360                 if (origpte & PG_MANAGED) {
 2361                         om = PHYS_TO_VM_PAGE(opa);
 2362                         pmap_remove_entry(pmap, om, va);
 2363                 }
 2364                 if (mpte != NULL) {
 2365                         mpte->wire_count--;
 2366                         KASSERT(mpte->wire_count > 0,
 2367                             ("pmap_enter: missing reference to page table page,"
 2368                              " va: 0x%lx", va));
 2369                 }
 2370         } else
 2371                 pmap->pm_stats.resident_count++;
 2372 
 2373         /*
 2374          * Enter on the PV list if part of our managed memory.
 2375          */
 2376         if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
 2377                 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
 2378                     ("pmap_enter: managed mapping within the clean submap"));
 2379                 pmap_insert_entry(pmap, va, m);
 2380                 pa |= PG_MANAGED;
 2381         }
 2382 
 2383         /*
 2384          * Increment counters
 2385          */
 2386         if (wired)
 2387                 pmap->pm_stats.wired_count++;
 2388 
 2389 validate:
 2390         /*
 2391          * Now validate mapping with desired protection/wiring.
 2392          */
 2393         newpte = (pt_entry_t)(pa | PG_V);
 2394         if ((prot & VM_PROT_WRITE) != 0) {
 2395                 newpte |= PG_RW;
 2396                 vm_page_flag_set(m, PG_WRITEABLE);
 2397         }
 2398         if ((prot & VM_PROT_EXECUTE) == 0)
 2399                 newpte |= pg_nx;
 2400         if (wired)
 2401                 newpte |= PG_W;
 2402         if (va < VM_MAXUSER_ADDRESS)
 2403                 newpte |= PG_U;
 2404         if (pmap == kernel_pmap)
 2405                 newpte |= PG_G;
 2406 
 2407         /*
 2408          * if the mapping or permission bits are different, we need
 2409          * to update the pte.
 2410          */
 2411         if ((origpte & ~(PG_M|PG_A)) != newpte) {
 2412                 if (origpte & PG_V) {
 2413                         invlva = FALSE;
 2414                         origpte = pte_load_store(pte, newpte | PG_A);
 2415                         if (origpte & PG_A) {
 2416                                 if (origpte & PG_MANAGED)
 2417                                         vm_page_flag_set(om, PG_REFERENCED);
 2418                                 if (opa != VM_PAGE_TO_PHYS(m) || ((origpte &
 2419                                     PG_NX) == 0 && (newpte & PG_NX)))
 2420                                         invlva = TRUE;
 2421                         }
 2422                         if (origpte & PG_M) {
 2423                                 KASSERT((origpte & PG_RW),
 2424         ("pmap_enter: modified page not writable: va: %#lx, pte: %#lx",
 2425                                     va, origpte));
 2426                                 if ((origpte & PG_MANAGED) != 0)
 2427                                         vm_page_dirty(om);
 2428                                 if ((newpte & PG_RW) == 0)
 2429                                         invlva = TRUE;
 2430                         }
 2431                         if (invlva)
 2432                                 pmap_invalidate_page(pmap, va);
 2433                 } else
 2434                         pte_store(pte, newpte | PG_A);
 2435         }
 2436         vm_page_unlock_queues();
 2437         PMAP_UNLOCK(pmap);
 2438 }
 2439 
 2440 /*
 2441  * Maps a sequence of resident pages belonging to the same object.
 2442  * The sequence begins with the given page m_start.  This page is
 2443  * mapped at the given virtual address start.  Each subsequent page is
 2444  * mapped at a virtual address that is offset from start by the same
 2445  * amount as the page is offset from m_start within the object.  The
 2446  * last page in the sequence is the page with the largest offset from
 2447  * m_start that can be mapped at a virtual address less than the given
 2448  * virtual address end.  Not every virtual page between start and end
 2449  * is mapped; only those for which a resident page exists with the
 2450  * corresponding offset from m_start are mapped.
 2451  */
 2452 void
 2453 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
 2454     vm_page_t m_start, vm_prot_t prot)
 2455 {
 2456         vm_page_t m, mpte;
 2457         vm_pindex_t diff, psize;
 2458 
 2459         VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
 2460         psize = atop(end - start);
 2461         mpte = NULL;
 2462         m = m_start;
 2463         PMAP_LOCK(pmap);
 2464         while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
 2465                 mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m,
 2466                     prot, mpte);
 2467                 m = TAILQ_NEXT(m, listq);
 2468         }
 2469         PMAP_UNLOCK(pmap);
 2470 }
 2471 
 2472 /*
 2473  * this code makes some *MAJOR* assumptions:
 2474  * 1. Current pmap & pmap exists.
 2475  * 2. Not wired.
 2476  * 3. Read access.
 2477  * 4. No page table pages.
 2478  * but is *MUCH* faster than pmap_enter...
 2479  */
 2480 
 2481 void
 2482 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
 2483 {
 2484 
 2485         PMAP_LOCK(pmap);
 2486         (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL);
 2487         PMAP_UNLOCK(pmap);
 2488 }
 2489 
 2490 static vm_page_t
 2491 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
 2492     vm_prot_t prot, vm_page_t mpte)
 2493 {
 2494         vm_page_t free;
 2495         pt_entry_t *pte;
 2496         vm_paddr_t pa;
 2497 
 2498         KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
 2499             (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
 2500             ("pmap_enter_quick_locked: managed mapping within the clean submap"));
 2501         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2502         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2503 
 2504         /*
 2505          * In the case that a page table page is not
 2506          * resident, we are creating it here.
 2507          */
 2508         if (va < VM_MAXUSER_ADDRESS) {
 2509                 vm_pindex_t ptepindex;
 2510                 pd_entry_t *ptepa;
 2511 
 2512                 /*
 2513                  * Calculate pagetable page index
 2514                  */
 2515                 ptepindex = pmap_pde_pindex(va);
 2516                 if (mpte && (mpte->pindex == ptepindex)) {
 2517                         mpte->wire_count++;
 2518                 } else {
 2519                         /*
 2520                          * Get the page directory entry
 2521                          */
 2522                         ptepa = pmap_pde(pmap, va);
 2523 
 2524                         /*
 2525                          * If the page table page is mapped, we just increment
 2526                          * the hold count, and activate it.
 2527                          */
 2528                         if (ptepa && (*ptepa & PG_V) != 0) {
 2529                                 if (*ptepa & PG_PS)
 2530                                         panic("pmap_enter_quick: unexpected mapping into 2MB page");
 2531                                 mpte = PHYS_TO_VM_PAGE(*ptepa & PG_FRAME);
 2532                                 mpte->wire_count++;
 2533                         } else {
 2534                                 mpte = _pmap_allocpte(pmap, ptepindex,
 2535                                     M_NOWAIT);
 2536                                 if (mpte == NULL)
 2537                                         return (mpte);
 2538                         }
 2539                 }
 2540         } else {
 2541                 mpte = NULL;
 2542         }
 2543 
 2544         /*
 2545          * This call to vtopte makes the assumption that we are
 2546          * entering the page into the current pmap.  In order to support
 2547          * quick entry into any pmap, one would likely use pmap_pte.
 2548          * But that isn't as quick as vtopte.
 2549          */
 2550         pte = vtopte(va);
 2551         if (*pte) {
 2552                 if (mpte != NULL) {
 2553                         mpte->wire_count--;
 2554                         mpte = NULL;
 2555                 }
 2556                 return (mpte);
 2557         }
 2558 
 2559         /*
 2560          * Enter on the PV list if part of our managed memory.
 2561          */
 2562         if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
 2563             !pmap_try_insert_pv_entry(pmap, va, m)) {
 2564                 if (mpte != NULL) {
 2565                         free = NULL;
 2566                         if (pmap_unwire_pte_hold(pmap, va, mpte, &free)) {
 2567                                 pmap_invalidate_page(pmap, va);
 2568                                 pmap_free_zero_pages(free);
 2569                         }
 2570                         mpte = NULL;
 2571                 }
 2572                 return (mpte);
 2573         }
 2574 
 2575         /*
 2576          * Increment counters
 2577          */
 2578         pmap->pm_stats.resident_count++;
 2579 
 2580         pa = VM_PAGE_TO_PHYS(m);
 2581         if ((prot & VM_PROT_EXECUTE) == 0)
 2582                 pa |= pg_nx;
 2583 
 2584         /*
 2585          * Now validate mapping with RO protection
 2586          */
 2587         if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
 2588                 pte_store(pte, pa | PG_V | PG_U);
 2589         else
 2590                 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
 2591         return mpte;
 2592 }
 2593 
 2594 /*
 2595  * Make a temporary mapping for a physical address.  This is only intended
 2596  * to be used for panic dumps.
 2597  */
 2598 void *
 2599 pmap_kenter_temporary(vm_paddr_t pa, int i)
 2600 {
 2601         vm_offset_t va;
 2602 
 2603         va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
 2604         pmap_kenter(va, pa);
 2605         invlpg(va);
 2606         return ((void *)crashdumpmap);
 2607 }
 2608 
 2609 /*
 2610  * This code maps large physical mmap regions into the
 2611  * processor address space.  Note that some shortcuts
 2612  * are taken, but the code works.
 2613  */
 2614 void
 2615 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr,
 2616                     vm_object_t object, vm_pindex_t pindex,
 2617                     vm_size_t size)
 2618 {
 2619         vm_offset_t va;
 2620         vm_page_t p, pdpg;
 2621 
 2622         VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
 2623         KASSERT(object->type == OBJT_DEVICE,
 2624             ("pmap_object_init_pt: non-device object"));
 2625         if (((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) {
 2626                 vm_page_t m[1];
 2627                 pd_entry_t ptepa, *pde;
 2628 
 2629                 PMAP_LOCK(pmap);
 2630                 pde = pmap_pde(pmap, addr);
 2631                 if (pde != 0 && (*pde & PG_V) != 0)
 2632                         goto out;
 2633                 PMAP_UNLOCK(pmap);
 2634 retry:
 2635                 p = vm_page_lookup(object, pindex);
 2636                 if (p != NULL) {
 2637                         if (vm_page_sleep_if_busy(p, FALSE, "init4p"))
 2638                                 goto retry;
 2639                 } else {
 2640                         p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL);
 2641                         if (p == NULL)
 2642                                 return;
 2643                         m[0] = p;
 2644 
 2645                         if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) {
 2646                                 vm_page_lock_queues();
 2647                                 vm_page_free(p);
 2648                                 vm_page_unlock_queues();
 2649                                 return;
 2650                         }
 2651 
 2652                         p = vm_page_lookup(object, pindex);
 2653                         vm_page_lock_queues();
 2654                         vm_page_wakeup(p);
 2655                         vm_page_unlock_queues();
 2656                 }
 2657 
 2658                 ptepa = VM_PAGE_TO_PHYS(p);
 2659                 if (ptepa & (NBPDR - 1))
 2660                         return;
 2661 
 2662                 p->valid = VM_PAGE_BITS_ALL;
 2663 
 2664                 PMAP_LOCK(pmap);
 2665                 for (va = addr; va < addr + size; va += NBPDR) {
 2666                         while ((pdpg =
 2667                             pmap_allocpde(pmap, va, M_NOWAIT)) == NULL) {
 2668                                 PMAP_UNLOCK(pmap);
 2669                                 vm_page_lock_queues();
 2670                                 vm_page_busy(p);
 2671                                 vm_page_unlock_queues();
 2672                                 VM_OBJECT_UNLOCK(object);
 2673                                 VM_WAIT;
 2674                                 VM_OBJECT_LOCK(object);
 2675                                 vm_page_lock_queues();
 2676                                 vm_page_wakeup(p);
 2677                                 vm_page_unlock_queues();
 2678                                 PMAP_LOCK(pmap);
 2679                         }
 2680                         pde = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pdpg));
 2681                         pde = &pde[pmap_pde_index(va)];
 2682                         if ((*pde & PG_V) == 0) {
 2683                                 pde_store(pde, ptepa | PG_PS | PG_M | PG_A |
 2684                                     PG_U | PG_RW | PG_V);
 2685                                 pmap->pm_stats.resident_count +=
 2686                                     NBPDR / PAGE_SIZE;
 2687                         } else {
 2688                                 pdpg->wire_count--;
 2689                                 KASSERT(pdpg->wire_count > 0,
 2690                                     ("pmap_object_init_pt: missing reference "
 2691                                      "to page directory page, va: 0x%lx", va));
 2692                         }
 2693                         ptepa += NBPDR;
 2694                 }
 2695                 pmap_invalidate_all(pmap);
 2696 out:
 2697                 PMAP_UNLOCK(pmap);
 2698         }
 2699 }
 2700 
 2701 /*
 2702  *      Routine:        pmap_change_wiring
 2703  *      Function:       Change the wiring attribute for a map/virtual-address
 2704  *                      pair.
 2705  *      In/out conditions:
 2706  *                      The mapping must already exist in the pmap.
 2707  */
 2708 void
 2709 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
 2710 {
 2711         pt_entry_t *pte;
 2712 
 2713         /*
 2714          * Wiring is not a hardware characteristic so there is no need to
 2715          * invalidate TLB.
 2716          */
 2717         PMAP_LOCK(pmap);
 2718         pte = pmap_pte(pmap, va);
 2719         if (wired && (*pte & PG_W) == 0) {
 2720                 pmap->pm_stats.wired_count++;
 2721                 atomic_set_long(pte, PG_W);
 2722         } else if (!wired && (*pte & PG_W) != 0) {
 2723                 pmap->pm_stats.wired_count--;
 2724                 atomic_clear_long(pte, PG_W);
 2725         }
 2726         PMAP_UNLOCK(pmap);
 2727 }
 2728 
 2729 
 2730 
 2731 /*
 2732  *      Copy the range specified by src_addr/len
 2733  *      from the source map to the range dst_addr/len
 2734  *      in the destination map.
 2735  *
 2736  *      This routine is only advisory and need not do anything.
 2737  */
 2738 
 2739 void
 2740 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
 2741           vm_offset_t src_addr)
 2742 {
 2743         vm_page_t   free;
 2744         vm_offset_t addr;
 2745         vm_offset_t end_addr = src_addr + len;
 2746         vm_offset_t va_next;
 2747 
 2748         if (dst_addr != src_addr)
 2749                 return;
 2750 
 2751         if (!pmap_is_current(src_pmap))
 2752                 return;
 2753 
 2754         vm_page_lock_queues();
 2755         if (dst_pmap < src_pmap) {
 2756                 PMAP_LOCK(dst_pmap);
 2757                 PMAP_LOCK(src_pmap);
 2758         } else {
 2759                 PMAP_LOCK(src_pmap);
 2760                 PMAP_LOCK(dst_pmap);
 2761         }
 2762         for (addr = src_addr; addr < end_addr; addr = va_next) {
 2763                 pt_entry_t *src_pte, *dst_pte;
 2764                 vm_page_t dstmpde, dstmpte, srcmpte;
 2765                 pml4_entry_t *pml4e;
 2766                 pdp_entry_t *pdpe;
 2767                 pd_entry_t srcptepaddr, *pde;
 2768 
 2769                 if (addr >= UPT_MIN_ADDRESS)
 2770                         panic("pmap_copy: invalid to pmap_copy page tables");
 2771 
 2772                 pml4e = pmap_pml4e(src_pmap, addr);
 2773                 if ((*pml4e & PG_V) == 0) {
 2774                         va_next = (addr + NBPML4) & ~PML4MASK;
 2775                         if (va_next < addr)
 2776                                 va_next = end_addr;
 2777                         continue;
 2778                 }
 2779 
 2780                 pdpe = pmap_pml4e_to_pdpe(pml4e, addr);
 2781                 if ((*pdpe & PG_V) == 0) {
 2782                         va_next = (addr + NBPDP) & ~PDPMASK;
 2783                         if (va_next < addr)
 2784                                 va_next = end_addr;
 2785                         continue;
 2786                 }
 2787 
 2788                 va_next = (addr + NBPDR) & ~PDRMASK;
 2789                 if (va_next < addr)
 2790                         va_next = end_addr;
 2791 
 2792                 pde = pmap_pdpe_to_pde(pdpe, addr);
 2793                 srcptepaddr = *pde;
 2794                 if (srcptepaddr == 0)
 2795                         continue;
 2796                         
 2797                 if (srcptepaddr & PG_PS) {
 2798                         dstmpde = pmap_allocpde(dst_pmap, addr, M_NOWAIT);
 2799                         if (dstmpde == NULL)
 2800                                 break;
 2801                         pde = (pd_entry_t *)
 2802                             PHYS_TO_DMAP(VM_PAGE_TO_PHYS(dstmpde));
 2803                         pde = &pde[pmap_pde_index(addr)];
 2804                         if (*pde == 0) {
 2805                                 *pde = srcptepaddr & ~PG_W;
 2806                                 dst_pmap->pm_stats.resident_count +=
 2807                                     NBPDR / PAGE_SIZE;
 2808                         } else
 2809                                 dstmpde->wire_count--;
 2810                         continue;
 2811                 }
 2812 
 2813                 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
 2814                 if (srcmpte->wire_count == 0)
 2815                         panic("pmap_copy: source page table page is unused");
 2816 
 2817                 if (va_next > end_addr)
 2818                         va_next = end_addr;
 2819 
 2820                 src_pte = vtopte(addr);
 2821                 while (addr < va_next) {
 2822                         pt_entry_t ptetemp;
 2823                         ptetemp = *src_pte;
 2824                         /*
 2825                          * we only virtual copy managed pages
 2826                          */
 2827                         if ((ptetemp & PG_MANAGED) != 0) {
 2828                                 dstmpte = pmap_allocpte(dst_pmap, addr,
 2829                                     M_NOWAIT);
 2830                                 if (dstmpte == NULL)
 2831                                         break;
 2832                                 dst_pte = (pt_entry_t *)
 2833                                     PHYS_TO_DMAP(VM_PAGE_TO_PHYS(dstmpte));
 2834                                 dst_pte = &dst_pte[pmap_pte_index(addr)];
 2835                                 if (*dst_pte == 0 &&
 2836                                     pmap_try_insert_pv_entry(dst_pmap, addr,
 2837                                     PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) {
 2838                                         /*
 2839                                          * Clear the wired, modified, and
 2840                                          * accessed (referenced) bits
 2841                                          * during the copy.
 2842                                          */
 2843                                         *dst_pte = ptetemp & ~(PG_W | PG_M |
 2844                                             PG_A);
 2845                                         dst_pmap->pm_stats.resident_count++;
 2846                                 } else {
 2847                                         free = NULL;
 2848                                         if (pmap_unwire_pte_hold(dst_pmap,
 2849                                             addr, dstmpte, &free)) {
 2850                                                 pmap_invalidate_page(dst_pmap,
 2851                                                     addr);
 2852                                                 pmap_free_zero_pages(free);
 2853                                         }
 2854                                 }
 2855                                 if (dstmpte->wire_count >= srcmpte->wire_count)
 2856                                         break;
 2857                         }
 2858                         addr += PAGE_SIZE;
 2859                         src_pte++;
 2860                 }
 2861         }
 2862         vm_page_unlock_queues();
 2863         PMAP_UNLOCK(src_pmap);
 2864         PMAP_UNLOCK(dst_pmap);
 2865 }       
 2866 
 2867 /*
 2868  *      pmap_zero_page zeros the specified hardware page by mapping 
 2869  *      the page into KVM and using bzero to clear its contents.
 2870  */
 2871 void
 2872 pmap_zero_page(vm_page_t m)
 2873 {
 2874         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
 2875 
 2876         pagezero((void *)va);
 2877 }
 2878 
 2879 /*
 2880  *      pmap_zero_page_area zeros the specified hardware page by mapping 
 2881  *      the page into KVM and using bzero to clear its contents.
 2882  *
 2883  *      off and size may not cover an area beyond a single hardware page.
 2884  */
 2885 void
 2886 pmap_zero_page_area(vm_page_t m, int off, int size)
 2887 {
 2888         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
 2889 
 2890         if (off == 0 && size == PAGE_SIZE)
 2891                 pagezero((void *)va);
 2892         else
 2893                 bzero((char *)va + off, size);
 2894 }
 2895 
 2896 /*
 2897  *      pmap_zero_page_idle zeros the specified hardware page by mapping 
 2898  *      the page into KVM and using bzero to clear its contents.  This
 2899  *      is intended to be called from the vm_pagezero process only and
 2900  *      outside of Giant.
 2901  */
 2902 void
 2903 pmap_zero_page_idle(vm_page_t m)
 2904 {
 2905         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
 2906 
 2907         pagezero((void *)va);
 2908 }
 2909 
 2910 /*
 2911  *      pmap_copy_page copies the specified (machine independent)
 2912  *      page by mapping the page into virtual memory and using
 2913  *      bcopy to copy the page, one machine dependent page at a
 2914  *      time.
 2915  */
 2916 void
 2917 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
 2918 {
 2919         vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
 2920         vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
 2921 
 2922         pagecopy((void *)src, (void *)dst);
 2923 }
 2924 
 2925 /*
 2926  * Returns true if the pmap's pv is one of the first
 2927  * 16 pvs linked to from this page.  This count may
 2928  * be changed upwards or downwards in the future; it
 2929  * is only necessary that true be returned for a small
 2930  * subset of pmaps for proper page aging.
 2931  */
 2932 boolean_t
 2933 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
 2934 {
 2935         pv_entry_t pv;
 2936         int loops = 0;
 2937 
 2938         if (m->flags & PG_FICTITIOUS)
 2939                 return FALSE;
 2940 
 2941         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2942         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 2943                 if (PV_PMAP(pv) == pmap) {
 2944                         return TRUE;
 2945                 }
 2946                 loops++;
 2947                 if (loops >= 16)
 2948                         break;
 2949         }
 2950         return (FALSE);
 2951 }
 2952 
 2953 /*
 2954  * Remove all pages from specified address space
 2955  * this aids process exit speeds.  Also, this code
 2956  * is special cased for current process only, but
 2957  * can have the more generic (and slightly slower)
 2958  * mode enabled.  This is much faster than pmap_remove
 2959  * in the case of running down an entire address space.
 2960  */
 2961 void
 2962 pmap_remove_pages(pmap_t pmap)
 2963 {
 2964         pt_entry_t *pte, tpte;
 2965         vm_page_t m, free = NULL;
 2966         pv_entry_t pv;
 2967         struct pv_chunk *pc, *npc;
 2968         int field, idx;
 2969         int64_t bit;
 2970         uint64_t inuse, bitmask;
 2971         int allfree;
 2972 
 2973         if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
 2974                 printf("warning: pmap_remove_pages called with non-current pmap\n");
 2975                 return;
 2976         }
 2977         vm_page_lock_queues();
 2978         PMAP_LOCK(pmap);
 2979         TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
 2980                 allfree = 1;
 2981                 for (field = 0; field < _NPCM; field++) {
 2982                         inuse = (~(pc->pc_map[field])) & pc_freemask[field];
 2983                         while (inuse != 0) {
 2984                                 bit = bsfq(inuse);
 2985                                 bitmask = 1UL << bit;
 2986                                 idx = field * 64 + bit;
 2987                                 pv = &pc->pc_pventry[idx];
 2988                                 inuse &= ~bitmask;
 2989 
 2990                                 pte = vtopte(pv->pv_va);
 2991                                 tpte = *pte;
 2992 
 2993                                 if (tpte == 0) {
 2994                                         printf(
 2995                                             "TPTE at %p  IS ZERO @ VA %08lx\n",
 2996                                             pte, pv->pv_va);
 2997                                         panic("bad pte");
 2998                                 }
 2999 
 3000 /*
 3001  * We cannot remove wired pages from a process' mapping at this time
 3002  */
 3003                                 if (tpte & PG_W) {
 3004                                         allfree = 0;
 3005                                         continue;
 3006                                 }
 3007 
 3008                                 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
 3009                                 KASSERT(m->phys_addr == (tpte & PG_FRAME),
 3010                                     ("vm_page_t %p phys_addr mismatch %016jx %016jx",
 3011                                     m, (uintmax_t)m->phys_addr,
 3012                                     (uintmax_t)tpte));
 3013 
 3014                                 KASSERT(m < &vm_page_array[vm_page_array_size],
 3015                                         ("pmap_remove_pages: bad tpte %#jx",
 3016                                         (uintmax_t)tpte));
 3017 
 3018                                 pmap->pm_stats.resident_count--;
 3019 
 3020                                 pte_clear(pte);
 3021 
 3022                                 /*
 3023                                  * Update the vm_page_t clean/reference bits.
 3024                                  */
 3025                                 if (tpte & PG_M)
 3026                                         vm_page_dirty(m);
 3027 
 3028                                 /* Mark free */
 3029                                 PV_STAT(pv_entry_frees++);
 3030                                 PV_STAT(pv_entry_spare++);
 3031                                 pv_entry_count--;
 3032                                 pc->pc_map[field] |= bitmask;
 3033                                 m->md.pv_list_count--;
 3034                                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 3035                                 if (TAILQ_EMPTY(&m->md.pv_list))
 3036                                         vm_page_flag_clear(m, PG_WRITEABLE);
 3037                                 pmap_unuse_pt(pmap, pv->pv_va,
 3038                                     *vtopde(pv->pv_va), &free);
 3039                         }
 3040                 }
 3041                 if (allfree) {
 3042                         PV_STAT(pv_entry_spare -= _NPCPV);
 3043                         PV_STAT(pc_chunk_count--);
 3044                         PV_STAT(pc_chunk_frees++);
 3045                         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
 3046                         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
 3047                         dump_drop_page(m->phys_addr);
 3048                         vm_page_unwire(m, 0);
 3049                         vm_page_free(m);
 3050                 }
 3051         }
 3052         pmap_invalidate_all(pmap);
 3053         vm_page_unlock_queues();
 3054         PMAP_UNLOCK(pmap);
 3055         pmap_free_zero_pages(free);
 3056 }
 3057 
 3058 /*
 3059  *      pmap_is_modified:
 3060  *
 3061  *      Return whether or not the specified physical page was modified
 3062  *      in any physical maps.
 3063  */
 3064 boolean_t
 3065 pmap_is_modified(vm_page_t m)
 3066 {
 3067         pv_entry_t pv;
 3068         pt_entry_t *pte;
 3069         pmap_t pmap;
 3070         boolean_t rv;
 3071 
 3072         rv = FALSE;
 3073         if (m->flags & PG_FICTITIOUS)
 3074                 return (rv);
 3075 
 3076         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3077         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 3078                 pmap = PV_PMAP(pv);
 3079                 PMAP_LOCK(pmap);
 3080                 pte = pmap_pte(pmap, pv->pv_va);
 3081                 rv = (*pte & PG_M) != 0;
 3082                 PMAP_UNLOCK(pmap);
 3083                 if (rv)
 3084                         break;
 3085         }
 3086         return (rv);
 3087 }
 3088 
 3089 /*
 3090  *      pmap_is_prefaultable:
 3091  *
 3092  *      Return whether or not the specified virtual address is elgible
 3093  *      for prefault.
 3094  */
 3095 boolean_t
 3096 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
 3097 {
 3098         pd_entry_t *pde;
 3099         pt_entry_t *pte;
 3100         boolean_t rv;
 3101 
 3102         rv = FALSE;
 3103         PMAP_LOCK(pmap);
 3104         pde = pmap_pde(pmap, addr);
 3105         if (pde != NULL && (*pde & PG_V)) {
 3106                 pte = vtopte(addr);
 3107                 rv = (*pte & PG_V) == 0;
 3108         }
 3109         PMAP_UNLOCK(pmap);
 3110         return (rv);
 3111 }
 3112 
 3113 /*
 3114  * Clear the write and modified bits in each of the given page's mappings.
 3115  */
 3116 void
 3117 pmap_remove_write(vm_page_t m)
 3118 {
 3119         pv_entry_t pv;
 3120         pmap_t pmap;
 3121         pt_entry_t oldpte, *pte;
 3122 
 3123         if ((m->flags & PG_FICTITIOUS) != 0 ||
 3124             (m->flags & PG_WRITEABLE) == 0)
 3125                 return;
 3126         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3127         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 3128                 pmap = PV_PMAP(pv);
 3129                 PMAP_LOCK(pmap);
 3130                 pte = pmap_pte(pmap, pv->pv_va);
 3131 retry:
 3132                 oldpte = *pte;
 3133                 if (oldpte & PG_RW) {
 3134                         if (!atomic_cmpset_long(pte, oldpte, oldpte &
 3135                             ~(PG_RW | PG_M)))
 3136                                 goto retry;
 3137                         if ((oldpte & PG_M) != 0)
 3138                                 vm_page_dirty(m);
 3139                         pmap_invalidate_page(pmap, pv->pv_va);
 3140                 }
 3141                 PMAP_UNLOCK(pmap);
 3142         }
 3143         vm_page_flag_clear(m, PG_WRITEABLE);
 3144 }
 3145 
 3146 /*
 3147  *      pmap_ts_referenced:
 3148  *
 3149  *      Return a count of reference bits for a page, clearing those bits.
 3150  *      It is not necessary for every reference bit to be cleared, but it
 3151  *      is necessary that 0 only be returned when there are truly no
 3152  *      reference bits set.
 3153  *
 3154  *      XXX: The exact number of bits to check and clear is a matter that
 3155  *      should be tested and standardized at some point in the future for
 3156  *      optimal aging of shared pages.
 3157  */
 3158 int
 3159 pmap_ts_referenced(vm_page_t m)
 3160 {
 3161         pv_entry_t pv, pvf, pvn;
 3162         pmap_t pmap;
 3163         pt_entry_t *pte;
 3164         int rtval = 0;
 3165 
 3166         if (m->flags & PG_FICTITIOUS)
 3167                 return (rtval);
 3168         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3169         if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
 3170                 pvf = pv;
 3171                 do {
 3172                         pvn = TAILQ_NEXT(pv, pv_list);
 3173                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 3174                         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
 3175                         pmap = PV_PMAP(pv);
 3176                         PMAP_LOCK(pmap);
 3177                         pte = pmap_pte(pmap, pv->pv_va);
 3178                         if ((*pte & PG_A) != 0) {
 3179                                 atomic_clear_long(pte, PG_A);
 3180                                 pmap_invalidate_page(pmap, pv->pv_va);
 3181                                 rtval++;
 3182                                 if (rtval > 4)
 3183                                         pvn = NULL;
 3184                         }
 3185                         PMAP_UNLOCK(pmap);
 3186                 } while ((pv = pvn) != NULL && pv != pvf);
 3187         }
 3188         return (rtval);
 3189 }
 3190 
 3191 /*
 3192  *      Clear the modify bits on the specified physical page.
 3193  */
 3194 void
 3195 pmap_clear_modify(vm_page_t m)
 3196 {
 3197         pv_entry_t pv;
 3198         pmap_t pmap;
 3199         pt_entry_t *pte;
 3200 
 3201         if ((m->flags & PG_FICTITIOUS) != 0)
 3202                 return;
 3203         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3204         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 3205                 pmap = PV_PMAP(pv);
 3206                 PMAP_LOCK(pmap);
 3207                 pte = pmap_pte(pmap, pv->pv_va);
 3208                 if (*pte & PG_M) {
 3209                         atomic_clear_long(pte, PG_M);
 3210                         pmap_invalidate_page(pmap, pv->pv_va);
 3211                 }
 3212                 PMAP_UNLOCK(pmap);
 3213         }
 3214 }
 3215 
 3216 /*
 3217  *      pmap_clear_reference:
 3218  *
 3219  *      Clear the reference bit on the specified physical page.
 3220  */
 3221 void
 3222 pmap_clear_reference(vm_page_t m)
 3223 {
 3224         pv_entry_t pv;
 3225         pmap_t pmap;
 3226         pt_entry_t *pte;
 3227 
 3228         if ((m->flags & PG_FICTITIOUS) != 0)
 3229                 return;
 3230         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3231         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 3232                 pmap = PV_PMAP(pv);
 3233                 PMAP_LOCK(pmap);
 3234                 pte = pmap_pte(pmap, pv->pv_va);
 3235                 if (*pte & PG_A) {
 3236                         atomic_clear_long(pte, PG_A);
 3237                         pmap_invalidate_page(pmap, pv->pv_va);
 3238                 }
 3239                 PMAP_UNLOCK(pmap);
 3240         }
 3241 }
 3242 
 3243 /*
 3244  * Miscellaneous support routines follow
 3245  */
 3246 
 3247 /* Adjust the cache mode for a 4KB page mapped via a PTE. */
 3248 static __inline void
 3249 pmap_pte_attr(vm_offset_t va, int mode)
 3250 {
 3251         pt_entry_t *pte;
 3252         u_int opte, npte;
 3253 
 3254         pte = vtopte(va);
 3255 
 3256         /*
 3257          * The cache mode bits are all in the low 32-bits of the
 3258          * PTE, so we can just spin on updating the low 32-bits.
 3259          */
 3260         do {
 3261                 opte = *(u_int *)pte;
 3262                 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT);
 3263                 npte |= pmap_cache_bits(mode, 0);
 3264         } while (npte != opte && !atomic_cmpset_int((u_int *)pte, opte, npte));
 3265 }
 3266 
 3267 /* Adjust the cache mode for a 2MB page mapped via a PDE. */
 3268 static __inline void
 3269 pmap_pde_attr(vm_offset_t va, int mode)
 3270 {
 3271         pd_entry_t *pde;
 3272         u_int opde, npde;
 3273 
 3274         pde = pmap_pde(kernel_pmap, va);
 3275 
 3276         /*
 3277          * The cache mode bits are all in the low 32-bits of the
 3278          * PDE, so we can just spin on updating the low 32-bits.
 3279          */
 3280         do {
 3281                 opde = *(u_int *)pde;
 3282                 npde = opde & ~(PG_PDE_PAT | PG_NC_PCD | PG_NC_PWT);
 3283                 npde |= pmap_cache_bits(mode, 1);
 3284         } while (npde != opde && !atomic_cmpset_int((u_int *)pde, opde, npde));
 3285 }
 3286 
 3287 /*
 3288  * Map a set of physical memory pages into the kernel virtual
 3289  * address space. Return a pointer to where it is mapped. This
 3290  * routine is intended to be used for mapping device memory,
 3291  * NOT real memory.
 3292  */
 3293 void *
 3294 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
 3295 {
 3296         vm_offset_t va, tmpva, offset;
 3297 
 3298         /*
 3299          * If this fits within the direct map window and use WB caching
 3300          * mode, use the direct map.
 3301          */
 3302         if (pa < dmaplimit && (pa + size) < dmaplimit && mode == PAT_WRITE_BACK)
 3303                 return ((void *)PHYS_TO_DMAP(pa));
 3304         offset = pa & PAGE_MASK;
 3305         size = roundup(offset + size, PAGE_SIZE);
 3306         va = kmem_alloc_nofault(kernel_map, size);
 3307         if (!va)
 3308                 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
 3309         pa = trunc_page(pa);
 3310         for (tmpva = va; size > 0; ) {
 3311                 pmap_kenter_attr(tmpva, pa, mode);
 3312                 size -= PAGE_SIZE;
 3313                 tmpva += PAGE_SIZE;
 3314                 pa += PAGE_SIZE;
 3315         }
 3316         pmap_invalidate_range(kernel_pmap, va, tmpva);
 3317         pmap_invalidate_cache();
 3318         return ((void *)(va + offset));
 3319 }
 3320 
 3321 void *
 3322 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
 3323 {
 3324 
 3325         return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
 3326 }
 3327 
 3328 void *
 3329 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
 3330 {
 3331 
 3332         return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
 3333 }
 3334 
 3335 void
 3336 pmap_unmapdev(vm_offset_t va, vm_size_t size)
 3337 {
 3338         vm_offset_t base, offset, tmpva;
 3339 
 3340         /* If we gave a direct map region in pmap_mapdev, do nothing */
 3341         if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS)
 3342                 return;
 3343         base = trunc_page(va);
 3344         offset = va & PAGE_MASK;
 3345         size = roundup(offset + size, PAGE_SIZE);
 3346         for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
 3347                 pmap_kremove(tmpva);
 3348         pmap_invalidate_range(kernel_pmap, va, tmpva);
 3349         kmem_free(kernel_map, base, size);
 3350 }
 3351 
 3352 int
 3353 pmap_change_attr(va, size, mode)
 3354         vm_offset_t va;
 3355         vm_size_t size;
 3356         int mode;
 3357 {
 3358         vm_offset_t base, offset, tmpva;
 3359         pd_entry_t *pde;
 3360         pt_entry_t *pte;
 3361 
 3362         base = trunc_page(va);
 3363         offset = va & PAGE_MASK;
 3364         size = roundup(offset + size, PAGE_SIZE);
 3365 
 3366         /* Only supported on kernel virtual addresses. */
 3367         if (base <= VM_MAXUSER_ADDRESS)
 3368                 return (EINVAL);
 3369 
 3370         /*
 3371          * XXX: We have to support tearing 2MB pages down into 4k pages if
 3372          * needed here.
 3373          */
 3374         /* Pages that aren't mapped aren't supported. */
 3375         for (tmpva = base; tmpva < (base + size); ) {
 3376                 pde = pmap_pde(kernel_pmap, tmpva);
 3377                 if (*pde == 0)
 3378                         return (EINVAL);
 3379                 if (*pde & PG_PS) {
 3380                         /* Handle 2MB pages that are completely contained. */
 3381                         if (size >= NBPDR) {
 3382                                 tmpva += NBPDR;
 3383                                 continue;
 3384                         }
 3385                         return (EINVAL);
 3386                 }
 3387                 pte = vtopte(va);
 3388                 if (*pte == 0)
 3389                         return (EINVAL);
 3390                 tmpva += PAGE_SIZE;
 3391         }
 3392 
 3393         /*
 3394          * Ok, all the pages exist, so run through them updating their
 3395          * cache mode.
 3396          */
 3397         for (tmpva = base; size > 0; ) {
 3398                 pde = pmap_pde(kernel_pmap, tmpva);
 3399                 if (*pde & PG_PS) {
 3400                         pmap_pde_attr(tmpva, mode);
 3401                         tmpva += NBPDR;
 3402                         size -= NBPDR;
 3403                 } else {
 3404                         pmap_pte_attr(tmpva, mode);
 3405                         tmpva += PAGE_SIZE;
 3406                         size -= PAGE_SIZE;
 3407                 }
 3408         }
 3409 
 3410         /*
 3411          * Flush CPU caches to make sure any data isn't cached that shouldn't
 3412          * be, etc.
 3413          */    
 3414         pmap_invalidate_range(kernel_pmap, base, tmpva);
 3415         pmap_invalidate_cache();
 3416         return (0);
 3417 }
 3418 
 3419 /*
 3420  * perform the pmap work for mincore
 3421  */
 3422 int
 3423 pmap_mincore(pmap_t pmap, vm_offset_t addr)
 3424 {
 3425         pt_entry_t *ptep, pte;
 3426         vm_page_t m;
 3427         int val = 0;
 3428         
 3429         PMAP_LOCK(pmap);
 3430         ptep = pmap_pte(pmap, addr);
 3431         pte = (ptep != NULL) ? *ptep : 0;
 3432         PMAP_UNLOCK(pmap);
 3433 
 3434         if (pte != 0) {
 3435                 vm_paddr_t pa;
 3436 
 3437                 val = MINCORE_INCORE;
 3438                 if ((pte & PG_MANAGED) == 0)
 3439                         return val;
 3440 
 3441                 pa = pte & PG_FRAME;
 3442 
 3443                 m = PHYS_TO_VM_PAGE(pa);
 3444 
 3445                 /*
 3446                  * Modified by us
 3447                  */
 3448                 if (pte & PG_M)
 3449                         val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
 3450                 else {
 3451                         /*
 3452                          * Modified by someone else
 3453                          */
 3454                         vm_page_lock_queues();
 3455                         if (m->dirty || pmap_is_modified(m))
 3456                                 val |= MINCORE_MODIFIED_OTHER;
 3457                         vm_page_unlock_queues();
 3458                 }
 3459                 /*
 3460                  * Referenced by us
 3461                  */
 3462                 if (pte & PG_A)
 3463                         val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
 3464                 else {
 3465                         /*
 3466                          * Referenced by someone else
 3467                          */
 3468                         vm_page_lock_queues();
 3469                         if ((m->flags & PG_REFERENCED) ||
 3470                             pmap_ts_referenced(m)) {
 3471                                 val |= MINCORE_REFERENCED_OTHER;
 3472                                 vm_page_flag_set(m, PG_REFERENCED);
 3473                         }
 3474                         vm_page_unlock_queues();
 3475                 }
 3476         } 
 3477         return val;
 3478 }
 3479 
 3480 void
 3481 pmap_activate(struct thread *td)
 3482 {
 3483         pmap_t  pmap, oldpmap;
 3484         u_int64_t  cr3;
 3485 
 3486         critical_enter();
 3487         pmap = vmspace_pmap(td->td_proc->p_vmspace);
 3488         oldpmap = PCPU_GET(curpmap);
 3489 #ifdef SMP
 3490 if (oldpmap)    /* XXX FIXME */
 3491         atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
 3492         atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
 3493 #else
 3494 if (oldpmap)    /* XXX FIXME */
 3495         oldpmap->pm_active &= ~PCPU_GET(cpumask);
 3496         pmap->pm_active |= PCPU_GET(cpumask);
 3497 #endif
 3498         cr3 = vtophys(pmap->pm_pml4);
 3499         td->td_pcb->pcb_cr3 = cr3;
 3500         load_cr3(cr3);
 3501         critical_exit();
 3502 }
 3503 
 3504 vm_offset_t
 3505 pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size)
 3506 {
 3507 
 3508         if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) {
 3509                 return addr;
 3510         }
 3511 
 3512         addr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
 3513         return addr;
 3514 }

Cache object: c759d32a5fc90115394882ac872ea283


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