The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/amd64/amd64/pmap.c

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    1 /*-
    2  * Copyright (c) 1991 Regents of the University of California.
    3  * All rights reserved.
    4  * Copyright (c) 1994 John S. Dyson
    5  * All rights reserved.
    6  * Copyright (c) 1994 David Greenman
    7  * All rights reserved.
    8  * Copyright (c) 2003 Peter Wemm
    9  * All rights reserved.
   10  * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
   11  * All rights reserved.
   12  *
   13  * This code is derived from software contributed to Berkeley by
   14  * the Systems Programming Group of the University of Utah Computer
   15  * Science Department and William Jolitz of UUNET Technologies Inc.
   16  *
   17  * Redistribution and use in source and binary forms, with or without
   18  * modification, are permitted provided that the following conditions
   19  * are met:
   20  * 1. Redistributions of source code must retain the above copyright
   21  *    notice, this list of conditions and the following disclaimer.
   22  * 2. Redistributions in binary form must reproduce the above copyright
   23  *    notice, this list of conditions and the following disclaimer in the
   24  *    documentation and/or other materials provided with the distribution.
   25  * 3. All advertising materials mentioning features or use of this software
   26  *    must display the following acknowledgement:
   27  *      This product includes software developed by the University of
   28  *      California, Berkeley and its contributors.
   29  * 4. Neither the name of the University nor the names of its contributors
   30  *    may be used to endorse or promote products derived from this software
   31  *    without specific prior written permission.
   32  *
   33  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   34  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   36  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   37  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   38  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   39  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   40  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   41  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   42  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   43  * SUCH DAMAGE.
   44  *
   45  *      from:   @(#)pmap.c      7.7 (Berkeley)  5/12/91
   46  */
   47 /*-
   48  * Copyright (c) 2003 Networks Associates Technology, Inc.
   49  * All rights reserved.
   50  *
   51  * This software was developed for the FreeBSD Project by Jake Burkholder,
   52  * Safeport Network Services, and Network Associates Laboratories, the
   53  * Security Research Division of Network Associates, Inc. under
   54  * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
   55  * CHATS research program.
   56  *
   57  * Redistribution and use in source and binary forms, with or without
   58  * modification, are permitted provided that the following conditions
   59  * are met:
   60  * 1. Redistributions of source code must retain the above copyright
   61  *    notice, this list of conditions and the following disclaimer.
   62  * 2. Redistributions in binary form must reproduce the above copyright
   63  *    notice, this list of conditions and the following disclaimer in the
   64  *    documentation and/or other materials provided with the distribution.
   65  *
   66  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   67  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   68  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   69  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   70  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   71  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   72  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   73  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   74  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   75  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   76  * SUCH DAMAGE.
   77  */
   78 
   79 #include <sys/cdefs.h>
   80 __FBSDID("$FreeBSD$");
   81 
   82 /*
   83  *      Manages physical address maps.
   84  *
   85  *      In addition to hardware address maps, this
   86  *      module is called upon to provide software-use-only
   87  *      maps which may or may not be stored in the same
   88  *      form as hardware maps.  These pseudo-maps are
   89  *      used to store intermediate results from copy
   90  *      operations to and from address spaces.
   91  *
   92  *      Since the information managed by this module is
   93  *      also stored by the logical address mapping module,
   94  *      this module may throw away valid virtual-to-physical
   95  *      mappings at almost any time.  However, invalidations
   96  *      of virtual-to-physical mappings must be done as
   97  *      requested.
   98  *
   99  *      In order to cope with hardware architectures which
  100  *      make virtual-to-physical map invalidates expensive,
  101  *      this module may delay invalidate or reduced protection
  102  *      operations until such time as they are actually
  103  *      necessary.  This module is given full information as
  104  *      to which processors are currently using which maps,
  105  *      and to when physical maps must be made correct.
  106  */
  107 
  108 #include "opt_msgbuf.h"
  109 #include "opt_pmap.h"
  110 #include "opt_vm.h"
  111 
  112 #include <sys/param.h>
  113 #include <sys/systm.h>
  114 #include <sys/kernel.h>
  115 #include <sys/ktr.h>
  116 #include <sys/lock.h>
  117 #include <sys/malloc.h>
  118 #include <sys/mman.h>
  119 #include <sys/msgbuf.h>
  120 #include <sys/mutex.h>
  121 #include <sys/proc.h>
  122 #include <sys/sx.h>
  123 #include <sys/vmmeter.h>
  124 #include <sys/sched.h>
  125 #include <sys/sysctl.h>
  126 #ifdef SMP
  127 #include <sys/smp.h>
  128 #endif
  129 
  130 #include <vm/vm.h>
  131 #include <vm/vm_param.h>
  132 #include <vm/vm_kern.h>
  133 #include <vm/vm_page.h>
  134 #include <vm/vm_map.h>
  135 #include <vm/vm_object.h>
  136 #include <vm/vm_extern.h>
  137 #include <vm/vm_pageout.h>
  138 #include <vm/vm_pager.h>
  139 #include <vm/vm_reserv.h>
  140 #include <vm/uma.h>
  141 
  142 #include <machine/cpu.h>
  143 #include <machine/cputypes.h>
  144 #include <machine/md_var.h>
  145 #include <machine/pcb.h>
  146 #include <machine/specialreg.h>
  147 #ifdef SMP
  148 #include <machine/smp.h>
  149 #endif
  150 
  151 #ifndef PMAP_SHPGPERPROC
  152 #define PMAP_SHPGPERPROC 200
  153 #endif
  154 
  155 #if !defined(DIAGNOSTIC)
  156 #define PMAP_INLINE     __gnu89_inline
  157 #else
  158 #define PMAP_INLINE
  159 #endif
  160 
  161 #define PV_STATS
  162 #ifdef PV_STATS
  163 #define PV_STAT(x)      do { x ; } while (0)
  164 #else
  165 #define PV_STAT(x)      do { } while (0)
  166 #endif
  167 
  168 #define pa_index(pa)    ((pa) >> PDRSHIFT)
  169 #define pa_to_pvh(pa)   (&pv_table[pa_index(pa)])
  170 
  171 struct pmap kernel_pmap_store;
  172 
  173 vm_offset_t virtual_avail;      /* VA of first avail page (after kernel bss) */
  174 vm_offset_t virtual_end;        /* VA of last avail page (end of kernel AS) */
  175 
  176 static int ndmpdp;
  177 static vm_paddr_t dmaplimit;
  178 vm_offset_t kernel_vm_end = VM_MIN_KERNEL_ADDRESS;
  179 pt_entry_t pg_nx;
  180 
  181 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
  182 
  183 static int pg_ps_enabled;
  184 SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RD, &pg_ps_enabled, 0,
  185     "Are large page mappings enabled?");
  186 
  187 static u_int64_t        KPTphys;        /* phys addr of kernel level 1 */
  188 static u_int64_t        KPDphys;        /* phys addr of kernel level 2 */
  189 u_int64_t               KPDPphys;       /* phys addr of kernel level 3 */
  190 u_int64_t               KPML4phys;      /* phys addr of kernel level 4 */
  191 
  192 static u_int64_t        DMPDphys;       /* phys addr of direct mapped level 2 */
  193 static u_int64_t        DMPDPphys;      /* phys addr of direct mapped level 3 */
  194 
  195 /*
  196  * Data for the pv entry allocation mechanism
  197  */
  198 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
  199 static struct md_page *pv_table;
  200 static int shpgperproc = PMAP_SHPGPERPROC;
  201 
  202 /*
  203  * All those kernel PT submaps that BSD is so fond of
  204  */
  205 pt_entry_t *CMAP1 = 0;
  206 caddr_t CADDR1 = 0;
  207 struct msgbuf *msgbufp = 0;
  208 
  209 /*
  210  * Crashdump maps.
  211  */
  212 static caddr_t crashdumpmap;
  213 
  214 static void     free_pv_entry(pmap_t pmap, pv_entry_t pv);
  215 static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try);
  216 static void     pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
  217 static boolean_t pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
  218 static void     pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
  219 static void     pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
  220 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
  221                     vm_offset_t va);
  222 
  223 static boolean_t pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
  224 static boolean_t pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m,
  225     vm_prot_t prot);
  226 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
  227     vm_page_t m, vm_prot_t prot, vm_page_t mpte);
  228 static void pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte);
  229 static boolean_t pmap_is_modified_pvh(struct md_page *pvh);
  230 static vm_page_t pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va);
  231 static void pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
  232 static boolean_t pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva,
  233     vm_prot_t prot);
  234 static int pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
  235                 vm_page_t *free);
  236 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq,
  237                 vm_offset_t sva, pd_entry_t ptepde, vm_page_t *free);
  238 static void pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte);
  239 static void pmap_remove_page(pmap_t pmap, vm_offset_t va, pd_entry_t *pde,
  240     vm_page_t *free);
  241 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
  242                 vm_offset_t va);
  243 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
  244 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
  245     vm_page_t m);
  246 
  247 static vm_page_t pmap_allocpde(pmap_t pmap, vm_offset_t va, int flags);
  248 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
  249 
  250 static vm_page_t _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, int flags);
  251 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
  252                 vm_page_t* free);
  253 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, vm_page_t *);
  254 static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
  255 
  256 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
  257 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
  258 
  259 /*
  260  * Move the kernel virtual free pointer to the next
  261  * 2MB.  This is used to help improve performance
  262  * by using a large (2MB) page for much of the kernel
  263  * (.text, .data, .bss)
  264  */
  265 static vm_offset_t
  266 pmap_kmem_choose(vm_offset_t addr)
  267 {
  268         vm_offset_t newaddr = addr;
  269 
  270         newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
  271         return newaddr;
  272 }
  273 
  274 /********************/
  275 /* Inline functions */
  276 /********************/
  277 
  278 /* Return a non-clipped PD index for a given VA */
  279 static __inline vm_pindex_t
  280 pmap_pde_pindex(vm_offset_t va)
  281 {
  282         return va >> PDRSHIFT;
  283 }
  284 
  285 
  286 /* Return various clipped indexes for a given VA */
  287 static __inline vm_pindex_t
  288 pmap_pte_index(vm_offset_t va)
  289 {
  290 
  291         return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
  292 }
  293 
  294 static __inline vm_pindex_t
  295 pmap_pde_index(vm_offset_t va)
  296 {
  297 
  298         return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
  299 }
  300 
  301 static __inline vm_pindex_t
  302 pmap_pdpe_index(vm_offset_t va)
  303 {
  304 
  305         return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
  306 }
  307 
  308 static __inline vm_pindex_t
  309 pmap_pml4e_index(vm_offset_t va)
  310 {
  311 
  312         return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
  313 }
  314 
  315 /* Return a pointer to the PML4 slot that corresponds to a VA */
  316 static __inline pml4_entry_t *
  317 pmap_pml4e(pmap_t pmap, vm_offset_t va)
  318 {
  319 
  320         return (&pmap->pm_pml4[pmap_pml4e_index(va)]);
  321 }
  322 
  323 /* Return a pointer to the PDP slot that corresponds to a VA */
  324 static __inline pdp_entry_t *
  325 pmap_pml4e_to_pdpe(pml4_entry_t *pml4e, vm_offset_t va)
  326 {
  327         pdp_entry_t *pdpe;
  328 
  329         pdpe = (pdp_entry_t *)PHYS_TO_DMAP(*pml4e & PG_FRAME);
  330         return (&pdpe[pmap_pdpe_index(va)]);
  331 }
  332 
  333 /* Return a pointer to the PDP slot that corresponds to a VA */
  334 static __inline pdp_entry_t *
  335 pmap_pdpe(pmap_t pmap, vm_offset_t va)
  336 {
  337         pml4_entry_t *pml4e;
  338 
  339         pml4e = pmap_pml4e(pmap, va);
  340         if ((*pml4e & PG_V) == 0)
  341                 return NULL;
  342         return (pmap_pml4e_to_pdpe(pml4e, va));
  343 }
  344 
  345 /* Return a pointer to the PD slot that corresponds to a VA */
  346 static __inline pd_entry_t *
  347 pmap_pdpe_to_pde(pdp_entry_t *pdpe, vm_offset_t va)
  348 {
  349         pd_entry_t *pde;
  350 
  351         pde = (pd_entry_t *)PHYS_TO_DMAP(*pdpe & PG_FRAME);
  352         return (&pde[pmap_pde_index(va)]);
  353 }
  354 
  355 /* Return a pointer to the PD slot that corresponds to a VA */
  356 static __inline pd_entry_t *
  357 pmap_pde(pmap_t pmap, vm_offset_t va)
  358 {
  359         pdp_entry_t *pdpe;
  360 
  361         pdpe = pmap_pdpe(pmap, va);
  362         if (pdpe == NULL || (*pdpe & PG_V) == 0)
  363                  return NULL;
  364         return (pmap_pdpe_to_pde(pdpe, va));
  365 }
  366 
  367 /* Return a pointer to the PT slot that corresponds to a VA */
  368 static __inline pt_entry_t *
  369 pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va)
  370 {
  371         pt_entry_t *pte;
  372 
  373         pte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
  374         return (&pte[pmap_pte_index(va)]);
  375 }
  376 
  377 /* Return a pointer to the PT slot that corresponds to a VA */
  378 static __inline pt_entry_t *
  379 pmap_pte(pmap_t pmap, vm_offset_t va)
  380 {
  381         pd_entry_t *pde;
  382 
  383         pde = pmap_pde(pmap, va);
  384         if (pde == NULL || (*pde & PG_V) == 0)
  385                 return NULL;
  386         if ((*pde & PG_PS) != 0)        /* compat with i386 pmap_pte() */
  387                 return ((pt_entry_t *)pde);
  388         return (pmap_pde_to_pte(pde, va));
  389 }
  390 
  391 
  392 PMAP_INLINE pt_entry_t *
  393 vtopte(vm_offset_t va)
  394 {
  395         u_int64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
  396 
  397         return (PTmap + ((va >> PAGE_SHIFT) & mask));
  398 }
  399 
  400 static __inline pd_entry_t *
  401 vtopde(vm_offset_t va)
  402 {
  403         u_int64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
  404 
  405         return (PDmap + ((va >> PDRSHIFT) & mask));
  406 }
  407 
  408 static u_int64_t
  409 allocpages(vm_paddr_t *firstaddr, int n)
  410 {
  411         u_int64_t ret;
  412 
  413         ret = *firstaddr;
  414         bzero((void *)ret, n * PAGE_SIZE);
  415         *firstaddr += n * PAGE_SIZE;
  416         return (ret);
  417 }
  418 
  419 static void
  420 create_pagetables(vm_paddr_t *firstaddr)
  421 {
  422         int i;
  423 
  424         /* Allocate pages */
  425         KPTphys = allocpages(firstaddr, NKPT);
  426         KPML4phys = allocpages(firstaddr, 1);
  427         KPDPphys = allocpages(firstaddr, NKPML4E);
  428         KPDphys = allocpages(firstaddr, NKPDPE);
  429 
  430         ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
  431         if (ndmpdp < 4)         /* Minimum 4GB of dirmap */
  432                 ndmpdp = 4;
  433         DMPDPphys = allocpages(firstaddr, NDMPML4E);
  434         DMPDphys = allocpages(firstaddr, ndmpdp);
  435         dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
  436 
  437         /* Fill in the underlying page table pages */
  438         /* Read-only from zero to physfree */
  439         /* XXX not fully used, underneath 2M pages */
  440         for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
  441                 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT;
  442                 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V | PG_G;
  443         }
  444 
  445         /* Now map the page tables at their location within PTmap */
  446         for (i = 0; i < NKPT; i++) {
  447                 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
  448                 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V;
  449         }
  450 
  451         /* Map from zero to end of allocations under 2M pages */
  452         /* This replaces some of the KPTphys entries above */
  453         for (i = 0; (i << PDRSHIFT) < *firstaddr; i++) {
  454                 ((pd_entry_t *)KPDphys)[i] = i << PDRSHIFT;
  455                 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
  456         }
  457 
  458         /* And connect up the PD to the PDP */
  459         for (i = 0; i < NKPDPE; i++) {
  460                 ((pdp_entry_t *)KPDPphys)[i + KPDPI] = KPDphys + (i << PAGE_SHIFT);
  461                 ((pdp_entry_t *)KPDPphys)[i + KPDPI] |= PG_RW | PG_V | PG_U;
  462         }
  463 
  464 
  465         /* Now set up the direct map space using 2MB pages */
  466         for (i = 0; i < NPDEPG * ndmpdp; i++) {
  467                 ((pd_entry_t *)DMPDphys)[i] = (vm_paddr_t)i << PDRSHIFT;
  468                 ((pd_entry_t *)DMPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
  469         }
  470 
  471         /* And the direct map space's PDP */
  472         for (i = 0; i < ndmpdp; i++) {
  473                 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys + (i << PAGE_SHIFT);
  474                 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U;
  475         }
  476 
  477         /* And recursively map PML4 to itself in order to get PTmap */
  478         ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
  479         ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
  480 
  481         /* Connect the Direct Map slot up to the PML4 */
  482         ((pdp_entry_t *)KPML4phys)[DMPML4I] = DMPDPphys;
  483         ((pdp_entry_t *)KPML4phys)[DMPML4I] |= PG_RW | PG_V | PG_U;
  484 
  485         /* Connect the KVA slot up to the PML4 */
  486         ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
  487         ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U;
  488 }
  489 
  490 /*
  491  *      Bootstrap the system enough to run with virtual memory.
  492  *
  493  *      On amd64 this is called after mapping has already been enabled
  494  *      and just syncs the pmap module with what has already been done.
  495  *      [We can't call it easily with mapping off since the kernel is not
  496  *      mapped with PA == VA, hence we would have to relocate every address
  497  *      from the linked base (virtual) address "KERNBASE" to the actual
  498  *      (physical) address starting relative to 0]
  499  */
  500 void
  501 pmap_bootstrap(vm_paddr_t *firstaddr)
  502 {
  503         vm_offset_t va;
  504         pt_entry_t *pte, *unused;
  505 
  506         /*
  507          * Create an initial set of page tables to run the kernel in.
  508          */
  509         create_pagetables(firstaddr);
  510 
  511         virtual_avail = (vm_offset_t) KERNBASE + *firstaddr;
  512         virtual_avail = pmap_kmem_choose(virtual_avail);
  513 
  514         virtual_end = VM_MAX_KERNEL_ADDRESS;
  515 
  516 
  517         /* XXX do %cr0 as well */
  518         load_cr4(rcr4() | CR4_PGE | CR4_PSE);
  519         load_cr3(KPML4phys);
  520 
  521         /*
  522          * Initialize the kernel pmap (which is statically allocated).
  523          */
  524         PMAP_LOCK_INIT(kernel_pmap);
  525         kernel_pmap->pm_pml4 = (pdp_entry_t *) (KERNBASE + KPML4phys);
  526         kernel_pmap->pm_root = NULL;
  527         kernel_pmap->pm_active = -1;    /* don't allow deactivation */
  528         TAILQ_INIT(&kernel_pmap->pm_pvchunk);
  529 
  530         /*
  531          * Reserve some special page table entries/VA space for temporary
  532          * mapping of pages.
  533          */
  534 #define SYSMAP(c, p, v, n)      \
  535         v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
  536 
  537         va = virtual_avail;
  538         pte = vtopte(va);
  539 
  540         /*
  541          * CMAP1 is only used for the memory test.
  542          */
  543         SYSMAP(caddr_t, CMAP1, CADDR1, 1)
  544 
  545         /*
  546          * Crashdump maps.
  547          */
  548         SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
  549 
  550         /*
  551          * msgbufp is used to map the system message buffer.
  552          */
  553         SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE)))
  554 
  555         virtual_avail = va;
  556 
  557         *CMAP1 = 0;
  558 
  559         invltlb();
  560 
  561         /* Initialize the PAT MSR. */
  562         pmap_init_pat();
  563 }
  564 
  565 /*
  566  * Setup the PAT MSR.
  567  */
  568 void
  569 pmap_init_pat(void)
  570 {
  571         uint64_t pat_msr;
  572 
  573         /* Bail if this CPU doesn't implement PAT. */
  574         if (!(cpu_feature & CPUID_PAT))
  575                 panic("no PAT??");
  576 
  577 #ifdef PAT_WORKS
  578         /*
  579          * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
  580          * Program 4 and 5 as WP and WC.
  581          * Leave 6 and 7 as UC and UC-.
  582          */
  583         pat_msr = rdmsr(MSR_PAT);
  584         pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
  585         pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
  586             PAT_VALUE(5, PAT_WRITE_COMBINING);
  587 #else
  588         /*
  589          * Due to some Intel errata, we can only safely use the lower 4
  590          * PAT entries.  Thus, just replace PAT Index 2 with WC instead
  591          * of UC-.
  592          *
  593          *   Intel Pentium III Processor Specification Update
  594          * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
  595          * or Mode C Paging)
  596          *
  597          *   Intel Pentium IV  Processor Specification Update
  598          * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
  599          */
  600         pat_msr = rdmsr(MSR_PAT);
  601         pat_msr &= ~PAT_MASK(2);
  602         pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
  603 #endif
  604         wrmsr(MSR_PAT, pat_msr);
  605 }
  606 
  607 /*
  608  *      Initialize a vm_page's machine-dependent fields.
  609  */
  610 void
  611 pmap_page_init(vm_page_t m)
  612 {
  613 
  614         TAILQ_INIT(&m->md.pv_list);
  615 }
  616 
  617 /*
  618  *      Initialize the pmap module.
  619  *      Called by vm_init, to initialize any structures that the pmap
  620  *      system needs to map virtual memory.
  621  */
  622 void
  623 pmap_init(void)
  624 {
  625         pd_entry_t *pd;
  626         vm_page_t mpte;
  627         vm_size_t s;
  628         int i, pv_npg;
  629 
  630         /*
  631          * Initialize the vm page array entries for the kernel pmap's
  632          * page table pages.
  633          */ 
  634         pd = pmap_pde(kernel_pmap, KERNBASE);
  635         for (i = 0; i < NKPT; i++) {
  636                 if ((pd[i] & (PG_PS | PG_V)) == (PG_PS | PG_V))
  637                         continue;
  638                 KASSERT((pd[i] & PG_V) != 0,
  639                     ("pmap_init: page table page is missing"));
  640                 mpte = PHYS_TO_VM_PAGE(pd[i] & PG_FRAME);
  641                 KASSERT(mpte >= vm_page_array &&
  642                     mpte < &vm_page_array[vm_page_array_size],
  643                     ("pmap_init: page table page is out of range"));
  644                 mpte->pindex = pmap_pde_pindex(KERNBASE) + i;
  645                 mpte->phys_addr = pd[i] & PG_FRAME;
  646         }
  647 
  648         /*
  649          * Initialize the address space (zone) for the pv entries.  Set a
  650          * high water mark so that the system can recover from excessive
  651          * numbers of pv entries.
  652          */
  653         TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
  654         pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
  655         TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
  656         pv_entry_high_water = 9 * (pv_entry_max / 10);
  657 
  658         /*
  659          * Are large page mappings enabled?
  660          */
  661         TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled);
  662 
  663         /*
  664          * Calculate the size of the pv head table for superpages.
  665          */
  666         for (i = 0; phys_avail[i + 1]; i += 2);
  667         pv_npg = round_2mpage(phys_avail[(i - 2) + 1]) / NBPDR;
  668 
  669         /*
  670          * Allocate memory for the pv head table for superpages.
  671          */
  672         s = (vm_size_t)(pv_npg * sizeof(struct md_page));
  673         s = round_page(s);
  674         pv_table = (struct md_page *)kmem_alloc(kernel_map, s);
  675         for (i = 0; i < pv_npg; i++)
  676                 TAILQ_INIT(&pv_table[i].pv_list);
  677 }
  678 
  679 static int
  680 pmap_pventry_proc(SYSCTL_HANDLER_ARGS)
  681 {
  682         int error;
  683 
  684         error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, req);
  685         if (error == 0 && req->newptr) {
  686                 shpgperproc = (pv_entry_max - cnt.v_page_count) / maxproc;
  687                 pv_entry_high_water = 9 * (pv_entry_max / 10);
  688         }
  689         return (error);
  690 }
  691 SYSCTL_PROC(_vm_pmap, OID_AUTO, pv_entry_max, CTLTYPE_INT|CTLFLAG_RW, 
  692     &pv_entry_max, 0, pmap_pventry_proc, "IU", "Max number of PV entries");
  693 
  694 static int
  695 pmap_shpgperproc_proc(SYSCTL_HANDLER_ARGS)
  696 {
  697         int error;
  698 
  699         error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, req);
  700         if (error == 0 && req->newptr) {
  701                 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
  702                 pv_entry_high_water = 9 * (pv_entry_max / 10);
  703         }
  704         return (error);
  705 }
  706 SYSCTL_PROC(_vm_pmap, OID_AUTO, shpgperproc, CTLTYPE_INT|CTLFLAG_RW, 
  707     &shpgperproc, 0, pmap_shpgperproc_proc, "IU", "Page share factor per proc");
  708 
  709 SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0,
  710     "2MB page mapping counters");
  711 
  712 static u_long pmap_pde_demotions;
  713 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, demotions, CTLFLAG_RD,
  714     &pmap_pde_demotions, 0, "2MB page demotions");
  715 
  716 static u_long pmap_pde_mappings;
  717 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD,
  718     &pmap_pde_mappings, 0, "2MB page mappings");
  719 
  720 static u_long pmap_pde_p_failures;
  721 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, p_failures, CTLFLAG_RD,
  722     &pmap_pde_p_failures, 0, "2MB page promotion failures");
  723 
  724 static u_long pmap_pde_promotions;
  725 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, promotions, CTLFLAG_RD,
  726     &pmap_pde_promotions, 0, "2MB page promotions");
  727 
  728 
  729 /***************************************************
  730  * Low level helper routines.....
  731  ***************************************************/
  732 
  733 /*
  734  * Determine the appropriate bits to set in a PTE or PDE for a specified
  735  * caching mode.
  736  */
  737 static int
  738 pmap_cache_bits(int mode, boolean_t is_pde)
  739 {
  740         int pat_flag, pat_index, cache_bits;
  741 
  742         /* The PAT bit is different for PTE's and PDE's. */
  743         pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
  744 
  745         /* If we don't support PAT, map extended modes to older ones. */
  746         if (!(cpu_feature & CPUID_PAT)) {
  747                 switch (mode) {
  748                 case PAT_UNCACHEABLE:
  749                 case PAT_WRITE_THROUGH:
  750                 case PAT_WRITE_BACK:
  751                         break;
  752                 case PAT_UNCACHED:
  753                 case PAT_WRITE_COMBINING:
  754                 case PAT_WRITE_PROTECTED:
  755                         mode = PAT_UNCACHEABLE;
  756                         break;
  757                 }
  758         }
  759         
  760         /* Map the caching mode to a PAT index. */
  761         switch (mode) {
  762 #ifdef PAT_WORKS
  763         case PAT_UNCACHEABLE:
  764                 pat_index = 3;
  765                 break;
  766         case PAT_WRITE_THROUGH:
  767                 pat_index = 1;
  768                 break;
  769         case PAT_WRITE_BACK:
  770                 pat_index = 0;
  771                 break;
  772         case PAT_UNCACHED:
  773                 pat_index = 2;
  774                 break;
  775         case PAT_WRITE_COMBINING:
  776                 pat_index = 5;
  777                 break;
  778         case PAT_WRITE_PROTECTED:
  779                 pat_index = 4;
  780                 break;
  781 #else
  782         case PAT_UNCACHED:
  783         case PAT_UNCACHEABLE:
  784         case PAT_WRITE_PROTECTED:
  785                 pat_index = 3;
  786                 break;
  787         case PAT_WRITE_THROUGH:
  788                 pat_index = 1;
  789                 break;
  790         case PAT_WRITE_BACK:
  791                 pat_index = 0;
  792                 break;
  793         case PAT_WRITE_COMBINING:
  794                 pat_index = 2;
  795                 break;
  796 #endif
  797         default:
  798                 panic("Unknown caching mode %d\n", mode);
  799         }       
  800 
  801         /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
  802         cache_bits = 0;
  803         if (pat_index & 0x4)
  804                 cache_bits |= pat_flag;
  805         if (pat_index & 0x2)
  806                 cache_bits |= PG_NC_PCD;
  807         if (pat_index & 0x1)
  808                 cache_bits |= PG_NC_PWT;
  809         return (cache_bits);
  810 }
  811 #ifdef SMP
  812 /*
  813  * For SMP, these functions have to use the IPI mechanism for coherence.
  814  *
  815  * N.B.: Before calling any of the following TLB invalidation functions,
  816  * the calling processor must ensure that all stores updating a non-
  817  * kernel page table are globally performed.  Otherwise, another
  818  * processor could cache an old, pre-update entry without being
  819  * invalidated.  This can happen one of two ways: (1) The pmap becomes
  820  * active on another processor after its pm_active field is checked by
  821  * one of the following functions but before a store updating the page
  822  * table is globally performed. (2) The pmap becomes active on another
  823  * processor before its pm_active field is checked but due to
  824  * speculative loads one of the following functions stills reads the
  825  * pmap as inactive on the other processor.
  826  * 
  827  * The kernel page table is exempt because its pm_active field is
  828  * immutable.  The kernel page table is always active on every
  829  * processor.
  830  */
  831 void
  832 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
  833 {
  834         u_int cpumask;
  835         u_int other_cpus;
  836 
  837         sched_pin();
  838         if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
  839                 invlpg(va);
  840                 smp_invlpg(va);
  841         } else {
  842                 cpumask = PCPU_GET(cpumask);
  843                 other_cpus = PCPU_GET(other_cpus);
  844                 if (pmap->pm_active & cpumask)
  845                         invlpg(va);
  846                 if (pmap->pm_active & other_cpus)
  847                         smp_masked_invlpg(pmap->pm_active & other_cpus, va);
  848         }
  849         sched_unpin();
  850 }
  851 
  852 void
  853 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
  854 {
  855         u_int cpumask;
  856         u_int other_cpus;
  857         vm_offset_t addr;
  858 
  859         sched_pin();
  860         if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
  861                 for (addr = sva; addr < eva; addr += PAGE_SIZE)
  862                         invlpg(addr);
  863                 smp_invlpg_range(sva, eva);
  864         } else {
  865                 cpumask = PCPU_GET(cpumask);
  866                 other_cpus = PCPU_GET(other_cpus);
  867                 if (pmap->pm_active & cpumask)
  868                         for (addr = sva; addr < eva; addr += PAGE_SIZE)
  869                                 invlpg(addr);
  870                 if (pmap->pm_active & other_cpus)
  871                         smp_masked_invlpg_range(pmap->pm_active & other_cpus,
  872                             sva, eva);
  873         }
  874         sched_unpin();
  875 }
  876 
  877 void
  878 pmap_invalidate_all(pmap_t pmap)
  879 {
  880         u_int cpumask;
  881         u_int other_cpus;
  882 
  883         sched_pin();
  884         if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
  885                 invltlb();
  886                 smp_invltlb();
  887         } else {
  888                 cpumask = PCPU_GET(cpumask);
  889                 other_cpus = PCPU_GET(other_cpus);
  890                 if (pmap->pm_active & cpumask)
  891                         invltlb();
  892                 if (pmap->pm_active & other_cpus)
  893                         smp_masked_invltlb(pmap->pm_active & other_cpus);
  894         }
  895         sched_unpin();
  896 }
  897 
  898 void
  899 pmap_invalidate_cache(void)
  900 {
  901 
  902         sched_pin();
  903         wbinvd();
  904         smp_cache_flush();
  905         sched_unpin();
  906 }
  907 #else /* !SMP */
  908 /*
  909  * Normal, non-SMP, invalidation functions.
  910  * We inline these within pmap.c for speed.
  911  */
  912 PMAP_INLINE void
  913 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
  914 {
  915 
  916         if (pmap == kernel_pmap || pmap->pm_active)
  917                 invlpg(va);
  918 }
  919 
  920 PMAP_INLINE void
  921 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
  922 {
  923         vm_offset_t addr;
  924 
  925         if (pmap == kernel_pmap || pmap->pm_active)
  926                 for (addr = sva; addr < eva; addr += PAGE_SIZE)
  927                         invlpg(addr);
  928 }
  929 
  930 PMAP_INLINE void
  931 pmap_invalidate_all(pmap_t pmap)
  932 {
  933 
  934         if (pmap == kernel_pmap || pmap->pm_active)
  935                 invltlb();
  936 }
  937 
  938 PMAP_INLINE void
  939 pmap_invalidate_cache(void)
  940 {
  941 
  942         wbinvd();
  943 }
  944 #endif /* !SMP */
  945 
  946 /*
  947  * Are we current address space or kernel?
  948  */
  949 static __inline int
  950 pmap_is_current(pmap_t pmap)
  951 {
  952         return (pmap == kernel_pmap ||
  953             (pmap->pm_pml4[PML4PML4I] & PG_FRAME) == (PML4pml4e[0] & PG_FRAME));
  954 }
  955 
  956 /*
  957  *      Routine:        pmap_extract
  958  *      Function:
  959  *              Extract the physical page address associated
  960  *              with the given map/virtual_address pair.
  961  */
  962 vm_paddr_t 
  963 pmap_extract(pmap_t pmap, vm_offset_t va)
  964 {
  965         vm_paddr_t rtval;
  966         pt_entry_t *pte;
  967         pd_entry_t pde, *pdep;
  968 
  969         rtval = 0;
  970         PMAP_LOCK(pmap);
  971         pdep = pmap_pde(pmap, va);
  972         if (pdep != NULL) {
  973                 pde = *pdep;
  974                 if (pde) {
  975                         if ((pde & PG_PS) != 0)
  976                                 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
  977                         else {
  978                                 pte = pmap_pde_to_pte(pdep, va);
  979                                 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
  980                         }
  981                 }
  982         }
  983         PMAP_UNLOCK(pmap);
  984         return (rtval);
  985 }
  986 
  987 /*
  988  *      Routine:        pmap_extract_and_hold
  989  *      Function:
  990  *              Atomically extract and hold the physical page
  991  *              with the given pmap and virtual address pair
  992  *              if that mapping permits the given protection.
  993  */
  994 vm_page_t
  995 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
  996 {
  997         pd_entry_t pde, *pdep;
  998         pt_entry_t pte;
  999         vm_page_t m;
 1000 
 1001         m = NULL;
 1002         vm_page_lock_queues();
 1003         PMAP_LOCK(pmap);
 1004         pdep = pmap_pde(pmap, va);
 1005         if (pdep != NULL && (pde = *pdep)) {
 1006                 if (pde & PG_PS) {
 1007                         if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
 1008                                 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
 1009                                     (va & PDRMASK));
 1010                                 vm_page_hold(m);
 1011                         }
 1012                 } else {
 1013                         pte = *pmap_pde_to_pte(pdep, va);
 1014                         if ((pte & PG_V) &&
 1015                             ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
 1016                                 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
 1017                                 vm_page_hold(m);
 1018                         }
 1019                 }
 1020         }
 1021         vm_page_unlock_queues();
 1022         PMAP_UNLOCK(pmap);
 1023         return (m);
 1024 }
 1025 
 1026 vm_paddr_t
 1027 pmap_kextract(vm_offset_t va)
 1028 {
 1029         pd_entry_t pde;
 1030         vm_paddr_t pa;
 1031 
 1032         if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
 1033                 pa = DMAP_TO_PHYS(va);
 1034         } else {
 1035                 pde = *vtopde(va);
 1036                 if (pde & PG_PS) {
 1037                         pa = (pde & PG_PS_FRAME) | (va & PDRMASK);
 1038                 } else {
 1039                         /*
 1040                          * Beware of a concurrent promotion that changes the
 1041                          * PDE at this point!  For example, vtopte() must not
 1042                          * be used to access the PTE because it would use the
 1043                          * new PDE.  It is, however, safe to use the old PDE
 1044                          * because the page table page is preserved by the
 1045                          * promotion.
 1046                          */
 1047                         pa = *pmap_pde_to_pte(&pde, va);
 1048                         pa = (pa & PG_FRAME) | (va & PAGE_MASK);
 1049                 }
 1050         }
 1051         return pa;
 1052 }
 1053 
 1054 /***************************************************
 1055  * Low level mapping routines.....
 1056  ***************************************************/
 1057 
 1058 /*
 1059  * Add a wired page to the kva.
 1060  * Note: not SMP coherent.
 1061  */
 1062 PMAP_INLINE void 
 1063 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
 1064 {
 1065         pt_entry_t *pte;
 1066 
 1067         pte = vtopte(va);
 1068         pte_store(pte, pa | PG_RW | PG_V | PG_G);
 1069 }
 1070 
 1071 PMAP_INLINE void 
 1072 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
 1073 {
 1074         pt_entry_t *pte;
 1075 
 1076         pte = vtopte(va);
 1077         pte_store(pte, pa | PG_RW | PG_V | PG_G | pmap_cache_bits(mode, 0));
 1078 }
 1079 
 1080 /*
 1081  * Remove a page from the kernel pagetables.
 1082  * Note: not SMP coherent.
 1083  */
 1084 PMAP_INLINE void
 1085 pmap_kremove(vm_offset_t va)
 1086 {
 1087         pt_entry_t *pte;
 1088 
 1089         pte = vtopte(va);
 1090         pte_clear(pte);
 1091 }
 1092 
 1093 /*
 1094  *      Used to map a range of physical addresses into kernel
 1095  *      virtual address space.
 1096  *
 1097  *      The value passed in '*virt' is a suggested virtual address for
 1098  *      the mapping. Architectures which can support a direct-mapped
 1099  *      physical to virtual region can return the appropriate address
 1100  *      within that region, leaving '*virt' unchanged. Other
 1101  *      architectures should map the pages starting at '*virt' and
 1102  *      update '*virt' with the first usable address after the mapped
 1103  *      region.
 1104  */
 1105 vm_offset_t
 1106 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
 1107 {
 1108         return PHYS_TO_DMAP(start);
 1109 }
 1110 
 1111 
 1112 /*
 1113  * Add a list of wired pages to the kva
 1114  * this routine is only used for temporary
 1115  * kernel mappings that do not need to have
 1116  * page modification or references recorded.
 1117  * Note that old mappings are simply written
 1118  * over.  The page *must* be wired.
 1119  * Note: SMP coherent.  Uses a ranged shootdown IPI.
 1120  */
 1121 void
 1122 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
 1123 {
 1124         pt_entry_t *endpte, oldpte, *pte;
 1125 
 1126         oldpte = 0;
 1127         pte = vtopte(sva);
 1128         endpte = pte + count;
 1129         while (pte < endpte) {
 1130                 oldpte |= *pte;
 1131                 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | PG_G | PG_RW | PG_V);
 1132                 pte++;
 1133                 ma++;
 1134         }
 1135         if ((oldpte & PG_V) != 0)
 1136                 pmap_invalidate_range(kernel_pmap, sva, sva + count *
 1137                     PAGE_SIZE);
 1138 }
 1139 
 1140 /*
 1141  * This routine tears out page mappings from the
 1142  * kernel -- it is meant only for temporary mappings.
 1143  * Note: SMP coherent.  Uses a ranged shootdown IPI.
 1144  */
 1145 void
 1146 pmap_qremove(vm_offset_t sva, int count)
 1147 {
 1148         vm_offset_t va;
 1149 
 1150         va = sva;
 1151         while (count-- > 0) {
 1152                 pmap_kremove(va);
 1153                 va += PAGE_SIZE;
 1154         }
 1155         pmap_invalidate_range(kernel_pmap, sva, va);
 1156 }
 1157 
 1158 /***************************************************
 1159  * Page table page management routines.....
 1160  ***************************************************/
 1161 static __inline void
 1162 pmap_free_zero_pages(vm_page_t free)
 1163 {
 1164         vm_page_t m;
 1165 
 1166         while (free != NULL) {
 1167                 m = free;
 1168                 free = m->right;
 1169                 /* Preserve the page's PG_ZERO setting. */
 1170                 vm_page_free_toq(m);
 1171         }
 1172 }
 1173 
 1174 /*
 1175  * Schedule the specified unused page table page to be freed.  Specifically,
 1176  * add the page to the specified list of pages that will be released to the
 1177  * physical memory manager after the TLB has been updated.
 1178  */
 1179 static __inline void
 1180 pmap_add_delayed_free_list(vm_page_t m, vm_page_t *free, boolean_t set_PG_ZERO)
 1181 {
 1182 
 1183         if (set_PG_ZERO)
 1184                 m->flags |= PG_ZERO;
 1185         else
 1186                 m->flags &= ~PG_ZERO;
 1187         m->right = *free;
 1188         *free = m;
 1189 }
 1190         
 1191 /*
 1192  * Inserts the specified page table page into the specified pmap's collection
 1193  * of idle page table pages.  Each of a pmap's page table pages is responsible
 1194  * for mapping a distinct range of virtual addresses.  The pmap's collection is
 1195  * ordered by this virtual address range.
 1196  */
 1197 static void
 1198 pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte)
 1199 {
 1200         vm_page_t root;
 1201 
 1202         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1203         root = pmap->pm_root;
 1204         if (root == NULL) {
 1205                 mpte->left = NULL;
 1206                 mpte->right = NULL;
 1207         } else {
 1208                 root = vm_page_splay(mpte->pindex, root);
 1209                 if (mpte->pindex < root->pindex) {
 1210                         mpte->left = root->left;
 1211                         mpte->right = root;
 1212                         root->left = NULL;
 1213                 } else if (mpte->pindex == root->pindex)
 1214                         panic("pmap_insert_pt_page: pindex already inserted");
 1215                 else {
 1216                         mpte->right = root->right;
 1217                         mpte->left = root;
 1218                         root->right = NULL;
 1219                 }
 1220         }
 1221         pmap->pm_root = mpte;
 1222 }
 1223 
 1224 /*
 1225  * Looks for a page table page mapping the specified virtual address in the
 1226  * specified pmap's collection of idle page table pages.  Returns NULL if there
 1227  * is no page table page corresponding to the specified virtual address.
 1228  */
 1229 static vm_page_t
 1230 pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va)
 1231 {
 1232         vm_page_t mpte;
 1233         vm_pindex_t pindex = pmap_pde_pindex(va);
 1234 
 1235         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1236         if ((mpte = pmap->pm_root) != NULL && mpte->pindex != pindex) {
 1237                 mpte = vm_page_splay(pindex, mpte);
 1238                 if ((pmap->pm_root = mpte)->pindex != pindex)
 1239                         mpte = NULL;
 1240         }
 1241         return (mpte);
 1242 }
 1243 
 1244 /*
 1245  * Removes the specified page table page from the specified pmap's collection
 1246  * of idle page table pages.  The specified page table page must be a member of
 1247  * the pmap's collection.
 1248  */
 1249 static void
 1250 pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte)
 1251 {
 1252         vm_page_t root;
 1253 
 1254         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1255         if (mpte != pmap->pm_root) {
 1256                 root = vm_page_splay(mpte->pindex, pmap->pm_root);
 1257                 KASSERT(mpte == root,
 1258                     ("pmap_remove_pt_page: mpte %p is missing from pmap %p",
 1259                     mpte, pmap));
 1260         }
 1261         if (mpte->left == NULL)
 1262                 root = mpte->right;
 1263         else {
 1264                 root = vm_page_splay(mpte->pindex, mpte->left);
 1265                 root->right = mpte->right;
 1266         }
 1267         pmap->pm_root = root;
 1268 }
 1269 
 1270 /*
 1271  * This routine unholds page table pages, and if the hold count
 1272  * drops to zero, then it decrements the wire count.
 1273  */
 1274 static __inline int
 1275 pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_page_t *free)
 1276 {
 1277 
 1278         --m->wire_count;
 1279         if (m->wire_count == 0)
 1280                 return _pmap_unwire_pte_hold(pmap, va, m, free);
 1281         else
 1282                 return 0;
 1283 }
 1284 
 1285 static int 
 1286 _pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, 
 1287     vm_page_t *free)
 1288 {
 1289         vm_offset_t pteva;
 1290 
 1291         /*
 1292          * unmap the page table page
 1293          */
 1294         if (m->pindex >= (NUPDE + NUPDPE)) {
 1295                 /* PDP page */
 1296                 pml4_entry_t *pml4;
 1297                 pml4 = pmap_pml4e(pmap, va);
 1298                 pteva = (vm_offset_t) PDPmap + amd64_ptob(m->pindex - (NUPDE + NUPDPE));
 1299                 *pml4 = 0;
 1300         } else if (m->pindex >= NUPDE) {
 1301                 /* PD page */
 1302                 pdp_entry_t *pdp;
 1303                 pdp = pmap_pdpe(pmap, va);
 1304                 pteva = (vm_offset_t) PDmap + amd64_ptob(m->pindex - NUPDE);
 1305                 *pdp = 0;
 1306         } else {
 1307                 /* PTE page */
 1308                 pd_entry_t *pd;
 1309                 pd = pmap_pde(pmap, va);
 1310                 pteva = (vm_offset_t) PTmap + amd64_ptob(m->pindex);
 1311                 *pd = 0;
 1312         }
 1313         --pmap->pm_stats.resident_count;
 1314         if (m->pindex < NUPDE) {
 1315                 /* We just released a PT, unhold the matching PD */
 1316                 vm_page_t pdpg;
 1317 
 1318                 pdpg = PHYS_TO_VM_PAGE(*pmap_pdpe(pmap, va) & PG_FRAME);
 1319                 pmap_unwire_pte_hold(pmap, va, pdpg, free);
 1320         }
 1321         if (m->pindex >= NUPDE && m->pindex < (NUPDE + NUPDPE)) {
 1322                 /* We just released a PD, unhold the matching PDP */
 1323                 vm_page_t pdppg;
 1324 
 1325                 pdppg = PHYS_TO_VM_PAGE(*pmap_pml4e(pmap, va) & PG_FRAME);
 1326                 pmap_unwire_pte_hold(pmap, va, pdppg, free);
 1327         }
 1328 
 1329         /*
 1330          * This is a release store so that the ordinary store unmapping
 1331          * the page table page is globally performed before TLB shoot-
 1332          * down is begun.
 1333          */
 1334         atomic_subtract_rel_int(&cnt.v_wire_count, 1);
 1335 
 1336         /*
 1337          * Do an invltlb to make the invalidated mapping
 1338          * take effect immediately.
 1339          */
 1340         pmap_invalidate_page(pmap, pteva);
 1341 
 1342         /* 
 1343          * Put page on a list so that it is released after
 1344          * *ALL* TLB shootdown is done
 1345          */
 1346         pmap_add_delayed_free_list(m, free, TRUE);
 1347         
 1348         return 1;
 1349 }
 1350 
 1351 /*
 1352  * After removing a page table entry, this routine is used to
 1353  * conditionally free the page, and manage the hold/wire counts.
 1354  */
 1355 static int
 1356 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde, vm_page_t *free)
 1357 {
 1358         vm_page_t mpte;
 1359 
 1360         if (va >= VM_MAXUSER_ADDRESS)
 1361                 return 0;
 1362         KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
 1363         mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
 1364         return pmap_unwire_pte_hold(pmap, va, mpte, free);
 1365 }
 1366 
 1367 void
 1368 pmap_pinit0(pmap_t pmap)
 1369 {
 1370 
 1371         PMAP_LOCK_INIT(pmap);
 1372         pmap->pm_pml4 = (pml4_entry_t *)(KERNBASE + KPML4phys);
 1373         pmap->pm_root = NULL;
 1374         pmap->pm_active = 0;
 1375         TAILQ_INIT(&pmap->pm_pvchunk);
 1376         bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
 1377 }
 1378 
 1379 /*
 1380  * Initialize a preallocated and zeroed pmap structure,
 1381  * such as one in a vmspace structure.
 1382  */
 1383 int
 1384 pmap_pinit(pmap_t pmap)
 1385 {
 1386         vm_page_t pml4pg;
 1387         static vm_pindex_t color;
 1388 
 1389         PMAP_LOCK_INIT(pmap);
 1390 
 1391         /*
 1392          * allocate the page directory page
 1393          */
 1394         while ((pml4pg = vm_page_alloc(NULL, color++, VM_ALLOC_NOOBJ |
 1395             VM_ALLOC_NORMAL | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
 1396                 VM_WAIT;
 1397 
 1398         pmap->pm_pml4 = (pml4_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pml4pg));
 1399 
 1400         if ((pml4pg->flags & PG_ZERO) == 0)
 1401                 pagezero(pmap->pm_pml4);
 1402 
 1403         /* Wire in kernel global address entries. */
 1404         pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
 1405         pmap->pm_pml4[DMPML4I] = DMPDPphys | PG_RW | PG_V | PG_U;
 1406 
 1407         /* install self-referential address mapping entry(s) */
 1408         pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(pml4pg) | PG_V | PG_RW | PG_A | PG_M;
 1409 
 1410         pmap->pm_root = NULL;
 1411         pmap->pm_active = 0;
 1412         TAILQ_INIT(&pmap->pm_pvchunk);
 1413         bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
 1414 
 1415         return (1);
 1416 }
 1417 
 1418 /*
 1419  * this routine is called if the page table page is not
 1420  * mapped correctly.
 1421  *
 1422  * Note: If a page allocation fails at page table level two or three,
 1423  * one or two pages may be held during the wait, only to be released
 1424  * afterwards.  This conservative approach is easily argued to avoid
 1425  * race conditions.
 1426  */
 1427 static vm_page_t
 1428 _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, int flags)
 1429 {
 1430         vm_page_t m, pdppg, pdpg;
 1431 
 1432         KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
 1433             (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
 1434             ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
 1435 
 1436         /*
 1437          * Allocate a page table page.
 1438          */
 1439         if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
 1440             VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
 1441                 if (flags & M_WAITOK) {
 1442                         PMAP_UNLOCK(pmap);
 1443                         vm_page_unlock_queues();
 1444                         VM_WAIT;
 1445                         vm_page_lock_queues();
 1446                         PMAP_LOCK(pmap);
 1447                 }
 1448 
 1449                 /*
 1450                  * Indicate the need to retry.  While waiting, the page table
 1451                  * page may have been allocated.
 1452                  */
 1453                 return (NULL);
 1454         }
 1455         if ((m->flags & PG_ZERO) == 0)
 1456                 pmap_zero_page(m);
 1457 
 1458         /*
 1459          * Map the pagetable page into the process address space, if
 1460          * it isn't already there.
 1461          */
 1462 
 1463         pmap->pm_stats.resident_count++;
 1464 
 1465         if (ptepindex >= (NUPDE + NUPDPE)) {
 1466                 pml4_entry_t *pml4;
 1467                 vm_pindex_t pml4index;
 1468 
 1469                 /* Wire up a new PDPE page */
 1470                 pml4index = ptepindex - (NUPDE + NUPDPE);
 1471                 pml4 = &pmap->pm_pml4[pml4index];
 1472                 *pml4 = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
 1473 
 1474         } else if (ptepindex >= NUPDE) {
 1475                 vm_pindex_t pml4index;
 1476                 vm_pindex_t pdpindex;
 1477                 pml4_entry_t *pml4;
 1478                 pdp_entry_t *pdp;
 1479 
 1480                 /* Wire up a new PDE page */
 1481                 pdpindex = ptepindex - NUPDE;
 1482                 pml4index = pdpindex >> NPML4EPGSHIFT;
 1483 
 1484                 pml4 = &pmap->pm_pml4[pml4index];
 1485                 if ((*pml4 & PG_V) == 0) {
 1486                         /* Have to allocate a new pdp, recurse */
 1487                         if (_pmap_allocpte(pmap, NUPDE + NUPDPE + pml4index,
 1488                             flags) == NULL) {
 1489                                 --m->wire_count;
 1490                                 vm_page_free(m);
 1491                                 return (NULL);
 1492                         }
 1493                 } else {
 1494                         /* Add reference to pdp page */
 1495                         pdppg = PHYS_TO_VM_PAGE(*pml4 & PG_FRAME);
 1496                         pdppg->wire_count++;
 1497                 }
 1498                 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
 1499 
 1500                 /* Now find the pdp page */
 1501                 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
 1502                 *pdp = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
 1503 
 1504         } else {
 1505                 vm_pindex_t pml4index;
 1506                 vm_pindex_t pdpindex;
 1507                 pml4_entry_t *pml4;
 1508                 pdp_entry_t *pdp;
 1509                 pd_entry_t *pd;
 1510 
 1511                 /* Wire up a new PTE page */
 1512                 pdpindex = ptepindex >> NPDPEPGSHIFT;
 1513                 pml4index = pdpindex >> NPML4EPGSHIFT;
 1514 
 1515                 /* First, find the pdp and check that its valid. */
 1516                 pml4 = &pmap->pm_pml4[pml4index];
 1517                 if ((*pml4 & PG_V) == 0) {
 1518                         /* Have to allocate a new pd, recurse */
 1519                         if (_pmap_allocpte(pmap, NUPDE + pdpindex,
 1520                             flags) == NULL) {
 1521                                 --m->wire_count;
 1522                                 vm_page_free(m);
 1523                                 return (NULL);
 1524                         }
 1525                         pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
 1526                         pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
 1527                 } else {
 1528                         pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
 1529                         pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
 1530                         if ((*pdp & PG_V) == 0) {
 1531                                 /* Have to allocate a new pd, recurse */
 1532                                 if (_pmap_allocpte(pmap, NUPDE + pdpindex,
 1533                                     flags) == NULL) {
 1534                                         --m->wire_count;
 1535                                         vm_page_free(m);
 1536                                         return (NULL);
 1537                                 }
 1538                         } else {
 1539                                 /* Add reference to the pd page */
 1540                                 pdpg = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
 1541                                 pdpg->wire_count++;
 1542                         }
 1543                 }
 1544                 pd = (pd_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME);
 1545 
 1546                 /* Now we know where the page directory page is */
 1547                 pd = &pd[ptepindex & ((1ul << NPDEPGSHIFT) - 1)];
 1548                 *pd = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
 1549         }
 1550 
 1551         return m;
 1552 }
 1553 
 1554 static vm_page_t
 1555 pmap_allocpde(pmap_t pmap, vm_offset_t va, int flags)
 1556 {
 1557         vm_pindex_t pdpindex, ptepindex;
 1558         pdp_entry_t *pdpe;
 1559         vm_page_t pdpg;
 1560 
 1561         KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
 1562             (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
 1563             ("pmap_allocpde: flags is neither M_NOWAIT nor M_WAITOK"));
 1564 retry:
 1565         pdpe = pmap_pdpe(pmap, va);
 1566         if (pdpe != NULL && (*pdpe & PG_V) != 0) {
 1567                 /* Add a reference to the pd page. */
 1568                 pdpg = PHYS_TO_VM_PAGE(*pdpe & PG_FRAME);
 1569                 pdpg->wire_count++;
 1570         } else {
 1571                 /* Allocate a pd page. */
 1572                 ptepindex = pmap_pde_pindex(va);
 1573                 pdpindex = ptepindex >> NPDPEPGSHIFT;
 1574                 pdpg = _pmap_allocpte(pmap, NUPDE + pdpindex, flags);
 1575                 if (pdpg == NULL && (flags & M_WAITOK))
 1576                         goto retry;
 1577         }
 1578         return (pdpg);
 1579 }
 1580 
 1581 static vm_page_t
 1582 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
 1583 {
 1584         vm_pindex_t ptepindex;
 1585         pd_entry_t *pd;
 1586         vm_page_t m;
 1587 
 1588         KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
 1589             (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
 1590             ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
 1591 
 1592         /*
 1593          * Calculate pagetable page index
 1594          */
 1595         ptepindex = pmap_pde_pindex(va);
 1596 retry:
 1597         /*
 1598          * Get the page directory entry
 1599          */
 1600         pd = pmap_pde(pmap, va);
 1601 
 1602         /*
 1603          * This supports switching from a 2MB page to a
 1604          * normal 4K page.
 1605          */
 1606         if (pd != NULL && (*pd & (PG_PS | PG_V)) == (PG_PS | PG_V)) {
 1607                 if (!pmap_demote_pde(pmap, pd, va)) {
 1608                         /*
 1609                          * Invalidation of the 2MB page mapping may have caused
 1610                          * the deallocation of the underlying PD page.
 1611                          */
 1612                         pd = NULL;
 1613                 }
 1614         }
 1615 
 1616         /*
 1617          * If the page table page is mapped, we just increment the
 1618          * hold count, and activate it.
 1619          */
 1620         if (pd != NULL && (*pd & PG_V) != 0) {
 1621                 m = PHYS_TO_VM_PAGE(*pd & PG_FRAME);
 1622                 m->wire_count++;
 1623         } else {
 1624                 /*
 1625                  * Here if the pte page isn't mapped, or if it has been
 1626                  * deallocated.
 1627                  */
 1628                 m = _pmap_allocpte(pmap, ptepindex, flags);
 1629                 if (m == NULL && (flags & M_WAITOK))
 1630                         goto retry;
 1631         }
 1632         return (m);
 1633 }
 1634 
 1635 
 1636 /***************************************************
 1637  * Pmap allocation/deallocation routines.
 1638  ***************************************************/
 1639 
 1640 /*
 1641  * Release any resources held by the given physical map.
 1642  * Called when a pmap initialized by pmap_pinit is being released.
 1643  * Should only be called if the map contains no valid mappings.
 1644  */
 1645 void
 1646 pmap_release(pmap_t pmap)
 1647 {
 1648         vm_page_t m;
 1649 
 1650         KASSERT(pmap->pm_stats.resident_count == 0,
 1651             ("pmap_release: pmap resident count %ld != 0",
 1652             pmap->pm_stats.resident_count));
 1653         KASSERT(pmap->pm_root == NULL,
 1654             ("pmap_release: pmap has reserved page table page(s)"));
 1655 
 1656         m = PHYS_TO_VM_PAGE(pmap->pm_pml4[PML4PML4I] & PG_FRAME);
 1657 
 1658         pmap->pm_pml4[KPML4I] = 0;      /* KVA */
 1659         pmap->pm_pml4[DMPML4I] = 0;     /* Direct Map */
 1660         pmap->pm_pml4[PML4PML4I] = 0;   /* Recursive Mapping */
 1661 
 1662         m->wire_count--;
 1663         atomic_subtract_int(&cnt.v_wire_count, 1);
 1664         vm_page_free_zero(m);
 1665         PMAP_LOCK_DESTROY(pmap);
 1666 }
 1667 
 1668 static int
 1669 kvm_size(SYSCTL_HANDLER_ARGS)
 1670 {
 1671         unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
 1672 
 1673         return sysctl_handle_long(oidp, &ksize, 0, req);
 1674 }
 1675 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 
 1676     0, 0, kvm_size, "LU", "Size of KVM");
 1677 
 1678 static int
 1679 kvm_free(SYSCTL_HANDLER_ARGS)
 1680 {
 1681         unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
 1682 
 1683         return sysctl_handle_long(oidp, &kfree, 0, req);
 1684 }
 1685 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 
 1686     0, 0, kvm_free, "LU", "Amount of KVM free");
 1687 
 1688 /*
 1689  * grow the number of kernel page table entries, if needed
 1690  */
 1691 void
 1692 pmap_growkernel(vm_offset_t addr)
 1693 {
 1694         vm_paddr_t paddr;
 1695         vm_page_t nkpg;
 1696         pd_entry_t *pde, newpdir;
 1697         pdp_entry_t *pdpe;
 1698 
 1699         mtx_assert(&kernel_map->system_mtx, MA_OWNED);
 1700 
 1701         /*
 1702          * Return if "addr" is within the range of kernel page table pages
 1703          * that were preallocated during pmap bootstrap.  Moreover, leave
 1704          * "kernel_vm_end" and the kernel page table as they were.
 1705          *
 1706          * The correctness of this action is based on the following
 1707          * argument: vm_map_findspace() allocates contiguous ranges of the
 1708          * kernel virtual address space.  It calls this function if a range
 1709          * ends after "kernel_vm_end".  If the kernel is mapped between
 1710          * "kernel_vm_end" and "addr", then the range cannot begin at
 1711          * "kernel_vm_end".  In fact, its beginning address cannot be less
 1712          * than the kernel.  Thus, there is no immediate need to allocate
 1713          * any new kernel page table pages between "kernel_vm_end" and
 1714          * "KERNBASE".
 1715          */
 1716         if (KERNBASE < addr && addr <= KERNBASE + NKPT * NBPDR)
 1717                 return;
 1718 
 1719         addr = roundup2(addr, NBPDR);
 1720         if (addr - 1 >= kernel_map->max_offset)
 1721                 addr = kernel_map->max_offset;
 1722         while (kernel_vm_end < addr) {
 1723                 pdpe = pmap_pdpe(kernel_pmap, kernel_vm_end);
 1724                 if ((*pdpe & PG_V) == 0) {
 1725                         /* We need a new PDP entry */
 1726                         nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDPSHIFT,
 1727                             VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
 1728                             VM_ALLOC_WIRED | VM_ALLOC_ZERO);
 1729                         if (nkpg == NULL)
 1730                                 panic("pmap_growkernel: no memory to grow kernel");
 1731                         if ((nkpg->flags & PG_ZERO) == 0)
 1732                                 pmap_zero_page(nkpg);
 1733                         paddr = VM_PAGE_TO_PHYS(nkpg);
 1734                         *pdpe = (pdp_entry_t)
 1735                                 (paddr | PG_V | PG_RW | PG_A | PG_M);
 1736                         continue; /* try again */
 1737                 }
 1738                 pde = pmap_pdpe_to_pde(pdpe, kernel_vm_end);
 1739                 if ((*pde & PG_V) != 0) {
 1740                         kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
 1741                         if (kernel_vm_end - 1 >= kernel_map->max_offset) {
 1742                                 kernel_vm_end = kernel_map->max_offset;
 1743                                 break;                       
 1744                         }
 1745                         continue;
 1746                 }
 1747 
 1748                 nkpg = vm_page_alloc(NULL, pmap_pde_pindex(kernel_vm_end),
 1749                     VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
 1750                     VM_ALLOC_ZERO);
 1751                 if (nkpg == NULL)
 1752                         panic("pmap_growkernel: no memory to grow kernel");
 1753                 if ((nkpg->flags & PG_ZERO) == 0)
 1754                         pmap_zero_page(nkpg);
 1755                 paddr = VM_PAGE_TO_PHYS(nkpg);
 1756                 newpdir = (pd_entry_t) (paddr | PG_V | PG_RW | PG_A | PG_M);
 1757                 pde_store(pde, newpdir);
 1758 
 1759                 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
 1760                 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
 1761                         kernel_vm_end = kernel_map->max_offset;
 1762                         break;                       
 1763                 }
 1764         }
 1765 }
 1766 
 1767 
 1768 /***************************************************
 1769  * page management routines.
 1770  ***************************************************/
 1771 
 1772 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
 1773 CTASSERT(_NPCM == 3);
 1774 CTASSERT(_NPCPV == 168);
 1775 
 1776 static __inline struct pv_chunk *
 1777 pv_to_chunk(pv_entry_t pv)
 1778 {
 1779 
 1780         return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK);
 1781 }
 1782 
 1783 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
 1784 
 1785 #define PC_FREE0        0xfffffffffffffffful
 1786 #define PC_FREE1        0xfffffffffffffffful
 1787 #define PC_FREE2        0x000000fffffffffful
 1788 
 1789 static uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
 1790 
 1791 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
 1792         "Current number of pv entries");
 1793 
 1794 #ifdef PV_STATS
 1795 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
 1796 
 1797 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
 1798         "Current number of pv entry chunks");
 1799 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
 1800         "Current number of pv entry chunks allocated");
 1801 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
 1802         "Current number of pv entry chunks frees");
 1803 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
 1804         "Number of times tried to get a chunk page but failed.");
 1805 
 1806 static long pv_entry_frees, pv_entry_allocs;
 1807 static int pv_entry_spare;
 1808 
 1809 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
 1810         "Current number of pv entry frees");
 1811 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
 1812         "Current number of pv entry allocs");
 1813 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
 1814         "Current number of spare pv entries");
 1815 
 1816 static int pmap_collect_inactive, pmap_collect_active;
 1817 
 1818 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
 1819         "Current number times pmap_collect called on inactive queue");
 1820 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
 1821         "Current number times pmap_collect called on active queue");
 1822 #endif
 1823 
 1824 /*
 1825  * We are in a serious low memory condition.  Resort to
 1826  * drastic measures to free some pages so we can allocate
 1827  * another pv entry chunk.  This is normally called to
 1828  * unmap inactive pages, and if necessary, active pages.
 1829  *
 1830  * We do not, however, unmap 2mpages because subsequent accesses will
 1831  * allocate per-page pv entries until repromotion occurs, thereby
 1832  * exacerbating the shortage of free pv entries.
 1833  */
 1834 static void
 1835 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
 1836 {
 1837         struct md_page *pvh;
 1838         pd_entry_t *pde;
 1839         pmap_t pmap;
 1840         pt_entry_t *pte, tpte;
 1841         pv_entry_t next_pv, pv;
 1842         vm_offset_t va;
 1843         vm_page_t m, free;
 1844 
 1845         TAILQ_FOREACH(m, &vpq->pl, pageq) {
 1846                 if (m->hold_count || m->busy)
 1847                         continue;
 1848                 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
 1849                         va = pv->pv_va;
 1850                         pmap = PV_PMAP(pv);
 1851                         /* Avoid deadlock and lock recursion. */
 1852                         if (pmap > locked_pmap)
 1853                                 PMAP_LOCK(pmap);
 1854                         else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
 1855                                 continue;
 1856                         pmap->pm_stats.resident_count--;
 1857                         pde = pmap_pde(pmap, va);
 1858                         KASSERT((*pde & PG_PS) == 0, ("pmap_collect: found"
 1859                             " a 2mpage in page %p's pv list", m));
 1860                         pte = pmap_pde_to_pte(pde, va);
 1861                         tpte = pte_load_clear(pte);
 1862                         KASSERT((tpte & PG_W) == 0,
 1863                             ("pmap_collect: wired pte %#lx", tpte));
 1864                         if (tpte & PG_A)
 1865                                 vm_page_flag_set(m, PG_REFERENCED);
 1866                         if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
 1867                                 vm_page_dirty(m);
 1868                         free = NULL;
 1869                         pmap_unuse_pt(pmap, va, *pde, &free);
 1870                         pmap_invalidate_page(pmap, va);
 1871                         pmap_free_zero_pages(free);
 1872                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 1873                         if (TAILQ_EMPTY(&m->md.pv_list)) {
 1874                                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 1875                                 if (TAILQ_EMPTY(&pvh->pv_list))
 1876                                         vm_page_flag_clear(m, PG_WRITEABLE);
 1877                         }
 1878                         free_pv_entry(pmap, pv);
 1879                         if (pmap != locked_pmap)
 1880                                 PMAP_UNLOCK(pmap);
 1881                 }
 1882         }
 1883 }
 1884 
 1885 
 1886 /*
 1887  * free the pv_entry back to the free list
 1888  */
 1889 static void
 1890 free_pv_entry(pmap_t pmap, pv_entry_t pv)
 1891 {
 1892         vm_page_t m;
 1893         struct pv_chunk *pc;
 1894         int idx, field, bit;
 1895 
 1896         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 1897         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1898         PV_STAT(pv_entry_frees++);
 1899         PV_STAT(pv_entry_spare++);
 1900         pv_entry_count--;
 1901         pc = pv_to_chunk(pv);
 1902         idx = pv - &pc->pc_pventry[0];
 1903         field = idx / 64;
 1904         bit = idx % 64;
 1905         pc->pc_map[field] |= 1ul << bit;
 1906         /* move to head of list */
 1907         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
 1908         if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
 1909             pc->pc_map[2] != PC_FREE2) {
 1910                 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
 1911                 return;
 1912         }
 1913         PV_STAT(pv_entry_spare -= _NPCPV);
 1914         PV_STAT(pc_chunk_count--);
 1915         PV_STAT(pc_chunk_frees++);
 1916         /* entire chunk is free, return it */
 1917         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
 1918         dump_drop_page(m->phys_addr);
 1919         vm_page_unwire(m, 0);
 1920         vm_page_free(m);
 1921 }
 1922 
 1923 /*
 1924  * get a new pv_entry, allocating a block from the system
 1925  * when needed.
 1926  */
 1927 static pv_entry_t
 1928 get_pv_entry(pmap_t pmap, int try)
 1929 {
 1930         static const struct timeval printinterval = { 60, 0 };
 1931         static struct timeval lastprint;
 1932         static vm_pindex_t colour;
 1933         struct vpgqueues *pq;
 1934         int bit, field;
 1935         pv_entry_t pv;
 1936         struct pv_chunk *pc;
 1937         vm_page_t m;
 1938 
 1939         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1940         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 1941         PV_STAT(pv_entry_allocs++);
 1942         pv_entry_count++;
 1943         if (pv_entry_count > pv_entry_high_water)
 1944                 if (ratecheck(&lastprint, &printinterval))
 1945                         printf("Approaching the limit on PV entries, consider "
 1946                             "increasing either the vm.pmap.shpgperproc or the "
 1947                             "vm.pmap.pv_entry_max sysctl.\n");
 1948         pq = NULL;
 1949 retry:
 1950         pc = TAILQ_FIRST(&pmap->pm_pvchunk);
 1951         if (pc != NULL) {
 1952                 for (field = 0; field < _NPCM; field++) {
 1953                         if (pc->pc_map[field]) {
 1954                                 bit = bsfq(pc->pc_map[field]);
 1955                                 break;
 1956                         }
 1957                 }
 1958                 if (field < _NPCM) {
 1959                         pv = &pc->pc_pventry[field * 64 + bit];
 1960                         pc->pc_map[field] &= ~(1ul << bit);
 1961                         /* If this was the last item, move it to tail */
 1962                         if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
 1963                             pc->pc_map[2] == 0) {
 1964                                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
 1965                                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
 1966                         }
 1967                         PV_STAT(pv_entry_spare--);
 1968                         return (pv);
 1969                 }
 1970         }
 1971         /* No free items, allocate another chunk */
 1972         m = vm_page_alloc(NULL, colour, (pq == &vm_page_queues[PQ_ACTIVE] ?
 1973             VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ |
 1974             VM_ALLOC_WIRED);
 1975         if (m == NULL) {
 1976                 if (try) {
 1977                         pv_entry_count--;
 1978                         PV_STAT(pc_chunk_tryfail++);
 1979                         return (NULL);
 1980                 }
 1981                 /*
 1982                  * Reclaim pv entries: At first, destroy mappings to inactive
 1983                  * pages.  After that, if a pv chunk entry is still needed,
 1984                  * destroy mappings to active pages.
 1985                  */
 1986                 if (pq == NULL) {
 1987                         PV_STAT(pmap_collect_inactive++);
 1988                         pq = &vm_page_queues[PQ_INACTIVE];
 1989                 } else if (pq == &vm_page_queues[PQ_INACTIVE]) {
 1990                         PV_STAT(pmap_collect_active++);
 1991                         pq = &vm_page_queues[PQ_ACTIVE];
 1992                 } else
 1993                         panic("get_pv_entry: increase vm.pmap.shpgperproc");
 1994                 pmap_collect(pmap, pq);
 1995                 goto retry;
 1996         }
 1997         PV_STAT(pc_chunk_count++);
 1998         PV_STAT(pc_chunk_allocs++);
 1999         colour++;
 2000         dump_add_page(m->phys_addr);
 2001         pc = (void *)PHYS_TO_DMAP(m->phys_addr);
 2002         pc->pc_pmap = pmap;
 2003         pc->pc_map[0] = PC_FREE0 & ~1ul;        /* preallocated bit 0 */
 2004         pc->pc_map[1] = PC_FREE1;
 2005         pc->pc_map[2] = PC_FREE2;
 2006         pv = &pc->pc_pventry[0];
 2007         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
 2008         PV_STAT(pv_entry_spare += _NPCPV - 1);
 2009         return (pv);
 2010 }
 2011 
 2012 /*
 2013  * First find and then remove the pv entry for the specified pmap and virtual
 2014  * address from the specified pv list.  Returns the pv entry if found and NULL
 2015  * otherwise.  This operation can be performed on pv lists for either 4KB or
 2016  * 2MB page mappings.
 2017  */
 2018 static __inline pv_entry_t
 2019 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
 2020 {
 2021         pv_entry_t pv;
 2022 
 2023         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2024         TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
 2025                 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
 2026                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
 2027                         break;
 2028                 }
 2029         }
 2030         return (pv);
 2031 }
 2032 
 2033 /*
 2034  * After demotion from a 2MB page mapping to 512 4KB page mappings,
 2035  * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
 2036  * entries for each of the 4KB page mappings.
 2037  */
 2038 static void
 2039 pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
 2040 {
 2041         struct md_page *pvh;
 2042         pv_entry_t pv;
 2043         vm_offset_t va_last;
 2044         vm_page_t m;
 2045 
 2046         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2047         KASSERT((pa & PDRMASK) == 0,
 2048             ("pmap_pv_demote_pde: pa is not 2mpage aligned"));
 2049 
 2050         /*
 2051          * Transfer the 2mpage's pv entry for this mapping to the first
 2052          * page's pv list.
 2053          */
 2054         pvh = pa_to_pvh(pa);
 2055         va = trunc_2mpage(va);
 2056         pv = pmap_pvh_remove(pvh, pmap, va);
 2057         KASSERT(pv != NULL, ("pmap_pv_demote_pde: pv not found"));
 2058         m = PHYS_TO_VM_PAGE(pa);
 2059         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
 2060         /* Instantiate the remaining NPTEPG - 1 pv entries. */
 2061         va_last = va + NBPDR - PAGE_SIZE;
 2062         do {
 2063                 m++;
 2064                 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
 2065                     ("pmap_pv_demote_pde: page %p is not managed", m));
 2066                 va += PAGE_SIZE;
 2067                 pmap_insert_entry(pmap, va, m);
 2068         } while (va < va_last);
 2069 }
 2070 
 2071 /*
 2072  * After promotion from 512 4KB page mappings to a single 2MB page mapping,
 2073  * replace the many pv entries for the 4KB page mappings by a single pv entry
 2074  * for the 2MB page mapping.
 2075  */
 2076 static void
 2077 pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
 2078 {
 2079         struct md_page *pvh;
 2080         pv_entry_t pv;
 2081         vm_offset_t va_last;
 2082         vm_page_t m;
 2083 
 2084         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2085         KASSERT((pa & PDRMASK) == 0,
 2086             ("pmap_pv_promote_pde: pa is not 2mpage aligned"));
 2087 
 2088         /*
 2089          * Transfer the first page's pv entry for this mapping to the
 2090          * 2mpage's pv list.  Aside from avoiding the cost of a call
 2091          * to get_pv_entry(), a transfer avoids the possibility that
 2092          * get_pv_entry() calls pmap_collect() and that pmap_collect()
 2093          * removes one of the mappings that is being promoted.
 2094          */
 2095         m = PHYS_TO_VM_PAGE(pa);
 2096         va = trunc_2mpage(va);
 2097         pv = pmap_pvh_remove(&m->md, pmap, va);
 2098         KASSERT(pv != NULL, ("pmap_pv_promote_pde: pv not found"));
 2099         pvh = pa_to_pvh(pa);
 2100         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
 2101         /* Free the remaining NPTEPG - 1 pv entries. */
 2102         va_last = va + NBPDR - PAGE_SIZE;
 2103         do {
 2104                 m++;
 2105                 va += PAGE_SIZE;
 2106                 pmap_pvh_free(&m->md, pmap, va);
 2107         } while (va < va_last);
 2108 }
 2109 
 2110 /*
 2111  * First find and then destroy the pv entry for the specified pmap and virtual
 2112  * address.  This operation can be performed on pv lists for either 4KB or 2MB
 2113  * page mappings.
 2114  */
 2115 static void
 2116 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
 2117 {
 2118         pv_entry_t pv;
 2119 
 2120         pv = pmap_pvh_remove(pvh, pmap, va);
 2121         KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
 2122         free_pv_entry(pmap, pv);
 2123 }
 2124 
 2125 static void
 2126 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
 2127 {
 2128         struct md_page *pvh;
 2129 
 2130         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2131         pmap_pvh_free(&m->md, pmap, va);
 2132         if (TAILQ_EMPTY(&m->md.pv_list)) {
 2133                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 2134                 if (TAILQ_EMPTY(&pvh->pv_list))
 2135                         vm_page_flag_clear(m, PG_WRITEABLE);
 2136         }
 2137 }
 2138 
 2139 /*
 2140  * Create a pv entry for page at pa for
 2141  * (pmap, va).
 2142  */
 2143 static void
 2144 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
 2145 {
 2146         pv_entry_t pv;
 2147 
 2148         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2149         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2150         pv = get_pv_entry(pmap, FALSE);
 2151         pv->pv_va = va;
 2152         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
 2153 }
 2154 
 2155 /*
 2156  * Conditionally create a pv entry.
 2157  */
 2158 static boolean_t
 2159 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
 2160 {
 2161         pv_entry_t pv;
 2162 
 2163         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2164         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2165         if (pv_entry_count < pv_entry_high_water && 
 2166             (pv = get_pv_entry(pmap, TRUE)) != NULL) {
 2167                 pv->pv_va = va;
 2168                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
 2169                 return (TRUE);
 2170         } else
 2171                 return (FALSE);
 2172 }
 2173 
 2174 /*
 2175  * Create the pv entry for a 2MB page mapping.
 2176  */
 2177 static boolean_t
 2178 pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
 2179 {
 2180         struct md_page *pvh;
 2181         pv_entry_t pv;
 2182 
 2183         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2184         if (pv_entry_count < pv_entry_high_water && 
 2185             (pv = get_pv_entry(pmap, TRUE)) != NULL) {
 2186                 pv->pv_va = va;
 2187                 pvh = pa_to_pvh(pa);
 2188                 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
 2189                 return (TRUE);
 2190         } else
 2191                 return (FALSE);
 2192 }
 2193 
 2194 /*
 2195  * Tries to demote a 2MB page mapping.
 2196  */
 2197 static boolean_t
 2198 pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
 2199 {
 2200         pd_entry_t newpde, oldpde;
 2201         pt_entry_t *firstpte, newpte, *pte;
 2202         vm_paddr_t mptepa;
 2203         vm_page_t free, mpte;
 2204 
 2205         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2206         mpte = pmap_lookup_pt_page(pmap, va);
 2207         if (mpte != NULL)
 2208                 pmap_remove_pt_page(pmap, mpte);
 2209         else {
 2210                 KASSERT((*pde & PG_W) == 0,
 2211                     ("pmap_demote_pde: page table page for a wired mapping"
 2212                     " is missing"));
 2213                 free = NULL;
 2214                 pmap_remove_pde(pmap, pde, trunc_2mpage(va), &free);
 2215                 pmap_invalidate_page(pmap, trunc_2mpage(va));
 2216                 pmap_free_zero_pages(free);
 2217                 CTR2(KTR_PMAP, "pmap_demote_pde: failure for va %#lx"
 2218                     " in pmap %p", va, pmap);
 2219                 return (FALSE);
 2220         }
 2221         mptepa = VM_PAGE_TO_PHYS(mpte);
 2222         firstpte = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
 2223         oldpde = *pde;
 2224         newpde = mptepa | PG_M | PG_A | (oldpde & PG_U) | PG_RW | PG_V;
 2225         KASSERT((oldpde & (PG_A | PG_V)) == (PG_A | PG_V),
 2226             ("pmap_demote_pde: oldpde is missing PG_A and/or PG_V"));
 2227         KASSERT((oldpde & (PG_M | PG_RW)) != PG_RW,
 2228             ("pmap_demote_pde: oldpde is missing PG_M"));
 2229         KASSERT((oldpde & PG_PS) != 0,
 2230             ("pmap_demote_pde: oldpde is missing PG_PS"));
 2231         newpte = oldpde & ~PG_PS;
 2232         if ((newpte & PG_PDE_PAT) != 0)
 2233                 newpte ^= PG_PDE_PAT | PG_PTE_PAT;
 2234 
 2235         /*
 2236          * If the mapping has changed attributes, update the page table
 2237          * entries.
 2238          */
 2239         KASSERT((*firstpte & PG_FRAME) == (newpte & PG_FRAME),
 2240             ("pmap_demote_pde: firstpte and newpte map different physical"
 2241             " addresses"));
 2242         if ((*firstpte & PG_PTE_PROMOTE) != (newpte & PG_PTE_PROMOTE))
 2243                 for (pte = firstpte; pte < firstpte + NPTEPG; pte++) {
 2244                         *pte = newpte;
 2245                         newpte += PAGE_SIZE;
 2246                 }
 2247 
 2248         /*
 2249          * Demote the mapping.  This pmap is locked.  The old PDE has
 2250          * PG_A set.  If the old PDE has PG_RW set, it also has PG_M
 2251          * set.  Thus, there is no danger of a race with another
 2252          * processor changing the setting of PG_A and/or PG_M between
 2253          * the read above and the store below. 
 2254          */
 2255         pde_store(pde, newpde); 
 2256 
 2257         /*
 2258          * Invalidate a stale mapping of the page table page.
 2259          */
 2260         pmap_invalidate_page(pmap, (vm_offset_t)vtopte(va));
 2261 
 2262         /*
 2263          * Demote the pv entry.  This depends on the earlier demotion
 2264          * of the mapping.  Specifically, the (re)creation of a per-
 2265          * page pv entry might trigger the execution of pmap_collect(),
 2266          * which might reclaim a newly (re)created per-page pv entry
 2267          * and destroy the associated mapping.  In order to destroy
 2268          * the mapping, the PDE must have already changed from mapping
 2269          * the 2mpage to referencing the page table page.
 2270          */
 2271         if ((oldpde & PG_MANAGED) != 0)
 2272                 pmap_pv_demote_pde(pmap, va, oldpde & PG_PS_FRAME);
 2273 
 2274         pmap_pde_demotions++;
 2275         CTR2(KTR_PMAP, "pmap_demote_pde: success for va %#lx"
 2276             " in pmap %p", va, pmap);
 2277         return (TRUE);
 2278 }
 2279 
 2280 /*
 2281  * pmap_remove_pde: do the things to unmap a superpage in a process
 2282  */
 2283 static int
 2284 pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
 2285     vm_page_t *free)
 2286 {
 2287         struct md_page *pvh;
 2288         pd_entry_t oldpde;
 2289         vm_offset_t eva, va;
 2290         vm_page_t m, mpte;
 2291 
 2292         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2293         KASSERT((sva & PDRMASK) == 0,
 2294             ("pmap_remove_pde: sva is not 2mpage aligned"));
 2295         oldpde = pte_load_clear(pdq);
 2296         if (oldpde & PG_W)
 2297                 pmap->pm_stats.wired_count -= NBPDR / PAGE_SIZE;
 2298 
 2299         /*
 2300          * Machines that don't support invlpg, also don't support
 2301          * PG_G.
 2302          */
 2303         if (oldpde & PG_G)
 2304                 pmap_invalidate_page(kernel_pmap, sva);
 2305         pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
 2306         if (oldpde & PG_MANAGED) {
 2307                 pvh = pa_to_pvh(oldpde & PG_PS_FRAME);
 2308                 pmap_pvh_free(pvh, pmap, sva);
 2309                 eva = sva + NBPDR;
 2310                 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
 2311                     va < eva; va += PAGE_SIZE, m++) {
 2312                         if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
 2313                                 vm_page_dirty(m);
 2314                         if (oldpde & PG_A)
 2315                                 vm_page_flag_set(m, PG_REFERENCED);
 2316                         if (TAILQ_EMPTY(&m->md.pv_list) &&
 2317                             TAILQ_EMPTY(&pvh->pv_list))
 2318                                 vm_page_flag_clear(m, PG_WRITEABLE);
 2319                 }
 2320         }
 2321         if (pmap == kernel_pmap) {
 2322                 if (!pmap_demote_pde(pmap, pdq, sva))
 2323                         panic("pmap_remove_pde: failed demotion");
 2324         } else {
 2325                 mpte = pmap_lookup_pt_page(pmap, sva);
 2326                 if (mpte != NULL) {
 2327                         pmap_remove_pt_page(pmap, mpte);
 2328                         pmap->pm_stats.resident_count--;
 2329                         KASSERT(mpte->wire_count == NPTEPG,
 2330                             ("pmap_remove_pde: pte page wire count error"));
 2331                         mpte->wire_count = 0;
 2332                         pmap_add_delayed_free_list(mpte, free, FALSE);
 2333                         atomic_subtract_int(&cnt.v_wire_count, 1);
 2334                 }
 2335         }
 2336         return (pmap_unuse_pt(pmap, sva, *pmap_pdpe(pmap, sva), free));
 2337 }
 2338 
 2339 /*
 2340  * pmap_remove_pte: do the things to unmap a page in a process
 2341  */
 2342 static int
 2343 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, 
 2344     pd_entry_t ptepde, vm_page_t *free)
 2345 {
 2346         pt_entry_t oldpte;
 2347         vm_page_t m;
 2348 
 2349         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2350         oldpte = pte_load_clear(ptq);
 2351         if (oldpte & PG_W)
 2352                 pmap->pm_stats.wired_count -= 1;
 2353         /*
 2354          * Machines that don't support invlpg, also don't support
 2355          * PG_G.
 2356          */
 2357         if (oldpte & PG_G)
 2358                 pmap_invalidate_page(kernel_pmap, va);
 2359         pmap->pm_stats.resident_count -= 1;
 2360         if (oldpte & PG_MANAGED) {
 2361                 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME);
 2362                 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
 2363                         vm_page_dirty(m);
 2364                 if (oldpte & PG_A)
 2365                         vm_page_flag_set(m, PG_REFERENCED);
 2366                 pmap_remove_entry(pmap, m, va);
 2367         }
 2368         return (pmap_unuse_pt(pmap, va, ptepde, free));
 2369 }
 2370 
 2371 /*
 2372  * Remove a single page from a process address space
 2373  */
 2374 static void
 2375 pmap_remove_page(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, vm_page_t *free)
 2376 {
 2377         pt_entry_t *pte;
 2378 
 2379         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2380         if ((*pde & PG_V) == 0)
 2381                 return;
 2382         pte = pmap_pde_to_pte(pde, va);
 2383         if ((*pte & PG_V) == 0)
 2384                 return;
 2385         pmap_remove_pte(pmap, pte, va, *pde, free);
 2386         pmap_invalidate_page(pmap, va);
 2387 }
 2388 
 2389 /*
 2390  *      Remove the given range of addresses from the specified map.
 2391  *
 2392  *      It is assumed that the start and end are properly
 2393  *      rounded to the page size.
 2394  */
 2395 void
 2396 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
 2397 {
 2398         vm_offset_t va_next;
 2399         pml4_entry_t *pml4e;
 2400         pdp_entry_t *pdpe;
 2401         pd_entry_t ptpaddr, *pde;
 2402         pt_entry_t *pte;
 2403         vm_page_t free = NULL;
 2404         int anyvalid;
 2405 
 2406         /*
 2407          * Perform an unsynchronized read.  This is, however, safe.
 2408          */
 2409         if (pmap->pm_stats.resident_count == 0)
 2410                 return;
 2411 
 2412         anyvalid = 0;
 2413 
 2414         vm_page_lock_queues();
 2415         PMAP_LOCK(pmap);
 2416 
 2417         /*
 2418          * special handling of removing one page.  a very
 2419          * common operation and easy to short circuit some
 2420          * code.
 2421          */
 2422         if (sva + PAGE_SIZE == eva) {
 2423                 pde = pmap_pde(pmap, sva);
 2424                 if (pde && (*pde & PG_PS) == 0) {
 2425                         pmap_remove_page(pmap, sva, pde, &free);
 2426                         goto out;
 2427                 }
 2428         }
 2429 
 2430         for (; sva < eva; sva = va_next) {
 2431 
 2432                 if (pmap->pm_stats.resident_count == 0)
 2433                         break;
 2434 
 2435                 pml4e = pmap_pml4e(pmap, sva);
 2436                 if ((*pml4e & PG_V) == 0) {
 2437                         va_next = (sva + NBPML4) & ~PML4MASK;
 2438                         if (va_next < sva)
 2439                                 va_next = eva;
 2440                         continue;
 2441                 }
 2442 
 2443                 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
 2444                 if ((*pdpe & PG_V) == 0) {
 2445                         va_next = (sva + NBPDP) & ~PDPMASK;
 2446                         if (va_next < sva)
 2447                                 va_next = eva;
 2448                         continue;
 2449                 }
 2450 
 2451                 /*
 2452                  * Calculate index for next page table.
 2453                  */
 2454                 va_next = (sva + NBPDR) & ~PDRMASK;
 2455                 if (va_next < sva)
 2456                         va_next = eva;
 2457 
 2458                 pde = pmap_pdpe_to_pde(pdpe, sva);
 2459                 ptpaddr = *pde;
 2460 
 2461                 /*
 2462                  * Weed out invalid mappings.
 2463                  */
 2464                 if (ptpaddr == 0)
 2465                         continue;
 2466 
 2467                 /*
 2468                  * Check for large page.
 2469                  */
 2470                 if ((ptpaddr & PG_PS) != 0) {
 2471                         /*
 2472                          * Are we removing the entire large page?  If not,
 2473                          * demote the mapping and fall through.
 2474                          */
 2475                         if (sva + NBPDR == va_next && eva >= va_next) {
 2476                                 /*
 2477                                  * The TLB entry for a PG_G mapping is
 2478                                  * invalidated by pmap_remove_pde().
 2479                                  */
 2480                                 if ((ptpaddr & PG_G) == 0)
 2481                                         anyvalid = 1;
 2482                                 pmap_remove_pde(pmap, pde, sva, &free);
 2483                                 continue;
 2484                         } else if (!pmap_demote_pde(pmap, pde, sva)) {
 2485                                 /* The large page mapping was destroyed. */
 2486                                 continue;
 2487                         } else
 2488                                 ptpaddr = *pde;
 2489                 }
 2490 
 2491                 /*
 2492                  * Limit our scan to either the end of the va represented
 2493                  * by the current page table page, or to the end of the
 2494                  * range being removed.
 2495                  */
 2496                 if (va_next > eva)
 2497                         va_next = eva;
 2498 
 2499                 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
 2500                     sva += PAGE_SIZE) {
 2501                         if (*pte == 0)
 2502                                 continue;
 2503 
 2504                         /*
 2505                          * The TLB entry for a PG_G mapping is invalidated
 2506                          * by pmap_remove_pte().
 2507                          */
 2508                         if ((*pte & PG_G) == 0)
 2509                                 anyvalid = 1;
 2510                         if (pmap_remove_pte(pmap, pte, sva, ptpaddr, &free))
 2511                                 break;
 2512                 }
 2513         }
 2514 out:
 2515         if (anyvalid)
 2516                 pmap_invalidate_all(pmap);
 2517         vm_page_unlock_queues();        
 2518         PMAP_UNLOCK(pmap);
 2519         pmap_free_zero_pages(free);
 2520 }
 2521 
 2522 /*
 2523  *      Routine:        pmap_remove_all
 2524  *      Function:
 2525  *              Removes this physical page from
 2526  *              all physical maps in which it resides.
 2527  *              Reflects back modify bits to the pager.
 2528  *
 2529  *      Notes:
 2530  *              Original versions of this routine were very
 2531  *              inefficient because they iteratively called
 2532  *              pmap_remove (slow...)
 2533  */
 2534 
 2535 void
 2536 pmap_remove_all(vm_page_t m)
 2537 {
 2538         struct md_page *pvh;
 2539         pv_entry_t pv;
 2540         pmap_t pmap;
 2541         pt_entry_t *pte, tpte;
 2542         pd_entry_t *pde;
 2543         vm_offset_t va;
 2544         vm_page_t free;
 2545 
 2546         KASSERT((m->flags & PG_FICTITIOUS) == 0,
 2547             ("pmap_remove_all: page %p is fictitious", m));
 2548         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2549         pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 2550         while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
 2551                 va = pv->pv_va;
 2552                 pmap = PV_PMAP(pv);
 2553                 PMAP_LOCK(pmap);
 2554                 pde = pmap_pde(pmap, va);
 2555                 (void)pmap_demote_pde(pmap, pde, va);
 2556                 PMAP_UNLOCK(pmap);
 2557         }
 2558         while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
 2559                 pmap = PV_PMAP(pv);
 2560                 PMAP_LOCK(pmap);
 2561                 pmap->pm_stats.resident_count--;
 2562                 pde = pmap_pde(pmap, pv->pv_va);
 2563                 KASSERT((*pde & PG_PS) == 0, ("pmap_remove_all: found"
 2564                     " a 2mpage in page %p's pv list", m));
 2565                 pte = pmap_pde_to_pte(pde, pv->pv_va);
 2566                 tpte = pte_load_clear(pte);
 2567                 if (tpte & PG_W)
 2568                         pmap->pm_stats.wired_count--;
 2569                 if (tpte & PG_A)
 2570                         vm_page_flag_set(m, PG_REFERENCED);
 2571 
 2572                 /*
 2573                  * Update the vm_page_t clean and reference bits.
 2574                  */
 2575                 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
 2576                         vm_page_dirty(m);
 2577                 free = NULL;
 2578                 pmap_unuse_pt(pmap, pv->pv_va, *pde, &free);
 2579                 pmap_invalidate_page(pmap, pv->pv_va);
 2580                 pmap_free_zero_pages(free);
 2581                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 2582                 free_pv_entry(pmap, pv);
 2583                 PMAP_UNLOCK(pmap);
 2584         }
 2585         vm_page_flag_clear(m, PG_WRITEABLE);
 2586 }
 2587 
 2588 /*
 2589  * pmap_protect_pde: do the things to protect a 2mpage in a process
 2590  */
 2591 static boolean_t
 2592 pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, vm_prot_t prot)
 2593 {
 2594         pd_entry_t newpde, oldpde;
 2595         vm_offset_t eva, va;
 2596         vm_page_t m;
 2597         boolean_t anychanged;
 2598 
 2599         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2600         KASSERT((sva & PDRMASK) == 0,
 2601             ("pmap_protect_pde: sva is not 2mpage aligned"));
 2602         anychanged = FALSE;
 2603 retry:
 2604         oldpde = newpde = *pde;
 2605         if (oldpde & PG_MANAGED) {
 2606                 eva = sva + NBPDR;
 2607                 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
 2608                     va < eva; va += PAGE_SIZE, m++) {
 2609                         /*
 2610                          * In contrast to the analogous operation on a 4KB page
 2611                          * mapping, the mapping's PG_A flag is not cleared and
 2612                          * the page's PG_REFERENCED flag is not set.  The
 2613                          * reason is that pmap_demote_pde() expects that a 2MB
 2614                          * page mapping with a stored page table page has PG_A
 2615                          * set.
 2616                          */
 2617                         if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
 2618                                 vm_page_dirty(m);
 2619                 }
 2620         }
 2621         if ((prot & VM_PROT_WRITE) == 0)
 2622                 newpde &= ~(PG_RW | PG_M);
 2623         if ((prot & VM_PROT_EXECUTE) == 0)
 2624                 newpde |= pg_nx;
 2625         if (newpde != oldpde) {
 2626                 if (!atomic_cmpset_long(pde, oldpde, newpde))
 2627                         goto retry;
 2628                 if (oldpde & PG_G)
 2629                         pmap_invalidate_page(pmap, sva);
 2630                 else
 2631                         anychanged = TRUE;
 2632         }
 2633         return (anychanged);
 2634 }
 2635 
 2636 /*
 2637  *      Set the physical protection on the
 2638  *      specified range of this map as requested.
 2639  */
 2640 void
 2641 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
 2642 {
 2643         vm_offset_t va_next;
 2644         pml4_entry_t *pml4e;
 2645         pdp_entry_t *pdpe;
 2646         pd_entry_t ptpaddr, *pde;
 2647         pt_entry_t *pte;
 2648         int anychanged;
 2649 
 2650         if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
 2651                 pmap_remove(pmap, sva, eva);
 2652                 return;
 2653         }
 2654 
 2655         if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
 2656             (VM_PROT_WRITE|VM_PROT_EXECUTE))
 2657                 return;
 2658 
 2659         anychanged = 0;
 2660 
 2661         vm_page_lock_queues();
 2662         PMAP_LOCK(pmap);
 2663         for (; sva < eva; sva = va_next) {
 2664 
 2665                 pml4e = pmap_pml4e(pmap, sva);
 2666                 if ((*pml4e & PG_V) == 0) {
 2667                         va_next = (sva + NBPML4) & ~PML4MASK;
 2668                         if (va_next < sva)
 2669                                 va_next = eva;
 2670                         continue;
 2671                 }
 2672 
 2673                 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
 2674                 if ((*pdpe & PG_V) == 0) {
 2675                         va_next = (sva + NBPDP) & ~PDPMASK;
 2676                         if (va_next < sva)
 2677                                 va_next = eva;
 2678                         continue;
 2679                 }
 2680 
 2681                 va_next = (sva + NBPDR) & ~PDRMASK;
 2682                 if (va_next < sva)
 2683                         va_next = eva;
 2684 
 2685                 pde = pmap_pdpe_to_pde(pdpe, sva);
 2686                 ptpaddr = *pde;
 2687 
 2688                 /*
 2689                  * Weed out invalid mappings.
 2690                  */
 2691                 if (ptpaddr == 0)
 2692                         continue;
 2693 
 2694                 /*
 2695                  * Check for large page.
 2696                  */
 2697                 if ((ptpaddr & PG_PS) != 0) {
 2698                         /*
 2699                          * Are we protecting the entire large page?  If not,
 2700                          * demote the mapping and fall through.
 2701                          */
 2702                         if (sva + NBPDR == va_next && eva >= va_next) {
 2703                                 /*
 2704                                  * The TLB entry for a PG_G mapping is
 2705                                  * invalidated by pmap_protect_pde().
 2706                                  */
 2707                                 if (pmap_protect_pde(pmap, pde, sva, prot))
 2708                                         anychanged = 1;
 2709                                 continue;
 2710                         } else if (!pmap_demote_pde(pmap, pde, sva)) {
 2711                                 /* The large page mapping was destroyed. */
 2712                                 continue;
 2713                         }
 2714                 }
 2715 
 2716                 if (va_next > eva)
 2717                         va_next = eva;
 2718 
 2719                 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
 2720                     sva += PAGE_SIZE) {
 2721                         pt_entry_t obits, pbits;
 2722                         vm_page_t m;
 2723 
 2724 retry:
 2725                         obits = pbits = *pte;
 2726                         if ((pbits & PG_V) == 0)
 2727                                 continue;
 2728                         if (pbits & PG_MANAGED) {
 2729                                 m = NULL;
 2730                                 if (pbits & PG_A) {
 2731                                         m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
 2732                                         vm_page_flag_set(m, PG_REFERENCED);
 2733                                         pbits &= ~PG_A;
 2734                                 }
 2735                                 if ((pbits & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
 2736                                         if (m == NULL)
 2737                                                 m = PHYS_TO_VM_PAGE(pbits &
 2738                                                     PG_FRAME);
 2739                                         vm_page_dirty(m);
 2740                                 }
 2741                         }
 2742 
 2743                         if ((prot & VM_PROT_WRITE) == 0)
 2744                                 pbits &= ~(PG_RW | PG_M);
 2745                         if ((prot & VM_PROT_EXECUTE) == 0)
 2746                                 pbits |= pg_nx;
 2747 
 2748                         if (pbits != obits) {
 2749                                 if (!atomic_cmpset_long(pte, obits, pbits))
 2750                                         goto retry;
 2751                                 if (obits & PG_G)
 2752                                         pmap_invalidate_page(pmap, sva);
 2753                                 else
 2754                                         anychanged = 1;
 2755                         }
 2756                 }
 2757         }
 2758         if (anychanged)
 2759                 pmap_invalidate_all(pmap);
 2760         vm_page_unlock_queues();
 2761         PMAP_UNLOCK(pmap);
 2762 }
 2763 
 2764 /*
 2765  * Tries to promote the 512, contiguous 4KB page mappings that are within a
 2766  * single page table page (PTP) to a single 2MB page mapping.  For promotion
 2767  * to occur, two conditions must be met: (1) the 4KB page mappings must map
 2768  * aligned, contiguous physical memory and (2) the 4KB page mappings must have
 2769  * identical characteristics. 
 2770  */
 2771 static void
 2772 pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
 2773 {
 2774         pd_entry_t newpde;
 2775         pt_entry_t *firstpte, oldpte, pa, *pte;
 2776         vm_offset_t oldpteva;
 2777         vm_page_t mpte;
 2778 
 2779         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2780 
 2781         /*
 2782          * Examine the first PTE in the specified PTP.  Abort if this PTE is
 2783          * either invalid, unused, or does not map the first 4KB physical page
 2784          * within a 2MB page. 
 2785          */
 2786         firstpte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
 2787 setpde:
 2788         newpde = *firstpte;
 2789         if ((newpde & ((PG_FRAME & PDRMASK) | PG_A | PG_V)) != (PG_A | PG_V)) {
 2790                 pmap_pde_p_failures++;
 2791                 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#lx"
 2792                     " in pmap %p", va, pmap);
 2793                 return;
 2794         }
 2795         if ((newpde & (PG_M | PG_RW)) == PG_RW) {
 2796                 /*
 2797                  * When PG_M is already clear, PG_RW can be cleared without
 2798                  * a TLB invalidation.
 2799                  */
 2800                 if (!atomic_cmpset_long(firstpte, newpde, newpde & ~PG_RW))
 2801                         goto setpde;
 2802                 newpde &= ~PG_RW;
 2803         }
 2804 
 2805         /*
 2806          * Examine each of the other PTEs in the specified PTP.  Abort if this
 2807          * PTE maps an unexpected 4KB physical page or does not have identical
 2808          * characteristics to the first PTE.
 2809          */
 2810         pa = (newpde & (PG_PS_FRAME | PG_A | PG_V)) + NBPDR - PAGE_SIZE;
 2811         for (pte = firstpte + NPTEPG - 1; pte > firstpte; pte--) {
 2812 setpte:
 2813                 oldpte = *pte;
 2814                 if ((oldpte & (PG_FRAME | PG_A | PG_V)) != pa) {
 2815                         pmap_pde_p_failures++;
 2816                         CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#lx"
 2817                             " in pmap %p", va, pmap);
 2818                         return;
 2819                 }
 2820                 if ((oldpte & (PG_M | PG_RW)) == PG_RW) {
 2821                         /*
 2822                          * When PG_M is already clear, PG_RW can be cleared
 2823                          * without a TLB invalidation.
 2824                          */
 2825                         if (!atomic_cmpset_long(pte, oldpte, oldpte & ~PG_RW))
 2826                                 goto setpte;
 2827                         oldpte &= ~PG_RW;
 2828                         oldpteva = (oldpte & PG_FRAME & PDRMASK) |
 2829                             (va & ~PDRMASK);
 2830                         CTR2(KTR_PMAP, "pmap_promote_pde: protect for va %#lx"
 2831                             " in pmap %p", oldpteva, pmap);
 2832                 }
 2833                 if ((oldpte & PG_PTE_PROMOTE) != (newpde & PG_PTE_PROMOTE)) {
 2834                         pmap_pde_p_failures++;
 2835                         CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#lx"
 2836                             " in pmap %p", va, pmap);
 2837                         return;
 2838                 }
 2839                 pa -= PAGE_SIZE;
 2840         }
 2841 
 2842         /*
 2843          * Save the page table page in its current state until the PDE
 2844          * mapping the superpage is demoted by pmap_demote_pde() or
 2845          * destroyed by pmap_remove_pde(). 
 2846          */
 2847         mpte = PHYS_TO_VM_PAGE(*pde & PG_FRAME);
 2848         KASSERT(mpte >= vm_page_array &&
 2849             mpte < &vm_page_array[vm_page_array_size],
 2850             ("pmap_promote_pde: page table page is out of range"));
 2851         KASSERT(mpte->pindex == pmap_pde_pindex(va),
 2852             ("pmap_promote_pde: page table page's pindex is wrong"));
 2853         pmap_insert_pt_page(pmap, mpte);
 2854 
 2855         /*
 2856          * Promote the pv entries.
 2857          */
 2858         if ((newpde & PG_MANAGED) != 0)
 2859                 pmap_pv_promote_pde(pmap, va, newpde & PG_PS_FRAME);
 2860 
 2861         /*
 2862          * Propagate the PAT index to its proper position.
 2863          */
 2864         if ((newpde & PG_PTE_PAT) != 0)
 2865                 newpde ^= PG_PDE_PAT | PG_PTE_PAT;
 2866 
 2867         /*
 2868          * Map the superpage.
 2869          */
 2870         pde_store(pde, PG_PS | newpde);
 2871 
 2872         pmap_pde_promotions++;
 2873         CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#lx"
 2874             " in pmap %p", va, pmap);
 2875 }
 2876 
 2877 /*
 2878  *      Insert the given physical page (p) at
 2879  *      the specified virtual address (v) in the
 2880  *      target physical map with the protection requested.
 2881  *
 2882  *      If specified, the page will be wired down, meaning
 2883  *      that the related pte can not be reclaimed.
 2884  *
 2885  *      NB:  This is the only routine which MAY NOT lazy-evaluate
 2886  *      or lose information.  That is, this routine must actually
 2887  *      insert this page into the given map NOW.
 2888  */
 2889 void
 2890 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
 2891     vm_prot_t prot, boolean_t wired)
 2892 {
 2893         vm_paddr_t pa;
 2894         pd_entry_t *pde;
 2895         pt_entry_t *pte;
 2896         vm_paddr_t opa;
 2897         pt_entry_t origpte, newpte;
 2898         vm_page_t mpte, om;
 2899         boolean_t invlva;
 2900 
 2901         va = trunc_page(va);
 2902         KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
 2903         KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS,
 2904             ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%lx)", va));
 2905 
 2906         mpte = NULL;
 2907 
 2908         vm_page_lock_queues();
 2909         PMAP_LOCK(pmap);
 2910 
 2911         /*
 2912          * In the case that a page table page is not
 2913          * resident, we are creating it here.
 2914          */
 2915         if (va < VM_MAXUSER_ADDRESS) {
 2916                 mpte = pmap_allocpte(pmap, va, M_WAITOK);
 2917         }
 2918 
 2919         pde = pmap_pde(pmap, va);
 2920         if (pde != NULL && (*pde & PG_V) != 0) {
 2921                 if ((*pde & PG_PS) != 0)
 2922                         panic("pmap_enter: attempted pmap_enter on 2MB page");
 2923                 pte = pmap_pde_to_pte(pde, va);
 2924         } else
 2925                 panic("pmap_enter: invalid page directory va=%#lx", va);
 2926 
 2927         pa = VM_PAGE_TO_PHYS(m);
 2928         om = NULL;
 2929         origpte = *pte;
 2930         opa = origpte & PG_FRAME;
 2931 
 2932         /*
 2933          * Mapping has not changed, must be protection or wiring change.
 2934          */
 2935         if (origpte && (opa == pa)) {
 2936                 /*
 2937                  * Wiring change, just update stats. We don't worry about
 2938                  * wiring PT pages as they remain resident as long as there
 2939                  * are valid mappings in them. Hence, if a user page is wired,
 2940                  * the PT page will be also.
 2941                  */
 2942                 if (wired && ((origpte & PG_W) == 0))
 2943                         pmap->pm_stats.wired_count++;
 2944                 else if (!wired && (origpte & PG_W))
 2945                         pmap->pm_stats.wired_count--;
 2946 
 2947                 /*
 2948                  * Remove extra pte reference
 2949                  */
 2950                 if (mpte)
 2951                         mpte->wire_count--;
 2952 
 2953                 /*
 2954                  * We might be turning off write access to the page,
 2955                  * so we go ahead and sense modify status.
 2956                  */
 2957                 if (origpte & PG_MANAGED) {
 2958                         om = m;
 2959                         pa |= PG_MANAGED;
 2960                 }
 2961                 goto validate;
 2962         } 
 2963         /*
 2964          * Mapping has changed, invalidate old range and fall through to
 2965          * handle validating new mapping.
 2966          */
 2967         if (opa) {
 2968                 if (origpte & PG_W)
 2969                         pmap->pm_stats.wired_count--;
 2970                 if (origpte & PG_MANAGED) {
 2971                         om = PHYS_TO_VM_PAGE(opa);
 2972                         pmap_remove_entry(pmap, om, va);
 2973                 }
 2974                 if (mpte != NULL) {
 2975                         mpte->wire_count--;
 2976                         KASSERT(mpte->wire_count > 0,
 2977                             ("pmap_enter: missing reference to page table page,"
 2978                              " va: 0x%lx", va));
 2979                 }
 2980         } else
 2981                 pmap->pm_stats.resident_count++;
 2982 
 2983         /*
 2984          * Enter on the PV list if part of our managed memory.
 2985          */
 2986         if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
 2987                 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
 2988                     ("pmap_enter: managed mapping within the clean submap"));
 2989                 pmap_insert_entry(pmap, va, m);
 2990                 pa |= PG_MANAGED;
 2991         }
 2992 
 2993         /*
 2994          * Increment counters
 2995          */
 2996         if (wired)
 2997                 pmap->pm_stats.wired_count++;
 2998 
 2999 validate:
 3000         /*
 3001          * Now validate mapping with desired protection/wiring.
 3002          */
 3003         newpte = (pt_entry_t)(pa | PG_V);
 3004         if ((prot & VM_PROT_WRITE) != 0) {
 3005                 newpte |= PG_RW;
 3006                 vm_page_flag_set(m, PG_WRITEABLE);
 3007         }
 3008         if ((prot & VM_PROT_EXECUTE) == 0)
 3009                 newpte |= pg_nx;
 3010         if (wired)
 3011                 newpte |= PG_W;
 3012         if (va < VM_MAXUSER_ADDRESS)
 3013                 newpte |= PG_U;
 3014         if (pmap == kernel_pmap)
 3015                 newpte |= PG_G;
 3016 
 3017         /*
 3018          * if the mapping or permission bits are different, we need
 3019          * to update the pte.
 3020          */
 3021         if ((origpte & ~(PG_M|PG_A)) != newpte) {
 3022                 newpte |= PG_A;
 3023                 if ((access & VM_PROT_WRITE) != 0)
 3024                         newpte |= PG_M;
 3025                 if (origpte & PG_V) {
 3026                         invlva = FALSE;
 3027                         origpte = pte_load_store(pte, newpte);
 3028                         if (origpte & PG_A) {
 3029                                 if (origpte & PG_MANAGED)
 3030                                         vm_page_flag_set(om, PG_REFERENCED);
 3031                                 if (opa != VM_PAGE_TO_PHYS(m) || ((origpte &
 3032                                     PG_NX) == 0 && (newpte & PG_NX)))
 3033                                         invlva = TRUE;
 3034                         }
 3035                         if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
 3036                                 if ((origpte & PG_MANAGED) != 0)
 3037                                         vm_page_dirty(om);
 3038                                 if ((newpte & PG_RW) == 0)
 3039                                         invlva = TRUE;
 3040                         }
 3041                         if (invlva)
 3042                                 pmap_invalidate_page(pmap, va);
 3043                 } else
 3044                         pte_store(pte, newpte);
 3045         }
 3046 
 3047         /*
 3048          * If both the page table page and the reservation are fully
 3049          * populated, then attempt promotion.
 3050          */
 3051         if ((mpte == NULL || mpte->wire_count == NPTEPG) &&
 3052             pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0)
 3053                 pmap_promote_pde(pmap, pde, va);
 3054 
 3055         vm_page_unlock_queues();
 3056         PMAP_UNLOCK(pmap);
 3057 }
 3058 
 3059 /*
 3060  * Tries to create a 2MB page mapping.  Returns TRUE if successful and FALSE
 3061  * otherwise.  Fails if (1) a page table page cannot be allocated without
 3062  * blocking, (2) a mapping already exists at the specified virtual address, or
 3063  * (3) a pv entry cannot be allocated without reclaiming another pv entry. 
 3064  */
 3065 static boolean_t
 3066 pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
 3067 {
 3068         pd_entry_t *pde, newpde;
 3069         vm_page_t free, mpde;
 3070 
 3071         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3072         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 3073         if ((mpde = pmap_allocpde(pmap, va, M_NOWAIT)) == NULL) {
 3074                 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
 3075                     " in pmap %p", va, pmap);
 3076                 return (FALSE);
 3077         }
 3078         pde = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpde));
 3079         pde = &pde[pmap_pde_index(va)];
 3080         if ((*pde & PG_V) != 0) {
 3081                 KASSERT(mpde->wire_count > 1,
 3082                     ("pmap_enter_pde: mpde's wire count is too low"));
 3083                 mpde->wire_count--;
 3084                 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
 3085                     " in pmap %p", va, pmap);
 3086                 return (FALSE);
 3087         }
 3088         newpde = VM_PAGE_TO_PHYS(m) | PG_PS | PG_V;
 3089         if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
 3090                 newpde |= PG_MANAGED;
 3091 
 3092                 /*
 3093                  * Abort this mapping if its PV entry could not be created.
 3094                  */
 3095                 if (!pmap_pv_insert_pde(pmap, va, VM_PAGE_TO_PHYS(m))) {
 3096                         free = NULL;
 3097                         if (pmap_unwire_pte_hold(pmap, va, mpde, &free)) {
 3098                                 pmap_invalidate_page(pmap, va);
 3099                                 pmap_free_zero_pages(free);
 3100                         }
 3101                         CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
 3102                             " in pmap %p", va, pmap);
 3103                         return (FALSE);
 3104                 }
 3105         }
 3106         if ((prot & VM_PROT_EXECUTE) == 0)
 3107                 newpde |= pg_nx;
 3108         if (va < VM_MAXUSER_ADDRESS)
 3109                 newpde |= PG_U;
 3110 
 3111         /*
 3112          * Increment counters.
 3113          */
 3114         pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
 3115 
 3116         /*
 3117          * Map the superpage.
 3118          */
 3119         pde_store(pde, newpde);
 3120 
 3121         pmap_pde_mappings++;
 3122         CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx"
 3123             " in pmap %p", va, pmap);
 3124         return (TRUE);
 3125 }
 3126 
 3127 /*
 3128  * Maps a sequence of resident pages belonging to the same object.
 3129  * The sequence begins with the given page m_start.  This page is
 3130  * mapped at the given virtual address start.  Each subsequent page is
 3131  * mapped at a virtual address that is offset from start by the same
 3132  * amount as the page is offset from m_start within the object.  The
 3133  * last page in the sequence is the page with the largest offset from
 3134  * m_start that can be mapped at a virtual address less than the given
 3135  * virtual address end.  Not every virtual page between start and end
 3136  * is mapped; only those for which a resident page exists with the
 3137  * corresponding offset from m_start are mapped.
 3138  */
 3139 void
 3140 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
 3141     vm_page_t m_start, vm_prot_t prot)
 3142 {
 3143         vm_offset_t va;
 3144         vm_page_t m, mpte;
 3145         vm_pindex_t diff, psize;
 3146 
 3147         VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
 3148         psize = atop(end - start);
 3149         mpte = NULL;
 3150         m = m_start;
 3151         PMAP_LOCK(pmap);
 3152         while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
 3153                 va = start + ptoa(diff);
 3154                 if ((va & PDRMASK) == 0 && va + NBPDR <= end &&
 3155                     (VM_PAGE_TO_PHYS(m) & PDRMASK) == 0 &&
 3156                     pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0 &&
 3157                     pmap_enter_pde(pmap, va, m, prot))
 3158                         m = &m[NBPDR / PAGE_SIZE - 1];
 3159                 else
 3160                         mpte = pmap_enter_quick_locked(pmap, va, m, prot,
 3161                             mpte);
 3162                 m = TAILQ_NEXT(m, listq);
 3163         }
 3164         PMAP_UNLOCK(pmap);
 3165 }
 3166 
 3167 /*
 3168  * this code makes some *MAJOR* assumptions:
 3169  * 1. Current pmap & pmap exists.
 3170  * 2. Not wired.
 3171  * 3. Read access.
 3172  * 4. No page table pages.
 3173  * but is *MUCH* faster than pmap_enter...
 3174  */
 3175 
 3176 void
 3177 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
 3178 {
 3179 
 3180         PMAP_LOCK(pmap);
 3181         (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL);
 3182         PMAP_UNLOCK(pmap);
 3183 }
 3184 
 3185 static vm_page_t
 3186 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
 3187     vm_prot_t prot, vm_page_t mpte)
 3188 {
 3189         vm_page_t free;
 3190         pt_entry_t *pte;
 3191         vm_paddr_t pa;
 3192 
 3193         KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
 3194             (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
 3195             ("pmap_enter_quick_locked: managed mapping within the clean submap"));
 3196         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3197         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 3198 
 3199         /*
 3200          * In the case that a page table page is not
 3201          * resident, we are creating it here.
 3202          */
 3203         if (va < VM_MAXUSER_ADDRESS) {
 3204                 vm_pindex_t ptepindex;
 3205                 pd_entry_t *ptepa;
 3206 
 3207                 /*
 3208                  * Calculate pagetable page index
 3209                  */
 3210                 ptepindex = pmap_pde_pindex(va);
 3211                 if (mpte && (mpte->pindex == ptepindex)) {
 3212                         mpte->wire_count++;
 3213                 } else {
 3214                         /*
 3215                          * Get the page directory entry
 3216                          */
 3217                         ptepa = pmap_pde(pmap, va);
 3218 
 3219                         /*
 3220                          * If the page table page is mapped, we just increment
 3221                          * the hold count, and activate it.
 3222                          */
 3223                         if (ptepa && (*ptepa & PG_V) != 0) {
 3224                                 if (*ptepa & PG_PS)
 3225                                         return (NULL);
 3226                                 mpte = PHYS_TO_VM_PAGE(*ptepa & PG_FRAME);
 3227                                 mpte->wire_count++;
 3228                         } else {
 3229                                 mpte = _pmap_allocpte(pmap, ptepindex,
 3230                                     M_NOWAIT);
 3231                                 if (mpte == NULL)
 3232                                         return (mpte);
 3233                         }
 3234                 }
 3235         } else {
 3236                 mpte = NULL;
 3237         }
 3238 
 3239         /*
 3240          * This call to vtopte makes the assumption that we are
 3241          * entering the page into the current pmap.  In order to support
 3242          * quick entry into any pmap, one would likely use pmap_pte.
 3243          * But that isn't as quick as vtopte.
 3244          */
 3245         pte = vtopte(va);
 3246         if (*pte) {
 3247                 if (mpte != NULL) {
 3248                         mpte->wire_count--;
 3249                         mpte = NULL;
 3250                 }
 3251                 return (mpte);
 3252         }
 3253 
 3254         /*
 3255          * Enter on the PV list if part of our managed memory.
 3256          */
 3257         if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
 3258             !pmap_try_insert_pv_entry(pmap, va, m)) {
 3259                 if (mpte != NULL) {
 3260                         free = NULL;
 3261                         if (pmap_unwire_pte_hold(pmap, va, mpte, &free)) {
 3262                                 pmap_invalidate_page(pmap, va);
 3263                                 pmap_free_zero_pages(free);
 3264                         }
 3265                         mpte = NULL;
 3266                 }
 3267                 return (mpte);
 3268         }
 3269 
 3270         /*
 3271          * Increment counters
 3272          */
 3273         pmap->pm_stats.resident_count++;
 3274 
 3275         pa = VM_PAGE_TO_PHYS(m);
 3276         if ((prot & VM_PROT_EXECUTE) == 0)
 3277                 pa |= pg_nx;
 3278 
 3279         /*
 3280          * Now validate mapping with RO protection
 3281          */
 3282         if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
 3283                 pte_store(pte, pa | PG_V | PG_U);
 3284         else
 3285                 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
 3286         return mpte;
 3287 }
 3288 
 3289 /*
 3290  * Make a temporary mapping for a physical address.  This is only intended
 3291  * to be used for panic dumps.
 3292  */
 3293 void *
 3294 pmap_kenter_temporary(vm_paddr_t pa, int i)
 3295 {
 3296         vm_offset_t va;
 3297 
 3298         va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
 3299         pmap_kenter(va, pa);
 3300         invlpg(va);
 3301         return ((void *)crashdumpmap);
 3302 }
 3303 
 3304 /*
 3305  * This code maps large physical mmap regions into the
 3306  * processor address space.  Note that some shortcuts
 3307  * are taken, but the code works.
 3308  */
 3309 void
 3310 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
 3311     vm_pindex_t pindex, vm_size_t size)
 3312 {
 3313         vm_offset_t va;
 3314         vm_page_t p, pdpg;
 3315 
 3316         VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
 3317         KASSERT(object->type == OBJT_DEVICE,
 3318             ("pmap_object_init_pt: non-device object"));
 3319         if (((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) {
 3320                 vm_page_t m[1];
 3321                 pd_entry_t ptepa, *pde;
 3322 
 3323                 PMAP_LOCK(pmap);
 3324                 pde = pmap_pde(pmap, addr);
 3325                 if (pde != 0 && (*pde & PG_V) != 0)
 3326                         goto out;
 3327                 PMAP_UNLOCK(pmap);
 3328 retry:
 3329                 p = vm_page_lookup(object, pindex);
 3330                 if (p != NULL) {
 3331                         if (vm_page_sleep_if_busy(p, FALSE, "init4p"))
 3332                                 goto retry;
 3333                 } else {
 3334                         p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL);
 3335                         if (p == NULL)
 3336                                 return;
 3337                         m[0] = p;
 3338 
 3339                         if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) {
 3340                                 vm_page_lock_queues();
 3341                                 vm_page_free(p);
 3342                                 vm_page_unlock_queues();
 3343                                 return;
 3344                         }
 3345 
 3346                         p = vm_page_lookup(object, pindex);
 3347                         vm_page_wakeup(p);
 3348                 }
 3349 
 3350                 ptepa = VM_PAGE_TO_PHYS(p);
 3351                 if (ptepa & (NBPDR - 1))
 3352                         return;
 3353 
 3354                 p->valid = VM_PAGE_BITS_ALL;
 3355 
 3356                 PMAP_LOCK(pmap);
 3357                 for (va = addr; va < addr + size; va += NBPDR) {
 3358                         while ((pdpg =
 3359                             pmap_allocpde(pmap, va, M_NOWAIT)) == NULL) {
 3360                                 PMAP_UNLOCK(pmap);
 3361                                 vm_page_busy(p);
 3362                                 VM_OBJECT_UNLOCK(object);
 3363                                 VM_WAIT;
 3364                                 VM_OBJECT_LOCK(object);
 3365                                 vm_page_wakeup(p);
 3366                                 PMAP_LOCK(pmap);
 3367                         }
 3368                         pde = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pdpg));
 3369                         pde = &pde[pmap_pde_index(va)];
 3370                         if ((*pde & PG_V) == 0) {
 3371                                 pde_store(pde, ptepa | PG_PS | PG_M | PG_A |
 3372                                     PG_U | PG_RW | PG_V);
 3373                                 pmap->pm_stats.resident_count +=
 3374                                     NBPDR / PAGE_SIZE;
 3375                         } else {
 3376                                 pdpg->wire_count--;
 3377                                 KASSERT(pdpg->wire_count > 0,
 3378                                     ("pmap_object_init_pt: missing reference "
 3379                                      "to page directory page, va: 0x%lx", va));
 3380                         }
 3381                         ptepa += NBPDR;
 3382                 }
 3383                 pmap_invalidate_all(pmap);
 3384 out:
 3385                 PMAP_UNLOCK(pmap);
 3386         }
 3387 }
 3388 
 3389 /*
 3390  *      Routine:        pmap_change_wiring
 3391  *      Function:       Change the wiring attribute for a map/virtual-address
 3392  *                      pair.
 3393  *      In/out conditions:
 3394  *                      The mapping must already exist in the pmap.
 3395  */
 3396 void
 3397 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
 3398 {
 3399         pd_entry_t *pde;
 3400         pt_entry_t *pte;
 3401         boolean_t are_queues_locked;
 3402 
 3403         are_queues_locked = FALSE;
 3404 
 3405         /*
 3406          * Wiring is not a hardware characteristic so there is no need to
 3407          * invalidate TLB.
 3408          */
 3409 retry:
 3410         PMAP_LOCK(pmap);
 3411         pde = pmap_pde(pmap, va);
 3412         if ((*pde & PG_PS) != 0) {
 3413                 if (!wired != ((*pde & PG_W) == 0)) {
 3414                         if (!are_queues_locked) {
 3415                                 are_queues_locked = TRUE;
 3416                                 if (!mtx_trylock(&vm_page_queue_mtx)) {
 3417                                         PMAP_UNLOCK(pmap);
 3418                                         vm_page_lock_queues();
 3419                                         goto retry;
 3420                                 }
 3421                         }
 3422                         if (!pmap_demote_pde(pmap, pde, va))
 3423                                 panic("pmap_change_wiring: demotion failed");
 3424                 } else
 3425                         goto out;
 3426         }
 3427         pte = pmap_pde_to_pte(pde, va);
 3428         if (wired && (*pte & PG_W) == 0) {
 3429                 pmap->pm_stats.wired_count++;
 3430                 atomic_set_long(pte, PG_W);
 3431         } else if (!wired && (*pte & PG_W) != 0) {
 3432                 pmap->pm_stats.wired_count--;
 3433                 atomic_clear_long(pte, PG_W);
 3434         }
 3435 out:
 3436         if (are_queues_locked)
 3437                 vm_page_unlock_queues();
 3438         PMAP_UNLOCK(pmap);
 3439 }
 3440 
 3441 
 3442 
 3443 /*
 3444  *      Copy the range specified by src_addr/len
 3445  *      from the source map to the range dst_addr/len
 3446  *      in the destination map.
 3447  *
 3448  *      This routine is only advisory and need not do anything.
 3449  */
 3450 
 3451 void
 3452 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
 3453     vm_offset_t src_addr)
 3454 {
 3455         vm_page_t   free;
 3456         vm_offset_t addr;
 3457         vm_offset_t end_addr = src_addr + len;
 3458         vm_offset_t va_next;
 3459 
 3460         if (dst_addr != src_addr)
 3461                 return;
 3462 
 3463         if (!pmap_is_current(src_pmap))
 3464                 return;
 3465 
 3466         vm_page_lock_queues();
 3467         if (dst_pmap < src_pmap) {
 3468                 PMAP_LOCK(dst_pmap);
 3469                 PMAP_LOCK(src_pmap);
 3470         } else {
 3471                 PMAP_LOCK(src_pmap);
 3472                 PMAP_LOCK(dst_pmap);
 3473         }
 3474         for (addr = src_addr; addr < end_addr; addr = va_next) {
 3475                 pt_entry_t *src_pte, *dst_pte;
 3476                 vm_page_t dstmpde, dstmpte, srcmpte;
 3477                 pml4_entry_t *pml4e;
 3478                 pdp_entry_t *pdpe;
 3479                 pd_entry_t srcptepaddr, *pde;
 3480 
 3481                 KASSERT(addr < UPT_MIN_ADDRESS,
 3482                     ("pmap_copy: invalid to pmap_copy page tables"));
 3483 
 3484                 pml4e = pmap_pml4e(src_pmap, addr);
 3485                 if ((*pml4e & PG_V) == 0) {
 3486                         va_next = (addr + NBPML4) & ~PML4MASK;
 3487                         if (va_next < addr)
 3488                                 va_next = end_addr;
 3489                         continue;
 3490                 }
 3491 
 3492                 pdpe = pmap_pml4e_to_pdpe(pml4e, addr);
 3493                 if ((*pdpe & PG_V) == 0) {
 3494                         va_next = (addr + NBPDP) & ~PDPMASK;
 3495                         if (va_next < addr)
 3496                                 va_next = end_addr;
 3497                         continue;
 3498                 }
 3499 
 3500                 va_next = (addr + NBPDR) & ~PDRMASK;
 3501                 if (va_next < addr)
 3502                         va_next = end_addr;
 3503 
 3504                 pde = pmap_pdpe_to_pde(pdpe, addr);
 3505                 srcptepaddr = *pde;
 3506                 if (srcptepaddr == 0)
 3507                         continue;
 3508                         
 3509                 if (srcptepaddr & PG_PS) {
 3510                         dstmpde = pmap_allocpde(dst_pmap, addr, M_NOWAIT);
 3511                         if (dstmpde == NULL)
 3512                                 break;
 3513                         pde = (pd_entry_t *)
 3514                             PHYS_TO_DMAP(VM_PAGE_TO_PHYS(dstmpde));
 3515                         pde = &pde[pmap_pde_index(addr)];
 3516                         if (*pde == 0 && ((srcptepaddr & PG_MANAGED) == 0 ||
 3517                             pmap_pv_insert_pde(dst_pmap, addr, srcptepaddr &
 3518                             PG_PS_FRAME))) {
 3519                                 *pde = srcptepaddr & ~PG_W;
 3520                                 dst_pmap->pm_stats.resident_count +=
 3521                                     NBPDR / PAGE_SIZE;
 3522                         } else
 3523                                 dstmpde->wire_count--;
 3524                         continue;
 3525                 }
 3526 
 3527                 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
 3528                 KASSERT(srcmpte->wire_count > 0,
 3529                     ("pmap_copy: source page table page is unused"));
 3530 
 3531                 if (va_next > end_addr)
 3532                         va_next = end_addr;
 3533 
 3534                 src_pte = vtopte(addr);
 3535                 while (addr < va_next) {
 3536                         pt_entry_t ptetemp;
 3537                         ptetemp = *src_pte;
 3538                         /*
 3539                          * we only virtual copy managed pages
 3540                          */
 3541                         if ((ptetemp & PG_MANAGED) != 0) {
 3542                                 dstmpte = pmap_allocpte(dst_pmap, addr,
 3543                                     M_NOWAIT);
 3544                                 if (dstmpte == NULL)
 3545                                         break;
 3546                                 dst_pte = (pt_entry_t *)
 3547                                     PHYS_TO_DMAP(VM_PAGE_TO_PHYS(dstmpte));
 3548                                 dst_pte = &dst_pte[pmap_pte_index(addr)];
 3549                                 if (*dst_pte == 0 &&
 3550                                     pmap_try_insert_pv_entry(dst_pmap, addr,
 3551                                     PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) {
 3552                                         /*
 3553                                          * Clear the wired, modified, and
 3554                                          * accessed (referenced) bits
 3555                                          * during the copy.
 3556                                          */
 3557                                         *dst_pte = ptetemp & ~(PG_W | PG_M |
 3558                                             PG_A);
 3559                                         dst_pmap->pm_stats.resident_count++;
 3560                                 } else {
 3561                                         free = NULL;
 3562                                         if (pmap_unwire_pte_hold(dst_pmap,
 3563                                             addr, dstmpte, &free)) {
 3564                                                 pmap_invalidate_page(dst_pmap,
 3565                                                     addr);
 3566                                                 pmap_free_zero_pages(free);
 3567                                         }
 3568                                 }
 3569                                 if (dstmpte->wire_count >= srcmpte->wire_count)
 3570                                         break;
 3571                         }
 3572                         addr += PAGE_SIZE;
 3573                         src_pte++;
 3574                 }
 3575         }
 3576         vm_page_unlock_queues();
 3577         PMAP_UNLOCK(src_pmap);
 3578         PMAP_UNLOCK(dst_pmap);
 3579 }       
 3580 
 3581 /*
 3582  *      pmap_zero_page zeros the specified hardware page by mapping 
 3583  *      the page into KVM and using bzero to clear its contents.
 3584  */
 3585 void
 3586 pmap_zero_page(vm_page_t m)
 3587 {
 3588         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
 3589 
 3590         pagezero((void *)va);
 3591 }
 3592 
 3593 /*
 3594  *      pmap_zero_page_area zeros the specified hardware page by mapping 
 3595  *      the page into KVM and using bzero to clear its contents.
 3596  *
 3597  *      off and size may not cover an area beyond a single hardware page.
 3598  */
 3599 void
 3600 pmap_zero_page_area(vm_page_t m, int off, int size)
 3601 {
 3602         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
 3603 
 3604         if (off == 0 && size == PAGE_SIZE)
 3605                 pagezero((void *)va);
 3606         else
 3607                 bzero((char *)va + off, size);
 3608 }
 3609 
 3610 /*
 3611  *      pmap_zero_page_idle zeros the specified hardware page by mapping 
 3612  *      the page into KVM and using bzero to clear its contents.  This
 3613  *      is intended to be called from the vm_pagezero process only and
 3614  *      outside of Giant.
 3615  */
 3616 void
 3617 pmap_zero_page_idle(vm_page_t m)
 3618 {
 3619         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
 3620 
 3621         pagezero((void *)va);
 3622 }
 3623 
 3624 /*
 3625  *      pmap_copy_page copies the specified (machine independent)
 3626  *      page by mapping the page into virtual memory and using
 3627  *      bcopy to copy the page, one machine dependent page at a
 3628  *      time.
 3629  */
 3630 void
 3631 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
 3632 {
 3633         vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
 3634         vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
 3635 
 3636         pagecopy((void *)src, (void *)dst);
 3637 }
 3638 
 3639 /*
 3640  * Returns true if the pmap's pv is one of the first
 3641  * 16 pvs linked to from this page.  This count may
 3642  * be changed upwards or downwards in the future; it
 3643  * is only necessary that true be returned for a small
 3644  * subset of pmaps for proper page aging.
 3645  */
 3646 boolean_t
 3647 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
 3648 {
 3649         struct md_page *pvh;
 3650         pv_entry_t pv;
 3651         int loops = 0;
 3652 
 3653         if (m->flags & PG_FICTITIOUS)
 3654                 return FALSE;
 3655 
 3656         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3657         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 3658                 if (PV_PMAP(pv) == pmap) {
 3659                         return TRUE;
 3660                 }
 3661                 loops++;
 3662                 if (loops >= 16)
 3663                         break;
 3664         }
 3665         if (loops < 16) {
 3666                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 3667                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
 3668                         if (PV_PMAP(pv) == pmap)
 3669                                 return (TRUE);
 3670                         loops++;
 3671                         if (loops >= 16)
 3672                                 break;
 3673                 }
 3674         }
 3675         return (FALSE);
 3676 }
 3677 
 3678 /*
 3679  * Returns TRUE if the given page is mapped individually or as part of
 3680  * a 2mpage.  Otherwise, returns FALSE.
 3681  */
 3682 boolean_t
 3683 pmap_page_is_mapped(vm_page_t m)
 3684 {
 3685         struct md_page *pvh;
 3686 
 3687         if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
 3688                 return (FALSE);
 3689         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3690         if (TAILQ_EMPTY(&m->md.pv_list)) {
 3691                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 3692                 return (!TAILQ_EMPTY(&pvh->pv_list));
 3693         } else
 3694                 return (TRUE);
 3695 }
 3696 
 3697 /*
 3698  * Remove all pages from specified address space
 3699  * this aids process exit speeds.  Also, this code
 3700  * is special cased for current process only, but
 3701  * can have the more generic (and slightly slower)
 3702  * mode enabled.  This is much faster than pmap_remove
 3703  * in the case of running down an entire address space.
 3704  */
 3705 void
 3706 pmap_remove_pages(pmap_t pmap)
 3707 {
 3708         pd_entry_t *pde;
 3709         pt_entry_t *pte, tpte;
 3710         vm_page_t free = NULL;
 3711         vm_page_t m, mpte, mt;
 3712         pv_entry_t pv;
 3713         struct md_page *pvh;
 3714         struct pv_chunk *pc, *npc;
 3715         int field, idx;
 3716         int64_t bit;
 3717         uint64_t inuse, bitmask;
 3718         int allfree;
 3719 
 3720         if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
 3721                 printf("warning: pmap_remove_pages called with non-current pmap\n");
 3722                 return;
 3723         }
 3724         vm_page_lock_queues();
 3725         PMAP_LOCK(pmap);
 3726         TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
 3727                 allfree = 1;
 3728                 for (field = 0; field < _NPCM; field++) {
 3729                         inuse = (~(pc->pc_map[field])) & pc_freemask[field];
 3730                         while (inuse != 0) {
 3731                                 bit = bsfq(inuse);
 3732                                 bitmask = 1UL << bit;
 3733                                 idx = field * 64 + bit;
 3734                                 pv = &pc->pc_pventry[idx];
 3735                                 inuse &= ~bitmask;
 3736 
 3737                                 pde = vtopde(pv->pv_va);
 3738                                 tpte = *pde;
 3739                                 if ((tpte & PG_PS) != 0)
 3740                                         pte = pde;
 3741                                 else {
 3742                                         pte = vtopte(pv->pv_va);
 3743                                         tpte = *pte & ~PG_PTE_PAT;
 3744                                 }
 3745 
 3746                                 if (tpte == 0) {
 3747                                         printf(
 3748                                             "TPTE at %p  IS ZERO @ VA %08lx\n",
 3749                                             pte, pv->pv_va);
 3750                                         panic("bad pte");
 3751                                 }
 3752 
 3753 /*
 3754  * We cannot remove wired pages from a process' mapping at this time
 3755  */
 3756                                 if (tpte & PG_W) {
 3757                                         allfree = 0;
 3758                                         continue;
 3759                                 }
 3760 
 3761                                 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
 3762                                 KASSERT(m->phys_addr == (tpte & PG_FRAME),
 3763                                     ("vm_page_t %p phys_addr mismatch %016jx %016jx",
 3764                                     m, (uintmax_t)m->phys_addr,
 3765                                     (uintmax_t)tpte));
 3766 
 3767                                 KASSERT(m < &vm_page_array[vm_page_array_size],
 3768                                         ("pmap_remove_pages: bad tpte %#jx",
 3769                                         (uintmax_t)tpte));
 3770 
 3771                                 pte_clear(pte);
 3772 
 3773                                 /*
 3774                                  * Update the vm_page_t clean/reference bits.
 3775                                  */
 3776                                 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
 3777                                         if ((tpte & PG_PS) != 0) {
 3778                                                 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
 3779                                                         vm_page_dirty(mt);
 3780                                         } else
 3781                                                 vm_page_dirty(m);
 3782                                 }
 3783 
 3784                                 /* Mark free */
 3785                                 PV_STAT(pv_entry_frees++);
 3786                                 PV_STAT(pv_entry_spare++);
 3787                                 pv_entry_count--;
 3788                                 pc->pc_map[field] |= bitmask;
 3789                                 if ((tpte & PG_PS) != 0) {
 3790                                         pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
 3791                                         pvh = pa_to_pvh(tpte & PG_PS_FRAME);
 3792                                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
 3793                                         if (TAILQ_EMPTY(&pvh->pv_list)) {
 3794                                                 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
 3795                                                         if (TAILQ_EMPTY(&mt->md.pv_list))
 3796                                                                 vm_page_flag_clear(mt, PG_WRITEABLE);
 3797                                         }
 3798                                         mpte = pmap_lookup_pt_page(pmap, pv->pv_va);
 3799                                         if (mpte != NULL) {
 3800                                                 pmap_remove_pt_page(pmap, mpte);
 3801                                                 pmap->pm_stats.resident_count--;
 3802                                                 KASSERT(mpte->wire_count == NPTEPG,
 3803                                                     ("pmap_remove_pages: pte page wire count error"));
 3804                                                 mpte->wire_count = 0;
 3805                                                 pmap_add_delayed_free_list(mpte, &free, FALSE);
 3806                                                 atomic_subtract_int(&cnt.v_wire_count, 1);
 3807                                         }
 3808                                         pmap_unuse_pt(pmap, pv->pv_va,
 3809                                             *pmap_pdpe(pmap, pv->pv_va), &free);
 3810                                 } else {
 3811                                         pmap->pm_stats.resident_count--;
 3812                                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 3813                                         if (TAILQ_EMPTY(&m->md.pv_list)) {
 3814                                                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 3815                                                 if (TAILQ_EMPTY(&pvh->pv_list))
 3816                                                         vm_page_flag_clear(m, PG_WRITEABLE);
 3817                                         }
 3818                                         pmap_unuse_pt(pmap, pv->pv_va, *pde, &free);
 3819                                 }
 3820                         }
 3821                 }
 3822                 if (allfree) {
 3823                         PV_STAT(pv_entry_spare -= _NPCPV);
 3824                         PV_STAT(pc_chunk_count--);
 3825                         PV_STAT(pc_chunk_frees++);
 3826                         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
 3827                         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
 3828                         dump_drop_page(m->phys_addr);
 3829                         vm_page_unwire(m, 0);
 3830                         vm_page_free(m);
 3831                 }
 3832         }
 3833         pmap_invalidate_all(pmap);
 3834         vm_page_unlock_queues();
 3835         PMAP_UNLOCK(pmap);
 3836         pmap_free_zero_pages(free);
 3837 }
 3838 
 3839 /*
 3840  *      pmap_is_modified:
 3841  *
 3842  *      Return whether or not the specified physical page was modified
 3843  *      in any physical maps.
 3844  */
 3845 boolean_t
 3846 pmap_is_modified(vm_page_t m)
 3847 {
 3848 
 3849         if (m->flags & PG_FICTITIOUS)
 3850                 return (FALSE);
 3851         if (pmap_is_modified_pvh(&m->md))
 3852                 return (TRUE);
 3853         return (pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
 3854 }
 3855 
 3856 /*
 3857  * Returns TRUE if any of the given mappings were used to modify
 3858  * physical memory.  Otherwise, returns FALSE.  Both page and 2mpage
 3859  * mappings are supported.
 3860  */
 3861 static boolean_t
 3862 pmap_is_modified_pvh(struct md_page *pvh)
 3863 {
 3864         pv_entry_t pv;
 3865         pt_entry_t *pte;
 3866         pmap_t pmap;
 3867         boolean_t rv;
 3868 
 3869         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3870         rv = FALSE;
 3871         TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
 3872                 pmap = PV_PMAP(pv);
 3873                 PMAP_LOCK(pmap);
 3874                 pte = pmap_pte(pmap, pv->pv_va);
 3875                 rv = (*pte & (PG_M | PG_RW)) == (PG_M | PG_RW);
 3876                 PMAP_UNLOCK(pmap);
 3877                 if (rv)
 3878                         break;
 3879         }
 3880         return (rv);
 3881 }
 3882 
 3883 /*
 3884  *      pmap_is_prefaultable:
 3885  *
 3886  *      Return whether or not the specified virtual address is elgible
 3887  *      for prefault.
 3888  */
 3889 boolean_t
 3890 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
 3891 {
 3892         pd_entry_t *pde;
 3893         pt_entry_t *pte;
 3894         boolean_t rv;
 3895 
 3896         rv = FALSE;
 3897         PMAP_LOCK(pmap);
 3898         pde = pmap_pde(pmap, addr);
 3899         if (pde != NULL && (*pde & (PG_PS | PG_V)) == PG_V) {
 3900                 pte = pmap_pde_to_pte(pde, addr);
 3901                 rv = (*pte & PG_V) == 0;
 3902         }
 3903         PMAP_UNLOCK(pmap);
 3904         return (rv);
 3905 }
 3906 
 3907 /*
 3908  * Clear the write and modified bits in each of the given page's mappings.
 3909  */
 3910 void
 3911 pmap_remove_write(vm_page_t m)
 3912 {
 3913         struct md_page *pvh;
 3914         pmap_t pmap;
 3915         pv_entry_t next_pv, pv;
 3916         pd_entry_t *pde;
 3917         pt_entry_t oldpte, *pte;
 3918         vm_offset_t va;
 3919 
 3920         if ((m->flags & PG_FICTITIOUS) != 0 ||
 3921             (m->flags & PG_WRITEABLE) == 0)
 3922                 return;
 3923         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3924         pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 3925         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
 3926                 va = pv->pv_va;
 3927                 pmap = PV_PMAP(pv);
 3928                 PMAP_LOCK(pmap);
 3929                 pde = pmap_pde(pmap, va);
 3930                 if ((*pde & PG_RW) != 0)
 3931                         (void)pmap_demote_pde(pmap, pde, va);
 3932                 PMAP_UNLOCK(pmap);
 3933         }
 3934         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 3935                 pmap = PV_PMAP(pv);
 3936                 PMAP_LOCK(pmap);
 3937                 pde = pmap_pde(pmap, pv->pv_va);
 3938                 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_write: found"
 3939                     " a 2mpage in page %p's pv list", m));
 3940                 pte = pmap_pde_to_pte(pde, pv->pv_va);
 3941 retry:
 3942                 oldpte = *pte;
 3943                 if (oldpte & PG_RW) {
 3944                         if (!atomic_cmpset_long(pte, oldpte, oldpte &
 3945                             ~(PG_RW | PG_M)))
 3946                                 goto retry;
 3947                         if ((oldpte & PG_M) != 0)
 3948                                 vm_page_dirty(m);
 3949                         pmap_invalidate_page(pmap, pv->pv_va);
 3950                 }
 3951                 PMAP_UNLOCK(pmap);
 3952         }
 3953         vm_page_flag_clear(m, PG_WRITEABLE);
 3954 }
 3955 
 3956 /*
 3957  *      pmap_ts_referenced:
 3958  *
 3959  *      Return a count of reference bits for a page, clearing those bits.
 3960  *      It is not necessary for every reference bit to be cleared, but it
 3961  *      is necessary that 0 only be returned when there are truly no
 3962  *      reference bits set.
 3963  *
 3964  *      XXX: The exact number of bits to check and clear is a matter that
 3965  *      should be tested and standardized at some point in the future for
 3966  *      optimal aging of shared pages.
 3967  */
 3968 int
 3969 pmap_ts_referenced(vm_page_t m)
 3970 {
 3971         struct md_page *pvh;
 3972         pv_entry_t pv, pvf, pvn;
 3973         pmap_t pmap;
 3974         pd_entry_t oldpde, *pde;
 3975         pt_entry_t *pte;
 3976         vm_offset_t va;
 3977         int rtval = 0;
 3978 
 3979         if (m->flags & PG_FICTITIOUS)
 3980                 return (rtval);
 3981         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3982         pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 3983         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, pvn) {
 3984                 va = pv->pv_va;
 3985                 pmap = PV_PMAP(pv);
 3986                 PMAP_LOCK(pmap);
 3987                 pde = pmap_pde(pmap, va);
 3988                 oldpde = *pde;
 3989                 if ((oldpde & PG_A) != 0) {
 3990                         if (pmap_demote_pde(pmap, pde, va)) {
 3991                                 if ((oldpde & PG_W) == 0) {
 3992                                         /*
 3993                                          * Remove the mapping to a single page
 3994                                          * so that a subsequent access may
 3995                                          * repromote.  Since the underlying
 3996                                          * page table page is fully populated,
 3997                                          * this removal never frees a page
 3998                                          * table page.
 3999                                          */
 4000                                         va += VM_PAGE_TO_PHYS(m) - (oldpde &
 4001                                             PG_PS_FRAME);
 4002                                         pmap_remove_page(pmap, va, pde, NULL);
 4003                                         rtval++;
 4004                                         if (rtval > 4) {
 4005                                                 PMAP_UNLOCK(pmap);
 4006                                                 return (rtval);
 4007                                         }
 4008                                 }
 4009                         }
 4010                 }
 4011                 PMAP_UNLOCK(pmap);
 4012         }
 4013         if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
 4014                 pvf = pv;
 4015                 do {
 4016                         pvn = TAILQ_NEXT(pv, pv_list);
 4017                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 4018                         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
 4019                         pmap = PV_PMAP(pv);
 4020                         PMAP_LOCK(pmap);
 4021                         pde = pmap_pde(pmap, pv->pv_va);
 4022                         KASSERT((*pde & PG_PS) == 0, ("pmap_ts_referenced:"
 4023                             " found a 2mpage in page %p's pv list", m));
 4024                         pte = pmap_pde_to_pte(pde, pv->pv_va);
 4025                         if ((*pte & PG_A) != 0) {
 4026                                 atomic_clear_long(pte, PG_A);
 4027                                 pmap_invalidate_page(pmap, pv->pv_va);
 4028                                 rtval++;
 4029                                 if (rtval > 4)
 4030                                         pvn = NULL;
 4031                         }
 4032                         PMAP_UNLOCK(pmap);
 4033                 } while ((pv = pvn) != NULL && pv != pvf);
 4034         }
 4035         return (rtval);
 4036 }
 4037 
 4038 /*
 4039  *      Clear the modify bits on the specified physical page.
 4040  */
 4041 void
 4042 pmap_clear_modify(vm_page_t m)
 4043 {
 4044         struct md_page *pvh;
 4045         pmap_t pmap;
 4046         pv_entry_t next_pv, pv;
 4047         pd_entry_t oldpde, *pde;
 4048         pt_entry_t oldpte, *pte;
 4049         vm_offset_t va;
 4050 
 4051         if ((m->flags & PG_FICTITIOUS) != 0)
 4052                 return;
 4053         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 4054         pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 4055         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
 4056                 va = pv->pv_va;
 4057                 pmap = PV_PMAP(pv);
 4058                 PMAP_LOCK(pmap);
 4059                 pde = pmap_pde(pmap, va);
 4060                 oldpde = *pde;
 4061                 if ((oldpde & PG_RW) != 0) {
 4062                         if (pmap_demote_pde(pmap, pde, va)) {
 4063                                 if ((oldpde & PG_W) == 0) {
 4064                                         /*
 4065                                          * Write protect the mapping to a
 4066                                          * single page so that a subsequent
 4067                                          * write access may repromote.
 4068                                          */
 4069                                         va += VM_PAGE_TO_PHYS(m) - (oldpde &
 4070                                             PG_PS_FRAME);
 4071                                         pte = pmap_pde_to_pte(pde, va);
 4072                                         oldpte = *pte;
 4073                                         if ((oldpte & PG_V) != 0) {
 4074                                                 while (!atomic_cmpset_long(pte,
 4075                                                     oldpte,
 4076                                                     oldpte & ~(PG_M | PG_RW)))
 4077                                                         oldpte = *pte;
 4078                                                 vm_page_dirty(m);
 4079                                                 pmap_invalidate_page(pmap, va);
 4080                                         }
 4081                                 }
 4082                         }
 4083                 }
 4084                 PMAP_UNLOCK(pmap);
 4085         }
 4086         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 4087                 pmap = PV_PMAP(pv);
 4088                 PMAP_LOCK(pmap);
 4089                 pde = pmap_pde(pmap, pv->pv_va);
 4090                 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_modify: found"
 4091                     " a 2mpage in page %p's pv list", m));
 4092                 pte = pmap_pde_to_pte(pde, pv->pv_va);
 4093                 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
 4094                         atomic_clear_long(pte, PG_M);
 4095                         pmap_invalidate_page(pmap, pv->pv_va);
 4096                 }
 4097                 PMAP_UNLOCK(pmap);
 4098         }
 4099 }
 4100 
 4101 /*
 4102  *      pmap_clear_reference:
 4103  *
 4104  *      Clear the reference bit on the specified physical page.
 4105  */
 4106 void
 4107 pmap_clear_reference(vm_page_t m)
 4108 {
 4109         struct md_page *pvh;
 4110         pmap_t pmap;
 4111         pv_entry_t next_pv, pv;
 4112         pd_entry_t oldpde, *pde;
 4113         pt_entry_t *pte;
 4114         vm_offset_t va;
 4115 
 4116         if ((m->flags & PG_FICTITIOUS) != 0)
 4117                 return;
 4118         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 4119         pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 4120         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
 4121                 va = pv->pv_va;
 4122                 pmap = PV_PMAP(pv);
 4123                 PMAP_LOCK(pmap);
 4124                 pde = pmap_pde(pmap, va);
 4125                 oldpde = *pde;
 4126                 if ((oldpde & PG_A) != 0) {
 4127                         if (pmap_demote_pde(pmap, pde, va)) {
 4128                                 /*
 4129                                  * Remove the mapping to a single page so
 4130                                  * that a subsequent access may repromote.
 4131                                  * Since the underlying page table page is
 4132                                  * fully populated, this removal never frees
 4133                                  * a page table page.
 4134                                  */
 4135                                 va += VM_PAGE_TO_PHYS(m) - (oldpde &
 4136                                     PG_PS_FRAME);
 4137                                 pmap_remove_page(pmap, va, pde, NULL);
 4138                         }
 4139                 }
 4140                 PMAP_UNLOCK(pmap);
 4141         }
 4142         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 4143                 pmap = PV_PMAP(pv);
 4144                 PMAP_LOCK(pmap);
 4145                 pde = pmap_pde(pmap, pv->pv_va);
 4146                 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_reference: found"
 4147                     " a 2mpage in page %p's pv list", m));
 4148                 pte = pmap_pde_to_pte(pde, pv->pv_va);
 4149                 if (*pte & PG_A) {
 4150                         atomic_clear_long(pte, PG_A);
 4151                         pmap_invalidate_page(pmap, pv->pv_va);
 4152                 }
 4153                 PMAP_UNLOCK(pmap);
 4154         }
 4155 }
 4156 
 4157 /*
 4158  * Miscellaneous support routines follow
 4159  */
 4160 
 4161 /* Adjust the cache mode for a 4KB page mapped via a PTE. */
 4162 static __inline void
 4163 pmap_pte_attr(vm_offset_t va, int mode)
 4164 {
 4165         pt_entry_t *pte;
 4166         u_int opte, npte;
 4167 
 4168         pte = vtopte(va);
 4169 
 4170         /*
 4171          * The cache mode bits are all in the low 32-bits of the
 4172          * PTE, so we can just spin on updating the low 32-bits.
 4173          */
 4174         do {
 4175                 opte = *(u_int *)pte;
 4176                 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT);
 4177                 npte |= pmap_cache_bits(mode, 0);
 4178         } while (npte != opte && !atomic_cmpset_int((u_int *)pte, opte, npte));
 4179 }
 4180 
 4181 /* Adjust the cache mode for a 2MB page mapped via a PDE. */
 4182 static __inline void
 4183 pmap_pde_attr(vm_offset_t va, int mode)
 4184 {
 4185         pd_entry_t *pde;
 4186         u_int opde, npde;
 4187 
 4188         pde = pmap_pde(kernel_pmap, va);
 4189 
 4190         /*
 4191          * The cache mode bits are all in the low 32-bits of the
 4192          * PDE, so we can just spin on updating the low 32-bits.
 4193          */
 4194         do {
 4195                 opde = *(u_int *)pde;
 4196                 npde = opde & ~(PG_PDE_PAT | PG_NC_PCD | PG_NC_PWT);
 4197                 npde |= pmap_cache_bits(mode, 1);
 4198         } while (npde != opde && !atomic_cmpset_int((u_int *)pde, opde, npde));
 4199 }
 4200 
 4201 /*
 4202  * Map a set of physical memory pages into the kernel virtual
 4203  * address space. Return a pointer to where it is mapped. This
 4204  * routine is intended to be used for mapping device memory,
 4205  * NOT real memory.
 4206  */
 4207 void *
 4208 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
 4209 {
 4210         vm_offset_t va, tmpva, offset;
 4211 
 4212         /*
 4213          * If this fits within the direct map window and use WB caching
 4214          * mode, use the direct map.
 4215          */
 4216         if (pa < dmaplimit && (pa + size) < dmaplimit && mode == PAT_WRITE_BACK)
 4217                 return ((void *)PHYS_TO_DMAP(pa));
 4218         offset = pa & PAGE_MASK;
 4219         size = roundup(offset + size, PAGE_SIZE);
 4220         va = kmem_alloc_nofault(kernel_map, size);
 4221         if (!va)
 4222                 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
 4223         pa = trunc_page(pa);
 4224         for (tmpva = va; size > 0; ) {
 4225                 pmap_kenter_attr(tmpva, pa, mode);
 4226                 size -= PAGE_SIZE;
 4227                 tmpva += PAGE_SIZE;
 4228                 pa += PAGE_SIZE;
 4229         }
 4230         pmap_invalidate_range(kernel_pmap, va, tmpva);
 4231         pmap_invalidate_cache();
 4232         return ((void *)(va + offset));
 4233 }
 4234 
 4235 void *
 4236 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
 4237 {
 4238 
 4239         return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
 4240 }
 4241 
 4242 void *
 4243 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
 4244 {
 4245 
 4246         return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
 4247 }
 4248 
 4249 void
 4250 pmap_unmapdev(vm_offset_t va, vm_size_t size)
 4251 {
 4252         vm_offset_t base, offset, tmpva;
 4253 
 4254         /* If we gave a direct map region in pmap_mapdev, do nothing */
 4255         if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS)
 4256                 return;
 4257         base = trunc_page(va);
 4258         offset = va & PAGE_MASK;
 4259         size = roundup(offset + size, PAGE_SIZE);
 4260         for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
 4261                 pmap_kremove(tmpva);
 4262         pmap_invalidate_range(kernel_pmap, va, tmpva);
 4263         kmem_free(kernel_map, base, size);
 4264 }
 4265 
 4266 int
 4267 pmap_change_attr(vm_offset_t va, vm_size_t size, int mode)
 4268 {
 4269         vm_offset_t base, offset, tmpva;
 4270         pd_entry_t *pde;
 4271         pt_entry_t *pte;
 4272 
 4273         base = trunc_page(va);
 4274         offset = va & PAGE_MASK;
 4275         size = roundup(offset + size, PAGE_SIZE);
 4276 
 4277         /* Only supported on kernel virtual addresses. */
 4278         if (base <= VM_MAXUSER_ADDRESS)
 4279                 return (EINVAL);
 4280 
 4281         /*
 4282          * XXX: We have to support tearing 2MB pages down into 4k pages if
 4283          * needed here.
 4284          */
 4285         /* Pages that aren't mapped aren't supported. */
 4286         for (tmpva = base; tmpva < (base + size); ) {
 4287                 pde = pmap_pde(kernel_pmap, tmpva);
 4288                 if (*pde == 0)
 4289                         return (EINVAL);
 4290                 if (*pde & PG_PS) {
 4291                         /* Handle 2MB pages that are completely contained. */
 4292                         if (size >= NBPDR) {
 4293                                 tmpva += NBPDR;
 4294                                 continue;
 4295                         }
 4296                         return (EINVAL);
 4297                 }
 4298                 pte = vtopte(va);
 4299                 if (*pte == 0)
 4300                         return (EINVAL);
 4301                 tmpva += PAGE_SIZE;
 4302         }
 4303 
 4304         /*
 4305          * Ok, all the pages exist, so run through them updating their
 4306          * cache mode.
 4307          */
 4308         for (tmpva = base; size > 0; ) {
 4309                 pde = pmap_pde(kernel_pmap, tmpva);
 4310                 if (*pde & PG_PS) {
 4311                         pmap_pde_attr(tmpva, mode);
 4312                         tmpva += NBPDR;
 4313                         size -= NBPDR;
 4314                 } else {
 4315                         pmap_pte_attr(tmpva, mode);
 4316                         tmpva += PAGE_SIZE;
 4317                         size -= PAGE_SIZE;
 4318                 }
 4319         }
 4320 
 4321         /*
 4322          * Flush CPU caches to make sure any data isn't cached that shouldn't
 4323          * be, etc.
 4324          */    
 4325         pmap_invalidate_range(kernel_pmap, base, tmpva);
 4326         pmap_invalidate_cache();
 4327         return (0);
 4328 }
 4329 
 4330 /*
 4331  * perform the pmap work for mincore
 4332  */
 4333 int
 4334 pmap_mincore(pmap_t pmap, vm_offset_t addr)
 4335 {
 4336         pd_entry_t *pdep;
 4337         pt_entry_t pte;
 4338         vm_paddr_t pa;
 4339         vm_page_t m;
 4340         int val = 0;
 4341         
 4342         PMAP_LOCK(pmap);
 4343         pdep = pmap_pde(pmap, addr);
 4344         if (pdep != NULL && (*pdep & PG_V)) {
 4345                 if (*pdep & PG_PS) {
 4346                         pte = *pdep;
 4347                         val = MINCORE_SUPER;
 4348                         /* Compute the physical address of the 4KB page. */
 4349                         pa = ((*pdep & PG_PS_FRAME) | (addr & PDRMASK)) &
 4350                             PG_FRAME;
 4351                 } else {
 4352                         pte = *pmap_pde_to_pte(pdep, addr);
 4353                         pa = pte & PG_FRAME;
 4354                 }
 4355         } else {
 4356                 pte = 0;
 4357                 pa = 0;
 4358         }
 4359         PMAP_UNLOCK(pmap);
 4360 
 4361         if (pte != 0) {
 4362                 val |= MINCORE_INCORE;
 4363                 if ((pte & PG_MANAGED) == 0)
 4364                         return val;
 4365 
 4366                 m = PHYS_TO_VM_PAGE(pa);
 4367 
 4368                 /*
 4369                  * Modified by us
 4370                  */
 4371                 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW))
 4372                         val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
 4373                 else {
 4374                         /*
 4375                          * Modified by someone else
 4376                          */
 4377                         vm_page_lock_queues();
 4378                         if (m->dirty || pmap_is_modified(m))
 4379                                 val |= MINCORE_MODIFIED_OTHER;
 4380                         vm_page_unlock_queues();
 4381                 }
 4382                 /*
 4383                  * Referenced by us
 4384                  */
 4385                 if (pte & PG_A)
 4386                         val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
 4387                 else {
 4388                         /*
 4389                          * Referenced by someone else
 4390                          */
 4391                         vm_page_lock_queues();
 4392                         if ((m->flags & PG_REFERENCED) ||
 4393                             pmap_ts_referenced(m)) {
 4394                                 val |= MINCORE_REFERENCED_OTHER;
 4395                                 vm_page_flag_set(m, PG_REFERENCED);
 4396                         }
 4397                         vm_page_unlock_queues();
 4398                 }
 4399         } 
 4400         return val;
 4401 }
 4402 
 4403 void
 4404 pmap_activate(struct thread *td)
 4405 {
 4406         pmap_t  pmap, oldpmap;
 4407         u_int64_t  cr3;
 4408 
 4409         critical_enter();
 4410         pmap = vmspace_pmap(td->td_proc->p_vmspace);
 4411         oldpmap = PCPU_GET(curpmap);
 4412 #ifdef SMP
 4413 if (oldpmap)    /* XXX FIXME */
 4414         atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
 4415         atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
 4416 #else
 4417 if (oldpmap)    /* XXX FIXME */
 4418         oldpmap->pm_active &= ~PCPU_GET(cpumask);
 4419         pmap->pm_active |= PCPU_GET(cpumask);
 4420 #endif
 4421         cr3 = vtophys(pmap->pm_pml4);
 4422         td->td_pcb->pcb_cr3 = cr3;
 4423         load_cr3(cr3);
 4424         critical_exit();
 4425 }
 4426 
 4427 vm_offset_t
 4428 pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size)
 4429 {
 4430 
 4431         if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) {
 4432                 return addr;
 4433         }
 4434 
 4435         addr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
 4436         return addr;
 4437 }
 4438 
 4439 /*
 4440  *      Increase the starting virtual address of the given mapping if a
 4441  *      different alignment might result in more superpage mappings.
 4442  */
 4443 void
 4444 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
 4445     vm_offset_t *addr, vm_size_t size)
 4446 {
 4447         vm_offset_t superpage_offset;
 4448 
 4449         if (size < NBPDR)
 4450                 return;
 4451         if (object != NULL && (object->flags & OBJ_COLORED) != 0)
 4452                 offset += ptoa(object->pg_color);
 4453         superpage_offset = offset & PDRMASK;
 4454         if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
 4455             (*addr & PDRMASK) == superpage_offset)
 4456                 return;
 4457         if ((*addr & PDRMASK) < superpage_offset)
 4458                 *addr = (*addr & ~PDRMASK) + superpage_offset;
 4459         else
 4460                 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
 4461 }

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