The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/amd64/amd64/pmap.c

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    1 /*-
    2  * Copyright (c) 1991 Regents of the University of California.
    3  * All rights reserved.
    4  * Copyright (c) 1994 John S. Dyson
    5  * All rights reserved.
    6  * Copyright (c) 1994 David Greenman
    7  * All rights reserved.
    8  * Copyright (c) 2003 Peter Wemm
    9  * All rights reserved.
   10  * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
   11  * All rights reserved.
   12  *
   13  * This code is derived from software contributed to Berkeley by
   14  * the Systems Programming Group of the University of Utah Computer
   15  * Science Department and William Jolitz of UUNET Technologies Inc.
   16  *
   17  * Redistribution and use in source and binary forms, with or without
   18  * modification, are permitted provided that the following conditions
   19  * are met:
   20  * 1. Redistributions of source code must retain the above copyright
   21  *    notice, this list of conditions and the following disclaimer.
   22  * 2. Redistributions in binary form must reproduce the above copyright
   23  *    notice, this list of conditions and the following disclaimer in the
   24  *    documentation and/or other materials provided with the distribution.
   25  * 3. All advertising materials mentioning features or use of this software
   26  *    must display the following acknowledgement:
   27  *      This product includes software developed by the University of
   28  *      California, Berkeley and its contributors.
   29  * 4. Neither the name of the University nor the names of its contributors
   30  *    may be used to endorse or promote products derived from this software
   31  *    without specific prior written permission.
   32  *
   33  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   34  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   36  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   37  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   38  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   39  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   40  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   41  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   42  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   43  * SUCH DAMAGE.
   44  *
   45  *      from:   @(#)pmap.c      7.7 (Berkeley)  5/12/91
   46  */
   47 /*-
   48  * Copyright (c) 2003 Networks Associates Technology, Inc.
   49  * All rights reserved.
   50  *
   51  * This software was developed for the FreeBSD Project by Jake Burkholder,
   52  * Safeport Network Services, and Network Associates Laboratories, the
   53  * Security Research Division of Network Associates, Inc. under
   54  * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
   55  * CHATS research program.
   56  *
   57  * Redistribution and use in source and binary forms, with or without
   58  * modification, are permitted provided that the following conditions
   59  * are met:
   60  * 1. Redistributions of source code must retain the above copyright
   61  *    notice, this list of conditions and the following disclaimer.
   62  * 2. Redistributions in binary form must reproduce the above copyright
   63  *    notice, this list of conditions and the following disclaimer in the
   64  *    documentation and/or other materials provided with the distribution.
   65  *
   66  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   67  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   68  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   69  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   70  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   71  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   72  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   73  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   74  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   75  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   76  * SUCH DAMAGE.
   77  */
   78 
   79 #include <sys/cdefs.h>
   80 __FBSDID("$FreeBSD: stable/8/sys/amd64/amd64/pmap.c 265556 2014-05-07 16:28:36Z alc $");
   81 
   82 /*
   83  *      Manages physical address maps.
   84  *
   85  *      In addition to hardware address maps, this
   86  *      module is called upon to provide software-use-only
   87  *      maps which may or may not be stored in the same
   88  *      form as hardware maps.  These pseudo-maps are
   89  *      used to store intermediate results from copy
   90  *      operations to and from address spaces.
   91  *
   92  *      Since the information managed by this module is
   93  *      also stored by the logical address mapping module,
   94  *      this module may throw away valid virtual-to-physical
   95  *      mappings at almost any time.  However, invalidations
   96  *      of virtual-to-physical mappings must be done as
   97  *      requested.
   98  *
   99  *      In order to cope with hardware architectures which
  100  *      make virtual-to-physical map invalidates expensive,
  101  *      this module may delay invalidate or reduced protection
  102  *      operations until such time as they are actually
  103  *      necessary.  This module is given full information as
  104  *      to which processors are currently using which maps,
  105  *      and to when physical maps must be made correct.
  106  */
  107 
  108 #include "opt_pmap.h"
  109 #include "opt_vm.h"
  110 
  111 #include <sys/param.h>
  112 #include <sys/bus.h>
  113 #include <sys/systm.h>
  114 #include <sys/kernel.h>
  115 #include <sys/ktr.h>
  116 #include <sys/lock.h>
  117 #include <sys/malloc.h>
  118 #include <sys/mman.h>
  119 #include <sys/mutex.h>
  120 #include <sys/proc.h>
  121 #include <sys/sx.h>
  122 #include <sys/vmmeter.h>
  123 #include <sys/sched.h>
  124 #include <sys/sysctl.h>
  125 #ifdef SMP
  126 #include <sys/smp.h>
  127 #endif
  128 
  129 #include <vm/vm.h>
  130 #include <vm/vm_param.h>
  131 #include <vm/vm_kern.h>
  132 #include <vm/vm_page.h>
  133 #include <vm/vm_map.h>
  134 #include <vm/vm_object.h>
  135 #include <vm/vm_extern.h>
  136 #include <vm/vm_pageout.h>
  137 #include <vm/vm_pager.h>
  138 #include <vm/vm_reserv.h>
  139 #include <vm/uma.h>
  140 
  141 #include <machine/intr_machdep.h>
  142 #include <machine/apicvar.h>
  143 #include <machine/cpu.h>
  144 #include <machine/cputypes.h>
  145 #include <machine/md_var.h>
  146 #include <machine/pcb.h>
  147 #include <machine/specialreg.h>
  148 #ifdef SMP
  149 #include <machine/smp.h>
  150 #endif
  151 
  152 #if !defined(DIAGNOSTIC)
  153 #define PMAP_INLINE     __gnu89_inline
  154 #else
  155 #define PMAP_INLINE
  156 #endif
  157 
  158 #ifdef PV_STATS
  159 #define PV_STAT(x)      do { x ; } while (0)
  160 #else
  161 #define PV_STAT(x)      do { } while (0)
  162 #endif
  163 
  164 #define pa_index(pa)    ((pa) >> PDRSHIFT)
  165 #define pa_to_pvh(pa)   (&pv_table[pa_index(pa)])
  166 
  167 struct pmap kernel_pmap_store;
  168 
  169 vm_offset_t virtual_avail;      /* VA of first avail page (after kernel bss) */
  170 vm_offset_t virtual_end;        /* VA of last avail page (end of kernel AS) */
  171 
  172 static int ndmpdp;
  173 static vm_paddr_t dmaplimit;
  174 vm_offset_t kernel_vm_end = VM_MIN_KERNEL_ADDRESS;
  175 pt_entry_t pg_nx;
  176 
  177 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
  178 
  179 static int pat_works = 1;
  180 SYSCTL_INT(_vm_pmap, OID_AUTO, pat_works, CTLFLAG_RD, &pat_works, 1,
  181     "Is page attribute table fully functional?");
  182 
  183 static int pg_ps_enabled = 1;
  184 SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RDTUN, &pg_ps_enabled, 0,
  185     "Are large page mappings enabled?");
  186 
  187 #define PAT_INDEX_SIZE  8
  188 static int pat_index[PAT_INDEX_SIZE];   /* cache mode to PAT index conversion */
  189 
  190 static u_int64_t        KPTphys;        /* phys addr of kernel level 1 */
  191 static u_int64_t        KPDphys;        /* phys addr of kernel level 2 */
  192 u_int64_t               KPDPphys;       /* phys addr of kernel level 3 */
  193 u_int64_t               KPML4phys;      /* phys addr of kernel level 4 */
  194 
  195 static u_int64_t        DMPDphys;       /* phys addr of direct mapped level 2 */
  196 static u_int64_t        DMPDPphys;      /* phys addr of direct mapped level 3 */
  197 
  198 /*
  199  * Data for the pv entry allocation mechanism
  200  */
  201 static int pv_entry_count;
  202 static struct md_page *pv_table;
  203 
  204 /*
  205  * All those kernel PT submaps that BSD is so fond of
  206  */
  207 pt_entry_t *CMAP1 = 0;
  208 caddr_t CADDR1 = 0;
  209 
  210 /*
  211  * Crashdump maps.
  212  */
  213 static caddr_t crashdumpmap;
  214 
  215 static void     free_pv_entry(pmap_t pmap, pv_entry_t pv);
  216 static pv_entry_t get_pv_entry(pmap_t locked_pmap, boolean_t try);
  217 static void     pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
  218 static boolean_t pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
  219 static void     pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
  220 static void     pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
  221 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
  222                     vm_offset_t va);
  223 static int      pmap_pvh_wired_mappings(struct md_page *pvh, int count);
  224 
  225 static int pmap_change_attr_locked(vm_offset_t va, vm_size_t size, int mode);
  226 static boolean_t pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
  227 static boolean_t pmap_demote_pdpe(pmap_t pmap, pdp_entry_t *pdpe,
  228     vm_offset_t va);
  229 static boolean_t pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m,
  230     vm_prot_t prot);
  231 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
  232     vm_page_t m, vm_prot_t prot, vm_page_t mpte);
  233 static void pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte);
  234 static void pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte);
  235 static void pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva);
  236 static boolean_t pmap_is_modified_pvh(struct md_page *pvh);
  237 static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode);
  238 static vm_page_t pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va);
  239 static void pmap_pde_attr(pd_entry_t *pde, int cache_bits);
  240 static void pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
  241 static boolean_t pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva,
  242     vm_prot_t prot);
  243 static void pmap_pte_attr(pt_entry_t *pte, int cache_bits);
  244 static int pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
  245                 vm_page_t *free);
  246 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq,
  247                 vm_offset_t sva, pd_entry_t ptepde, vm_page_t *free);
  248 static void pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte);
  249 static void pmap_remove_page(pmap_t pmap, vm_offset_t va, pd_entry_t *pde,
  250     vm_page_t *free);
  251 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
  252                 vm_offset_t va);
  253 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
  254 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
  255     vm_page_t m);
  256 static void pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde,
  257     pd_entry_t newpde);
  258 static void pmap_update_pde_invalidate(vm_offset_t va, pd_entry_t newpde);
  259 
  260 static vm_page_t pmap_allocpde(pmap_t pmap, vm_offset_t va, int flags);
  261 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
  262 
  263 static vm_page_t _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, int flags);
  264 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
  265                 vm_page_t* free);
  266 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t, vm_page_t *);
  267 static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
  268 
  269 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
  270 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
  271 
  272 /*
  273  * Move the kernel virtual free pointer to the next
  274  * 2MB.  This is used to help improve performance
  275  * by using a large (2MB) page for much of the kernel
  276  * (.text, .data, .bss)
  277  */
  278 static vm_offset_t
  279 pmap_kmem_choose(vm_offset_t addr)
  280 {
  281         vm_offset_t newaddr = addr;
  282 
  283         newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
  284         return newaddr;
  285 }
  286 
  287 /********************/
  288 /* Inline functions */
  289 /********************/
  290 
  291 /* Return a non-clipped PD index for a given VA */
  292 static __inline vm_pindex_t
  293 pmap_pde_pindex(vm_offset_t va)
  294 {
  295         return va >> PDRSHIFT;
  296 }
  297 
  298 
  299 /* Return various clipped indexes for a given VA */
  300 static __inline vm_pindex_t
  301 pmap_pte_index(vm_offset_t va)
  302 {
  303 
  304         return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
  305 }
  306 
  307 static __inline vm_pindex_t
  308 pmap_pde_index(vm_offset_t va)
  309 {
  310 
  311         return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
  312 }
  313 
  314 static __inline vm_pindex_t
  315 pmap_pdpe_index(vm_offset_t va)
  316 {
  317 
  318         return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
  319 }
  320 
  321 static __inline vm_pindex_t
  322 pmap_pml4e_index(vm_offset_t va)
  323 {
  324 
  325         return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
  326 }
  327 
  328 /* Return a pointer to the PML4 slot that corresponds to a VA */
  329 static __inline pml4_entry_t *
  330 pmap_pml4e(pmap_t pmap, vm_offset_t va)
  331 {
  332 
  333         return (&pmap->pm_pml4[pmap_pml4e_index(va)]);
  334 }
  335 
  336 /* Return a pointer to the PDP slot that corresponds to a VA */
  337 static __inline pdp_entry_t *
  338 pmap_pml4e_to_pdpe(pml4_entry_t *pml4e, vm_offset_t va)
  339 {
  340         pdp_entry_t *pdpe;
  341 
  342         pdpe = (pdp_entry_t *)PHYS_TO_DMAP(*pml4e & PG_FRAME);
  343         return (&pdpe[pmap_pdpe_index(va)]);
  344 }
  345 
  346 /* Return a pointer to the PDP slot that corresponds to a VA */
  347 static __inline pdp_entry_t *
  348 pmap_pdpe(pmap_t pmap, vm_offset_t va)
  349 {
  350         pml4_entry_t *pml4e;
  351 
  352         pml4e = pmap_pml4e(pmap, va);
  353         if ((*pml4e & PG_V) == 0)
  354                 return NULL;
  355         return (pmap_pml4e_to_pdpe(pml4e, va));
  356 }
  357 
  358 /* Return a pointer to the PD slot that corresponds to a VA */
  359 static __inline pd_entry_t *
  360 pmap_pdpe_to_pde(pdp_entry_t *pdpe, vm_offset_t va)
  361 {
  362         pd_entry_t *pde;
  363 
  364         pde = (pd_entry_t *)PHYS_TO_DMAP(*pdpe & PG_FRAME);
  365         return (&pde[pmap_pde_index(va)]);
  366 }
  367 
  368 /* Return a pointer to the PD slot that corresponds to a VA */
  369 static __inline pd_entry_t *
  370 pmap_pde(pmap_t pmap, vm_offset_t va)
  371 {
  372         pdp_entry_t *pdpe;
  373 
  374         pdpe = pmap_pdpe(pmap, va);
  375         if (pdpe == NULL || (*pdpe & PG_V) == 0)
  376                  return NULL;
  377         return (pmap_pdpe_to_pde(pdpe, va));
  378 }
  379 
  380 /* Return a pointer to the PT slot that corresponds to a VA */
  381 static __inline pt_entry_t *
  382 pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va)
  383 {
  384         pt_entry_t *pte;
  385 
  386         pte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
  387         return (&pte[pmap_pte_index(va)]);
  388 }
  389 
  390 /* Return a pointer to the PT slot that corresponds to a VA */
  391 static __inline pt_entry_t *
  392 pmap_pte(pmap_t pmap, vm_offset_t va)
  393 {
  394         pd_entry_t *pde;
  395 
  396         pde = pmap_pde(pmap, va);
  397         if (pde == NULL || (*pde & PG_V) == 0)
  398                 return NULL;
  399         if ((*pde & PG_PS) != 0)        /* compat with i386 pmap_pte() */
  400                 return ((pt_entry_t *)pde);
  401         return (pmap_pde_to_pte(pde, va));
  402 }
  403 
  404 
  405 PMAP_INLINE pt_entry_t *
  406 vtopte(vm_offset_t va)
  407 {
  408         u_int64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
  409 
  410         return (PTmap + ((va >> PAGE_SHIFT) & mask));
  411 }
  412 
  413 static __inline pd_entry_t *
  414 vtopde(vm_offset_t va)
  415 {
  416         u_int64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
  417 
  418         return (PDmap + ((va >> PDRSHIFT) & mask));
  419 }
  420 
  421 static u_int64_t
  422 allocpages(vm_paddr_t *firstaddr, int n)
  423 {
  424         u_int64_t ret;
  425 
  426         ret = *firstaddr;
  427         bzero((void *)ret, n * PAGE_SIZE);
  428         *firstaddr += n * PAGE_SIZE;
  429         return (ret);
  430 }
  431 
  432 static void
  433 create_pagetables(vm_paddr_t *firstaddr)
  434 {
  435         int i, j, ndm1g;
  436 
  437         /* Allocate pages */
  438         KPTphys = allocpages(firstaddr, NKPT);
  439         KPML4phys = allocpages(firstaddr, 1);
  440         KPDPphys = allocpages(firstaddr, NKPML4E);
  441         KPDphys = allocpages(firstaddr, NKPDPE);
  442 
  443         ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
  444         if (ndmpdp < 4)         /* Minimum 4GB of dirmap */
  445                 ndmpdp = 4;
  446         DMPDPphys = allocpages(firstaddr, NDMPML4E);
  447         ndm1g = 0;
  448         if ((amd_feature & AMDID_PAGE1GB) != 0)
  449                 ndm1g = ptoa(Maxmem) >> PDPSHIFT;
  450         if (ndm1g < ndmpdp)
  451                 DMPDphys = allocpages(firstaddr, ndmpdp - ndm1g);
  452         dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
  453 
  454         /* Fill in the underlying page table pages */
  455         /* Read-only from zero to physfree */
  456         /* XXX not fully used, underneath 2M pages */
  457         for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
  458                 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT;
  459                 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V | PG_G;
  460         }
  461 
  462         /* Now map the page tables at their location within PTmap */
  463         for (i = 0; i < NKPT; i++) {
  464                 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
  465                 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V;
  466         }
  467 
  468         /* Map from zero to end of allocations under 2M pages */
  469         /* This replaces some of the KPTphys entries above */
  470         for (i = 0; (i << PDRSHIFT) < *firstaddr; i++) {
  471                 ((pd_entry_t *)KPDphys)[i] = i << PDRSHIFT;
  472                 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
  473         }
  474 
  475         /* And connect up the PD to the PDP */
  476         for (i = 0; i < NKPDPE; i++) {
  477                 ((pdp_entry_t *)KPDPphys)[i + KPDPI] = KPDphys +
  478                     (i << PAGE_SHIFT);
  479                 ((pdp_entry_t *)KPDPphys)[i + KPDPI] |= PG_RW | PG_V | PG_U;
  480         }
  481 
  482         /*
  483          * Now, set up the direct map region using 2MB and/or 1GB pages.  If
  484          * the end of physical memory is not aligned to a 1GB page boundary,
  485          * then the residual physical memory is mapped with 2MB pages.  Later,
  486          * if pmap_mapdev{_attr}() uses the direct map for non-write-back
  487          * memory, pmap_change_attr() will demote any 2MB or 1GB page mappings
  488          * that are partially used. 
  489          */
  490         for (i = NPDEPG * ndm1g, j = 0; i < NPDEPG * ndmpdp; i++, j++) {
  491                 ((pd_entry_t *)DMPDphys)[j] = (vm_paddr_t)i << PDRSHIFT;
  492                 /* Preset PG_M and PG_A because demotion expects it. */
  493                 ((pd_entry_t *)DMPDphys)[j] |= PG_RW | PG_V | PG_PS | PG_G |
  494                     PG_M | PG_A;
  495         }
  496         for (i = 0; i < ndm1g; i++) {
  497                 ((pdp_entry_t *)DMPDPphys)[i] = (vm_paddr_t)i << PDPSHIFT;
  498                 /* Preset PG_M and PG_A because demotion expects it. */
  499                 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_PS | PG_G |
  500                     PG_M | PG_A;
  501         }
  502         for (j = 0; i < ndmpdp; i++, j++) {
  503                 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys + (j << PAGE_SHIFT);
  504                 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U;
  505         }
  506 
  507         /* And recursively map PML4 to itself in order to get PTmap */
  508         ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
  509         ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
  510 
  511         /* Connect the Direct Map slot up to the PML4 */
  512         ((pdp_entry_t *)KPML4phys)[DMPML4I] = DMPDPphys;
  513         ((pdp_entry_t *)KPML4phys)[DMPML4I] |= PG_RW | PG_V | PG_U;
  514 
  515         /* Connect the KVA slot up to the PML4 */
  516         ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
  517         ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U;
  518 }
  519 
  520 /*
  521  *      Bootstrap the system enough to run with virtual memory.
  522  *
  523  *      On amd64 this is called after mapping has already been enabled
  524  *      and just syncs the pmap module with what has already been done.
  525  *      [We can't call it easily with mapping off since the kernel is not
  526  *      mapped with PA == VA, hence we would have to relocate every address
  527  *      from the linked base (virtual) address "KERNBASE" to the actual
  528  *      (physical) address starting relative to 0]
  529  */
  530 void
  531 pmap_bootstrap(vm_paddr_t *firstaddr)
  532 {
  533         vm_offset_t va;
  534         pt_entry_t *pte, *unused;
  535 
  536         /*
  537          * Create an initial set of page tables to run the kernel in.
  538          */
  539         create_pagetables(firstaddr);
  540 
  541         virtual_avail = (vm_offset_t) KERNBASE + *firstaddr;
  542         virtual_avail = pmap_kmem_choose(virtual_avail);
  543 
  544         virtual_end = VM_MAX_KERNEL_ADDRESS;
  545 
  546 
  547         /* XXX do %cr0 as well */
  548         load_cr4(rcr4() | CR4_PGE | CR4_PSE);
  549         load_cr3(KPML4phys);
  550 
  551         /*
  552          * Initialize the kernel pmap (which is statically allocated).
  553          */
  554         PMAP_LOCK_INIT(kernel_pmap);
  555         kernel_pmap->pm_pml4 = (pdp_entry_t *)PHYS_TO_DMAP(KPML4phys);
  556         kernel_pmap->pm_root = NULL;
  557         kernel_pmap->pm_active = -1;    /* don't allow deactivation */
  558         TAILQ_INIT(&kernel_pmap->pm_pvchunk);
  559 
  560         /*
  561          * Reserve some special page table entries/VA space for temporary
  562          * mapping of pages.
  563          */
  564 #define SYSMAP(c, p, v, n)      \
  565         v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
  566 
  567         va = virtual_avail;
  568         pte = vtopte(va);
  569 
  570         /*
  571          * CMAP1 is only used for the memory test.
  572          */
  573         SYSMAP(caddr_t, CMAP1, CADDR1, 1)
  574 
  575         /*
  576          * Crashdump maps.
  577          */
  578         SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
  579 
  580         virtual_avail = va;
  581 
  582         *CMAP1 = 0;
  583 
  584         invltlb();
  585 
  586         /* Initialize the PAT MSR. */
  587         pmap_init_pat();
  588 }
  589 
  590 /*
  591  * Setup the PAT MSR.
  592  */
  593 void
  594 pmap_init_pat(void)
  595 {
  596         int pat_table[PAT_INDEX_SIZE];
  597         uint64_t pat_msr;
  598         u_long cr0, cr4;
  599         int i;
  600 
  601         /* Bail if this CPU doesn't implement PAT. */
  602         if ((cpu_feature & CPUID_PAT) == 0)
  603                 panic("no PAT??");
  604 
  605         /* Set default PAT index table. */
  606         for (i = 0; i < PAT_INDEX_SIZE; i++)
  607                 pat_table[i] = -1;
  608         pat_table[PAT_WRITE_BACK] = 0;
  609         pat_table[PAT_WRITE_THROUGH] = 1;
  610         pat_table[PAT_UNCACHEABLE] = 3;
  611         pat_table[PAT_WRITE_COMBINING] = 3;
  612         pat_table[PAT_WRITE_PROTECTED] = 3;
  613         pat_table[PAT_UNCACHED] = 3;
  614 
  615         /* Initialize default PAT entries. */
  616         pat_msr = PAT_VALUE(0, PAT_WRITE_BACK) |
  617             PAT_VALUE(1, PAT_WRITE_THROUGH) |
  618             PAT_VALUE(2, PAT_UNCACHED) |
  619             PAT_VALUE(3, PAT_UNCACHEABLE) |
  620             PAT_VALUE(4, PAT_WRITE_BACK) |
  621             PAT_VALUE(5, PAT_WRITE_THROUGH) |
  622             PAT_VALUE(6, PAT_UNCACHED) |
  623             PAT_VALUE(7, PAT_UNCACHEABLE);
  624 
  625         if (pat_works) {
  626                 /*
  627                  * Leave the indices 0-3 at the default of WB, WT, UC-, and UC.
  628                  * Program 5 and 6 as WP and WC.
  629                  * Leave 4 and 7 as WB and UC.
  630                  */
  631                 pat_msr &= ~(PAT_MASK(5) | PAT_MASK(6));
  632                 pat_msr |= PAT_VALUE(5, PAT_WRITE_PROTECTED) |
  633                     PAT_VALUE(6, PAT_WRITE_COMBINING);
  634                 pat_table[PAT_UNCACHED] = 2;
  635                 pat_table[PAT_WRITE_PROTECTED] = 5;
  636                 pat_table[PAT_WRITE_COMBINING] = 6;
  637         } else {
  638                 /*
  639                  * Just replace PAT Index 2 with WC instead of UC-.
  640                  */
  641                 pat_msr &= ~PAT_MASK(2);
  642                 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
  643                 pat_table[PAT_WRITE_COMBINING] = 2;
  644         }
  645 
  646         /* Disable PGE. */
  647         cr4 = rcr4();
  648         load_cr4(cr4 & ~CR4_PGE);
  649 
  650         /* Disable caches (CD = 1, NW = 0). */
  651         cr0 = rcr0();
  652         load_cr0((cr0 & ~CR0_NW) | CR0_CD);
  653 
  654         /* Flushes caches and TLBs. */
  655         wbinvd();
  656         invltlb();
  657 
  658         /* Update PAT and index table. */
  659         wrmsr(MSR_PAT, pat_msr);
  660         for (i = 0; i < PAT_INDEX_SIZE; i++)
  661                 pat_index[i] = pat_table[i];
  662 
  663         /* Flush caches and TLBs again. */
  664         wbinvd();
  665         invltlb();
  666 
  667         /* Restore caches and PGE. */
  668         load_cr0(cr0);
  669         load_cr4(cr4);
  670 }
  671 
  672 /*
  673  *      Initialize a vm_page's machine-dependent fields.
  674  */
  675 void
  676 pmap_page_init(vm_page_t m)
  677 {
  678 
  679         TAILQ_INIT(&m->md.pv_list);
  680         m->md.pat_mode = PAT_WRITE_BACK;
  681 }
  682 
  683 /*
  684  *      Initialize the pmap module.
  685  *      Called by vm_init, to initialize any structures that the pmap
  686  *      system needs to map virtual memory.
  687  */
  688 void
  689 pmap_init(void)
  690 {
  691         vm_page_t mpte;
  692         vm_size_t s;
  693         int i, pv_npg;
  694 
  695         /*
  696          * Initialize the vm page array entries for the kernel pmap's
  697          * page table pages.
  698          */ 
  699         for (i = 0; i < NKPT; i++) {
  700                 mpte = PHYS_TO_VM_PAGE(KPTphys + (i << PAGE_SHIFT));
  701                 KASSERT(mpte >= vm_page_array &&
  702                     mpte < &vm_page_array[vm_page_array_size],
  703                     ("pmap_init: page table page is out of range"));
  704                 mpte->pindex = pmap_pde_pindex(KERNBASE) + i;
  705                 mpte->phys_addr = KPTphys + (i << PAGE_SHIFT);
  706         }
  707 
  708         /*
  709          * If the kernel is running on a virtual machine, then it must assume
  710          * that MCA is enabled by the hypervisor.  Moreover, the kernel must
  711          * be prepared for the hypervisor changing the vendor and family that
  712          * are reported by CPUID.  Consequently, the workaround for AMD Family
  713          * 10h Erratum 383 is enabled if the processor's feature set does not
  714          * include at least one feature that is only supported by older Intel
  715          * or newer AMD processors.
  716          */
  717         if (vm_guest == VM_GUEST_VM && (cpu_feature & CPUID_SS) == 0 &&
  718             (cpu_feature2 & (CPUID2_SSSE3 | CPUID2_SSE41 | CPUID2_AESNI |
  719             CPUID2_AVX | CPUID2_XSAVE)) == 0 && (amd_feature2 & (AMDID2_XOP |
  720             AMDID2_FMA4)) == 0)
  721                 workaround_erratum383 = 1;
  722 
  723         /*
  724          * Are large page mappings enabled?
  725          */
  726         TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled);
  727         if (pg_ps_enabled) {
  728                 KASSERT(MAXPAGESIZES > 1 && pagesizes[1] == 0,
  729                     ("pmap_init: can't assign to pagesizes[1]"));
  730                 pagesizes[1] = NBPDR;
  731         }
  732 
  733         /*
  734          * Calculate the size of the pv head table for superpages.
  735          */
  736         for (i = 0; phys_avail[i + 1]; i += 2);
  737         pv_npg = round_2mpage(phys_avail[(i - 2) + 1]) / NBPDR;
  738 
  739         /*
  740          * Allocate memory for the pv head table for superpages.
  741          */
  742         s = (vm_size_t)(pv_npg * sizeof(struct md_page));
  743         s = round_page(s);
  744         pv_table = (struct md_page *)kmem_alloc(kernel_map, s);
  745         for (i = 0; i < pv_npg; i++)
  746                 TAILQ_INIT(&pv_table[i].pv_list);
  747 }
  748 
  749 SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0,
  750     "2MB page mapping counters");
  751 
  752 static u_long pmap_pde_demotions;
  753 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, demotions, CTLFLAG_RD,
  754     &pmap_pde_demotions, 0, "2MB page demotions");
  755 
  756 static u_long pmap_pde_mappings;
  757 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD,
  758     &pmap_pde_mappings, 0, "2MB page mappings");
  759 
  760 static u_long pmap_pde_p_failures;
  761 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, p_failures, CTLFLAG_RD,
  762     &pmap_pde_p_failures, 0, "2MB page promotion failures");
  763 
  764 static u_long pmap_pde_promotions;
  765 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, promotions, CTLFLAG_RD,
  766     &pmap_pde_promotions, 0, "2MB page promotions");
  767 
  768 SYSCTL_NODE(_vm_pmap, OID_AUTO, pdpe, CTLFLAG_RD, 0,
  769     "1GB page mapping counters");
  770 
  771 static u_long pmap_pdpe_demotions;
  772 SYSCTL_ULONG(_vm_pmap_pdpe, OID_AUTO, demotions, CTLFLAG_RD,
  773     &pmap_pdpe_demotions, 0, "1GB page demotions");
  774 
  775 
  776 /***************************************************
  777  * Low level helper routines.....
  778  ***************************************************/
  779 
  780 /*
  781  * Determine the appropriate bits to set in a PTE or PDE for a specified
  782  * caching mode.
  783  */
  784 static int
  785 pmap_cache_bits(int mode, boolean_t is_pde)
  786 {
  787         int cache_bits, pat_flag, pat_idx;
  788 
  789         if (mode < 0 || mode >= PAT_INDEX_SIZE || pat_index[mode] < 0)
  790                 panic("Unknown caching mode %d\n", mode);
  791 
  792         /* The PAT bit is different for PTE's and PDE's. */
  793         pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
  794 
  795         /* Map the caching mode to a PAT index. */
  796         pat_idx = pat_index[mode];
  797 
  798         /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
  799         cache_bits = 0;
  800         if (pat_idx & 0x4)
  801                 cache_bits |= pat_flag;
  802         if (pat_idx & 0x2)
  803                 cache_bits |= PG_NC_PCD;
  804         if (pat_idx & 0x1)
  805                 cache_bits |= PG_NC_PWT;
  806         return (cache_bits);
  807 }
  808 
  809 /*
  810  * After changing the page size for the specified virtual address in the page
  811  * table, flush the corresponding entries from the processor's TLB.  Only the
  812  * calling processor's TLB is affected.
  813  *
  814  * The calling thread must be pinned to a processor.
  815  */
  816 static void
  817 pmap_update_pde_invalidate(vm_offset_t va, pd_entry_t newpde)
  818 {
  819         u_long cr4;
  820 
  821         if ((newpde & PG_PS) == 0)
  822                 /* Demotion: flush a specific 2MB page mapping. */
  823                 invlpg(va);
  824         else if ((newpde & PG_G) == 0)
  825                 /*
  826                  * Promotion: flush every 4KB page mapping from the TLB
  827                  * because there are too many to flush individually.
  828                  */
  829                 invltlb();
  830         else {
  831                 /*
  832                  * Promotion: flush every 4KB page mapping from the TLB,
  833                  * including any global (PG_G) mappings.
  834                  */
  835                 cr4 = rcr4();
  836                 load_cr4(cr4 & ~CR4_PGE);
  837                 /*
  838                  * Although preemption at this point could be detrimental to
  839                  * performance, it would not lead to an error.  PG_G is simply
  840                  * ignored if CR4.PGE is clear.  Moreover, in case this block
  841                  * is re-entered, the load_cr4() either above or below will
  842                  * modify CR4.PGE flushing the TLB.
  843                  */
  844                 load_cr4(cr4 | CR4_PGE);
  845         }
  846 }
  847 #ifdef SMP
  848 /*
  849  * For SMP, these functions have to use the IPI mechanism for coherence.
  850  *
  851  * N.B.: Before calling any of the following TLB invalidation functions,
  852  * the calling processor must ensure that all stores updating a non-
  853  * kernel page table are globally performed.  Otherwise, another
  854  * processor could cache an old, pre-update entry without being
  855  * invalidated.  This can happen one of two ways: (1) The pmap becomes
  856  * active on another processor after its pm_active field is checked by
  857  * one of the following functions but before a store updating the page
  858  * table is globally performed. (2) The pmap becomes active on another
  859  * processor before its pm_active field is checked but due to
  860  * speculative loads one of the following functions stills reads the
  861  * pmap as inactive on the other processor.
  862  * 
  863  * The kernel page table is exempt because its pm_active field is
  864  * immutable.  The kernel page table is always active on every
  865  * processor.
  866  */
  867 void
  868 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
  869 {
  870         cpumask_t cpumask, other_cpus;
  871 
  872         sched_pin();
  873         if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
  874                 invlpg(va);
  875                 smp_invlpg(va);
  876         } else {
  877                 cpumask = PCPU_GET(cpumask);
  878                 other_cpus = PCPU_GET(other_cpus);
  879                 if (pmap->pm_active & cpumask)
  880                         invlpg(va);
  881                 if (pmap->pm_active & other_cpus)
  882                         smp_masked_invlpg(pmap->pm_active & other_cpus, va);
  883         }
  884         sched_unpin();
  885 }
  886 
  887 void
  888 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
  889 {
  890         cpumask_t cpumask, other_cpus;
  891         vm_offset_t addr;
  892 
  893         sched_pin();
  894         if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
  895                 for (addr = sva; addr < eva; addr += PAGE_SIZE)
  896                         invlpg(addr);
  897                 smp_invlpg_range(sva, eva);
  898         } else {
  899                 cpumask = PCPU_GET(cpumask);
  900                 other_cpus = PCPU_GET(other_cpus);
  901                 if (pmap->pm_active & cpumask)
  902                         for (addr = sva; addr < eva; addr += PAGE_SIZE)
  903                                 invlpg(addr);
  904                 if (pmap->pm_active & other_cpus)
  905                         smp_masked_invlpg_range(pmap->pm_active & other_cpus,
  906                             sva, eva);
  907         }
  908         sched_unpin();
  909 }
  910 
  911 void
  912 pmap_invalidate_all(pmap_t pmap)
  913 {
  914         cpumask_t cpumask, other_cpus;
  915 
  916         sched_pin();
  917         if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
  918                 invltlb();
  919                 smp_invltlb();
  920         } else {
  921                 cpumask = PCPU_GET(cpumask);
  922                 other_cpus = PCPU_GET(other_cpus);
  923                 if (pmap->pm_active & cpumask)
  924                         invltlb();
  925                 if (pmap->pm_active & other_cpus)
  926                         smp_masked_invltlb(pmap->pm_active & other_cpus);
  927         }
  928         sched_unpin();
  929 }
  930 
  931 void
  932 pmap_invalidate_cache(void)
  933 {
  934 
  935         sched_pin();
  936         wbinvd();
  937         smp_cache_flush();
  938         sched_unpin();
  939 }
  940 
  941 struct pde_action {
  942         cpumask_t store;        /* processor that updates the PDE */
  943         cpumask_t invalidate;   /* processors that invalidate their TLB */
  944         vm_offset_t va;
  945         pd_entry_t *pde;
  946         pd_entry_t newpde;
  947 };
  948 
  949 static void
  950 pmap_update_pde_action(void *arg)
  951 {
  952         struct pde_action *act = arg;
  953 
  954         if (act->store == PCPU_GET(cpumask))
  955                 pde_store(act->pde, act->newpde);
  956 }
  957 
  958 static void
  959 pmap_update_pde_teardown(void *arg)
  960 {
  961         struct pde_action *act = arg;
  962 
  963         if ((act->invalidate & PCPU_GET(cpumask)) != 0)
  964                 pmap_update_pde_invalidate(act->va, act->newpde);
  965 }
  966 
  967 /*
  968  * Change the page size for the specified virtual address in a way that
  969  * prevents any possibility of the TLB ever having two entries that map the
  970  * same virtual address using different page sizes.  This is the recommended
  971  * workaround for Erratum 383 on AMD Family 10h processors.  It prevents a
  972  * machine check exception for a TLB state that is improperly diagnosed as a
  973  * hardware error.
  974  */
  975 static void
  976 pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde)
  977 {
  978         struct pde_action act;
  979         cpumask_t active, cpumask;
  980 
  981         sched_pin();
  982         cpumask = PCPU_GET(cpumask);
  983         if (pmap == kernel_pmap)
  984                 active = all_cpus;
  985         else
  986                 active = pmap->pm_active;
  987         if ((active & PCPU_GET(other_cpus)) != 0) {
  988                 act.store = cpumask;
  989                 act.invalidate = active;
  990                 act.va = va;
  991                 act.pde = pde;
  992                 act.newpde = newpde;
  993                 smp_rendezvous_cpus(cpumask | active,
  994                     smp_no_rendevous_barrier, pmap_update_pde_action,
  995                     pmap_update_pde_teardown, &act);
  996         } else {
  997                 pde_store(pde, newpde);
  998                 if ((active & cpumask) != 0)
  999                         pmap_update_pde_invalidate(va, newpde);
 1000         }
 1001         sched_unpin();
 1002 }
 1003 #else /* !SMP */
 1004 /*
 1005  * Normal, non-SMP, invalidation functions.
 1006  * We inline these within pmap.c for speed.
 1007  */
 1008 PMAP_INLINE void
 1009 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
 1010 {
 1011 
 1012         if (pmap == kernel_pmap || pmap->pm_active)
 1013                 invlpg(va);
 1014 }
 1015 
 1016 PMAP_INLINE void
 1017 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
 1018 {
 1019         vm_offset_t addr;
 1020 
 1021         if (pmap == kernel_pmap || pmap->pm_active)
 1022                 for (addr = sva; addr < eva; addr += PAGE_SIZE)
 1023                         invlpg(addr);
 1024 }
 1025 
 1026 PMAP_INLINE void
 1027 pmap_invalidate_all(pmap_t pmap)
 1028 {
 1029 
 1030         if (pmap == kernel_pmap || pmap->pm_active)
 1031                 invltlb();
 1032 }
 1033 
 1034 PMAP_INLINE void
 1035 pmap_invalidate_cache(void)
 1036 {
 1037 
 1038         wbinvd();
 1039 }
 1040 
 1041 static void
 1042 pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde)
 1043 {
 1044 
 1045         pde_store(pde, newpde);
 1046         if (pmap == kernel_pmap || pmap->pm_active)
 1047                 pmap_update_pde_invalidate(va, newpde);
 1048 }
 1049 #endif /* !SMP */
 1050 
 1051 static void
 1052 pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva)
 1053 {
 1054 
 1055         KASSERT((sva & PAGE_MASK) == 0,
 1056             ("pmap_invalidate_cache_range: sva not page-aligned"));
 1057         KASSERT((eva & PAGE_MASK) == 0,
 1058             ("pmap_invalidate_cache_range: eva not page-aligned"));
 1059 
 1060         if (cpu_feature & CPUID_SS)
 1061                 ; /* If "Self Snoop" is supported, do nothing. */
 1062         else if ((cpu_feature & CPUID_CLFSH) != 0 &&
 1063                  eva - sva < 2 * 1024 * 1024) {
 1064 
 1065                 /*
 1066                  * XXX: Some CPUs fault, hang, or trash the local APIC
 1067                  * registers if we use CLFLUSH on the local APIC
 1068                  * range.  The local APIC is always uncached, so we
 1069                  * don't need to flush for that range anyway.
 1070                  */
 1071                 if (pmap_kextract(sva) == lapic_paddr)
 1072                         return;
 1073 
 1074                 /*
 1075                  * Otherwise, do per-cache line flush.  Use the mfence
 1076                  * instruction to insure that previous stores are
 1077                  * included in the write-back.  The processor
 1078                  * propagates flush to other processors in the cache
 1079                  * coherence domain.
 1080                  */
 1081                 mfence();
 1082                 for (; sva < eva; sva += cpu_clflush_line_size)
 1083                         clflush(sva);
 1084                 mfence();
 1085         } else {
 1086 
 1087                 /*
 1088                  * No targeted cache flush methods are supported by CPU,
 1089                  * or the supplied range is bigger than 2MB.
 1090                  * Globally invalidate cache.
 1091                  */
 1092                 pmap_invalidate_cache();
 1093         }
 1094 }
 1095 
 1096 /*
 1097  *      Routine:        pmap_extract
 1098  *      Function:
 1099  *              Extract the physical page address associated
 1100  *              with the given map/virtual_address pair.
 1101  */
 1102 vm_paddr_t 
 1103 pmap_extract(pmap_t pmap, vm_offset_t va)
 1104 {
 1105         pdp_entry_t *pdpe;
 1106         pd_entry_t *pde;
 1107         pt_entry_t *pte;
 1108         vm_paddr_t pa;
 1109 
 1110         pa = 0;
 1111         PMAP_LOCK(pmap);
 1112         pdpe = pmap_pdpe(pmap, va);
 1113         if (pdpe != NULL && (*pdpe & PG_V) != 0) {
 1114                 if ((*pdpe & PG_PS) != 0)
 1115                         pa = (*pdpe & PG_PS_FRAME) | (va & PDPMASK);
 1116                 else {
 1117                         pde = pmap_pdpe_to_pde(pdpe, va);
 1118                         if ((*pde & PG_V) != 0) {
 1119                                 if ((*pde & PG_PS) != 0) {
 1120                                         pa = (*pde & PG_PS_FRAME) |
 1121                                             (va & PDRMASK);
 1122                                 } else {
 1123                                         pte = pmap_pde_to_pte(pde, va);
 1124                                         pa = (*pte & PG_FRAME) |
 1125                                             (va & PAGE_MASK);
 1126                                 }
 1127                         }
 1128                 }
 1129         }
 1130         PMAP_UNLOCK(pmap);
 1131         return (pa);
 1132 }
 1133 
 1134 /*
 1135  *      Routine:        pmap_extract_and_hold
 1136  *      Function:
 1137  *              Atomically extract and hold the physical page
 1138  *              with the given pmap and virtual address pair
 1139  *              if that mapping permits the given protection.
 1140  */
 1141 vm_page_t
 1142 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
 1143 {
 1144         pd_entry_t pde, *pdep;
 1145         pt_entry_t pte;
 1146         vm_page_t m;
 1147 
 1148         m = NULL;
 1149         vm_page_lock_queues();
 1150         PMAP_LOCK(pmap);
 1151         pdep = pmap_pde(pmap, va);
 1152         if (pdep != NULL && (pde = *pdep)) {
 1153                 if (pde & PG_PS) {
 1154                         if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
 1155                                 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
 1156                                     (va & PDRMASK));
 1157                                 vm_page_hold(m);
 1158                         }
 1159                 } else {
 1160                         pte = *pmap_pde_to_pte(pdep, va);
 1161                         if ((pte & PG_V) &&
 1162                             ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
 1163                                 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
 1164                                 vm_page_hold(m);
 1165                         }
 1166                 }
 1167         }
 1168         vm_page_unlock_queues();
 1169         PMAP_UNLOCK(pmap);
 1170         return (m);
 1171 }
 1172 
 1173 vm_paddr_t
 1174 pmap_kextract(vm_offset_t va)
 1175 {
 1176         pd_entry_t pde;
 1177         vm_paddr_t pa;
 1178 
 1179         if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
 1180                 pa = DMAP_TO_PHYS(va);
 1181         } else {
 1182                 pde = *vtopde(va);
 1183                 if (pde & PG_PS) {
 1184                         pa = (pde & PG_PS_FRAME) | (va & PDRMASK);
 1185                 } else {
 1186                         /*
 1187                          * Beware of a concurrent promotion that changes the
 1188                          * PDE at this point!  For example, vtopte() must not
 1189                          * be used to access the PTE because it would use the
 1190                          * new PDE.  It is, however, safe to use the old PDE
 1191                          * because the page table page is preserved by the
 1192                          * promotion.
 1193                          */
 1194                         pa = *pmap_pde_to_pte(&pde, va);
 1195                         pa = (pa & PG_FRAME) | (va & PAGE_MASK);
 1196                 }
 1197         }
 1198         return pa;
 1199 }
 1200 
 1201 /***************************************************
 1202  * Low level mapping routines.....
 1203  ***************************************************/
 1204 
 1205 /*
 1206  * Add a wired page to the kva.
 1207  * Note: not SMP coherent.
 1208  */
 1209 PMAP_INLINE void 
 1210 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
 1211 {
 1212         pt_entry_t *pte;
 1213 
 1214         pte = vtopte(va);
 1215         pte_store(pte, pa | PG_RW | PG_V | PG_G);
 1216 }
 1217 
 1218 static __inline void
 1219 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
 1220 {
 1221         pt_entry_t *pte;
 1222 
 1223         pte = vtopte(va);
 1224         pte_store(pte, pa | PG_RW | PG_V | PG_G | pmap_cache_bits(mode, 0));
 1225 }
 1226 
 1227 /*
 1228  * Remove a page from the kernel pagetables.
 1229  * Note: not SMP coherent.
 1230  */
 1231 PMAP_INLINE void
 1232 pmap_kremove(vm_offset_t va)
 1233 {
 1234         pt_entry_t *pte;
 1235 
 1236         pte = vtopte(va);
 1237         pte_clear(pte);
 1238 }
 1239 
 1240 /*
 1241  *      Used to map a range of physical addresses into kernel
 1242  *      virtual address space.
 1243  *
 1244  *      The value passed in '*virt' is a suggested virtual address for
 1245  *      the mapping. Architectures which can support a direct-mapped
 1246  *      physical to virtual region can return the appropriate address
 1247  *      within that region, leaving '*virt' unchanged. Other
 1248  *      architectures should map the pages starting at '*virt' and
 1249  *      update '*virt' with the first usable address after the mapped
 1250  *      region.
 1251  */
 1252 vm_offset_t
 1253 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
 1254 {
 1255         return PHYS_TO_DMAP(start);
 1256 }
 1257 
 1258 
 1259 /*
 1260  * Add a list of wired pages to the kva
 1261  * this routine is only used for temporary
 1262  * kernel mappings that do not need to have
 1263  * page modification or references recorded.
 1264  * Note that old mappings are simply written
 1265  * over.  The page *must* be wired.
 1266  * Note: SMP coherent.  Uses a ranged shootdown IPI.
 1267  */
 1268 void
 1269 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
 1270 {
 1271         pt_entry_t *endpte, oldpte, pa, *pte;
 1272         vm_page_t m;
 1273 
 1274         oldpte = 0;
 1275         pte = vtopte(sva);
 1276         endpte = pte + count;
 1277         while (pte < endpte) {
 1278                 m = *ma++;
 1279                 pa = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 0);
 1280                 if ((*pte & (PG_FRAME | PG_PTE_CACHE)) != pa) {
 1281                         oldpte |= *pte;
 1282                         pte_store(pte, pa | PG_G | PG_RW | PG_V);
 1283                 }
 1284                 pte++;
 1285         }
 1286         if (__predict_false((oldpte & PG_V) != 0))
 1287                 pmap_invalidate_range(kernel_pmap, sva, sva + count *
 1288                     PAGE_SIZE);
 1289 }
 1290 
 1291 /*
 1292  * This routine tears out page mappings from the
 1293  * kernel -- it is meant only for temporary mappings.
 1294  * Note: SMP coherent.  Uses a ranged shootdown IPI.
 1295  */
 1296 void
 1297 pmap_qremove(vm_offset_t sva, int count)
 1298 {
 1299         vm_offset_t va;
 1300 
 1301         va = sva;
 1302         while (count-- > 0) {
 1303                 pmap_kremove(va);
 1304                 va += PAGE_SIZE;
 1305         }
 1306         pmap_invalidate_range(kernel_pmap, sva, va);
 1307 }
 1308 
 1309 /***************************************************
 1310  * Page table page management routines.....
 1311  ***************************************************/
 1312 static __inline void
 1313 pmap_free_zero_pages(vm_page_t free)
 1314 {
 1315         vm_page_t m;
 1316 
 1317         while (free != NULL) {
 1318                 m = free;
 1319                 free = m->right;
 1320                 /* Preserve the page's PG_ZERO setting. */
 1321                 vm_page_free_toq(m);
 1322         }
 1323 }
 1324 
 1325 /*
 1326  * Schedule the specified unused page table page to be freed.  Specifically,
 1327  * add the page to the specified list of pages that will be released to the
 1328  * physical memory manager after the TLB has been updated.
 1329  */
 1330 static __inline void
 1331 pmap_add_delayed_free_list(vm_page_t m, vm_page_t *free, boolean_t set_PG_ZERO)
 1332 {
 1333 
 1334         if (set_PG_ZERO)
 1335                 m->flags |= PG_ZERO;
 1336         else
 1337                 m->flags &= ~PG_ZERO;
 1338         m->right = *free;
 1339         *free = m;
 1340 }
 1341         
 1342 /*
 1343  * Inserts the specified page table page into the specified pmap's collection
 1344  * of idle page table pages.  Each of a pmap's page table pages is responsible
 1345  * for mapping a distinct range of virtual addresses.  The pmap's collection is
 1346  * ordered by this virtual address range.
 1347  */
 1348 static void
 1349 pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte)
 1350 {
 1351         vm_page_t root;
 1352 
 1353         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1354         root = pmap->pm_root;
 1355         if (root == NULL) {
 1356                 mpte->left = NULL;
 1357                 mpte->right = NULL;
 1358         } else {
 1359                 root = vm_page_splay(mpte->pindex, root);
 1360                 if (mpte->pindex < root->pindex) {
 1361                         mpte->left = root->left;
 1362                         mpte->right = root;
 1363                         root->left = NULL;
 1364                 } else if (mpte->pindex == root->pindex)
 1365                         panic("pmap_insert_pt_page: pindex already inserted");
 1366                 else {
 1367                         mpte->right = root->right;
 1368                         mpte->left = root;
 1369                         root->right = NULL;
 1370                 }
 1371         }
 1372         pmap->pm_root = mpte;
 1373 }
 1374 
 1375 /*
 1376  * Looks for a page table page mapping the specified virtual address in the
 1377  * specified pmap's collection of idle page table pages.  Returns NULL if there
 1378  * is no page table page corresponding to the specified virtual address.
 1379  */
 1380 static vm_page_t
 1381 pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va)
 1382 {
 1383         vm_page_t mpte;
 1384         vm_pindex_t pindex = pmap_pde_pindex(va);
 1385 
 1386         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1387         if ((mpte = pmap->pm_root) != NULL && mpte->pindex != pindex) {
 1388                 mpte = vm_page_splay(pindex, mpte);
 1389                 if ((pmap->pm_root = mpte)->pindex != pindex)
 1390                         mpte = NULL;
 1391         }
 1392         return (mpte);
 1393 }
 1394 
 1395 /*
 1396  * Removes the specified page table page from the specified pmap's collection
 1397  * of idle page table pages.  The specified page table page must be a member of
 1398  * the pmap's collection.
 1399  */
 1400 static void
 1401 pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte)
 1402 {
 1403         vm_page_t root;
 1404 
 1405         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 1406         if (mpte != pmap->pm_root) {
 1407                 root = vm_page_splay(mpte->pindex, pmap->pm_root);
 1408                 KASSERT(mpte == root,
 1409                     ("pmap_remove_pt_page: mpte %p is missing from pmap %p",
 1410                     mpte, pmap));
 1411         }
 1412         if (mpte->left == NULL)
 1413                 root = mpte->right;
 1414         else {
 1415                 root = vm_page_splay(mpte->pindex, mpte->left);
 1416                 root->right = mpte->right;
 1417         }
 1418         pmap->pm_root = root;
 1419 }
 1420 
 1421 /*
 1422  * This routine unholds page table pages, and if the hold count
 1423  * drops to zero, then it decrements the wire count.
 1424  */
 1425 static __inline int
 1426 pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_page_t *free)
 1427 {
 1428 
 1429         --m->wire_count;
 1430         if (m->wire_count == 0)
 1431                 return _pmap_unwire_pte_hold(pmap, va, m, free);
 1432         else
 1433                 return 0;
 1434 }
 1435 
 1436 static int 
 1437 _pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, 
 1438     vm_page_t *free)
 1439 {
 1440 
 1441         /*
 1442          * unmap the page table page
 1443          */
 1444         if (m->pindex >= (NUPDE + NUPDPE)) {
 1445                 /* PDP page */
 1446                 pml4_entry_t *pml4;
 1447                 pml4 = pmap_pml4e(pmap, va);
 1448                 *pml4 = 0;
 1449         } else if (m->pindex >= NUPDE) {
 1450                 /* PD page */
 1451                 pdp_entry_t *pdp;
 1452                 pdp = pmap_pdpe(pmap, va);
 1453                 *pdp = 0;
 1454         } else {
 1455                 /* PTE page */
 1456                 pd_entry_t *pd;
 1457                 pd = pmap_pde(pmap, va);
 1458                 *pd = 0;
 1459         }
 1460         --pmap->pm_stats.resident_count;
 1461         if (m->pindex < NUPDE) {
 1462                 /* We just released a PT, unhold the matching PD */
 1463                 vm_page_t pdpg;
 1464 
 1465                 pdpg = PHYS_TO_VM_PAGE(*pmap_pdpe(pmap, va) & PG_FRAME);
 1466                 pmap_unwire_pte_hold(pmap, va, pdpg, free);
 1467         }
 1468         if (m->pindex >= NUPDE && m->pindex < (NUPDE + NUPDPE)) {
 1469                 /* We just released a PD, unhold the matching PDP */
 1470                 vm_page_t pdppg;
 1471 
 1472                 pdppg = PHYS_TO_VM_PAGE(*pmap_pml4e(pmap, va) & PG_FRAME);
 1473                 pmap_unwire_pte_hold(pmap, va, pdppg, free);
 1474         }
 1475 
 1476         /*
 1477          * This is a release store so that the ordinary store unmapping
 1478          * the page table page is globally performed before TLB shoot-
 1479          * down is begun.
 1480          */
 1481         atomic_subtract_rel_int(&cnt.v_wire_count, 1);
 1482 
 1483         /* 
 1484          * Put page on a list so that it is released after
 1485          * *ALL* TLB shootdown is done
 1486          */
 1487         pmap_add_delayed_free_list(m, free, TRUE);
 1488         
 1489         return 1;
 1490 }
 1491 
 1492 /*
 1493  * After removing a page table entry, this routine is used to
 1494  * conditionally free the page, and manage the hold/wire counts.
 1495  */
 1496 static int
 1497 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde, vm_page_t *free)
 1498 {
 1499         vm_page_t mpte;
 1500 
 1501         if (va >= VM_MAXUSER_ADDRESS)
 1502                 return 0;
 1503         KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0"));
 1504         mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
 1505         return pmap_unwire_pte_hold(pmap, va, mpte, free);
 1506 }
 1507 
 1508 void
 1509 pmap_pinit0(pmap_t pmap)
 1510 {
 1511 
 1512         PMAP_LOCK_INIT(pmap);
 1513         pmap->pm_pml4 = (pml4_entry_t *)PHYS_TO_DMAP(KPML4phys);
 1514         pmap->pm_root = NULL;
 1515         pmap->pm_active = 0;
 1516         PCPU_SET(curpmap, pmap);
 1517         TAILQ_INIT(&pmap->pm_pvchunk);
 1518         bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
 1519 }
 1520 
 1521 /*
 1522  * Initialize a preallocated and zeroed pmap structure,
 1523  * such as one in a vmspace structure.
 1524  */
 1525 int
 1526 pmap_pinit(pmap_t pmap)
 1527 {
 1528         vm_page_t pml4pg;
 1529         static vm_pindex_t color;
 1530 
 1531         PMAP_LOCK_INIT(pmap);
 1532 
 1533         /*
 1534          * allocate the page directory page
 1535          */
 1536         while ((pml4pg = vm_page_alloc(NULL, color++, VM_ALLOC_NOOBJ |
 1537             VM_ALLOC_NORMAL | VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL)
 1538                 VM_WAIT;
 1539 
 1540         pmap->pm_pml4 = (pml4_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pml4pg));
 1541 
 1542         if ((pml4pg->flags & PG_ZERO) == 0)
 1543                 pagezero(pmap->pm_pml4);
 1544 
 1545         /* Wire in kernel global address entries. */
 1546         pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
 1547         pmap->pm_pml4[DMPML4I] = DMPDPphys | PG_RW | PG_V | PG_U;
 1548 
 1549         /* install self-referential address mapping entry(s) */
 1550         pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(pml4pg) | PG_V | PG_RW | PG_A | PG_M;
 1551 
 1552         pmap->pm_root = NULL;
 1553         pmap->pm_active = 0;
 1554         TAILQ_INIT(&pmap->pm_pvchunk);
 1555         bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
 1556 
 1557         return (1);
 1558 }
 1559 
 1560 /*
 1561  * this routine is called if the page table page is not
 1562  * mapped correctly.
 1563  *
 1564  * Note: If a page allocation fails at page table level two or three,
 1565  * one or two pages may be held during the wait, only to be released
 1566  * afterwards.  This conservative approach is easily argued to avoid
 1567  * race conditions.
 1568  */
 1569 static vm_page_t
 1570 _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, int flags)
 1571 {
 1572         vm_page_t m, pdppg, pdpg;
 1573 
 1574         KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
 1575             (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
 1576             ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
 1577 
 1578         /*
 1579          * Allocate a page table page.
 1580          */
 1581         if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
 1582             VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
 1583                 if (flags & M_WAITOK) {
 1584                         PMAP_UNLOCK(pmap);
 1585                         vm_page_unlock_queues();
 1586                         VM_WAIT;
 1587                         vm_page_lock_queues();
 1588                         PMAP_LOCK(pmap);
 1589                 }
 1590 
 1591                 /*
 1592                  * Indicate the need to retry.  While waiting, the page table
 1593                  * page may have been allocated.
 1594                  */
 1595                 return (NULL);
 1596         }
 1597         if ((m->flags & PG_ZERO) == 0)
 1598                 pmap_zero_page(m);
 1599 
 1600         /*
 1601          * Map the pagetable page into the process address space, if
 1602          * it isn't already there.
 1603          */
 1604 
 1605         if (ptepindex >= (NUPDE + NUPDPE)) {
 1606                 pml4_entry_t *pml4;
 1607                 vm_pindex_t pml4index;
 1608 
 1609                 /* Wire up a new PDPE page */
 1610                 pml4index = ptepindex - (NUPDE + NUPDPE);
 1611                 pml4 = &pmap->pm_pml4[pml4index];
 1612                 *pml4 = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
 1613 
 1614         } else if (ptepindex >= NUPDE) {
 1615                 vm_pindex_t pml4index;
 1616                 vm_pindex_t pdpindex;
 1617                 pml4_entry_t *pml4;
 1618                 pdp_entry_t *pdp;
 1619 
 1620                 /* Wire up a new PDE page */
 1621                 pdpindex = ptepindex - NUPDE;
 1622                 pml4index = pdpindex >> NPML4EPGSHIFT;
 1623 
 1624                 pml4 = &pmap->pm_pml4[pml4index];
 1625                 if ((*pml4 & PG_V) == 0) {
 1626                         /* Have to allocate a new pdp, recurse */
 1627                         if (_pmap_allocpte(pmap, NUPDE + NUPDPE + pml4index,
 1628                             flags) == NULL) {
 1629                                 --m->wire_count;
 1630                                 atomic_subtract_int(&cnt.v_wire_count, 1);
 1631                                 vm_page_free_zero(m);
 1632                                 return (NULL);
 1633                         }
 1634                 } else {
 1635                         /* Add reference to pdp page */
 1636                         pdppg = PHYS_TO_VM_PAGE(*pml4 & PG_FRAME);
 1637                         pdppg->wire_count++;
 1638                 }
 1639                 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
 1640 
 1641                 /* Now find the pdp page */
 1642                 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
 1643                 *pdp = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
 1644 
 1645         } else {
 1646                 vm_pindex_t pml4index;
 1647                 vm_pindex_t pdpindex;
 1648                 pml4_entry_t *pml4;
 1649                 pdp_entry_t *pdp;
 1650                 pd_entry_t *pd;
 1651 
 1652                 /* Wire up a new PTE page */
 1653                 pdpindex = ptepindex >> NPDPEPGSHIFT;
 1654                 pml4index = pdpindex >> NPML4EPGSHIFT;
 1655 
 1656                 /* First, find the pdp and check that its valid. */
 1657                 pml4 = &pmap->pm_pml4[pml4index];
 1658                 if ((*pml4 & PG_V) == 0) {
 1659                         /* Have to allocate a new pd, recurse */
 1660                         if (_pmap_allocpte(pmap, NUPDE + pdpindex,
 1661                             flags) == NULL) {
 1662                                 --m->wire_count;
 1663                                 atomic_subtract_int(&cnt.v_wire_count, 1);
 1664                                 vm_page_free_zero(m);
 1665                                 return (NULL);
 1666                         }
 1667                         pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
 1668                         pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
 1669                 } else {
 1670                         pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
 1671                         pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
 1672                         if ((*pdp & PG_V) == 0) {
 1673                                 /* Have to allocate a new pd, recurse */
 1674                                 if (_pmap_allocpte(pmap, NUPDE + pdpindex,
 1675                                     flags) == NULL) {
 1676                                         --m->wire_count;
 1677                                         atomic_subtract_int(&cnt.v_wire_count,
 1678                                             1);
 1679                                         vm_page_free_zero(m);
 1680                                         return (NULL);
 1681                                 }
 1682                         } else {
 1683                                 /* Add reference to the pd page */
 1684                                 pdpg = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
 1685                                 pdpg->wire_count++;
 1686                         }
 1687                 }
 1688                 pd = (pd_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME);
 1689 
 1690                 /* Now we know where the page directory page is */
 1691                 pd = &pd[ptepindex & ((1ul << NPDEPGSHIFT) - 1)];
 1692                 *pd = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
 1693         }
 1694 
 1695         pmap->pm_stats.resident_count++;
 1696 
 1697         return m;
 1698 }
 1699 
 1700 static vm_page_t
 1701 pmap_allocpde(pmap_t pmap, vm_offset_t va, int flags)
 1702 {
 1703         vm_pindex_t pdpindex, ptepindex;
 1704         pdp_entry_t *pdpe;
 1705         vm_page_t pdpg;
 1706 
 1707         KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
 1708             (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
 1709             ("pmap_allocpde: flags is neither M_NOWAIT nor M_WAITOK"));
 1710 retry:
 1711         pdpe = pmap_pdpe(pmap, va);
 1712         if (pdpe != NULL && (*pdpe & PG_V) != 0) {
 1713                 /* Add a reference to the pd page. */
 1714                 pdpg = PHYS_TO_VM_PAGE(*pdpe & PG_FRAME);
 1715                 pdpg->wire_count++;
 1716         } else {
 1717                 /* Allocate a pd page. */
 1718                 ptepindex = pmap_pde_pindex(va);
 1719                 pdpindex = ptepindex >> NPDPEPGSHIFT;
 1720                 pdpg = _pmap_allocpte(pmap, NUPDE + pdpindex, flags);
 1721                 if (pdpg == NULL && (flags & M_WAITOK))
 1722                         goto retry;
 1723         }
 1724         return (pdpg);
 1725 }
 1726 
 1727 static vm_page_t
 1728 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
 1729 {
 1730         vm_pindex_t ptepindex;
 1731         pd_entry_t *pd;
 1732         vm_page_t m;
 1733 
 1734         KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
 1735             (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
 1736             ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
 1737 
 1738         /*
 1739          * Calculate pagetable page index
 1740          */
 1741         ptepindex = pmap_pde_pindex(va);
 1742 retry:
 1743         /*
 1744          * Get the page directory entry
 1745          */
 1746         pd = pmap_pde(pmap, va);
 1747 
 1748         /*
 1749          * This supports switching from a 2MB page to a
 1750          * normal 4K page.
 1751          */
 1752         if (pd != NULL && (*pd & (PG_PS | PG_V)) == (PG_PS | PG_V)) {
 1753                 if (!pmap_demote_pde(pmap, pd, va)) {
 1754                         /*
 1755                          * Invalidation of the 2MB page mapping may have caused
 1756                          * the deallocation of the underlying PD page.
 1757                          */
 1758                         pd = NULL;
 1759                 }
 1760         }
 1761 
 1762         /*
 1763          * If the page table page is mapped, we just increment the
 1764          * hold count, and activate it.
 1765          */
 1766         if (pd != NULL && (*pd & PG_V) != 0) {
 1767                 m = PHYS_TO_VM_PAGE(*pd & PG_FRAME);
 1768                 m->wire_count++;
 1769         } else {
 1770                 /*
 1771                  * Here if the pte page isn't mapped, or if it has been
 1772                  * deallocated.
 1773                  */
 1774                 m = _pmap_allocpte(pmap, ptepindex, flags);
 1775                 if (m == NULL && (flags & M_WAITOK))
 1776                         goto retry;
 1777         }
 1778         return (m);
 1779 }
 1780 
 1781 
 1782 /***************************************************
 1783  * Pmap allocation/deallocation routines.
 1784  ***************************************************/
 1785 
 1786 /*
 1787  * Release any resources held by the given physical map.
 1788  * Called when a pmap initialized by pmap_pinit is being released.
 1789  * Should only be called if the map contains no valid mappings.
 1790  */
 1791 void
 1792 pmap_release(pmap_t pmap)
 1793 {
 1794         vm_page_t m;
 1795 
 1796         KASSERT(pmap->pm_stats.resident_count == 0,
 1797             ("pmap_release: pmap resident count %ld != 0",
 1798             pmap->pm_stats.resident_count));
 1799         KASSERT(pmap->pm_root == NULL,
 1800             ("pmap_release: pmap has reserved page table page(s)"));
 1801 
 1802         m = PHYS_TO_VM_PAGE(pmap->pm_pml4[PML4PML4I] & PG_FRAME);
 1803 
 1804         pmap->pm_pml4[KPML4I] = 0;      /* KVA */
 1805         pmap->pm_pml4[DMPML4I] = 0;     /* Direct Map */
 1806         pmap->pm_pml4[PML4PML4I] = 0;   /* Recursive Mapping */
 1807 
 1808         m->wire_count--;
 1809         atomic_subtract_int(&cnt.v_wire_count, 1);
 1810         vm_page_free_zero(m);
 1811         PMAP_LOCK_DESTROY(pmap);
 1812 }
 1813 
 1814 static int
 1815 kvm_size(SYSCTL_HANDLER_ARGS)
 1816 {
 1817         unsigned long ksize = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS;
 1818 
 1819         return sysctl_handle_long(oidp, &ksize, 0, req);
 1820 }
 1821 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 
 1822     0, 0, kvm_size, "LU", "Size of KVM");
 1823 
 1824 static int
 1825 kvm_free(SYSCTL_HANDLER_ARGS)
 1826 {
 1827         unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
 1828 
 1829         return sysctl_handle_long(oidp, &kfree, 0, req);
 1830 }
 1831 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 
 1832     0, 0, kvm_free, "LU", "Amount of KVM free");
 1833 
 1834 /*
 1835  * grow the number of kernel page table entries, if needed
 1836  */
 1837 void
 1838 pmap_growkernel(vm_offset_t addr)
 1839 {
 1840         vm_paddr_t paddr;
 1841         vm_page_t nkpg;
 1842         pd_entry_t *pde, newpdir;
 1843         pdp_entry_t *pdpe;
 1844 
 1845         mtx_assert(&kernel_map->system_mtx, MA_OWNED);
 1846 
 1847         /*
 1848          * Return if "addr" is within the range of kernel page table pages
 1849          * that were preallocated during pmap bootstrap.  Moreover, leave
 1850          * "kernel_vm_end" and the kernel page table as they were.
 1851          *
 1852          * The correctness of this action is based on the following
 1853          * argument: vm_map_findspace() allocates contiguous ranges of the
 1854          * kernel virtual address space.  It calls this function if a range
 1855          * ends after "kernel_vm_end".  If the kernel is mapped between
 1856          * "kernel_vm_end" and "addr", then the range cannot begin at
 1857          * "kernel_vm_end".  In fact, its beginning address cannot be less
 1858          * than the kernel.  Thus, there is no immediate need to allocate
 1859          * any new kernel page table pages between "kernel_vm_end" and
 1860          * "KERNBASE".
 1861          */
 1862         if (KERNBASE < addr && addr <= KERNBASE + NKPT * NBPDR)
 1863                 return;
 1864 
 1865         addr = roundup2(addr, NBPDR);
 1866         if (addr - 1 >= kernel_map->max_offset)
 1867                 addr = kernel_map->max_offset;
 1868         while (kernel_vm_end < addr) {
 1869                 pdpe = pmap_pdpe(kernel_pmap, kernel_vm_end);
 1870                 if ((*pdpe & PG_V) == 0) {
 1871                         /* We need a new PDP entry */
 1872                         nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDPSHIFT,
 1873                             VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ |
 1874                             VM_ALLOC_WIRED | VM_ALLOC_ZERO);
 1875                         if (nkpg == NULL)
 1876                                 panic("pmap_growkernel: no memory to grow kernel");
 1877                         if ((nkpg->flags & PG_ZERO) == 0)
 1878                                 pmap_zero_page(nkpg);
 1879                         paddr = VM_PAGE_TO_PHYS(nkpg);
 1880                         *pdpe = (pdp_entry_t)
 1881                                 (paddr | PG_V | PG_RW | PG_A | PG_M);
 1882                         continue; /* try again */
 1883                 }
 1884                 pde = pmap_pdpe_to_pde(pdpe, kernel_vm_end);
 1885                 if ((*pde & PG_V) != 0) {
 1886                         kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
 1887                         if (kernel_vm_end - 1 >= kernel_map->max_offset) {
 1888                                 kernel_vm_end = kernel_map->max_offset;
 1889                                 break;                       
 1890                         }
 1891                         continue;
 1892                 }
 1893 
 1894                 nkpg = vm_page_alloc(NULL, pmap_pde_pindex(kernel_vm_end),
 1895                     VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
 1896                     VM_ALLOC_ZERO);
 1897                 if (nkpg == NULL)
 1898                         panic("pmap_growkernel: no memory to grow kernel");
 1899                 if ((nkpg->flags & PG_ZERO) == 0)
 1900                         pmap_zero_page(nkpg);
 1901                 paddr = VM_PAGE_TO_PHYS(nkpg);
 1902                 newpdir = (pd_entry_t) (paddr | PG_V | PG_RW | PG_A | PG_M);
 1903                 pde_store(pde, newpdir);
 1904 
 1905                 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
 1906                 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
 1907                         kernel_vm_end = kernel_map->max_offset;
 1908                         break;                       
 1909                 }
 1910         }
 1911 }
 1912 
 1913 
 1914 /***************************************************
 1915  * page management routines.
 1916  ***************************************************/
 1917 
 1918 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
 1919 CTASSERT(_NPCM == 3);
 1920 CTASSERT(_NPCPV == 168);
 1921 
 1922 static __inline struct pv_chunk *
 1923 pv_to_chunk(pv_entry_t pv)
 1924 {
 1925 
 1926         return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK);
 1927 }
 1928 
 1929 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
 1930 
 1931 #define PC_FREE0        0xfffffffffffffffful
 1932 #define PC_FREE1        0xfffffffffffffffful
 1933 #define PC_FREE2        0x000000fffffffffful
 1934 
 1935 static uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1, PC_FREE2 };
 1936 
 1937 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
 1938         "Current number of pv entries");
 1939 
 1940 #ifdef PV_STATS
 1941 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
 1942 
 1943 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
 1944         "Current number of pv entry chunks");
 1945 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
 1946         "Current number of pv entry chunks allocated");
 1947 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
 1948         "Current number of pv entry chunks frees");
 1949 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
 1950         "Number of times tried to get a chunk page but failed.");
 1951 
 1952 static long pv_entry_frees, pv_entry_allocs;
 1953 static int pv_entry_spare;
 1954 
 1955 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
 1956         "Current number of pv entry frees");
 1957 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
 1958         "Current number of pv entry allocs");
 1959 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
 1960         "Current number of spare pv entries");
 1961 
 1962 static int pmap_collect_inactive, pmap_collect_active;
 1963 
 1964 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
 1965         "Current number times pmap_collect called on inactive queue");
 1966 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
 1967         "Current number times pmap_collect called on active queue");
 1968 #endif
 1969 
 1970 /*
 1971  * We are in a serious low memory condition.  Resort to
 1972  * drastic measures to free some pages so we can allocate
 1973  * another pv entry chunk.  This is normally called to
 1974  * unmap inactive pages, and if necessary, active pages.
 1975  *
 1976  * We do not, however, unmap 2mpages because subsequent accesses will
 1977  * allocate per-page pv entries until repromotion occurs, thereby
 1978  * exacerbating the shortage of free pv entries.
 1979  */
 1980 static void
 1981 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
 1982 {
 1983         struct md_page *pvh;
 1984         pd_entry_t *pde;
 1985         pmap_t pmap;
 1986         pt_entry_t *pte, tpte;
 1987         pv_entry_t next_pv, pv;
 1988         vm_offset_t va;
 1989         vm_page_t m, free;
 1990 
 1991         TAILQ_FOREACH(m, &vpq->pl, pageq) {
 1992                 if ((m->flags & PG_MARKER) != 0 || m->hold_count || m->busy)
 1993                         continue;
 1994                 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
 1995                         va = pv->pv_va;
 1996                         pmap = PV_PMAP(pv);
 1997                         /* Avoid deadlock and lock recursion. */
 1998                         if (pmap > locked_pmap)
 1999                                 PMAP_LOCK(pmap);
 2000                         else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
 2001                                 continue;
 2002                         pmap->pm_stats.resident_count--;
 2003                         pde = pmap_pde(pmap, va);
 2004                         KASSERT((*pde & PG_PS) == 0, ("pmap_collect: found"
 2005                             " a 2mpage in page %p's pv list", m));
 2006                         pte = pmap_pde_to_pte(pde, va);
 2007                         tpte = pte_load_clear(pte);
 2008                         KASSERT((tpte & PG_W) == 0,
 2009                             ("pmap_collect: wired pte %#lx", tpte));
 2010                         if (tpte & PG_A)
 2011                                 vm_page_flag_set(m, PG_REFERENCED);
 2012                         if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
 2013                                 vm_page_dirty(m);
 2014                         free = NULL;
 2015                         pmap_unuse_pt(pmap, va, *pde, &free);
 2016                         pmap_invalidate_page(pmap, va);
 2017                         pmap_free_zero_pages(free);
 2018                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 2019                         if (TAILQ_EMPTY(&m->md.pv_list)) {
 2020                                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 2021                                 if (TAILQ_EMPTY(&pvh->pv_list))
 2022                                         vm_page_flag_clear(m, PG_WRITEABLE);
 2023                         }
 2024                         free_pv_entry(pmap, pv);
 2025                         if (pmap != locked_pmap)
 2026                                 PMAP_UNLOCK(pmap);
 2027                 }
 2028         }
 2029 }
 2030 
 2031 
 2032 /*
 2033  * free the pv_entry back to the free list
 2034  */
 2035 static void
 2036 free_pv_entry(pmap_t pmap, pv_entry_t pv)
 2037 {
 2038         vm_page_t m;
 2039         struct pv_chunk *pc;
 2040         int idx, field, bit;
 2041 
 2042         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2043         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2044         PV_STAT(pv_entry_frees++);
 2045         PV_STAT(pv_entry_spare++);
 2046         pv_entry_count--;
 2047         pc = pv_to_chunk(pv);
 2048         idx = pv - &pc->pc_pventry[0];
 2049         field = idx / 64;
 2050         bit = idx % 64;
 2051         pc->pc_map[field] |= 1ul << bit;
 2052         /* move to head of list */
 2053         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
 2054         if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1 ||
 2055             pc->pc_map[2] != PC_FREE2) {
 2056                 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
 2057                 return;
 2058         }
 2059         PV_STAT(pv_entry_spare -= _NPCPV);
 2060         PV_STAT(pc_chunk_count--);
 2061         PV_STAT(pc_chunk_frees++);
 2062         /* entire chunk is free, return it */
 2063         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
 2064         dump_drop_page(m->phys_addr);
 2065         vm_page_unwire(m, 0);
 2066         vm_page_free(m);
 2067 }
 2068 
 2069 /*
 2070  * get a new pv_entry, allocating a block from the system
 2071  * when needed.
 2072  */
 2073 static pv_entry_t
 2074 get_pv_entry(pmap_t pmap, boolean_t try)
 2075 {
 2076         static vm_pindex_t colour;
 2077         struct vpgqueues *pq;
 2078         int bit, field;
 2079         pv_entry_t pv;
 2080         struct pv_chunk *pc;
 2081         vm_page_t m;
 2082 
 2083         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2084         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2085         PV_STAT(pv_entry_allocs++);
 2086         pq = NULL;
 2087 retry:
 2088         pc = TAILQ_FIRST(&pmap->pm_pvchunk);
 2089         if (pc != NULL) {
 2090                 for (field = 0; field < _NPCM; field++) {
 2091                         if (pc->pc_map[field]) {
 2092                                 bit = bsfq(pc->pc_map[field]);
 2093                                 break;
 2094                         }
 2095                 }
 2096                 if (field < _NPCM) {
 2097                         pv = &pc->pc_pventry[field * 64 + bit];
 2098                         pc->pc_map[field] &= ~(1ul << bit);
 2099                         /* If this was the last item, move it to tail */
 2100                         if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0 &&
 2101                             pc->pc_map[2] == 0) {
 2102                                 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
 2103                                 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc,
 2104                                     pc_list);
 2105                         }
 2106                         pv_entry_count++;
 2107                         PV_STAT(pv_entry_spare--);
 2108                         return (pv);
 2109                 }
 2110         }
 2111         /* No free items, allocate another chunk */
 2112         m = vm_page_alloc(NULL, colour, (pq == &vm_page_queues[PQ_ACTIVE] ?
 2113             VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | VM_ALLOC_NOOBJ |
 2114             VM_ALLOC_WIRED);
 2115         if (m == NULL) {
 2116                 if (try) {
 2117                         PV_STAT(pc_chunk_tryfail++);
 2118                         return (NULL);
 2119                 }
 2120                 /*
 2121                  * Reclaim pv entries: At first, destroy mappings to inactive
 2122                  * pages.  After that, if a pv chunk entry is still needed,
 2123                  * destroy mappings to active pages.
 2124                  */
 2125                 if (pq == NULL) {
 2126                         PV_STAT(pmap_collect_inactive++);
 2127                         pq = &vm_page_queues[PQ_INACTIVE];
 2128                 } else if (pq == &vm_page_queues[PQ_INACTIVE]) {
 2129                         PV_STAT(pmap_collect_active++);
 2130                         pq = &vm_page_queues[PQ_ACTIVE];
 2131                 } else
 2132                         panic("get_pv_entry: allocation failed");
 2133                 pmap_collect(pmap, pq);
 2134                 goto retry;
 2135         }
 2136         PV_STAT(pc_chunk_count++);
 2137         PV_STAT(pc_chunk_allocs++);
 2138         colour++;
 2139         dump_add_page(m->phys_addr);
 2140         pc = (void *)PHYS_TO_DMAP(m->phys_addr);
 2141         pc->pc_pmap = pmap;
 2142         pc->pc_map[0] = PC_FREE0 & ~1ul;        /* preallocated bit 0 */
 2143         pc->pc_map[1] = PC_FREE1;
 2144         pc->pc_map[2] = PC_FREE2;
 2145         pv = &pc->pc_pventry[0];
 2146         TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
 2147         pv_entry_count++;
 2148         PV_STAT(pv_entry_spare += _NPCPV - 1);
 2149         return (pv);
 2150 }
 2151 
 2152 /*
 2153  * First find and then remove the pv entry for the specified pmap and virtual
 2154  * address from the specified pv list.  Returns the pv entry if found and NULL
 2155  * otherwise.  This operation can be performed on pv lists for either 4KB or
 2156  * 2MB page mappings.
 2157  */
 2158 static __inline pv_entry_t
 2159 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
 2160 {
 2161         pv_entry_t pv;
 2162 
 2163         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2164         TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
 2165                 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
 2166                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
 2167                         break;
 2168                 }
 2169         }
 2170         return (pv);
 2171 }
 2172 
 2173 /*
 2174  * After demotion from a 2MB page mapping to 512 4KB page mappings,
 2175  * destroy the pv entry for the 2MB page mapping and reinstantiate the pv
 2176  * entries for each of the 4KB page mappings.
 2177  */
 2178 static void
 2179 pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
 2180 {
 2181         struct md_page *pvh;
 2182         pv_entry_t pv;
 2183         vm_offset_t va_last;
 2184         vm_page_t m;
 2185 
 2186         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2187         KASSERT((pa & PDRMASK) == 0,
 2188             ("pmap_pv_demote_pde: pa is not 2mpage aligned"));
 2189 
 2190         /*
 2191          * Transfer the 2mpage's pv entry for this mapping to the first
 2192          * page's pv list.
 2193          */
 2194         pvh = pa_to_pvh(pa);
 2195         va = trunc_2mpage(va);
 2196         pv = pmap_pvh_remove(pvh, pmap, va);
 2197         KASSERT(pv != NULL, ("pmap_pv_demote_pde: pv not found"));
 2198         m = PHYS_TO_VM_PAGE(pa);
 2199         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
 2200         /* Instantiate the remaining NPTEPG - 1 pv entries. */
 2201         va_last = va + NBPDR - PAGE_SIZE;
 2202         do {
 2203                 m++;
 2204                 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
 2205                     ("pmap_pv_demote_pde: page %p is not managed", m));
 2206                 va += PAGE_SIZE;
 2207                 pmap_insert_entry(pmap, va, m);
 2208         } while (va < va_last);
 2209 }
 2210 
 2211 /*
 2212  * After promotion from 512 4KB page mappings to a single 2MB page mapping,
 2213  * replace the many pv entries for the 4KB page mappings by a single pv entry
 2214  * for the 2MB page mapping.
 2215  */
 2216 static void
 2217 pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
 2218 {
 2219         struct md_page *pvh;
 2220         pv_entry_t pv;
 2221         vm_offset_t va_last;
 2222         vm_page_t m;
 2223 
 2224         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2225         KASSERT((pa & PDRMASK) == 0,
 2226             ("pmap_pv_promote_pde: pa is not 2mpage aligned"));
 2227 
 2228         /*
 2229          * Transfer the first page's pv entry for this mapping to the
 2230          * 2mpage's pv list.  Aside from avoiding the cost of a call
 2231          * to get_pv_entry(), a transfer avoids the possibility that
 2232          * get_pv_entry() calls pmap_collect() and that pmap_collect()
 2233          * removes one of the mappings that is being promoted.
 2234          */
 2235         m = PHYS_TO_VM_PAGE(pa);
 2236         va = trunc_2mpage(va);
 2237         pv = pmap_pvh_remove(&m->md, pmap, va);
 2238         KASSERT(pv != NULL, ("pmap_pv_promote_pde: pv not found"));
 2239         pvh = pa_to_pvh(pa);
 2240         TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
 2241         /* Free the remaining NPTEPG - 1 pv entries. */
 2242         va_last = va + NBPDR - PAGE_SIZE;
 2243         do {
 2244                 m++;
 2245                 va += PAGE_SIZE;
 2246                 pmap_pvh_free(&m->md, pmap, va);
 2247         } while (va < va_last);
 2248 }
 2249 
 2250 /*
 2251  * First find and then destroy the pv entry for the specified pmap and virtual
 2252  * address.  This operation can be performed on pv lists for either 4KB or 2MB
 2253  * page mappings.
 2254  */
 2255 static void
 2256 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
 2257 {
 2258         pv_entry_t pv;
 2259 
 2260         pv = pmap_pvh_remove(pvh, pmap, va);
 2261         KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
 2262         free_pv_entry(pmap, pv);
 2263 }
 2264 
 2265 static void
 2266 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
 2267 {
 2268         struct md_page *pvh;
 2269 
 2270         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2271         pmap_pvh_free(&m->md, pmap, va);
 2272         if (TAILQ_EMPTY(&m->md.pv_list)) {
 2273                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 2274                 if (TAILQ_EMPTY(&pvh->pv_list))
 2275                         vm_page_flag_clear(m, PG_WRITEABLE);
 2276         }
 2277 }
 2278 
 2279 /*
 2280  * Create a pv entry for page at pa for
 2281  * (pmap, va).
 2282  */
 2283 static void
 2284 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
 2285 {
 2286         pv_entry_t pv;
 2287 
 2288         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2289         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2290         pv = get_pv_entry(pmap, FALSE);
 2291         pv->pv_va = va;
 2292         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
 2293 }
 2294 
 2295 /*
 2296  * Conditionally create a pv entry.
 2297  */
 2298 static boolean_t
 2299 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
 2300 {
 2301         pv_entry_t pv;
 2302 
 2303         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2304         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2305         if ((pv = get_pv_entry(pmap, TRUE)) != NULL) {
 2306                 pv->pv_va = va;
 2307                 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
 2308                 return (TRUE);
 2309         } else
 2310                 return (FALSE);
 2311 }
 2312 
 2313 /*
 2314  * Create the pv entry for a 2MB page mapping.
 2315  */
 2316 static boolean_t
 2317 pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
 2318 {
 2319         struct md_page *pvh;
 2320         pv_entry_t pv;
 2321 
 2322         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2323         if ((pv = get_pv_entry(pmap, TRUE)) != NULL) {
 2324                 pv->pv_va = va;
 2325                 pvh = pa_to_pvh(pa);
 2326                 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
 2327                 return (TRUE);
 2328         } else
 2329                 return (FALSE);
 2330 }
 2331 
 2332 /*
 2333  * Fills a page table page with mappings to consecutive physical pages.
 2334  */
 2335 static void
 2336 pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte)
 2337 {
 2338         pt_entry_t *pte;
 2339 
 2340         for (pte = firstpte; pte < firstpte + NPTEPG; pte++) {
 2341                 *pte = newpte;
 2342                 newpte += PAGE_SIZE;
 2343         }
 2344 }
 2345 
 2346 /*
 2347  * Tries to demote a 2MB page mapping.  If demotion fails, the 2MB page
 2348  * mapping is invalidated.
 2349  */
 2350 static boolean_t
 2351 pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
 2352 {
 2353         pd_entry_t newpde, oldpde;
 2354         pt_entry_t *firstpte, newpte;
 2355         vm_paddr_t mptepa;
 2356         vm_page_t free, mpte;
 2357 
 2358         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2359         oldpde = *pde;
 2360         KASSERT((oldpde & (PG_PS | PG_V)) == (PG_PS | PG_V),
 2361             ("pmap_demote_pde: oldpde is missing PG_PS and/or PG_V"));
 2362         mpte = pmap_lookup_pt_page(pmap, va);
 2363         if (mpte != NULL)
 2364                 pmap_remove_pt_page(pmap, mpte);
 2365         else {
 2366                 KASSERT((oldpde & PG_W) == 0,
 2367                     ("pmap_demote_pde: page table page for a wired mapping"
 2368                     " is missing"));
 2369 
 2370                 /*
 2371                  * Invalidate the 2MB page mapping and return "failure" if the
 2372                  * mapping was never accessed or the allocation of the new
 2373                  * page table page fails.  If the 2MB page mapping belongs to
 2374                  * the direct map region of the kernel's address space, then
 2375                  * the page allocation request specifies the highest possible
 2376                  * priority (VM_ALLOC_INTERRUPT).  Otherwise, the priority is
 2377                  * normal.  Page table pages are preallocated for every other
 2378                  * part of the kernel address space, so the direct map region
 2379                  * is the only part of the kernel address space that must be
 2380                  * handled here.
 2381                  */
 2382                 if ((oldpde & PG_A) == 0 || (mpte = vm_page_alloc(NULL,
 2383                     pmap_pde_pindex(va), (va >= DMAP_MIN_ADDRESS && va <
 2384                     DMAP_MAX_ADDRESS ? VM_ALLOC_INTERRUPT : VM_ALLOC_NORMAL) |
 2385                     VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
 2386                         free = NULL;
 2387                         pmap_remove_pde(pmap, pde, trunc_2mpage(va), &free);
 2388                         pmap_invalidate_page(pmap, trunc_2mpage(va));
 2389                         pmap_free_zero_pages(free);
 2390                         CTR2(KTR_PMAP, "pmap_demote_pde: failure for va %#lx"
 2391                             " in pmap %p", va, pmap);
 2392                         return (FALSE);
 2393                 }
 2394                 if (va < VM_MAXUSER_ADDRESS)
 2395                         pmap->pm_stats.resident_count++;
 2396         }
 2397         mptepa = VM_PAGE_TO_PHYS(mpte);
 2398         firstpte = (pt_entry_t *)PHYS_TO_DMAP(mptepa);
 2399         newpde = mptepa | PG_M | PG_A | (oldpde & PG_U) | PG_RW | PG_V;
 2400         KASSERT((oldpde & PG_A) != 0,
 2401             ("pmap_demote_pde: oldpde is missing PG_A"));
 2402         KASSERT((oldpde & (PG_M | PG_RW)) != PG_RW,
 2403             ("pmap_demote_pde: oldpde is missing PG_M"));
 2404         newpte = oldpde & ~PG_PS;
 2405         if ((newpte & PG_PDE_PAT) != 0)
 2406                 newpte ^= PG_PDE_PAT | PG_PTE_PAT;
 2407 
 2408         /*
 2409          * If the page table page is new, initialize it.
 2410          */
 2411         if (mpte->wire_count == 1) {
 2412                 mpte->wire_count = NPTEPG;
 2413                 pmap_fill_ptp(firstpte, newpte);
 2414         }
 2415         KASSERT((*firstpte & PG_FRAME) == (newpte & PG_FRAME),
 2416             ("pmap_demote_pde: firstpte and newpte map different physical"
 2417             " addresses"));
 2418 
 2419         /*
 2420          * If the mapping has changed attributes, update the page table
 2421          * entries.
 2422          */
 2423         if ((*firstpte & PG_PTE_PROMOTE) != (newpte & PG_PTE_PROMOTE))
 2424                 pmap_fill_ptp(firstpte, newpte);
 2425 
 2426         /*
 2427          * Demote the mapping.  This pmap is locked.  The old PDE has
 2428          * PG_A set.  If the old PDE has PG_RW set, it also has PG_M
 2429          * set.  Thus, there is no danger of a race with another
 2430          * processor changing the setting of PG_A and/or PG_M between
 2431          * the read above and the store below. 
 2432          */
 2433         if (workaround_erratum383)
 2434                 pmap_update_pde(pmap, va, pde, newpde);
 2435         else
 2436                 pde_store(pde, newpde);
 2437 
 2438         /*
 2439          * Invalidate a stale recursive mapping of the page table page.
 2440          */
 2441         if (va >= VM_MAXUSER_ADDRESS)
 2442                 pmap_invalidate_page(pmap, (vm_offset_t)vtopte(va));
 2443 
 2444         /*
 2445          * Demote the pv entry.  This depends on the earlier demotion
 2446          * of the mapping.  Specifically, the (re)creation of a per-
 2447          * page pv entry might trigger the execution of pmap_collect(),
 2448          * which might reclaim a newly (re)created per-page pv entry
 2449          * and destroy the associated mapping.  In order to destroy
 2450          * the mapping, the PDE must have already changed from mapping
 2451          * the 2mpage to referencing the page table page.
 2452          */
 2453         if ((oldpde & PG_MANAGED) != 0)
 2454                 pmap_pv_demote_pde(pmap, va, oldpde & PG_PS_FRAME);
 2455 
 2456         pmap_pde_demotions++;
 2457         CTR2(KTR_PMAP, "pmap_demote_pde: success for va %#lx"
 2458             " in pmap %p", va, pmap);
 2459         return (TRUE);
 2460 }
 2461 
 2462 /*
 2463  * pmap_remove_pde: do the things to unmap a superpage in a process
 2464  */
 2465 static int
 2466 pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
 2467     vm_page_t *free)
 2468 {
 2469         struct md_page *pvh;
 2470         pd_entry_t oldpde;
 2471         vm_offset_t eva, va;
 2472         vm_page_t m, mpte;
 2473 
 2474         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2475         KASSERT((sva & PDRMASK) == 0,
 2476             ("pmap_remove_pde: sva is not 2mpage aligned"));
 2477         oldpde = pte_load_clear(pdq);
 2478         if (oldpde & PG_W)
 2479                 pmap->pm_stats.wired_count -= NBPDR / PAGE_SIZE;
 2480 
 2481         /*
 2482          * Machines that don't support invlpg, also don't support
 2483          * PG_G.
 2484          */
 2485         if (oldpde & PG_G)
 2486                 pmap_invalidate_page(kernel_pmap, sva);
 2487         pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
 2488         if (oldpde & PG_MANAGED) {
 2489                 pvh = pa_to_pvh(oldpde & PG_PS_FRAME);
 2490                 pmap_pvh_free(pvh, pmap, sva);
 2491                 eva = sva + NBPDR;
 2492                 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
 2493                     va < eva; va += PAGE_SIZE, m++) {
 2494                         if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
 2495                                 vm_page_dirty(m);
 2496                         if (oldpde & PG_A)
 2497                                 vm_page_flag_set(m, PG_REFERENCED);
 2498                         if (TAILQ_EMPTY(&m->md.pv_list) &&
 2499                             TAILQ_EMPTY(&pvh->pv_list))
 2500                                 vm_page_flag_clear(m, PG_WRITEABLE);
 2501                 }
 2502         }
 2503         if (pmap == kernel_pmap) {
 2504                 if (!pmap_demote_pde(pmap, pdq, sva))
 2505                         panic("pmap_remove_pde: failed demotion");
 2506         } else {
 2507                 mpte = pmap_lookup_pt_page(pmap, sva);
 2508                 if (mpte != NULL) {
 2509                         pmap_remove_pt_page(pmap, mpte);
 2510                         pmap->pm_stats.resident_count--;
 2511                         KASSERT(mpte->wire_count == NPTEPG,
 2512                             ("pmap_remove_pde: pte page wire count error"));
 2513                         mpte->wire_count = 0;
 2514                         pmap_add_delayed_free_list(mpte, free, FALSE);
 2515                         atomic_subtract_int(&cnt.v_wire_count, 1);
 2516                 }
 2517         }
 2518         return (pmap_unuse_pt(pmap, sva, *pmap_pdpe(pmap, sva), free));
 2519 }
 2520 
 2521 /*
 2522  * pmap_remove_pte: do the things to unmap a page in a process
 2523  */
 2524 static int
 2525 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, 
 2526     pd_entry_t ptepde, vm_page_t *free)
 2527 {
 2528         pt_entry_t oldpte;
 2529         vm_page_t m;
 2530 
 2531         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2532         oldpte = pte_load_clear(ptq);
 2533         if (oldpte & PG_W)
 2534                 pmap->pm_stats.wired_count -= 1;
 2535         pmap->pm_stats.resident_count -= 1;
 2536         if (oldpte & PG_MANAGED) {
 2537                 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME);
 2538                 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
 2539                         vm_page_dirty(m);
 2540                 if (oldpte & PG_A)
 2541                         vm_page_flag_set(m, PG_REFERENCED);
 2542                 pmap_remove_entry(pmap, m, va);
 2543         }
 2544         return (pmap_unuse_pt(pmap, va, ptepde, free));
 2545 }
 2546 
 2547 /*
 2548  * Remove a single page from a process address space
 2549  */
 2550 static void
 2551 pmap_remove_page(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, vm_page_t *free)
 2552 {
 2553         pt_entry_t *pte;
 2554 
 2555         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2556         if ((*pde & PG_V) == 0)
 2557                 return;
 2558         pte = pmap_pde_to_pte(pde, va);
 2559         if ((*pte & PG_V) == 0)
 2560                 return;
 2561         pmap_remove_pte(pmap, pte, va, *pde, free);
 2562         pmap_invalidate_page(pmap, va);
 2563 }
 2564 
 2565 /*
 2566  *      Remove the given range of addresses from the specified map.
 2567  *
 2568  *      It is assumed that the start and end are properly
 2569  *      rounded to the page size.
 2570  */
 2571 void
 2572 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
 2573 {
 2574         vm_offset_t va, va_next;
 2575         pml4_entry_t *pml4e;
 2576         pdp_entry_t *pdpe;
 2577         pd_entry_t ptpaddr, *pde;
 2578         pt_entry_t *pte;
 2579         vm_page_t free = NULL;
 2580         int anyvalid;
 2581 
 2582         /*
 2583          * Perform an unsynchronized read.  This is, however, safe.
 2584          */
 2585         if (pmap->pm_stats.resident_count == 0)
 2586                 return;
 2587 
 2588         anyvalid = 0;
 2589 
 2590         vm_page_lock_queues();
 2591         PMAP_LOCK(pmap);
 2592 
 2593         /*
 2594          * special handling of removing one page.  a very
 2595          * common operation and easy to short circuit some
 2596          * code.
 2597          */
 2598         if (sva + PAGE_SIZE == eva) {
 2599                 pde = pmap_pde(pmap, sva);
 2600                 if (pde && (*pde & PG_PS) == 0) {
 2601                         pmap_remove_page(pmap, sva, pde, &free);
 2602                         goto out;
 2603                 }
 2604         }
 2605 
 2606         for (; sva < eva; sva = va_next) {
 2607 
 2608                 if (pmap->pm_stats.resident_count == 0)
 2609                         break;
 2610 
 2611                 pml4e = pmap_pml4e(pmap, sva);
 2612                 if ((*pml4e & PG_V) == 0) {
 2613                         va_next = (sva + NBPML4) & ~PML4MASK;
 2614                         if (va_next < sva)
 2615                                 va_next = eva;
 2616                         continue;
 2617                 }
 2618 
 2619                 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
 2620                 if ((*pdpe & PG_V) == 0) {
 2621                         va_next = (sva + NBPDP) & ~PDPMASK;
 2622                         if (va_next < sva)
 2623                                 va_next = eva;
 2624                         continue;
 2625                 }
 2626 
 2627                 /*
 2628                  * Calculate index for next page table.
 2629                  */
 2630                 va_next = (sva + NBPDR) & ~PDRMASK;
 2631                 if (va_next < sva)
 2632                         va_next = eva;
 2633 
 2634                 pde = pmap_pdpe_to_pde(pdpe, sva);
 2635                 ptpaddr = *pde;
 2636 
 2637                 /*
 2638                  * Weed out invalid mappings.
 2639                  */
 2640                 if (ptpaddr == 0)
 2641                         continue;
 2642 
 2643                 /*
 2644                  * Check for large page.
 2645                  */
 2646                 if ((ptpaddr & PG_PS) != 0) {
 2647                         /*
 2648                          * Are we removing the entire large page?  If not,
 2649                          * demote the mapping and fall through.
 2650                          */
 2651                         if (sva + NBPDR == va_next && eva >= va_next) {
 2652                                 /*
 2653                                  * The TLB entry for a PG_G mapping is
 2654                                  * invalidated by pmap_remove_pde().
 2655                                  */
 2656                                 if ((ptpaddr & PG_G) == 0)
 2657                                         anyvalid = 1;
 2658                                 pmap_remove_pde(pmap, pde, sva, &free);
 2659                                 continue;
 2660                         } else if (!pmap_demote_pde(pmap, pde, sva)) {
 2661                                 /* The large page mapping was destroyed. */
 2662                                 continue;
 2663                         } else
 2664                                 ptpaddr = *pde;
 2665                 }
 2666 
 2667                 /*
 2668                  * Limit our scan to either the end of the va represented
 2669                  * by the current page table page, or to the end of the
 2670                  * range being removed.
 2671                  */
 2672                 if (va_next > eva)
 2673                         va_next = eva;
 2674 
 2675                 va = va_next;
 2676                 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
 2677                     sva += PAGE_SIZE) {
 2678                         if (*pte == 0) {
 2679                                 if (va != va_next) {
 2680                                         pmap_invalidate_range(pmap, va, sva);
 2681                                         va = va_next;
 2682                                 }
 2683                                 continue;
 2684                         }
 2685                         if ((*pte & PG_G) == 0)
 2686                                 anyvalid = 1;
 2687                         else if (va == va_next)
 2688                                 va = sva;
 2689                         if (pmap_remove_pte(pmap, pte, sva, ptpaddr, &free)) {
 2690                                 sva += PAGE_SIZE;
 2691                                 break;
 2692                         }
 2693                 }
 2694                 if (va != va_next)
 2695                         pmap_invalidate_range(pmap, va, sva);
 2696         }
 2697 out:
 2698         if (anyvalid)
 2699                 pmap_invalidate_all(pmap);
 2700         vm_page_unlock_queues();        
 2701         PMAP_UNLOCK(pmap);
 2702         pmap_free_zero_pages(free);
 2703 }
 2704 
 2705 /*
 2706  *      Routine:        pmap_remove_all
 2707  *      Function:
 2708  *              Removes this physical page from
 2709  *              all physical maps in which it resides.
 2710  *              Reflects back modify bits to the pager.
 2711  *
 2712  *      Notes:
 2713  *              Original versions of this routine were very
 2714  *              inefficient because they iteratively called
 2715  *              pmap_remove (slow...)
 2716  */
 2717 
 2718 void
 2719 pmap_remove_all(vm_page_t m)
 2720 {
 2721         struct md_page *pvh;
 2722         pv_entry_t pv;
 2723         pmap_t pmap;
 2724         pt_entry_t *pte, tpte;
 2725         pd_entry_t *pde;
 2726         vm_offset_t va;
 2727         vm_page_t free;
 2728 
 2729         KASSERT((m->flags & PG_FICTITIOUS) == 0,
 2730             ("pmap_remove_all: page %p is fictitious", m));
 2731         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 2732         pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 2733         while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
 2734                 va = pv->pv_va;
 2735                 pmap = PV_PMAP(pv);
 2736                 PMAP_LOCK(pmap);
 2737                 pde = pmap_pde(pmap, va);
 2738                 (void)pmap_demote_pde(pmap, pde, va);
 2739                 PMAP_UNLOCK(pmap);
 2740         }
 2741         while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
 2742                 pmap = PV_PMAP(pv);
 2743                 PMAP_LOCK(pmap);
 2744                 pmap->pm_stats.resident_count--;
 2745                 pde = pmap_pde(pmap, pv->pv_va);
 2746                 KASSERT((*pde & PG_PS) == 0, ("pmap_remove_all: found"
 2747                     " a 2mpage in page %p's pv list", m));
 2748                 pte = pmap_pde_to_pte(pde, pv->pv_va);
 2749                 tpte = pte_load_clear(pte);
 2750                 if (tpte & PG_W)
 2751                         pmap->pm_stats.wired_count--;
 2752                 if (tpte & PG_A)
 2753                         vm_page_flag_set(m, PG_REFERENCED);
 2754 
 2755                 /*
 2756                  * Update the vm_page_t clean and reference bits.
 2757                  */
 2758                 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
 2759                         vm_page_dirty(m);
 2760                 free = NULL;
 2761                 pmap_unuse_pt(pmap, pv->pv_va, *pde, &free);
 2762                 pmap_invalidate_page(pmap, pv->pv_va);
 2763                 pmap_free_zero_pages(free);
 2764                 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 2765                 free_pv_entry(pmap, pv);
 2766                 PMAP_UNLOCK(pmap);
 2767         }
 2768         vm_page_flag_clear(m, PG_WRITEABLE);
 2769 }
 2770 
 2771 /*
 2772  * pmap_protect_pde: do the things to protect a 2mpage in a process
 2773  */
 2774 static boolean_t
 2775 pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, vm_prot_t prot)
 2776 {
 2777         pd_entry_t newpde, oldpde;
 2778         vm_offset_t eva, va;
 2779         vm_page_t m;
 2780         boolean_t anychanged;
 2781 
 2782         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2783         KASSERT((sva & PDRMASK) == 0,
 2784             ("pmap_protect_pde: sva is not 2mpage aligned"));
 2785         anychanged = FALSE;
 2786 retry:
 2787         oldpde = newpde = *pde;
 2788         if (oldpde & PG_MANAGED) {
 2789                 eva = sva + NBPDR;
 2790                 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
 2791                     va < eva; va += PAGE_SIZE, m++) {
 2792                         /*
 2793                          * In contrast to the analogous operation on a 4KB page
 2794                          * mapping, the mapping's PG_A flag is not cleared and
 2795                          * the page's PG_REFERENCED flag is not set.  The
 2796                          * reason is that pmap_demote_pde() expects that a 2MB
 2797                          * page mapping with a stored page table page has PG_A
 2798                          * set.
 2799                          */
 2800                         if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
 2801                                 vm_page_dirty(m);
 2802                 }
 2803         }
 2804         if ((prot & VM_PROT_WRITE) == 0)
 2805                 newpde &= ~(PG_RW | PG_M);
 2806         if ((prot & VM_PROT_EXECUTE) == 0)
 2807                 newpde |= pg_nx;
 2808         if (newpde != oldpde) {
 2809                 if (!atomic_cmpset_long(pde, oldpde, newpde))
 2810                         goto retry;
 2811                 if (oldpde & PG_G)
 2812                         pmap_invalidate_page(pmap, sva);
 2813                 else
 2814                         anychanged = TRUE;
 2815         }
 2816         return (anychanged);
 2817 }
 2818 
 2819 /*
 2820  *      Set the physical protection on the
 2821  *      specified range of this map as requested.
 2822  */
 2823 void
 2824 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
 2825 {
 2826         vm_offset_t va_next;
 2827         pml4_entry_t *pml4e;
 2828         pdp_entry_t *pdpe;
 2829         pd_entry_t ptpaddr, *pde;
 2830         pt_entry_t *pte;
 2831         int anychanged;
 2832 
 2833         if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
 2834                 pmap_remove(pmap, sva, eva);
 2835                 return;
 2836         }
 2837 
 2838         if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
 2839             (VM_PROT_WRITE|VM_PROT_EXECUTE))
 2840                 return;
 2841 
 2842         anychanged = 0;
 2843 
 2844         vm_page_lock_queues();
 2845         PMAP_LOCK(pmap);
 2846         for (; sva < eva; sva = va_next) {
 2847 
 2848                 pml4e = pmap_pml4e(pmap, sva);
 2849                 if ((*pml4e & PG_V) == 0) {
 2850                         va_next = (sva + NBPML4) & ~PML4MASK;
 2851                         if (va_next < sva)
 2852                                 va_next = eva;
 2853                         continue;
 2854                 }
 2855 
 2856                 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
 2857                 if ((*pdpe & PG_V) == 0) {
 2858                         va_next = (sva + NBPDP) & ~PDPMASK;
 2859                         if (va_next < sva)
 2860                                 va_next = eva;
 2861                         continue;
 2862                 }
 2863 
 2864                 va_next = (sva + NBPDR) & ~PDRMASK;
 2865                 if (va_next < sva)
 2866                         va_next = eva;
 2867 
 2868                 pde = pmap_pdpe_to_pde(pdpe, sva);
 2869                 ptpaddr = *pde;
 2870 
 2871                 /*
 2872                  * Weed out invalid mappings.
 2873                  */
 2874                 if (ptpaddr == 0)
 2875                         continue;
 2876 
 2877                 /*
 2878                  * Check for large page.
 2879                  */
 2880                 if ((ptpaddr & PG_PS) != 0) {
 2881                         /*
 2882                          * Are we protecting the entire large page?  If not,
 2883                          * demote the mapping and fall through.
 2884                          */
 2885                         if (sva + NBPDR == va_next && eva >= va_next) {
 2886                                 /*
 2887                                  * The TLB entry for a PG_G mapping is
 2888                                  * invalidated by pmap_protect_pde().
 2889                                  */
 2890                                 if (pmap_protect_pde(pmap, pde, sva, prot))
 2891                                         anychanged = 1;
 2892                                 continue;
 2893                         } else if (!pmap_demote_pde(pmap, pde, sva)) {
 2894                                 /* The large page mapping was destroyed. */
 2895                                 continue;
 2896                         }
 2897                 }
 2898 
 2899                 if (va_next > eva)
 2900                         va_next = eva;
 2901 
 2902                 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
 2903                     sva += PAGE_SIZE) {
 2904                         pt_entry_t obits, pbits;
 2905                         vm_page_t m;
 2906 
 2907 retry:
 2908                         obits = pbits = *pte;
 2909                         if ((pbits & PG_V) == 0)
 2910                                 continue;
 2911                         if (pbits & PG_MANAGED) {
 2912                                 m = NULL;
 2913                                 if (pbits & PG_A) {
 2914                                         m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
 2915                                         vm_page_flag_set(m, PG_REFERENCED);
 2916                                         pbits &= ~PG_A;
 2917                                 }
 2918                                 if ((pbits & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
 2919                                         if (m == NULL)
 2920                                                 m = PHYS_TO_VM_PAGE(pbits &
 2921                                                     PG_FRAME);
 2922                                         vm_page_dirty(m);
 2923                                 }
 2924                         }
 2925 
 2926                         if ((prot & VM_PROT_WRITE) == 0)
 2927                                 pbits &= ~(PG_RW | PG_M);
 2928                         if ((prot & VM_PROT_EXECUTE) == 0)
 2929                                 pbits |= pg_nx;
 2930 
 2931                         if (pbits != obits) {
 2932                                 if (!atomic_cmpset_long(pte, obits, pbits))
 2933                                         goto retry;
 2934                                 if (obits & PG_G)
 2935                                         pmap_invalidate_page(pmap, sva);
 2936                                 else
 2937                                         anychanged = 1;
 2938                         }
 2939                 }
 2940         }
 2941         if (anychanged)
 2942                 pmap_invalidate_all(pmap);
 2943         vm_page_unlock_queues();
 2944         PMAP_UNLOCK(pmap);
 2945 }
 2946 
 2947 /*
 2948  * Tries to promote the 512, contiguous 4KB page mappings that are within a
 2949  * single page table page (PTP) to a single 2MB page mapping.  For promotion
 2950  * to occur, two conditions must be met: (1) the 4KB page mappings must map
 2951  * aligned, contiguous physical memory and (2) the 4KB page mappings must have
 2952  * identical characteristics. 
 2953  */
 2954 static void
 2955 pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
 2956 {
 2957         pd_entry_t newpde;
 2958         pt_entry_t *firstpte, oldpte, pa, *pte;
 2959         vm_offset_t oldpteva;
 2960         vm_page_t mpte;
 2961 
 2962         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 2963 
 2964         /*
 2965          * Examine the first PTE in the specified PTP.  Abort if this PTE is
 2966          * either invalid, unused, or does not map the first 4KB physical page
 2967          * within a 2MB page. 
 2968          */
 2969         firstpte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
 2970 setpde:
 2971         newpde = *firstpte;
 2972         if ((newpde & ((PG_FRAME & PDRMASK) | PG_A | PG_V)) != (PG_A | PG_V)) {
 2973                 pmap_pde_p_failures++;
 2974                 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#lx"
 2975                     " in pmap %p", va, pmap);
 2976                 return;
 2977         }
 2978         if ((newpde & (PG_M | PG_RW)) == PG_RW) {
 2979                 /*
 2980                  * When PG_M is already clear, PG_RW can be cleared without
 2981                  * a TLB invalidation.
 2982                  */
 2983                 if (!atomic_cmpset_long(firstpte, newpde, newpde & ~PG_RW))
 2984                         goto setpde;
 2985                 newpde &= ~PG_RW;
 2986         }
 2987 
 2988         /*
 2989          * Examine each of the other PTEs in the specified PTP.  Abort if this
 2990          * PTE maps an unexpected 4KB physical page or does not have identical
 2991          * characteristics to the first PTE.
 2992          */
 2993         pa = (newpde & (PG_PS_FRAME | PG_A | PG_V)) + NBPDR - PAGE_SIZE;
 2994         for (pte = firstpte + NPTEPG - 1; pte > firstpte; pte--) {
 2995 setpte:
 2996                 oldpte = *pte;
 2997                 if ((oldpte & (PG_FRAME | PG_A | PG_V)) != pa) {
 2998                         pmap_pde_p_failures++;
 2999                         CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#lx"
 3000                             " in pmap %p", va, pmap);
 3001                         return;
 3002                 }
 3003                 if ((oldpte & (PG_M | PG_RW)) == PG_RW) {
 3004                         /*
 3005                          * When PG_M is already clear, PG_RW can be cleared
 3006                          * without a TLB invalidation.
 3007                          */
 3008                         if (!atomic_cmpset_long(pte, oldpte, oldpte & ~PG_RW))
 3009                                 goto setpte;
 3010                         oldpte &= ~PG_RW;
 3011                         oldpteva = (oldpte & PG_FRAME & PDRMASK) |
 3012                             (va & ~PDRMASK);
 3013                         CTR2(KTR_PMAP, "pmap_promote_pde: protect for va %#lx"
 3014                             " in pmap %p", oldpteva, pmap);
 3015                 }
 3016                 if ((oldpte & PG_PTE_PROMOTE) != (newpde & PG_PTE_PROMOTE)) {
 3017                         pmap_pde_p_failures++;
 3018                         CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#lx"
 3019                             " in pmap %p", va, pmap);
 3020                         return;
 3021                 }
 3022                 pa -= PAGE_SIZE;
 3023         }
 3024 
 3025         /*
 3026          * Save the page table page in its current state until the PDE
 3027          * mapping the superpage is demoted by pmap_demote_pde() or
 3028          * destroyed by pmap_remove_pde(). 
 3029          */
 3030         mpte = PHYS_TO_VM_PAGE(*pde & PG_FRAME);
 3031         KASSERT(mpte >= vm_page_array &&
 3032             mpte < &vm_page_array[vm_page_array_size],
 3033             ("pmap_promote_pde: page table page is out of range"));
 3034         KASSERT(mpte->pindex == pmap_pde_pindex(va),
 3035             ("pmap_promote_pde: page table page's pindex is wrong"));
 3036         pmap_insert_pt_page(pmap, mpte);
 3037 
 3038         /*
 3039          * Promote the pv entries.
 3040          */
 3041         if ((newpde & PG_MANAGED) != 0)
 3042                 pmap_pv_promote_pde(pmap, va, newpde & PG_PS_FRAME);
 3043 
 3044         /*
 3045          * Propagate the PAT index to its proper position.
 3046          */
 3047         if ((newpde & PG_PTE_PAT) != 0)
 3048                 newpde ^= PG_PDE_PAT | PG_PTE_PAT;
 3049 
 3050         /*
 3051          * Map the superpage.
 3052          */
 3053         if (workaround_erratum383)
 3054                 pmap_update_pde(pmap, va, pde, PG_PS | newpde);
 3055         else
 3056                 pde_store(pde, PG_PS | newpde);
 3057 
 3058         pmap_pde_promotions++;
 3059         CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#lx"
 3060             " in pmap %p", va, pmap);
 3061 }
 3062 
 3063 /*
 3064  *      Insert the given physical page (p) at
 3065  *      the specified virtual address (v) in the
 3066  *      target physical map with the protection requested.
 3067  *
 3068  *      If specified, the page will be wired down, meaning
 3069  *      that the related pte can not be reclaimed.
 3070  *
 3071  *      NB:  This is the only routine which MAY NOT lazy-evaluate
 3072  *      or lose information.  That is, this routine must actually
 3073  *      insert this page into the given map NOW.
 3074  */
 3075 void
 3076 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
 3077     vm_prot_t prot, boolean_t wired)
 3078 {
 3079         vm_paddr_t pa;
 3080         pd_entry_t *pde;
 3081         pt_entry_t *pte;
 3082         vm_paddr_t opa;
 3083         pt_entry_t origpte, newpte;
 3084         vm_page_t mpte, om;
 3085         boolean_t invlva;
 3086 
 3087         va = trunc_page(va);
 3088         KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
 3089         KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS,
 3090             ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%lx)", va));
 3091 
 3092         mpte = NULL;
 3093 
 3094         vm_page_lock_queues();
 3095         PMAP_LOCK(pmap);
 3096 
 3097         /*
 3098          * In the case that a page table page is not
 3099          * resident, we are creating it here.
 3100          */
 3101         if (va < VM_MAXUSER_ADDRESS) {
 3102                 mpte = pmap_allocpte(pmap, va, M_WAITOK);
 3103         }
 3104 
 3105         pde = pmap_pde(pmap, va);
 3106         if (pde != NULL && (*pde & PG_V) != 0) {
 3107                 if ((*pde & PG_PS) != 0)
 3108                         panic("pmap_enter: attempted pmap_enter on 2MB page");
 3109                 pte = pmap_pde_to_pte(pde, va);
 3110         } else
 3111                 panic("pmap_enter: invalid page directory va=%#lx", va);
 3112 
 3113         pa = VM_PAGE_TO_PHYS(m);
 3114         om = NULL;
 3115         origpte = *pte;
 3116         opa = origpte & PG_FRAME;
 3117 
 3118         /*
 3119          * Mapping has not changed, must be protection or wiring change.
 3120          */
 3121         if (origpte && (opa == pa)) {
 3122                 /*
 3123                  * Wiring change, just update stats. We don't worry about
 3124                  * wiring PT pages as they remain resident as long as there
 3125                  * are valid mappings in them. Hence, if a user page is wired,
 3126                  * the PT page will be also.
 3127                  */
 3128                 if (wired && ((origpte & PG_W) == 0))
 3129                         pmap->pm_stats.wired_count++;
 3130                 else if (!wired && (origpte & PG_W))
 3131                         pmap->pm_stats.wired_count--;
 3132 
 3133                 /*
 3134                  * Remove extra pte reference
 3135                  */
 3136                 if (mpte)
 3137                         mpte->wire_count--;
 3138 
 3139                 /*
 3140                  * We might be turning off write access to the page,
 3141                  * so we go ahead and sense modify status.
 3142                  */
 3143                 if (origpte & PG_MANAGED) {
 3144                         om = m;
 3145                         pa |= PG_MANAGED;
 3146                 }
 3147                 goto validate;
 3148         } 
 3149         /*
 3150          * Mapping has changed, invalidate old range and fall through to
 3151          * handle validating new mapping.
 3152          */
 3153         if (opa) {
 3154                 if (origpte & PG_W)
 3155                         pmap->pm_stats.wired_count--;
 3156                 if (origpte & PG_MANAGED) {
 3157                         om = PHYS_TO_VM_PAGE(opa);
 3158                         pmap_remove_entry(pmap, om, va);
 3159                 }
 3160                 if (mpte != NULL) {
 3161                         mpte->wire_count--;
 3162                         KASSERT(mpte->wire_count > 0,
 3163                             ("pmap_enter: missing reference to page table page,"
 3164                              " va: 0x%lx", va));
 3165                 }
 3166         } else
 3167                 pmap->pm_stats.resident_count++;
 3168 
 3169         /*
 3170          * Enter on the PV list if part of our managed memory.
 3171          */
 3172         if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
 3173                 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
 3174                     ("pmap_enter: managed mapping within the clean submap"));
 3175                 pmap_insert_entry(pmap, va, m);
 3176                 pa |= PG_MANAGED;
 3177         }
 3178 
 3179         /*
 3180          * Increment counters
 3181          */
 3182         if (wired)
 3183                 pmap->pm_stats.wired_count++;
 3184 
 3185 validate:
 3186         /*
 3187          * Now validate mapping with desired protection/wiring.
 3188          */
 3189         newpte = (pt_entry_t)(pa | pmap_cache_bits(m->md.pat_mode, 0) | PG_V);
 3190         if ((prot & VM_PROT_WRITE) != 0) {
 3191                 newpte |= PG_RW;
 3192                 vm_page_flag_set(m, PG_WRITEABLE);
 3193         }
 3194         if ((prot & VM_PROT_EXECUTE) == 0)
 3195                 newpte |= pg_nx;
 3196         if (wired)
 3197                 newpte |= PG_W;
 3198         if (va < VM_MAXUSER_ADDRESS)
 3199                 newpte |= PG_U;
 3200         if (pmap == kernel_pmap)
 3201                 newpte |= PG_G;
 3202 
 3203         /*
 3204          * if the mapping or permission bits are different, we need
 3205          * to update the pte.
 3206          */
 3207         if ((origpte & ~(PG_M|PG_A)) != newpte) {
 3208                 newpte |= PG_A;
 3209                 if ((access & VM_PROT_WRITE) != 0)
 3210                         newpte |= PG_M;
 3211                 if (origpte & PG_V) {
 3212                         invlva = FALSE;
 3213                         origpte = pte_load_store(pte, newpte);
 3214                         if (origpte & PG_A) {
 3215                                 if (origpte & PG_MANAGED)
 3216                                         vm_page_flag_set(om, PG_REFERENCED);
 3217                                 if (opa != VM_PAGE_TO_PHYS(m) || ((origpte &
 3218                                     PG_NX) == 0 && (newpte & PG_NX)))
 3219                                         invlva = TRUE;
 3220                         }
 3221                         if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
 3222                                 if ((origpte & PG_MANAGED) != 0)
 3223                                         vm_page_dirty(om);
 3224                                 if ((newpte & PG_RW) == 0)
 3225                                         invlva = TRUE;
 3226                         }
 3227                         if (invlva)
 3228                                 pmap_invalidate_page(pmap, va);
 3229                 } else
 3230                         pte_store(pte, newpte);
 3231         }
 3232 
 3233         /*
 3234          * If both the page table page and the reservation are fully
 3235          * populated, then attempt promotion.
 3236          */
 3237         if ((mpte == NULL || mpte->wire_count == NPTEPG) &&
 3238             pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0)
 3239                 pmap_promote_pde(pmap, pde, va);
 3240 
 3241         vm_page_unlock_queues();
 3242         PMAP_UNLOCK(pmap);
 3243 }
 3244 
 3245 /*
 3246  * Tries to create a 2MB page mapping.  Returns TRUE if successful and FALSE
 3247  * otherwise.  Fails if (1) a page table page cannot be allocated without
 3248  * blocking, (2) a mapping already exists at the specified virtual address, or
 3249  * (3) a pv entry cannot be allocated without reclaiming another pv entry. 
 3250  */
 3251 static boolean_t
 3252 pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
 3253 {
 3254         pd_entry_t *pde, newpde;
 3255         vm_page_t free, mpde;
 3256 
 3257         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3258         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 3259         if ((mpde = pmap_allocpde(pmap, va, M_NOWAIT)) == NULL) {
 3260                 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
 3261                     " in pmap %p", va, pmap);
 3262                 return (FALSE);
 3263         }
 3264         pde = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpde));
 3265         pde = &pde[pmap_pde_index(va)];
 3266         if ((*pde & PG_V) != 0) {
 3267                 KASSERT(mpde->wire_count > 1,
 3268                     ("pmap_enter_pde: mpde's wire count is too low"));
 3269                 mpde->wire_count--;
 3270                 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
 3271                     " in pmap %p", va, pmap);
 3272                 return (FALSE);
 3273         }
 3274         newpde = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 1) |
 3275             PG_PS | PG_V;
 3276         if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
 3277                 newpde |= PG_MANAGED;
 3278 
 3279                 /*
 3280                  * Abort this mapping if its PV entry could not be created.
 3281                  */
 3282                 if (!pmap_pv_insert_pde(pmap, va, VM_PAGE_TO_PHYS(m))) {
 3283                         free = NULL;
 3284                         if (pmap_unwire_pte_hold(pmap, va, mpde, &free)) {
 3285                                 pmap_invalidate_page(pmap, va);
 3286                                 pmap_free_zero_pages(free);
 3287                         }
 3288                         CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
 3289                             " in pmap %p", va, pmap);
 3290                         return (FALSE);
 3291                 }
 3292         }
 3293         if ((prot & VM_PROT_EXECUTE) == 0)
 3294                 newpde |= pg_nx;
 3295         if (va < VM_MAXUSER_ADDRESS)
 3296                 newpde |= PG_U;
 3297 
 3298         /*
 3299          * Increment counters.
 3300          */
 3301         pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
 3302 
 3303         /*
 3304          * Map the superpage.
 3305          */
 3306         pde_store(pde, newpde);
 3307 
 3308         pmap_pde_mappings++;
 3309         CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx"
 3310             " in pmap %p", va, pmap);
 3311         return (TRUE);
 3312 }
 3313 
 3314 /*
 3315  * Maps a sequence of resident pages belonging to the same object.
 3316  * The sequence begins with the given page m_start.  This page is
 3317  * mapped at the given virtual address start.  Each subsequent page is
 3318  * mapped at a virtual address that is offset from start by the same
 3319  * amount as the page is offset from m_start within the object.  The
 3320  * last page in the sequence is the page with the largest offset from
 3321  * m_start that can be mapped at a virtual address less than the given
 3322  * virtual address end.  Not every virtual page between start and end
 3323  * is mapped; only those for which a resident page exists with the
 3324  * corresponding offset from m_start are mapped.
 3325  */
 3326 void
 3327 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
 3328     vm_page_t m_start, vm_prot_t prot)
 3329 {
 3330         vm_offset_t va;
 3331         vm_page_t m, mpte;
 3332         vm_pindex_t diff, psize;
 3333 
 3334         VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
 3335         psize = atop(end - start);
 3336         mpte = NULL;
 3337         m = m_start;
 3338         PMAP_LOCK(pmap);
 3339         while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
 3340                 va = start + ptoa(diff);
 3341                 if ((va & PDRMASK) == 0 && va + NBPDR <= end &&
 3342                     (VM_PAGE_TO_PHYS(m) & PDRMASK) == 0 &&
 3343                     pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0 &&
 3344                     pmap_enter_pde(pmap, va, m, prot))
 3345                         m = &m[NBPDR / PAGE_SIZE - 1];
 3346                 else
 3347                         mpte = pmap_enter_quick_locked(pmap, va, m, prot,
 3348                             mpte);
 3349                 m = TAILQ_NEXT(m, listq);
 3350         }
 3351         PMAP_UNLOCK(pmap);
 3352 }
 3353 
 3354 /*
 3355  * this code makes some *MAJOR* assumptions:
 3356  * 1. Current pmap & pmap exists.
 3357  * 2. Not wired.
 3358  * 3. Read access.
 3359  * 4. No page table pages.
 3360  * but is *MUCH* faster than pmap_enter...
 3361  */
 3362 
 3363 void
 3364 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
 3365 {
 3366 
 3367         PMAP_LOCK(pmap);
 3368         (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL);
 3369         PMAP_UNLOCK(pmap);
 3370 }
 3371 
 3372 static vm_page_t
 3373 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
 3374     vm_prot_t prot, vm_page_t mpte)
 3375 {
 3376         vm_page_t free;
 3377         pt_entry_t *pte;
 3378         vm_paddr_t pa;
 3379 
 3380         KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
 3381             (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
 3382             ("pmap_enter_quick_locked: managed mapping within the clean submap"));
 3383         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3384         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 3385 
 3386         /*
 3387          * In the case that a page table page is not
 3388          * resident, we are creating it here.
 3389          */
 3390         if (va < VM_MAXUSER_ADDRESS) {
 3391                 vm_pindex_t ptepindex;
 3392                 pd_entry_t *ptepa;
 3393 
 3394                 /*
 3395                  * Calculate pagetable page index
 3396                  */
 3397                 ptepindex = pmap_pde_pindex(va);
 3398                 if (mpte && (mpte->pindex == ptepindex)) {
 3399                         mpte->wire_count++;
 3400                 } else {
 3401                         /*
 3402                          * Get the page directory entry
 3403                          */
 3404                         ptepa = pmap_pde(pmap, va);
 3405 
 3406                         /*
 3407                          * If the page table page is mapped, we just increment
 3408                          * the hold count, and activate it.
 3409                          */
 3410                         if (ptepa && (*ptepa & PG_V) != 0) {
 3411                                 if (*ptepa & PG_PS)
 3412                                         return (NULL);
 3413                                 mpte = PHYS_TO_VM_PAGE(*ptepa & PG_FRAME);
 3414                                 mpte->wire_count++;
 3415                         } else {
 3416                                 mpte = _pmap_allocpte(pmap, ptepindex,
 3417                                     M_NOWAIT);
 3418                                 if (mpte == NULL)
 3419                                         return (mpte);
 3420                         }
 3421                 }
 3422                 pte = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte));
 3423                 pte = &pte[pmap_pte_index(va)];
 3424         } else {
 3425                 mpte = NULL;
 3426                 pte = vtopte(va);
 3427         }
 3428         if (*pte) {
 3429                 if (mpte != NULL) {
 3430                         mpte->wire_count--;
 3431                         mpte = NULL;
 3432                 }
 3433                 return (mpte);
 3434         }
 3435 
 3436         /*
 3437          * Enter on the PV list if part of our managed memory.
 3438          */
 3439         if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
 3440             !pmap_try_insert_pv_entry(pmap, va, m)) {
 3441                 if (mpte != NULL) {
 3442                         free = NULL;
 3443                         if (pmap_unwire_pte_hold(pmap, va, mpte, &free)) {
 3444                                 pmap_invalidate_page(pmap, va);
 3445                                 pmap_free_zero_pages(free);
 3446                         }
 3447                         mpte = NULL;
 3448                 }
 3449                 return (mpte);
 3450         }
 3451 
 3452         /*
 3453          * Increment counters
 3454          */
 3455         pmap->pm_stats.resident_count++;
 3456 
 3457         pa = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 0);
 3458         if ((prot & VM_PROT_EXECUTE) == 0)
 3459                 pa |= pg_nx;
 3460 
 3461         /*
 3462          * Now validate mapping with RO protection
 3463          */
 3464         if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
 3465                 pte_store(pte, pa | PG_V | PG_U);
 3466         else
 3467                 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
 3468         return mpte;
 3469 }
 3470 
 3471 /*
 3472  * Make a temporary mapping for a physical address.  This is only intended
 3473  * to be used for panic dumps.
 3474  */
 3475 void *
 3476 pmap_kenter_temporary(vm_paddr_t pa, int i)
 3477 {
 3478         vm_offset_t va;
 3479 
 3480         va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
 3481         pmap_kenter(va, pa);
 3482         invlpg(va);
 3483         return ((void *)crashdumpmap);
 3484 }
 3485 
 3486 /*
 3487  * This code maps large physical mmap regions into the
 3488  * processor address space.  Note that some shortcuts
 3489  * are taken, but the code works.
 3490  */
 3491 void
 3492 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
 3493     vm_pindex_t pindex, vm_size_t size)
 3494 {
 3495         pd_entry_t *pde;
 3496         vm_paddr_t pa, ptepa;
 3497         vm_page_t p, pdpg;
 3498         int pat_mode;
 3499 
 3500         VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
 3501         KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
 3502             ("pmap_object_init_pt: non-device object"));
 3503         if ((addr & (NBPDR - 1)) == 0 && (size & (NBPDR - 1)) == 0) {
 3504                 if (!vm_object_populate(object, pindex, pindex + atop(size)))
 3505                         return;
 3506                 p = vm_page_lookup(object, pindex);
 3507                 KASSERT(p->valid == VM_PAGE_BITS_ALL,
 3508                     ("pmap_object_init_pt: invalid page %p", p));
 3509                 pat_mode = p->md.pat_mode;
 3510 
 3511                 /*
 3512                  * Abort the mapping if the first page is not physically
 3513                  * aligned to a 2MB page boundary.
 3514                  */
 3515                 ptepa = VM_PAGE_TO_PHYS(p);
 3516                 if (ptepa & (NBPDR - 1))
 3517                         return;
 3518 
 3519                 /*
 3520                  * Skip the first page.  Abort the mapping if the rest of
 3521                  * the pages are not physically contiguous or have differing
 3522                  * memory attributes.
 3523                  */
 3524                 p = TAILQ_NEXT(p, listq);
 3525                 for (pa = ptepa + PAGE_SIZE; pa < ptepa + size;
 3526                     pa += PAGE_SIZE) {
 3527                         KASSERT(p->valid == VM_PAGE_BITS_ALL,
 3528                             ("pmap_object_init_pt: invalid page %p", p));
 3529                         if (pa != VM_PAGE_TO_PHYS(p) ||
 3530                             pat_mode != p->md.pat_mode)
 3531                                 return;
 3532                         p = TAILQ_NEXT(p, listq);
 3533                 }
 3534 
 3535                 /*
 3536                  * Map using 2MB pages.  Since "ptepa" is 2M aligned and
 3537                  * "size" is a multiple of 2M, adding the PAT setting to "pa"
 3538                  * will not affect the termination of this loop.
 3539                  */ 
 3540                 PMAP_LOCK(pmap);
 3541                 for (pa = ptepa | pmap_cache_bits(pat_mode, 1); pa < ptepa +
 3542                     size; pa += NBPDR) {
 3543                         pdpg = pmap_allocpde(pmap, addr, M_NOWAIT);
 3544                         if (pdpg == NULL) {
 3545                                 /*
 3546                                  * The creation of mappings below is only an
 3547                                  * optimization.  If a page directory page
 3548                                  * cannot be allocated without blocking,
 3549                                  * continue on to the next mapping rather than
 3550                                  * blocking.
 3551                                  */
 3552                                 addr += NBPDR;
 3553                                 continue;
 3554                         }
 3555                         pde = (pd_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pdpg));
 3556                         pde = &pde[pmap_pde_index(addr)];
 3557                         if ((*pde & PG_V) == 0) {
 3558                                 pde_store(pde, pa | PG_PS | PG_M | PG_A |
 3559                                     PG_U | PG_RW | PG_V);
 3560                                 pmap->pm_stats.resident_count += NBPDR /
 3561                                     PAGE_SIZE;
 3562                                 pmap_pde_mappings++;
 3563                         } else {
 3564                                 /* Continue on if the PDE is already valid. */
 3565                                 pdpg->wire_count--;
 3566                                 KASSERT(pdpg->wire_count > 0,
 3567                                     ("pmap_object_init_pt: missing reference "
 3568                                     "to page directory page, va: 0x%lx", addr));
 3569                         }
 3570                         addr += NBPDR;
 3571                 }
 3572                 PMAP_UNLOCK(pmap);
 3573         }
 3574 }
 3575 
 3576 /*
 3577  *      Routine:        pmap_change_wiring
 3578  *      Function:       Change the wiring attribute for a map/virtual-address
 3579  *                      pair.
 3580  *      In/out conditions:
 3581  *                      The mapping must already exist in the pmap.
 3582  */
 3583 void
 3584 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
 3585 {
 3586         pd_entry_t *pde;
 3587         pt_entry_t *pte;
 3588         boolean_t are_queues_locked;
 3589 
 3590         are_queues_locked = FALSE;
 3591 
 3592         /*
 3593          * Wiring is not a hardware characteristic so there is no need to
 3594          * invalidate TLB.
 3595          */
 3596 retry:
 3597         PMAP_LOCK(pmap);
 3598         pde = pmap_pde(pmap, va);
 3599         if ((*pde & PG_PS) != 0) {
 3600                 if (!wired != ((*pde & PG_W) == 0)) {
 3601                         if (!are_queues_locked) {
 3602                                 are_queues_locked = TRUE;
 3603                                 if (!mtx_trylock(&vm_page_queue_mtx)) {
 3604                                         PMAP_UNLOCK(pmap);
 3605                                         vm_page_lock_queues();
 3606                                         goto retry;
 3607                                 }
 3608                         }
 3609                         if (!pmap_demote_pde(pmap, pde, va))
 3610                                 panic("pmap_change_wiring: demotion failed");
 3611                 } else
 3612                         goto out;
 3613         }
 3614         pte = pmap_pde_to_pte(pde, va);
 3615         if (wired && (*pte & PG_W) == 0) {
 3616                 pmap->pm_stats.wired_count++;
 3617                 atomic_set_long(pte, PG_W);
 3618         } else if (!wired && (*pte & PG_W) != 0) {
 3619                 pmap->pm_stats.wired_count--;
 3620                 atomic_clear_long(pte, PG_W);
 3621         }
 3622 out:
 3623         if (are_queues_locked)
 3624                 vm_page_unlock_queues();
 3625         PMAP_UNLOCK(pmap);
 3626 }
 3627 
 3628 
 3629 
 3630 /*
 3631  *      Copy the range specified by src_addr/len
 3632  *      from the source map to the range dst_addr/len
 3633  *      in the destination map.
 3634  *
 3635  *      This routine is only advisory and need not do anything.
 3636  */
 3637 
 3638 void
 3639 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
 3640     vm_offset_t src_addr)
 3641 {
 3642         vm_page_t   free;
 3643         vm_offset_t addr;
 3644         vm_offset_t end_addr = src_addr + len;
 3645         vm_offset_t va_next;
 3646 
 3647         if (dst_addr != src_addr)
 3648                 return;
 3649 
 3650         vm_page_lock_queues();
 3651         if (dst_pmap < src_pmap) {
 3652                 PMAP_LOCK(dst_pmap);
 3653                 PMAP_LOCK(src_pmap);
 3654         } else {
 3655                 PMAP_LOCK(src_pmap);
 3656                 PMAP_LOCK(dst_pmap);
 3657         }
 3658         for (addr = src_addr; addr < end_addr; addr = va_next) {
 3659                 pt_entry_t *src_pte, *dst_pte;
 3660                 vm_page_t dstmpde, dstmpte, srcmpte;
 3661                 pml4_entry_t *pml4e;
 3662                 pdp_entry_t *pdpe;
 3663                 pd_entry_t srcptepaddr, *pde;
 3664 
 3665                 KASSERT(addr < UPT_MIN_ADDRESS,
 3666                     ("pmap_copy: invalid to pmap_copy page tables"));
 3667 
 3668                 pml4e = pmap_pml4e(src_pmap, addr);
 3669                 if ((*pml4e & PG_V) == 0) {
 3670                         va_next = (addr + NBPML4) & ~PML4MASK;
 3671                         if (va_next < addr)
 3672                                 va_next = end_addr;
 3673                         continue;
 3674                 }
 3675 
 3676                 pdpe = pmap_pml4e_to_pdpe(pml4e, addr);
 3677                 if ((*pdpe & PG_V) == 0) {
 3678                         va_next = (addr + NBPDP) & ~PDPMASK;
 3679                         if (va_next < addr)
 3680                                 va_next = end_addr;
 3681                         continue;
 3682                 }
 3683 
 3684                 va_next = (addr + NBPDR) & ~PDRMASK;
 3685                 if (va_next < addr)
 3686                         va_next = end_addr;
 3687 
 3688                 pde = pmap_pdpe_to_pde(pdpe, addr);
 3689                 srcptepaddr = *pde;
 3690                 if (srcptepaddr == 0)
 3691                         continue;
 3692                         
 3693                 if (srcptepaddr & PG_PS) {
 3694                         dstmpde = pmap_allocpde(dst_pmap, addr, M_NOWAIT);
 3695                         if (dstmpde == NULL)
 3696                                 break;
 3697                         pde = (pd_entry_t *)
 3698                             PHYS_TO_DMAP(VM_PAGE_TO_PHYS(dstmpde));
 3699                         pde = &pde[pmap_pde_index(addr)];
 3700                         if (*pde == 0 && ((srcptepaddr & PG_MANAGED) == 0 ||
 3701                             pmap_pv_insert_pde(dst_pmap, addr, srcptepaddr &
 3702                             PG_PS_FRAME))) {
 3703                                 *pde = srcptepaddr & ~PG_W;
 3704                                 dst_pmap->pm_stats.resident_count +=
 3705                                     NBPDR / PAGE_SIZE;
 3706                         } else
 3707                                 dstmpde->wire_count--;
 3708                         continue;
 3709                 }
 3710 
 3711                 srcptepaddr &= PG_FRAME;
 3712                 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr);
 3713                 KASSERT(srcmpte->wire_count > 0,
 3714                     ("pmap_copy: source page table page is unused"));
 3715 
 3716                 if (va_next > end_addr)
 3717                         va_next = end_addr;
 3718 
 3719                 src_pte = (pt_entry_t *)PHYS_TO_DMAP(srcptepaddr);
 3720                 src_pte = &src_pte[pmap_pte_index(addr)];
 3721                 dstmpte = NULL;
 3722                 while (addr < va_next) {
 3723                         pt_entry_t ptetemp;
 3724                         ptetemp = *src_pte;
 3725                         /*
 3726                          * we only virtual copy managed pages
 3727                          */
 3728                         if ((ptetemp & PG_MANAGED) != 0) {
 3729                                 if (dstmpte != NULL &&
 3730                                     dstmpte->pindex == pmap_pde_pindex(addr))
 3731                                         dstmpte->wire_count++;
 3732                                 else if ((dstmpte = pmap_allocpte(dst_pmap,
 3733                                     addr, M_NOWAIT)) == NULL)
 3734                                         goto out;
 3735                                 dst_pte = (pt_entry_t *)
 3736                                     PHYS_TO_DMAP(VM_PAGE_TO_PHYS(dstmpte));
 3737                                 dst_pte = &dst_pte[pmap_pte_index(addr)];
 3738                                 if (*dst_pte == 0 &&
 3739                                     pmap_try_insert_pv_entry(dst_pmap, addr,
 3740                                     PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) {
 3741                                         /*
 3742                                          * Clear the wired, modified, and
 3743                                          * accessed (referenced) bits
 3744                                          * during the copy.
 3745                                          */
 3746                                         *dst_pte = ptetemp & ~(PG_W | PG_M |
 3747                                             PG_A);
 3748                                         dst_pmap->pm_stats.resident_count++;
 3749                                 } else {
 3750                                         free = NULL;
 3751                                         if (pmap_unwire_pte_hold(dst_pmap,
 3752                                             addr, dstmpte, &free)) {
 3753                                                 pmap_invalidate_page(dst_pmap,
 3754                                                     addr);
 3755                                                 pmap_free_zero_pages(free);
 3756                                         }
 3757                                         goto out;
 3758                                 }
 3759                                 if (dstmpte->wire_count >= srcmpte->wire_count)
 3760                                         break;
 3761                         }
 3762                         addr += PAGE_SIZE;
 3763                         src_pte++;
 3764                 }
 3765         }
 3766 out:
 3767         vm_page_unlock_queues();
 3768         PMAP_UNLOCK(src_pmap);
 3769         PMAP_UNLOCK(dst_pmap);
 3770 }       
 3771 
 3772 /*
 3773  *      pmap_zero_page zeros the specified hardware page by mapping 
 3774  *      the page into KVM and using bzero to clear its contents.
 3775  */
 3776 void
 3777 pmap_zero_page(vm_page_t m)
 3778 {
 3779         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
 3780 
 3781         pagezero((void *)va);
 3782 }
 3783 
 3784 /*
 3785  *      pmap_zero_page_area zeros the specified hardware page by mapping 
 3786  *      the page into KVM and using bzero to clear its contents.
 3787  *
 3788  *      off and size may not cover an area beyond a single hardware page.
 3789  */
 3790 void
 3791 pmap_zero_page_area(vm_page_t m, int off, int size)
 3792 {
 3793         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
 3794 
 3795         if (off == 0 && size == PAGE_SIZE)
 3796                 pagezero((void *)va);
 3797         else
 3798                 bzero((char *)va + off, size);
 3799 }
 3800 
 3801 /*
 3802  *      pmap_zero_page_idle zeros the specified hardware page by mapping 
 3803  *      the page into KVM and using bzero to clear its contents.  This
 3804  *      is intended to be called from the vm_pagezero process only and
 3805  *      outside of Giant.
 3806  */
 3807 void
 3808 pmap_zero_page_idle(vm_page_t m)
 3809 {
 3810         vm_offset_t va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m));
 3811 
 3812         pagezero((void *)va);
 3813 }
 3814 
 3815 /*
 3816  *      pmap_copy_page copies the specified (machine independent)
 3817  *      page by mapping the page into virtual memory and using
 3818  *      bcopy to copy the page, one machine dependent page at a
 3819  *      time.
 3820  */
 3821 void
 3822 pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
 3823 {
 3824         vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc));
 3825         vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst));
 3826 
 3827         pagecopy((void *)src, (void *)dst);
 3828 }
 3829 
 3830 /*
 3831  * Returns true if the pmap's pv is one of the first
 3832  * 16 pvs linked to from this page.  This count may
 3833  * be changed upwards or downwards in the future; it
 3834  * is only necessary that true be returned for a small
 3835  * subset of pmaps for proper page aging.
 3836  */
 3837 boolean_t
 3838 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
 3839 {
 3840         struct md_page *pvh;
 3841         pv_entry_t pv;
 3842         int loops = 0;
 3843 
 3844         if (m->flags & PG_FICTITIOUS)
 3845                 return FALSE;
 3846 
 3847         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3848         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 3849                 if (PV_PMAP(pv) == pmap) {
 3850                         return TRUE;
 3851                 }
 3852                 loops++;
 3853                 if (loops >= 16)
 3854                         break;
 3855         }
 3856         if (loops < 16) {
 3857                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 3858                 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
 3859                         if (PV_PMAP(pv) == pmap)
 3860                                 return (TRUE);
 3861                         loops++;
 3862                         if (loops >= 16)
 3863                                 break;
 3864                 }
 3865         }
 3866         return (FALSE);
 3867 }
 3868 
 3869 /*
 3870  *      pmap_page_wired_mappings:
 3871  *
 3872  *      Return the number of managed mappings to the given physical page
 3873  *      that are wired.
 3874  */
 3875 int
 3876 pmap_page_wired_mappings(vm_page_t m)
 3877 {
 3878         int count;
 3879 
 3880         count = 0;
 3881         if ((m->flags & PG_FICTITIOUS) != 0)
 3882                 return (count);
 3883         count = pmap_pvh_wired_mappings(&m->md, count);
 3884         return (pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)), count));
 3885 }
 3886 
 3887 /*
 3888  *      pmap_pvh_wired_mappings:
 3889  *
 3890  *      Return the updated number "count" of managed mappings that are wired.
 3891  */
 3892 static int
 3893 pmap_pvh_wired_mappings(struct md_page *pvh, int count)
 3894 {
 3895         pmap_t pmap;
 3896         pt_entry_t *pte;
 3897         pv_entry_t pv;
 3898 
 3899         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3900         TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
 3901                 pmap = PV_PMAP(pv);
 3902                 PMAP_LOCK(pmap);
 3903                 pte = pmap_pte(pmap, pv->pv_va);
 3904                 if ((*pte & PG_W) != 0)
 3905                         count++;
 3906                 PMAP_UNLOCK(pmap);
 3907         }
 3908         return (count);
 3909 }
 3910 
 3911 /*
 3912  * Returns TRUE if the given page is mapped individually or as part of
 3913  * a 2mpage.  Otherwise, returns FALSE.
 3914  */
 3915 boolean_t
 3916 pmap_page_is_mapped(vm_page_t m)
 3917 {
 3918         struct md_page *pvh;
 3919 
 3920         if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
 3921                 return (FALSE);
 3922         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 3923         if (TAILQ_EMPTY(&m->md.pv_list)) {
 3924                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 3925                 return (!TAILQ_EMPTY(&pvh->pv_list));
 3926         } else
 3927                 return (TRUE);
 3928 }
 3929 
 3930 /*
 3931  * Remove all pages from specified address space
 3932  * this aids process exit speeds.  Also, this code
 3933  * is special cased for current process only, but
 3934  * can have the more generic (and slightly slower)
 3935  * mode enabled.  This is much faster than pmap_remove
 3936  * in the case of running down an entire address space.
 3937  */
 3938 void
 3939 pmap_remove_pages(pmap_t pmap)
 3940 {
 3941         pd_entry_t ptepde;
 3942         pt_entry_t *pte, tpte;
 3943         vm_page_t free = NULL;
 3944         vm_page_t m, mpte, mt;
 3945         pv_entry_t pv;
 3946         struct md_page *pvh;
 3947         struct pv_chunk *pc, *npc;
 3948         int field, idx;
 3949         int64_t bit;
 3950         uint64_t inuse, bitmask;
 3951         int allfree;
 3952 
 3953         if (pmap != PCPU_GET(curpmap)) {
 3954                 printf("warning: pmap_remove_pages called with non-current pmap\n");
 3955                 return;
 3956         }
 3957         vm_page_lock_queues();
 3958         PMAP_LOCK(pmap);
 3959         TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
 3960                 allfree = 1;
 3961                 for (field = 0; field < _NPCM; field++) {
 3962                         inuse = (~(pc->pc_map[field])) & pc_freemask[field];
 3963                         while (inuse != 0) {
 3964                                 bit = bsfq(inuse);
 3965                                 bitmask = 1UL << bit;
 3966                                 idx = field * 64 + bit;
 3967                                 pv = &pc->pc_pventry[idx];
 3968                                 inuse &= ~bitmask;
 3969 
 3970                                 pte = pmap_pdpe(pmap, pv->pv_va);
 3971                                 ptepde = *pte;
 3972                                 pte = pmap_pdpe_to_pde(pte, pv->pv_va);
 3973                                 tpte = *pte;
 3974                                 if ((tpte & (PG_PS | PG_V)) == PG_V) {
 3975                                         ptepde = tpte;
 3976                                         pte = (pt_entry_t *)PHYS_TO_DMAP(tpte &
 3977                                             PG_FRAME);
 3978                                         pte = &pte[pmap_pte_index(pv->pv_va)];
 3979                                         tpte = *pte & ~PG_PTE_PAT;
 3980                                 }
 3981                                 if ((tpte & PG_V) == 0)
 3982                                         panic("bad pte");
 3983 
 3984 /*
 3985  * We cannot remove wired pages from a process' mapping at this time
 3986  */
 3987                                 if (tpte & PG_W) {
 3988                                         allfree = 0;
 3989                                         continue;
 3990                                 }
 3991 
 3992                                 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
 3993                                 KASSERT(m->phys_addr == (tpte & PG_FRAME),
 3994                                     ("vm_page_t %p phys_addr mismatch %016jx %016jx",
 3995                                     m, (uintmax_t)m->phys_addr,
 3996                                     (uintmax_t)tpte));
 3997 
 3998                                 KASSERT(m < &vm_page_array[vm_page_array_size],
 3999                                         ("pmap_remove_pages: bad tpte %#jx",
 4000                                         (uintmax_t)tpte));
 4001 
 4002                                 pte_clear(pte);
 4003 
 4004                                 /*
 4005                                  * Update the vm_page_t clean/reference bits.
 4006                                  */
 4007                                 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
 4008                                         if ((tpte & PG_PS) != 0) {
 4009                                                 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
 4010                                                         vm_page_dirty(mt);
 4011                                         } else
 4012                                                 vm_page_dirty(m);
 4013                                 }
 4014 
 4015                                 /* Mark free */
 4016                                 PV_STAT(pv_entry_frees++);
 4017                                 PV_STAT(pv_entry_spare++);
 4018                                 pv_entry_count--;
 4019                                 pc->pc_map[field] |= bitmask;
 4020                                 if ((tpte & PG_PS) != 0) {
 4021                                         pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
 4022                                         pvh = pa_to_pvh(tpte & PG_PS_FRAME);
 4023                                         TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
 4024                                         if (TAILQ_EMPTY(&pvh->pv_list)) {
 4025                                                 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
 4026                                                         if (TAILQ_EMPTY(&mt->md.pv_list))
 4027                                                                 vm_page_flag_clear(mt, PG_WRITEABLE);
 4028                                         }
 4029                                         mpte = pmap_lookup_pt_page(pmap, pv->pv_va);
 4030                                         if (mpte != NULL) {
 4031                                                 pmap_remove_pt_page(pmap, mpte);
 4032                                                 pmap->pm_stats.resident_count--;
 4033                                                 KASSERT(mpte->wire_count == NPTEPG,
 4034                                                     ("pmap_remove_pages: pte page wire count error"));
 4035                                                 mpte->wire_count = 0;
 4036                                                 pmap_add_delayed_free_list(mpte, &free, FALSE);
 4037                                                 atomic_subtract_int(&cnt.v_wire_count, 1);
 4038                                         }
 4039                                 } else {
 4040                                         pmap->pm_stats.resident_count--;
 4041                                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 4042                                         if (TAILQ_EMPTY(&m->md.pv_list)) {
 4043                                                 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 4044                                                 if (TAILQ_EMPTY(&pvh->pv_list))
 4045                                                         vm_page_flag_clear(m, PG_WRITEABLE);
 4046                                         }
 4047                                 }
 4048                                 pmap_unuse_pt(pmap, pv->pv_va, ptepde, &free);
 4049                         }
 4050                 }
 4051                 if (allfree) {
 4052                         PV_STAT(pv_entry_spare -= _NPCPV);
 4053                         PV_STAT(pc_chunk_count--);
 4054                         PV_STAT(pc_chunk_frees++);
 4055                         TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
 4056                         m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc));
 4057                         dump_drop_page(m->phys_addr);
 4058                         vm_page_unwire(m, 0);
 4059                         vm_page_free(m);
 4060                 }
 4061         }
 4062         pmap_invalidate_all(pmap);
 4063         vm_page_unlock_queues();
 4064         PMAP_UNLOCK(pmap);
 4065         pmap_free_zero_pages(free);
 4066 }
 4067 
 4068 /*
 4069  *      pmap_is_modified:
 4070  *
 4071  *      Return whether or not the specified physical page was modified
 4072  *      in any physical maps.
 4073  */
 4074 boolean_t
 4075 pmap_is_modified(vm_page_t m)
 4076 {
 4077 
 4078         if (m->flags & PG_FICTITIOUS)
 4079                 return (FALSE);
 4080         if (pmap_is_modified_pvh(&m->md))
 4081                 return (TRUE);
 4082         return (pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
 4083 }
 4084 
 4085 /*
 4086  * Returns TRUE if any of the given mappings were used to modify
 4087  * physical memory.  Otherwise, returns FALSE.  Both page and 2mpage
 4088  * mappings are supported.
 4089  */
 4090 static boolean_t
 4091 pmap_is_modified_pvh(struct md_page *pvh)
 4092 {
 4093         pv_entry_t pv;
 4094         pt_entry_t *pte;
 4095         pmap_t pmap;
 4096         boolean_t rv;
 4097 
 4098         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 4099         rv = FALSE;
 4100         TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
 4101                 pmap = PV_PMAP(pv);
 4102                 PMAP_LOCK(pmap);
 4103                 pte = pmap_pte(pmap, pv->pv_va);
 4104                 rv = (*pte & (PG_M | PG_RW)) == (PG_M | PG_RW);
 4105                 PMAP_UNLOCK(pmap);
 4106                 if (rv)
 4107                         break;
 4108         }
 4109         return (rv);
 4110 }
 4111 
 4112 /*
 4113  *      pmap_is_prefaultable:
 4114  *
 4115  *      Return whether or not the specified virtual address is elgible
 4116  *      for prefault.
 4117  */
 4118 boolean_t
 4119 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
 4120 {
 4121         pd_entry_t *pde;
 4122         pt_entry_t *pte;
 4123         boolean_t rv;
 4124 
 4125         rv = FALSE;
 4126         PMAP_LOCK(pmap);
 4127         pde = pmap_pde(pmap, addr);
 4128         if (pde != NULL && (*pde & (PG_PS | PG_V)) == PG_V) {
 4129                 pte = pmap_pde_to_pte(pde, addr);
 4130                 rv = (*pte & PG_V) == 0;
 4131         }
 4132         PMAP_UNLOCK(pmap);
 4133         return (rv);
 4134 }
 4135 
 4136 /*
 4137  * Clear the write and modified bits in each of the given page's mappings.
 4138  */
 4139 void
 4140 pmap_remove_write(vm_page_t m)
 4141 {
 4142         struct md_page *pvh;
 4143         pmap_t pmap;
 4144         pv_entry_t next_pv, pv;
 4145         pd_entry_t *pde;
 4146         pt_entry_t oldpte, *pte;
 4147         vm_offset_t va;
 4148 
 4149         if ((m->flags & PG_FICTITIOUS) != 0 ||
 4150             (m->flags & PG_WRITEABLE) == 0)
 4151                 return;
 4152         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 4153         pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 4154         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
 4155                 va = pv->pv_va;
 4156                 pmap = PV_PMAP(pv);
 4157                 PMAP_LOCK(pmap);
 4158                 pde = pmap_pde(pmap, va);
 4159                 if ((*pde & PG_RW) != 0)
 4160                         (void)pmap_demote_pde(pmap, pde, va);
 4161                 PMAP_UNLOCK(pmap);
 4162         }
 4163         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 4164                 pmap = PV_PMAP(pv);
 4165                 PMAP_LOCK(pmap);
 4166                 pde = pmap_pde(pmap, pv->pv_va);
 4167                 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_write: found"
 4168                     " a 2mpage in page %p's pv list", m));
 4169                 pte = pmap_pde_to_pte(pde, pv->pv_va);
 4170 retry:
 4171                 oldpte = *pte;
 4172                 if (oldpte & PG_RW) {
 4173                         if (!atomic_cmpset_long(pte, oldpte, oldpte &
 4174                             ~(PG_RW | PG_M)))
 4175                                 goto retry;
 4176                         if ((oldpte & PG_M) != 0)
 4177                                 vm_page_dirty(m);
 4178                         pmap_invalidate_page(pmap, pv->pv_va);
 4179                 }
 4180                 PMAP_UNLOCK(pmap);
 4181         }
 4182         vm_page_flag_clear(m, PG_WRITEABLE);
 4183 }
 4184 
 4185 /*
 4186  *      pmap_ts_referenced:
 4187  *
 4188  *      Return a count of reference bits for a page, clearing those bits.
 4189  *      It is not necessary for every reference bit to be cleared, but it
 4190  *      is necessary that 0 only be returned when there are truly no
 4191  *      reference bits set.
 4192  *
 4193  *      XXX: The exact number of bits to check and clear is a matter that
 4194  *      should be tested and standardized at some point in the future for
 4195  *      optimal aging of shared pages.
 4196  */
 4197 int
 4198 pmap_ts_referenced(vm_page_t m)
 4199 {
 4200         struct md_page *pvh;
 4201         pv_entry_t pv, pvf, pvn;
 4202         pmap_t pmap;
 4203         pd_entry_t oldpde, *pde;
 4204         pt_entry_t *pte;
 4205         vm_offset_t va;
 4206         int rtval = 0;
 4207 
 4208         if (m->flags & PG_FICTITIOUS)
 4209                 return (rtval);
 4210         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 4211         pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 4212         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, pvn) {
 4213                 va = pv->pv_va;
 4214                 pmap = PV_PMAP(pv);
 4215                 PMAP_LOCK(pmap);
 4216                 pde = pmap_pde(pmap, va);
 4217                 oldpde = *pde;
 4218                 if ((oldpde & PG_A) != 0) {
 4219                         if (pmap_demote_pde(pmap, pde, va)) {
 4220                                 if ((oldpde & PG_W) == 0) {
 4221                                         /*
 4222                                          * Remove the mapping to a single page
 4223                                          * so that a subsequent access may
 4224                                          * repromote.  Since the underlying
 4225                                          * page table page is fully populated,
 4226                                          * this removal never frees a page
 4227                                          * table page.
 4228                                          */
 4229                                         va += VM_PAGE_TO_PHYS(m) - (oldpde &
 4230                                             PG_PS_FRAME);
 4231                                         pmap_remove_page(pmap, va, pde, NULL);
 4232                                         rtval++;
 4233                                         if (rtval > 4) {
 4234                                                 PMAP_UNLOCK(pmap);
 4235                                                 return (rtval);
 4236                                         }
 4237                                 }
 4238                         }
 4239                 }
 4240                 PMAP_UNLOCK(pmap);
 4241         }
 4242         if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
 4243                 pvf = pv;
 4244                 do {
 4245                         pvn = TAILQ_NEXT(pv, pv_list);
 4246                         TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
 4247                         TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
 4248                         pmap = PV_PMAP(pv);
 4249                         PMAP_LOCK(pmap);
 4250                         pde = pmap_pde(pmap, pv->pv_va);
 4251                         KASSERT((*pde & PG_PS) == 0, ("pmap_ts_referenced:"
 4252                             " found a 2mpage in page %p's pv list", m));
 4253                         pte = pmap_pde_to_pte(pde, pv->pv_va);
 4254                         if ((*pte & PG_A) != 0) {
 4255                                 atomic_clear_long(pte, PG_A);
 4256                                 pmap_invalidate_page(pmap, pv->pv_va);
 4257                                 rtval++;
 4258                                 if (rtval > 4)
 4259                                         pvn = NULL;
 4260                         }
 4261                         PMAP_UNLOCK(pmap);
 4262                 } while ((pv = pvn) != NULL && pv != pvf);
 4263         }
 4264         return (rtval);
 4265 }
 4266 
 4267 /*
 4268  *      Clear the modify bits on the specified physical page.
 4269  */
 4270 void
 4271 pmap_clear_modify(vm_page_t m)
 4272 {
 4273         struct md_page *pvh;
 4274         pmap_t pmap;
 4275         pv_entry_t next_pv, pv;
 4276         pd_entry_t oldpde, *pde;
 4277         pt_entry_t oldpte, *pte;
 4278         vm_offset_t va;
 4279 
 4280         if ((m->flags & PG_FICTITIOUS) != 0)
 4281                 return;
 4282         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 4283         pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 4284         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
 4285                 va = pv->pv_va;
 4286                 pmap = PV_PMAP(pv);
 4287                 PMAP_LOCK(pmap);
 4288                 pde = pmap_pde(pmap, va);
 4289                 oldpde = *pde;
 4290                 if ((oldpde & PG_RW) != 0) {
 4291                         if (pmap_demote_pde(pmap, pde, va)) {
 4292                                 if ((oldpde & PG_W) == 0) {
 4293                                         /*
 4294                                          * Write protect the mapping to a
 4295                                          * single page so that a subsequent
 4296                                          * write access may repromote.
 4297                                          */
 4298                                         va += VM_PAGE_TO_PHYS(m) - (oldpde &
 4299                                             PG_PS_FRAME);
 4300                                         pte = pmap_pde_to_pte(pde, va);
 4301                                         oldpte = *pte;
 4302                                         if ((oldpte & PG_V) != 0) {
 4303                                                 while (!atomic_cmpset_long(pte,
 4304                                                     oldpte,
 4305                                                     oldpte & ~(PG_M | PG_RW)))
 4306                                                         oldpte = *pte;
 4307                                                 vm_page_dirty(m);
 4308                                                 pmap_invalidate_page(pmap, va);
 4309                                         }
 4310                                 }
 4311                         }
 4312                 }
 4313                 PMAP_UNLOCK(pmap);
 4314         }
 4315         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 4316                 pmap = PV_PMAP(pv);
 4317                 PMAP_LOCK(pmap);
 4318                 pde = pmap_pde(pmap, pv->pv_va);
 4319                 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_modify: found"
 4320                     " a 2mpage in page %p's pv list", m));
 4321                 pte = pmap_pde_to_pte(pde, pv->pv_va);
 4322                 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
 4323                         atomic_clear_long(pte, PG_M);
 4324                         pmap_invalidate_page(pmap, pv->pv_va);
 4325                 }
 4326                 PMAP_UNLOCK(pmap);
 4327         }
 4328 }
 4329 
 4330 /*
 4331  *      pmap_clear_reference:
 4332  *
 4333  *      Clear the reference bit on the specified physical page.
 4334  */
 4335 void
 4336 pmap_clear_reference(vm_page_t m)
 4337 {
 4338         struct md_page *pvh;
 4339         pmap_t pmap;
 4340         pv_entry_t next_pv, pv;
 4341         pd_entry_t oldpde, *pde;
 4342         pt_entry_t *pte;
 4343         vm_offset_t va;
 4344 
 4345         if ((m->flags & PG_FICTITIOUS) != 0)
 4346                 return;
 4347         mtx_assert(&vm_page_queue_mtx, MA_OWNED);
 4348         pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
 4349         TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
 4350                 va = pv->pv_va;
 4351                 pmap = PV_PMAP(pv);
 4352                 PMAP_LOCK(pmap);
 4353                 pde = pmap_pde(pmap, va);
 4354                 oldpde = *pde;
 4355                 if ((oldpde & PG_A) != 0) {
 4356                         if (pmap_demote_pde(pmap, pde, va)) {
 4357                                 /*
 4358                                  * Remove the mapping to a single page so
 4359                                  * that a subsequent access may repromote.
 4360                                  * Since the underlying page table page is
 4361                                  * fully populated, this removal never frees
 4362                                  * a page table page.
 4363                                  */
 4364                                 va += VM_PAGE_TO_PHYS(m) - (oldpde &
 4365                                     PG_PS_FRAME);
 4366                                 pmap_remove_page(pmap, va, pde, NULL);
 4367                         }
 4368                 }
 4369                 PMAP_UNLOCK(pmap);
 4370         }
 4371         TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
 4372                 pmap = PV_PMAP(pv);
 4373                 PMAP_LOCK(pmap);
 4374                 pde = pmap_pde(pmap, pv->pv_va);
 4375                 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_reference: found"
 4376                     " a 2mpage in page %p's pv list", m));
 4377                 pte = pmap_pde_to_pte(pde, pv->pv_va);
 4378                 if (*pte & PG_A) {
 4379                         atomic_clear_long(pte, PG_A);
 4380                         pmap_invalidate_page(pmap, pv->pv_va);
 4381                 }
 4382                 PMAP_UNLOCK(pmap);
 4383         }
 4384 }
 4385 
 4386 /*
 4387  * Miscellaneous support routines follow
 4388  */
 4389 
 4390 /* Adjust the cache mode for a 4KB page mapped via a PTE. */
 4391 static __inline void
 4392 pmap_pte_attr(pt_entry_t *pte, int cache_bits)
 4393 {
 4394         u_int opte, npte;
 4395 
 4396         /*
 4397          * The cache mode bits are all in the low 32-bits of the
 4398          * PTE, so we can just spin on updating the low 32-bits.
 4399          */
 4400         do {
 4401                 opte = *(u_int *)pte;
 4402                 npte = opte & ~PG_PTE_CACHE;
 4403                 npte |= cache_bits;
 4404         } while (npte != opte && !atomic_cmpset_int((u_int *)pte, opte, npte));
 4405 }
 4406 
 4407 /* Adjust the cache mode for a 2MB page mapped via a PDE. */
 4408 static __inline void
 4409 pmap_pde_attr(pd_entry_t *pde, int cache_bits)
 4410 {
 4411         u_int opde, npde;
 4412 
 4413         /*
 4414          * The cache mode bits are all in the low 32-bits of the
 4415          * PDE, so we can just spin on updating the low 32-bits.
 4416          */
 4417         do {
 4418                 opde = *(u_int *)pde;
 4419                 npde = opde & ~PG_PDE_CACHE;
 4420                 npde |= cache_bits;
 4421         } while (npde != opde && !atomic_cmpset_int((u_int *)pde, opde, npde));
 4422 }
 4423 
 4424 /*
 4425  * Map a set of physical memory pages into the kernel virtual
 4426  * address space. Return a pointer to where it is mapped. This
 4427  * routine is intended to be used for mapping device memory,
 4428  * NOT real memory.
 4429  */
 4430 void *
 4431 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
 4432 {
 4433         vm_offset_t va, offset;
 4434         vm_size_t tmpsize;
 4435 
 4436         /*
 4437          * If the specified range of physical addresses fits within the direct
 4438          * map window, use the direct map. 
 4439          */
 4440         if (pa < dmaplimit && pa + size < dmaplimit) {
 4441                 va = PHYS_TO_DMAP(pa);
 4442                 if (!pmap_change_attr(va, size, mode))
 4443                         return ((void *)va);
 4444         }
 4445         offset = pa & PAGE_MASK;
 4446         size = roundup(offset + size, PAGE_SIZE);
 4447         va = kmem_alloc_nofault(kernel_map, size);
 4448         if (!va)
 4449                 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
 4450         pa = trunc_page(pa);
 4451         for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
 4452                 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
 4453         pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
 4454         pmap_invalidate_cache_range(va, va + tmpsize);
 4455         return ((void *)(va + offset));
 4456 }
 4457 
 4458 void *
 4459 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
 4460 {
 4461 
 4462         return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
 4463 }
 4464 
 4465 void *
 4466 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
 4467 {
 4468 
 4469         return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
 4470 }
 4471 
 4472 void
 4473 pmap_unmapdev(vm_offset_t va, vm_size_t size)
 4474 {
 4475         vm_offset_t base, offset, tmpva;
 4476 
 4477         /* If we gave a direct map region in pmap_mapdev, do nothing */
 4478         if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS)
 4479                 return;
 4480         base = trunc_page(va);
 4481         offset = va & PAGE_MASK;
 4482         size = roundup(offset + size, PAGE_SIZE);
 4483         for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
 4484                 pmap_kremove(tmpva);
 4485         pmap_invalidate_range(kernel_pmap, va, tmpva);
 4486         kmem_free(kernel_map, base, size);
 4487 }
 4488 
 4489 /*
 4490  * Tries to demote a 1GB page mapping.
 4491  */
 4492 static boolean_t
 4493 pmap_demote_pdpe(pmap_t pmap, pdp_entry_t *pdpe, vm_offset_t va)
 4494 {
 4495         pdp_entry_t newpdpe, oldpdpe;
 4496         pd_entry_t *firstpde, newpde, *pde;
 4497         vm_paddr_t mpdepa;
 4498         vm_page_t mpde;
 4499 
 4500         PMAP_LOCK_ASSERT(pmap, MA_OWNED);
 4501         oldpdpe = *pdpe;
 4502         KASSERT((oldpdpe & (PG_PS | PG_V)) == (PG_PS | PG_V),
 4503             ("pmap_demote_pdpe: oldpdpe is missing PG_PS and/or PG_V"));
 4504         if ((mpde = vm_page_alloc(NULL, va >> PDPSHIFT, VM_ALLOC_INTERRUPT |
 4505             VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
 4506                 CTR2(KTR_PMAP, "pmap_demote_pdpe: failure for va %#lx"
 4507                     " in pmap %p", va, pmap);
 4508                 return (FALSE);
 4509         }
 4510         mpdepa = VM_PAGE_TO_PHYS(mpde);
 4511         firstpde = (pd_entry_t *)PHYS_TO_DMAP(mpdepa);
 4512         newpdpe = mpdepa | PG_M | PG_A | (oldpdpe & PG_U) | PG_RW | PG_V;
 4513         KASSERT((oldpdpe & PG_A) != 0,
 4514             ("pmap_demote_pdpe: oldpdpe is missing PG_A"));
 4515         KASSERT((oldpdpe & (PG_M | PG_RW)) != PG_RW,
 4516             ("pmap_demote_pdpe: oldpdpe is missing PG_M"));
 4517         newpde = oldpdpe;
 4518 
 4519         /*
 4520          * Initialize the page directory page.
 4521          */
 4522         for (pde = firstpde; pde < firstpde + NPDEPG; pde++) {
 4523                 *pde = newpde;
 4524                 newpde += NBPDR;
 4525         }
 4526 
 4527         /*
 4528          * Demote the mapping.
 4529          */
 4530         *pdpe = newpdpe;
 4531 
 4532         /*
 4533          * Invalidate a stale recursive mapping of the page directory page.
 4534          */
 4535         pmap_invalidate_page(pmap, (vm_offset_t)vtopde(va));
 4536 
 4537         pmap_pdpe_demotions++;
 4538         CTR2(KTR_PMAP, "pmap_demote_pdpe: success for va %#lx"
 4539             " in pmap %p", va, pmap);
 4540         return (TRUE);
 4541 }
 4542 
 4543 /*
 4544  * Sets the memory attribute for the specified page.
 4545  */
 4546 void
 4547 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
 4548 {
 4549 
 4550         m->md.pat_mode = ma;
 4551 
 4552         /*
 4553          * If "m" is a normal page, update its direct mapping.  This update
 4554          * can be relied upon to perform any cache operations that are
 4555          * required for data coherence.
 4556          */
 4557         if ((m->flags & PG_FICTITIOUS) == 0 &&
 4558             pmap_change_attr(PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)), PAGE_SIZE,
 4559             m->md.pat_mode))
 4560                 panic("memory attribute change on the direct map failed");
 4561 }
 4562 
 4563 /*
 4564  * Changes the specified virtual address range's memory type to that given by
 4565  * the parameter "mode".  The specified virtual address range must be
 4566  * completely contained within either the direct map or the kernel map.  If
 4567  * the virtual address range is contained within the kernel map, then the
 4568  * memory type for each of the corresponding ranges of the direct map is also
 4569  * changed.  (The corresponding ranges of the direct map are those ranges that
 4570  * map the same physical pages as the specified virtual address range.)  These
 4571  * changes to the direct map are necessary because Intel describes the
 4572  * behavior of their processors as "undefined" if two or more mappings to the
 4573  * same physical page have different memory types.
 4574  *
 4575  * Returns zero if the change completed successfully, and either EINVAL or
 4576  * ENOMEM if the change failed.  Specifically, EINVAL is returned if some part
 4577  * of the virtual address range was not mapped, and ENOMEM is returned if
 4578  * there was insufficient memory available to complete the change.  In the
 4579  * latter case, the memory type may have been changed on some part of the
 4580  * virtual address range or the direct map.
 4581  */
 4582 int
 4583 pmap_change_attr(vm_offset_t va, vm_size_t size, int mode)
 4584 {
 4585         int error;
 4586 
 4587         PMAP_LOCK(kernel_pmap);
 4588         error = pmap_change_attr_locked(va, size, mode);
 4589         PMAP_UNLOCK(kernel_pmap);
 4590         return (error);
 4591 }
 4592 
 4593 static int
 4594 pmap_change_attr_locked(vm_offset_t va, vm_size_t size, int mode)
 4595 {
 4596         vm_offset_t base, offset, tmpva;
 4597         vm_paddr_t pa_start, pa_end;
 4598         pdp_entry_t *pdpe;
 4599         pd_entry_t *pde;
 4600         pt_entry_t *pte;
 4601         int cache_bits_pte, cache_bits_pde, error;
 4602         boolean_t changed;
 4603 
 4604         PMAP_LOCK_ASSERT(kernel_pmap, MA_OWNED);
 4605         base = trunc_page(va);
 4606         offset = va & PAGE_MASK;
 4607         size = roundup(offset + size, PAGE_SIZE);
 4608 
 4609         /*
 4610          * Only supported on kernel virtual addresses, including the direct
 4611          * map but excluding the recursive map.
 4612          */
 4613         if (base < DMAP_MIN_ADDRESS)
 4614                 return (EINVAL);
 4615 
 4616         cache_bits_pde = pmap_cache_bits(mode, 1);
 4617         cache_bits_pte = pmap_cache_bits(mode, 0);
 4618         changed = FALSE;
 4619 
 4620         /*
 4621          * Pages that aren't mapped aren't supported.  Also break down 2MB pages
 4622          * into 4KB pages if required.
 4623          */
 4624         for (tmpva = base; tmpva < base + size; ) {
 4625                 pdpe = pmap_pdpe(kernel_pmap, tmpva);
 4626                 if (*pdpe == 0)
 4627                         return (EINVAL);
 4628                 if (*pdpe & PG_PS) {
 4629                         /*
 4630                          * If the current 1GB page already has the required
 4631                          * memory type, then we need not demote this page. Just
 4632                          * increment tmpva to the next 1GB page frame.
 4633                          */
 4634                         if ((*pdpe & PG_PDE_CACHE) == cache_bits_pde) {
 4635                                 tmpva = trunc_1gpage(tmpva) + NBPDP;
 4636                                 continue;
 4637                         }
 4638 
 4639                         /*
 4640                          * If the current offset aligns with a 1GB page frame
 4641                          * and there is at least 1GB left within the range, then
 4642                          * we need not break down this page into 2MB pages.
 4643                          */
 4644                         if ((tmpva & PDPMASK) == 0 &&
 4645                             tmpva + PDPMASK < base + size) {
 4646                                 tmpva += NBPDP;
 4647                                 continue;
 4648                         }
 4649                         if (!pmap_demote_pdpe(kernel_pmap, pdpe, tmpva))
 4650                                 return (ENOMEM);
 4651                 }
 4652                 pde = pmap_pdpe_to_pde(pdpe, tmpva);
 4653                 if (*pde == 0)
 4654                         return (EINVAL);
 4655                 if (*pde & PG_PS) {
 4656                         /*
 4657                          * If the current 2MB page already has the required
 4658                          * memory type, then we need not demote this page. Just
 4659                          * increment tmpva to the next 2MB page frame.
 4660                          */
 4661                         if ((*pde & PG_PDE_CACHE) == cache_bits_pde) {
 4662                                 tmpva = trunc_2mpage(tmpva) + NBPDR;
 4663                                 continue;
 4664                         }
 4665 
 4666                         /*
 4667                          * If the current offset aligns with a 2MB page frame
 4668                          * and there is at least 2MB left within the range, then
 4669                          * we need not break down this page into 4KB pages.
 4670                          */
 4671                         if ((tmpva & PDRMASK) == 0 &&
 4672                             tmpva + PDRMASK < base + size) {
 4673                                 tmpva += NBPDR;
 4674                                 continue;
 4675                         }
 4676                         if (!pmap_demote_pde(kernel_pmap, pde, tmpva))
 4677                                 return (ENOMEM);
 4678                 }
 4679                 pte = pmap_pde_to_pte(pde, tmpva);
 4680                 if (*pte == 0)
 4681                         return (EINVAL);
 4682                 tmpva += PAGE_SIZE;
 4683         }
 4684         error = 0;
 4685 
 4686         /*
 4687          * Ok, all the pages exist, so run through them updating their
 4688          * cache mode if required.
 4689          */
 4690         pa_start = pa_end = 0;
 4691         for (tmpva = base; tmpva < base + size; ) {
 4692                 pdpe = pmap_pdpe(kernel_pmap, tmpva);
 4693                 if (*pdpe & PG_PS) {
 4694                         if ((*pdpe & PG_PDE_CACHE) != cache_bits_pde) {
 4695                                 pmap_pde_attr(pdpe, cache_bits_pde);
 4696                                 changed = TRUE;
 4697                         }
 4698                         if (tmpva >= VM_MIN_KERNEL_ADDRESS) {
 4699                                 if (pa_start == pa_end) {
 4700                                         /* Start physical address run. */
 4701                                         pa_start = *pdpe & PG_PS_FRAME;
 4702                                         pa_end = pa_start + NBPDP;
 4703                                 } else if (pa_end == (*pdpe & PG_PS_FRAME))
 4704                                         pa_end += NBPDP;
 4705                                 else {
 4706                                         /* Run ended, update direct map. */
 4707                                         error = pmap_change_attr_locked(
 4708                                             PHYS_TO_DMAP(pa_start),
 4709                                             pa_end - pa_start, mode);
 4710                                         if (error != 0)
 4711                                                 break;
 4712                                         /* Start physical address run. */
 4713                                         pa_start = *pdpe & PG_PS_FRAME;
 4714                                         pa_end = pa_start + NBPDP;
 4715                                 }
 4716                         }
 4717                         tmpva = trunc_1gpage(tmpva) + NBPDP;
 4718                         continue;
 4719                 }
 4720                 pde = pmap_pdpe_to_pde(pdpe, tmpva);
 4721                 if (*pde & PG_PS) {
 4722                         if ((*pde & PG_PDE_CACHE) != cache_bits_pde) {
 4723                                 pmap_pde_attr(pde, cache_bits_pde);
 4724                                 changed = TRUE;
 4725                         }
 4726                         if (tmpva >= VM_MIN_KERNEL_ADDRESS) {
 4727                                 if (pa_start == pa_end) {
 4728                                         /* Start physical address run. */
 4729                                         pa_start = *pde & PG_PS_FRAME;
 4730                                         pa_end = pa_start + NBPDR;
 4731                                 } else if (pa_end == (*pde & PG_PS_FRAME))
 4732                                         pa_end += NBPDR;
 4733                                 else {
 4734                                         /* Run ended, update direct map. */
 4735                                         error = pmap_change_attr_locked(
 4736                                             PHYS_TO_DMAP(pa_start),
 4737                                             pa_end - pa_start, mode);
 4738                                         if (error != 0)
 4739                                                 break;
 4740                                         /* Start physical address run. */
 4741                                         pa_start = *pde & PG_PS_FRAME;
 4742                                         pa_end = pa_start + NBPDR;
 4743                                 }
 4744                         }
 4745                         tmpva = trunc_2mpage(tmpva) + NBPDR;
 4746                 } else {
 4747                         pte = pmap_pde_to_pte(pde, tmpva);
 4748                         if ((*pte & PG_PTE_CACHE) != cache_bits_pte) {
 4749                                 pmap_pte_attr(pte, cache_bits_pte);
 4750                                 changed = TRUE;
 4751                         }
 4752                         if (tmpva >= VM_MIN_KERNEL_ADDRESS) {
 4753                                 if (pa_start == pa_end) {
 4754                                         /* Start physical address run. */
 4755                                         pa_start = *pte & PG_FRAME;
 4756                                         pa_end = pa_start + PAGE_SIZE;
 4757                                 } else if (pa_end == (*pte & PG_FRAME))
 4758                                         pa_end += PAGE_SIZE;
 4759                                 else {
 4760                                         /* Run ended, update direct map. */
 4761                                         error = pmap_change_attr_locked(
 4762                                             PHYS_TO_DMAP(pa_start),
 4763                                             pa_end - pa_start, mode);
 4764                                         if (error != 0)
 4765                                                 break;
 4766                                         /* Start physical address run. */
 4767                                         pa_start = *pte & PG_FRAME;
 4768                                         pa_end = pa_start + PAGE_SIZE;
 4769                                 }
 4770                         }
 4771                         tmpva += PAGE_SIZE;
 4772                 }
 4773         }
 4774         if (error == 0 && pa_start != pa_end)
 4775                 error = pmap_change_attr_locked(PHYS_TO_DMAP(pa_start),
 4776                     pa_end - pa_start, mode);
 4777 
 4778         /*
 4779          * Flush CPU caches if required to make sure any data isn't cached that
 4780          * shouldn't be, etc.
 4781          */
 4782         if (changed) {
 4783                 pmap_invalidate_range(kernel_pmap, base, tmpva);
 4784                 pmap_invalidate_cache_range(base, tmpva);
 4785         }
 4786         return (error);
 4787 }
 4788 
 4789 /*
 4790  * Demotes any mapping within the direct map region that covers more than the
 4791  * specified range of physical addresses.  This range's size must be a power
 4792  * of two and its starting address must be a multiple of its size.  Since the
 4793  * demotion does not change any attributes of the mapping, a TLB invalidation
 4794  * is not mandatory.  The caller may, however, request a TLB invalidation.
 4795  */
 4796 void
 4797 pmap_demote_DMAP(vm_paddr_t base, vm_size_t len, boolean_t invalidate)
 4798 {
 4799         pdp_entry_t *pdpe;
 4800         pd_entry_t *pde;
 4801         vm_offset_t va;
 4802         boolean_t changed;
 4803 
 4804         if (len == 0)
 4805                 return;
 4806         KASSERT(powerof2(len), ("pmap_demote_DMAP: len is not a power of 2"));
 4807         KASSERT((base & (len - 1)) == 0,
 4808             ("pmap_demote_DMAP: base is not a multiple of len"));
 4809         if (len < NBPDP && base < dmaplimit) {
 4810                 va = PHYS_TO_DMAP(base);
 4811                 changed = FALSE;
 4812                 PMAP_LOCK(kernel_pmap);
 4813                 pdpe = pmap_pdpe(kernel_pmap, va);
 4814                 if ((*pdpe & PG_V) == 0)
 4815                         panic("pmap_demote_DMAP: invalid PDPE");
 4816                 if ((*pdpe & PG_PS) != 0) {
 4817                         if (!pmap_demote_pdpe(kernel_pmap, pdpe, va))
 4818                                 panic("pmap_demote_DMAP: PDPE failed");
 4819                         changed = TRUE;
 4820                 }
 4821                 if (len < NBPDR) {
 4822                         pde = pmap_pdpe_to_pde(pdpe, va);
 4823                         if ((*pde & PG_V) == 0)
 4824                                 panic("pmap_demote_DMAP: invalid PDE");
 4825                         if ((*pde & PG_PS) != 0) {
 4826                                 if (!pmap_demote_pde(kernel_pmap, pde, va))
 4827                                         panic("pmap_demote_DMAP: PDE failed");
 4828                                 changed = TRUE;
 4829                         }
 4830                 }
 4831                 if (changed && invalidate)
 4832                         pmap_invalidate_page(kernel_pmap, va);
 4833                 PMAP_UNLOCK(kernel_pmap);
 4834         }
 4835 }
 4836 
 4837 /*
 4838  * perform the pmap work for mincore
 4839  */
 4840 int
 4841 pmap_mincore(pmap_t pmap, vm_offset_t addr)
 4842 {
 4843         pd_entry_t *pdep;
 4844         pt_entry_t pte;
 4845         vm_paddr_t pa;
 4846         vm_page_t m;
 4847         int val = 0;
 4848         
 4849         PMAP_LOCK(pmap);
 4850         pdep = pmap_pde(pmap, addr);
 4851         if (pdep != NULL && (*pdep & PG_V)) {
 4852                 if (*pdep & PG_PS) {
 4853                         pte = *pdep;
 4854                         val = MINCORE_SUPER;
 4855                         /* Compute the physical address of the 4KB page. */
 4856                         pa = ((*pdep & PG_PS_FRAME) | (addr & PDRMASK)) &
 4857                             PG_FRAME;
 4858                 } else {
 4859                         pte = *pmap_pde_to_pte(pdep, addr);
 4860                         pa = pte & PG_FRAME;
 4861                 }
 4862         } else {
 4863                 pte = 0;
 4864                 pa = 0;
 4865         }
 4866         PMAP_UNLOCK(pmap);
 4867 
 4868         if (pte != 0) {
 4869                 val |= MINCORE_INCORE;
 4870                 if ((pte & PG_MANAGED) == 0)
 4871                         return val;
 4872 
 4873                 m = PHYS_TO_VM_PAGE(pa);
 4874 
 4875                 /*
 4876                  * Modified by us
 4877                  */
 4878                 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW))
 4879                         val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
 4880                 else {
 4881                         /*
 4882                          * Modified by someone else
 4883                          */
 4884                         vm_page_lock_queues();
 4885                         if (m->dirty || pmap_is_modified(m))
 4886                                 val |= MINCORE_MODIFIED_OTHER;
 4887                         vm_page_unlock_queues();
 4888                 }
 4889                 /*
 4890                  * Referenced by us
 4891                  */
 4892                 if (pte & PG_A)
 4893                         val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
 4894                 else {
 4895                         /*
 4896                          * Referenced by someone else
 4897                          */
 4898                         vm_page_lock_queues();
 4899                         if ((m->flags & PG_REFERENCED) ||
 4900                             pmap_ts_referenced(m)) {
 4901                                 val |= MINCORE_REFERENCED_OTHER;
 4902                                 vm_page_flag_set(m, PG_REFERENCED);
 4903                         }
 4904                         vm_page_unlock_queues();
 4905                 }
 4906         } 
 4907         return val;
 4908 }
 4909 
 4910 void
 4911 pmap_activate(struct thread *td)
 4912 {
 4913         pmap_t  pmap, oldpmap;
 4914         u_int64_t  cr3;
 4915 
 4916         critical_enter();
 4917         pmap = vmspace_pmap(td->td_proc->p_vmspace);
 4918         oldpmap = PCPU_GET(curpmap);
 4919 #ifdef SMP
 4920         atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
 4921         atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
 4922 #else
 4923         oldpmap->pm_active &= ~PCPU_GET(cpumask);
 4924         pmap->pm_active |= PCPU_GET(cpumask);
 4925 #endif
 4926         cr3 = DMAP_TO_PHYS((vm_offset_t)pmap->pm_pml4);
 4927         td->td_pcb->pcb_cr3 = cr3;
 4928         load_cr3(cr3);
 4929         PCPU_SET(curpmap, pmap);
 4930         critical_exit();
 4931 }
 4932 
 4933 void
 4934 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
 4935 {
 4936 }
 4937 
 4938 /*
 4939  *      Increase the starting virtual address of the given mapping if a
 4940  *      different alignment might result in more superpage mappings.
 4941  */
 4942 void
 4943 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
 4944     vm_offset_t *addr, vm_size_t size)
 4945 {
 4946         vm_offset_t superpage_offset;
 4947 
 4948         if (size < NBPDR)
 4949                 return;
 4950         if (object != NULL && (object->flags & OBJ_COLORED) != 0)
 4951                 offset += ptoa(object->pg_color);
 4952         superpage_offset = offset & PDRMASK;
 4953         if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
 4954             (*addr & PDRMASK) == superpage_offset)
 4955                 return;
 4956         if ((*addr & PDRMASK) < superpage_offset)
 4957                 *addr = (*addr & ~PDRMASK) + superpage_offset;
 4958         else
 4959                 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
 4960 }

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