1 /*-
2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. Neither the name of the University nor the names of its contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * from: @(#)sys_machdep.c 5.5 (Berkeley) 1/19/91
31 */
32
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD: releng/11.1/sys/amd64/amd64/sys_machdep.c 330908 2018-03-14 04:00:00Z gordon $");
35
36 #include "opt_capsicum.h"
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/capsicum.h>
41 #include <sys/kernel.h>
42 #include <sys/lock.h>
43 #include <sys/malloc.h>
44 #include <sys/mutex.h>
45 #include <sys/priv.h>
46 #include <sys/proc.h>
47 #include <sys/sysproto.h>
48 #include <sys/uio.h>
49
50 #include <vm/vm.h>
51 #include <vm/pmap.h>
52 #include <vm/vm_kern.h> /* for kernel_map */
53 #include <vm/vm_extern.h>
54
55 #include <machine/frame.h>
56 #include <machine/md_var.h>
57 #include <machine/pcb.h>
58 #include <machine/specialreg.h>
59 #include <machine/sysarch.h>
60 #include <machine/tss.h>
61 #include <machine/vmparam.h>
62
63 #include <security/audit/audit.h>
64
65 #define MAX_LD 8192
66
67 int max_ldt_segment = 1024;
68 SYSCTL_INT(_machdep, OID_AUTO, max_ldt_segment, CTLFLAG_RDTUN,
69 &max_ldt_segment, 0,
70 "Maximum number of allowed LDT segments in the single address space");
71
72 static void
73 max_ldt_segment_init(void *arg __unused)
74 {
75
76 if (max_ldt_segment <= 0)
77 max_ldt_segment = 1;
78 if (max_ldt_segment > MAX_LD)
79 max_ldt_segment = MAX_LD;
80 }
81 SYSINIT(maxldt, SI_SUB_VM_CONF, SI_ORDER_ANY, max_ldt_segment_init, NULL);
82
83 #ifdef notyet
84 #ifdef SMP
85 static void set_user_ldt_rv(struct vmspace *vmsp);
86 #endif
87 #endif
88 static void user_ldt_derefl(struct proc_ldt *pldt);
89
90 #ifndef _SYS_SYSPROTO_H_
91 struct sysarch_args {
92 int op;
93 char *parms;
94 };
95 #endif
96
97 int
98 sysarch_ldt(struct thread *td, struct sysarch_args *uap, int uap_space)
99 {
100 struct i386_ldt_args *largs, la;
101 struct user_segment_descriptor *lp;
102 int error = 0;
103
104 /*
105 * XXXKIB check that the BSM generation code knows to encode
106 * the op argument.
107 */
108 AUDIT_ARG_CMD(uap->op);
109 if (uap_space == UIO_USERSPACE) {
110 error = copyin(uap->parms, &la, sizeof(struct i386_ldt_args));
111 if (error != 0)
112 return (error);
113 largs = &la;
114 } else
115 largs = (struct i386_ldt_args *)uap->parms;
116
117 switch (uap->op) {
118 case I386_GET_LDT:
119 error = amd64_get_ldt(td, largs);
120 break;
121 case I386_SET_LDT:
122 if (largs->descs != NULL && largs->num > max_ldt_segment)
123 return (EINVAL);
124 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
125 if (largs->descs != NULL) {
126 lp = malloc(largs->num * sizeof(struct
127 user_segment_descriptor), M_TEMP, M_WAITOK);
128 error = copyin(largs->descs, lp, largs->num *
129 sizeof(struct user_segment_descriptor));
130 if (error == 0)
131 error = amd64_set_ldt(td, largs, lp);
132 free(lp, M_TEMP);
133 } else {
134 error = amd64_set_ldt(td, largs, NULL);
135 }
136 break;
137 }
138 return (error);
139 }
140
141 void
142 update_gdt_gsbase(struct thread *td, uint32_t base)
143 {
144 struct user_segment_descriptor *sd;
145
146 if (td != curthread)
147 return;
148 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
149 critical_enter();
150 sd = PCPU_GET(gs32p);
151 sd->sd_lobase = base & 0xffffff;
152 sd->sd_hibase = (base >> 24) & 0xff;
153 critical_exit();
154 }
155
156 void
157 update_gdt_fsbase(struct thread *td, uint32_t base)
158 {
159 struct user_segment_descriptor *sd;
160
161 if (td != curthread)
162 return;
163 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
164 critical_enter();
165 sd = PCPU_GET(fs32p);
166 sd->sd_lobase = base & 0xffffff;
167 sd->sd_hibase = (base >> 24) & 0xff;
168 critical_exit();
169 }
170
171 int
172 sysarch(td, uap)
173 struct thread *td;
174 register struct sysarch_args *uap;
175 {
176 int error = 0;
177 struct pcb *pcb = curthread->td_pcb;
178 uint32_t i386base;
179 uint64_t a64base;
180 struct i386_ioperm_args iargs;
181 struct i386_get_xfpustate i386xfpu;
182 struct amd64_get_xfpustate a64xfpu;
183
184 #ifdef CAPABILITY_MODE
185 /*
186 * When adding new operations, add a new case statement here to
187 * explicitly indicate whether or not the operation is safe to
188 * perform in capability mode.
189 */
190 if (IN_CAPABILITY_MODE(td)) {
191 switch (uap->op) {
192 case I386_GET_LDT:
193 case I386_SET_LDT:
194 case I386_GET_IOPERM:
195 case I386_GET_FSBASE:
196 case I386_SET_FSBASE:
197 case I386_GET_GSBASE:
198 case I386_SET_GSBASE:
199 case I386_GET_XFPUSTATE:
200 case AMD64_GET_FSBASE:
201 case AMD64_SET_FSBASE:
202 case AMD64_GET_GSBASE:
203 case AMD64_SET_GSBASE:
204 case AMD64_GET_XFPUSTATE:
205 break;
206
207 case I386_SET_IOPERM:
208 default:
209 #ifdef KTRACE
210 if (KTRPOINT(td, KTR_CAPFAIL))
211 ktrcapfail(CAPFAIL_SYSCALL, NULL, NULL);
212 #endif
213 return (ECAPMODE);
214 }
215 }
216 #endif
217
218 if (uap->op == I386_GET_LDT || uap->op == I386_SET_LDT)
219 return (sysarch_ldt(td, uap, UIO_USERSPACE));
220 /*
221 * XXXKIB check that the BSM generation code knows to encode
222 * the op argument.
223 */
224 AUDIT_ARG_CMD(uap->op);
225 switch (uap->op) {
226 case I386_GET_IOPERM:
227 case I386_SET_IOPERM:
228 if ((error = copyin(uap->parms, &iargs,
229 sizeof(struct i386_ioperm_args))) != 0)
230 return (error);
231 break;
232 case I386_GET_XFPUSTATE:
233 if ((error = copyin(uap->parms, &i386xfpu,
234 sizeof(struct i386_get_xfpustate))) != 0)
235 return (error);
236 a64xfpu.addr = (void *)(uintptr_t)i386xfpu.addr;
237 a64xfpu.len = i386xfpu.len;
238 break;
239 case AMD64_GET_XFPUSTATE:
240 if ((error = copyin(uap->parms, &a64xfpu,
241 sizeof(struct amd64_get_xfpustate))) != 0)
242 return (error);
243 break;
244 default:
245 break;
246 }
247
248 switch (uap->op) {
249 case I386_GET_IOPERM:
250 error = amd64_get_ioperm(td, &iargs);
251 if (error == 0)
252 error = copyout(&iargs, uap->parms,
253 sizeof(struct i386_ioperm_args));
254 break;
255 case I386_SET_IOPERM:
256 error = amd64_set_ioperm(td, &iargs);
257 break;
258 case I386_GET_FSBASE:
259 i386base = pcb->pcb_fsbase;
260 error = copyout(&i386base, uap->parms, sizeof(i386base));
261 break;
262 case I386_SET_FSBASE:
263 error = copyin(uap->parms, &i386base, sizeof(i386base));
264 if (!error) {
265 pcb->pcb_fsbase = i386base;
266 td->td_frame->tf_fs = _ufssel;
267 update_gdt_fsbase(td, i386base);
268 }
269 break;
270 case I386_GET_GSBASE:
271 i386base = pcb->pcb_gsbase;
272 error = copyout(&i386base, uap->parms, sizeof(i386base));
273 break;
274 case I386_SET_GSBASE:
275 error = copyin(uap->parms, &i386base, sizeof(i386base));
276 if (!error) {
277 pcb->pcb_gsbase = i386base;
278 td->td_frame->tf_gs = _ugssel;
279 update_gdt_gsbase(td, i386base);
280 }
281 break;
282 case AMD64_GET_FSBASE:
283 error = copyout(&pcb->pcb_fsbase, uap->parms, sizeof(pcb->pcb_fsbase));
284 break;
285
286 case AMD64_SET_FSBASE:
287 error = copyin(uap->parms, &a64base, sizeof(a64base));
288 if (!error) {
289 if (a64base < VM_MAXUSER_ADDRESS) {
290 pcb->pcb_fsbase = a64base;
291 set_pcb_flags(pcb, PCB_FULL_IRET);
292 td->td_frame->tf_fs = _ufssel;
293 } else
294 error = EINVAL;
295 }
296 break;
297
298 case AMD64_GET_GSBASE:
299 error = copyout(&pcb->pcb_gsbase, uap->parms, sizeof(pcb->pcb_gsbase));
300 break;
301
302 case AMD64_SET_GSBASE:
303 error = copyin(uap->parms, &a64base, sizeof(a64base));
304 if (!error) {
305 if (a64base < VM_MAXUSER_ADDRESS) {
306 pcb->pcb_gsbase = a64base;
307 set_pcb_flags(pcb, PCB_FULL_IRET);
308 td->td_frame->tf_gs = _ugssel;
309 } else
310 error = EINVAL;
311 }
312 break;
313
314 case I386_GET_XFPUSTATE:
315 case AMD64_GET_XFPUSTATE:
316 if (a64xfpu.len > cpu_max_ext_state_size -
317 sizeof(struct savefpu))
318 return (EINVAL);
319 fpugetregs(td);
320 error = copyout((char *)(get_pcb_user_save_td(td) + 1),
321 a64xfpu.addr, a64xfpu.len);
322 break;
323
324 default:
325 error = EINVAL;
326 break;
327 }
328 return (error);
329 }
330
331 int
332 amd64_set_ioperm(td, uap)
333 struct thread *td;
334 struct i386_ioperm_args *uap;
335 {
336 char *iomap;
337 struct amd64tss *tssp;
338 struct system_segment_descriptor *tss_sd;
339 struct pcb *pcb;
340 u_int i;
341 int error;
342
343 if ((error = priv_check(td, PRIV_IO)) != 0)
344 return (error);
345 if ((error = securelevel_gt(td->td_ucred, 0)) != 0)
346 return (error);
347 if (uap->start > uap->start + uap->length ||
348 uap->start + uap->length > IOPAGES * PAGE_SIZE * NBBY)
349 return (EINVAL);
350
351 /*
352 * XXX
353 * While this is restricted to root, we should probably figure out
354 * whether any other driver is using this i/o address, as so not to
355 * cause confusion. This probably requires a global 'usage registry'.
356 */
357 pcb = td->td_pcb;
358 if (pcb->pcb_tssp == NULL) {
359 tssp = (struct amd64tss *)kmem_malloc(kernel_arena,
360 ctob(IOPAGES + 1), M_WAITOK);
361 pmap_pti_add_kva((vm_offset_t)tssp, (vm_offset_t)tssp +
362 ctob(IOPAGES + 1), false);
363 iomap = (char *)&tssp[1];
364 memset(iomap, 0xff, IOPERM_BITMAP_SIZE);
365 critical_enter();
366 /* Takes care of tss_rsp0. */
367 memcpy(tssp, &common_tss[PCPU_GET(cpuid)],
368 sizeof(struct amd64tss));
369 tssp->tss_iobase = sizeof(*tssp);
370 pcb->pcb_tssp = tssp;
371 tss_sd = PCPU_GET(tss);
372 tss_sd->sd_lobase = (u_long)tssp & 0xffffff;
373 tss_sd->sd_hibase = ((u_long)tssp >> 24) & 0xfffffffffful;
374 tss_sd->sd_type = SDT_SYSTSS;
375 ltr(GSEL(GPROC0_SEL, SEL_KPL));
376 PCPU_SET(tssp, tssp);
377 critical_exit();
378 } else
379 iomap = (char *)&pcb->pcb_tssp[1];
380 for (i = uap->start; i < uap->start + uap->length; i++) {
381 if (uap->enable)
382 iomap[i >> 3] &= ~(1 << (i & 7));
383 else
384 iomap[i >> 3] |= (1 << (i & 7));
385 }
386 return (error);
387 }
388
389 int
390 amd64_get_ioperm(td, uap)
391 struct thread *td;
392 struct i386_ioperm_args *uap;
393 {
394 int i, state;
395 char *iomap;
396
397 if (uap->start >= IOPAGES * PAGE_SIZE * NBBY)
398 return (EINVAL);
399 if (td->td_pcb->pcb_tssp == NULL) {
400 uap->length = 0;
401 goto done;
402 }
403
404 iomap = (char *)&td->td_pcb->pcb_tssp[1];
405
406 i = uap->start;
407 state = (iomap[i >> 3] >> (i & 7)) & 1;
408 uap->enable = !state;
409 uap->length = 1;
410
411 for (i = uap->start + 1; i < IOPAGES * PAGE_SIZE * NBBY; i++) {
412 if (state != ((iomap[i >> 3] >> (i & 7)) & 1))
413 break;
414 uap->length++;
415 }
416
417 done:
418 return (0);
419 }
420
421 /*
422 * Update the GDT entry pointing to the LDT to point to the LDT of the
423 * current process.
424 */
425 void
426 set_user_ldt(struct mdproc *mdp)
427 {
428
429 critical_enter();
430 *PCPU_GET(ldt) = mdp->md_ldt_sd;
431 lldt(GSEL(GUSERLDT_SEL, SEL_KPL));
432 critical_exit();
433 }
434
435 #ifdef notyet
436 #ifdef SMP
437 static void
438 set_user_ldt_rv(struct vmspace *vmsp)
439 {
440 struct thread *td;
441
442 td = curthread;
443 if (vmsp != td->td_proc->p_vmspace)
444 return;
445
446 set_user_ldt(&td->td_proc->p_md);
447 }
448 #endif
449 #endif
450
451 struct proc_ldt *
452 user_ldt_alloc(struct proc *p, int force)
453 {
454 struct proc_ldt *pldt, *new_ldt;
455 struct mdproc *mdp;
456 struct soft_segment_descriptor sldt;
457 vm_offset_t sva;
458 vm_size_t sz;
459
460 mtx_assert(&dt_lock, MA_OWNED);
461 mdp = &p->p_md;
462 if (!force && mdp->md_ldt != NULL)
463 return (mdp->md_ldt);
464 mtx_unlock(&dt_lock);
465 new_ldt = malloc(sizeof(struct proc_ldt), M_SUBPROC, M_WAITOK);
466 sz = max_ldt_segment * sizeof(struct user_segment_descriptor);
467 sva = kmem_malloc(kernel_arena, sz, M_WAITOK | M_ZERO);
468 new_ldt->ldt_base = (caddr_t)sva;
469 pmap_pti_add_kva(sva, sva + sz, false);
470 new_ldt->ldt_refcnt = 1;
471 sldt.ssd_base = sva;
472 sldt.ssd_limit = sz - 1;
473 sldt.ssd_type = SDT_SYSLDT;
474 sldt.ssd_dpl = SEL_KPL;
475 sldt.ssd_p = 1;
476 sldt.ssd_long = 0;
477 sldt.ssd_def32 = 0;
478 sldt.ssd_gran = 0;
479 mtx_lock(&dt_lock);
480 pldt = mdp->md_ldt;
481 if (pldt != NULL && !force) {
482 pmap_pti_remove_kva(sva, sva + sz);
483 kmem_free(kernel_arena, sva, sz);
484 free(new_ldt, M_SUBPROC);
485 return (pldt);
486 }
487
488 if (pldt != NULL) {
489 bcopy(pldt->ldt_base, new_ldt->ldt_base, max_ldt_segment *
490 sizeof(struct user_segment_descriptor));
491 user_ldt_derefl(pldt);
492 }
493 ssdtosyssd(&sldt, &p->p_md.md_ldt_sd);
494 atomic_store_rel_ptr((volatile uintptr_t *)&mdp->md_ldt,
495 (uintptr_t)new_ldt);
496 if (p == curproc)
497 set_user_ldt(mdp);
498
499 return (mdp->md_ldt);
500 }
501
502 void
503 user_ldt_free(struct thread *td)
504 {
505 struct proc *p = td->td_proc;
506 struct mdproc *mdp = &p->p_md;
507 struct proc_ldt *pldt;
508
509 mtx_assert(&dt_lock, MA_OWNED);
510 if ((pldt = mdp->md_ldt) == NULL) {
511 mtx_unlock(&dt_lock);
512 return;
513 }
514
515 mdp->md_ldt = NULL;
516 bzero(&mdp->md_ldt_sd, sizeof(mdp->md_ldt_sd));
517 if (td == curthread)
518 lldt(GSEL(GNULL_SEL, SEL_KPL));
519 user_ldt_deref(pldt);
520 }
521
522 static void
523 user_ldt_derefl(struct proc_ldt *pldt)
524 {
525 vm_offset_t sva;
526 vm_size_t sz;
527
528 if (--pldt->ldt_refcnt == 0) {
529 sva = (vm_offset_t)pldt->ldt_base;
530 sz = max_ldt_segment * sizeof(struct user_segment_descriptor);
531 pmap_pti_remove_kva(sva, sva + sz);
532 kmem_free(kernel_arena, sva, sz);
533 free(pldt, M_SUBPROC);
534 }
535 }
536
537 void
538 user_ldt_deref(struct proc_ldt *pldt)
539 {
540
541 mtx_assert(&dt_lock, MA_OWNED);
542 user_ldt_derefl(pldt);
543 mtx_unlock(&dt_lock);
544 }
545
546 /*
547 * Note for the authors of compat layers (linux, etc): copyout() in
548 * the function below is not a problem since it presents data in
549 * arch-specific format (i.e. i386-specific in this case), not in
550 * the OS-specific one.
551 */
552 int
553 amd64_get_ldt(td, uap)
554 struct thread *td;
555 struct i386_ldt_args *uap;
556 {
557 int error = 0;
558 struct proc_ldt *pldt;
559 int num;
560 struct user_segment_descriptor *lp;
561
562 #ifdef DEBUG
563 printf("amd64_get_ldt: start=%d num=%d descs=%p\n",
564 uap->start, uap->num, (void *)uap->descs);
565 #endif
566
567 if ((pldt = td->td_proc->p_md.md_ldt) != NULL) {
568 lp = &((struct user_segment_descriptor *)(pldt->ldt_base))
569 [uap->start];
570 num = min(uap->num, max_ldt_segment);
571 } else
572 return (EINVAL);
573
574 if ((uap->start > (unsigned int)max_ldt_segment) ||
575 ((unsigned int)num > (unsigned int)max_ldt_segment) ||
576 ((unsigned int)(uap->start + num) > (unsigned int)max_ldt_segment))
577 return(EINVAL);
578
579 error = copyout(lp, uap->descs, num *
580 sizeof(struct user_segment_descriptor));
581 if (!error)
582 td->td_retval[0] = num;
583
584 return(error);
585 }
586
587 int
588 amd64_set_ldt(td, uap, descs)
589 struct thread *td;
590 struct i386_ldt_args *uap;
591 struct user_segment_descriptor *descs;
592 {
593 int error = 0;
594 unsigned int largest_ld, i;
595 struct mdproc *mdp = &td->td_proc->p_md;
596 struct proc_ldt *pldt;
597 struct user_segment_descriptor *dp;
598 struct proc *p;
599
600 #ifdef DEBUG
601 printf("amd64_set_ldt: start=%d num=%d descs=%p\n",
602 uap->start, uap->num, (void *)uap->descs);
603 #endif
604
605 set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
606 p = td->td_proc;
607 if (descs == NULL) {
608 /* Free descriptors */
609 if (uap->start == 0 && uap->num == 0)
610 uap->num = max_ldt_segment;
611 if (uap->num == 0)
612 return (EINVAL);
613 if ((pldt = mdp->md_ldt) == NULL ||
614 uap->start >= max_ldt_segment)
615 return (0);
616 largest_ld = uap->start + uap->num;
617 if (largest_ld > max_ldt_segment)
618 largest_ld = max_ldt_segment;
619 if (largest_ld < uap->start)
620 return (EINVAL);
621 i = largest_ld - uap->start;
622 mtx_lock(&dt_lock);
623 bzero(&((struct user_segment_descriptor *)(pldt->ldt_base))
624 [uap->start], sizeof(struct user_segment_descriptor) * i);
625 mtx_unlock(&dt_lock);
626 return (0);
627 }
628
629 if (!(uap->start == LDT_AUTO_ALLOC && uap->num == 1)) {
630 /* verify range of descriptors to modify */
631 largest_ld = uap->start + uap->num;
632 if (uap->start >= max_ldt_segment ||
633 largest_ld > max_ldt_segment ||
634 largest_ld < uap->start)
635 return (EINVAL);
636 }
637
638 /* Check descriptors for access violations */
639 for (i = 0; i < uap->num; i++) {
640 dp = &descs[i];
641
642 switch (dp->sd_type) {
643 case SDT_SYSNULL: /* system null */
644 dp->sd_p = 0;
645 break;
646 case SDT_SYS286TSS:
647 case SDT_SYSLDT:
648 case SDT_SYS286BSY:
649 case SDT_SYS286CGT:
650 case SDT_SYSTASKGT:
651 case SDT_SYS286IGT:
652 case SDT_SYS286TGT:
653 case SDT_SYSNULL2:
654 case SDT_SYSTSS:
655 case SDT_SYSNULL3:
656 case SDT_SYSBSY:
657 case SDT_SYSCGT:
658 case SDT_SYSNULL4:
659 case SDT_SYSIGT:
660 case SDT_SYSTGT:
661 /* I can't think of any reason to allow a user proc
662 * to create a segment of these types. They are
663 * for OS use only.
664 */
665 return (EACCES);
666 /*NOTREACHED*/
667
668 /* memory segment types */
669 case SDT_MEMEC: /* memory execute only conforming */
670 case SDT_MEMEAC: /* memory execute only accessed conforming */
671 case SDT_MEMERC: /* memory execute read conforming */
672 case SDT_MEMERAC: /* memory execute read accessed conforming */
673 /* Must be "present" if executable and conforming. */
674 if (dp->sd_p == 0)
675 return (EACCES);
676 break;
677 case SDT_MEMRO: /* memory read only */
678 case SDT_MEMROA: /* memory read only accessed */
679 case SDT_MEMRW: /* memory read write */
680 case SDT_MEMRWA: /* memory read write accessed */
681 case SDT_MEMROD: /* memory read only expand dwn limit */
682 case SDT_MEMRODA: /* memory read only expand dwn lim accessed */
683 case SDT_MEMRWD: /* memory read write expand dwn limit */
684 case SDT_MEMRWDA: /* memory read write expand dwn lim acessed */
685 case SDT_MEME: /* memory execute only */
686 case SDT_MEMEA: /* memory execute only accessed */
687 case SDT_MEMER: /* memory execute read */
688 case SDT_MEMERA: /* memory execute read accessed */
689 break;
690 default:
691 return(EINVAL);
692 /*NOTREACHED*/
693 }
694
695 /* Only user (ring-3) descriptors may be present. */
696 if ((dp->sd_p != 0) && (dp->sd_dpl != SEL_UPL))
697 return (EACCES);
698 }
699
700 if (uap->start == LDT_AUTO_ALLOC && uap->num == 1) {
701 /* Allocate a free slot */
702 mtx_lock(&dt_lock);
703 pldt = user_ldt_alloc(p, 0);
704 if (pldt == NULL) {
705 mtx_unlock(&dt_lock);
706 return (ENOMEM);
707 }
708
709 /*
710 * start scanning a bit up to leave room for NVidia and
711 * Wine, which still user the "Blat" method of allocation.
712 */
713 i = 16;
714 dp = &((struct user_segment_descriptor *)(pldt->ldt_base))[i];
715 for (; i < max_ldt_segment; ++i, ++dp) {
716 if (dp->sd_type == SDT_SYSNULL)
717 break;
718 }
719 if (i >= max_ldt_segment) {
720 mtx_unlock(&dt_lock);
721 return (ENOSPC);
722 }
723 uap->start = i;
724 error = amd64_set_ldt_data(td, i, 1, descs);
725 mtx_unlock(&dt_lock);
726 } else {
727 largest_ld = uap->start + uap->num;
728 if (largest_ld > max_ldt_segment)
729 return (EINVAL);
730 mtx_lock(&dt_lock);
731 if (user_ldt_alloc(p, 0) != NULL) {
732 error = amd64_set_ldt_data(td, uap->start, uap->num,
733 descs);
734 }
735 mtx_unlock(&dt_lock);
736 }
737 if (error == 0)
738 td->td_retval[0] = uap->start;
739 return (error);
740 }
741
742 int
743 amd64_set_ldt_data(struct thread *td, int start, int num,
744 struct user_segment_descriptor *descs)
745 {
746 struct mdproc *mdp = &td->td_proc->p_md;
747 struct proc_ldt *pldt = mdp->md_ldt;
748
749 mtx_assert(&dt_lock, MA_OWNED);
750
751 /* Fill in range */
752 bcopy(descs,
753 &((struct user_segment_descriptor *)(pldt->ldt_base))[start],
754 num * sizeof(struct user_segment_descriptor));
755 return (0);
756 }
Cache object: aba1c84a64f03bf1e8617f2e34c1e268
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