1 /*-
2 * Copyright (c) 2005 Peter Wemm
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: src/sys/amd64/ia32/ia32_reg.c,v 1.3 2005/10/24 00:00:00 ps Exp $
27 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD: src/sys/amd64/ia32/ia32_reg.c,v 1.3 2005/10/24 00:00:00 ps Exp $");
31
32 #include "opt_compat.h"
33
34 #include <sys/param.h>
35 #include <sys/exec.h>
36 #include <sys/fcntl.h>
37 #include <sys/imgact.h>
38 #include <sys/kernel.h>
39 #include <sys/lock.h>
40 #include <sys/malloc.h>
41 #include <sys/mutex.h>
42 #include <sys/mman.h>
43 #include <sys/namei.h>
44 #include <sys/pioctl.h>
45 #include <sys/proc.h>
46 #include <sys/procfs.h>
47 #include <sys/resourcevar.h>
48 #include <sys/systm.h>
49 #include <sys/signalvar.h>
50 #include <sys/stat.h>
51 #include <sys/sx.h>
52 #include <sys/syscall.h>
53 #include <sys/sysctl.h>
54 #include <sys/sysent.h>
55 #include <sys/vnode.h>
56
57 #include <vm/vm.h>
58 #include <vm/vm_kern.h>
59 #include <vm/vm_param.h>
60 #include <vm/pmap.h>
61 #include <vm/vm_map.h>
62 #include <vm/vm_object.h>
63 #include <vm/vm_extern.h>
64
65 #include <compat/freebsd32/freebsd32_util.h>
66 #include <compat/freebsd32/freebsd32_proto.h>
67 #include <machine/fpu.h>
68 #include <compat/ia32/ia32_reg.h>
69 #include <machine/psl.h>
70 #include <machine/segments.h>
71 #include <machine/specialreg.h>
72 #include <machine/frame.h>
73 #include <machine/md_var.h>
74 #include <machine/pcb.h>
75 #include <machine/cpufunc.h>
76
77 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
78 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
79
80 int
81 fill_regs32(struct thread *td, struct reg32 *regs)
82 {
83 struct pcb *pcb;
84 struct trapframe *tp;
85
86 tp = td->td_frame;
87 pcb = td->td_pcb;
88 regs->r_fs = pcb->pcb_fs;
89 regs->r_es = pcb->pcb_es;
90 regs->r_ds = pcb->pcb_ds;
91 regs->r_edi = tp->tf_rdi;
92 regs->r_esi = tp->tf_rsi;
93 regs->r_ebp = tp->tf_rbp;
94 regs->r_ebx = tp->tf_rbx;
95 regs->r_edx = tp->tf_rdx;
96 regs->r_ecx = tp->tf_rcx;
97 regs->r_eax = tp->tf_rax;
98 regs->r_eip = tp->tf_rip;
99 regs->r_cs = tp->tf_cs;
100 regs->r_eflags = tp->tf_rflags;
101 regs->r_esp = tp->tf_rsp;
102 regs->r_ss = tp->tf_ss;
103 regs->r_gs = pcb->pcb_gs;
104 return (0);
105 }
106
107 int
108 set_regs32(struct thread *td, struct reg32 *regs)
109 {
110 struct pcb *pcb;
111 struct trapframe *tp;
112
113 tp = td->td_frame;
114 if (!EFL_SECURE(regs->r_eflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
115 return (EINVAL);
116 pcb = td->td_pcb;
117 #if 0
118 load_fs(regs->r_fs);
119 pcb->pcb_fs = regs->r_fs;
120 load_es(regs->r_es);
121 pcb->pcb_es = regs->r_es;
122 load_ds(regs->r_ds);
123 pcb->pcb_ds = regs->r_ds;
124 #endif
125 tp->tf_rdi = regs->r_edi;
126 tp->tf_rsi = regs->r_esi;
127 tp->tf_rbp = regs->r_ebp;
128 tp->tf_rbx = regs->r_ebx;
129 tp->tf_rdx = regs->r_edx;
130 tp->tf_rcx = regs->r_ecx;
131 tp->tf_rax = regs->r_eax;
132 tp->tf_rip = regs->r_eip;
133 tp->tf_cs = regs->r_cs;
134 tp->tf_rflags = regs->r_eflags;
135 tp->tf_rsp = regs->r_esp;
136 tp->tf_ss = regs->r_ss;
137 #if 0
138 load_gs(regs->r_gs);
139 pcb->pcb_gs = regs->r_gs;
140 #endif
141 return (0);
142 }
143
144 int
145 fill_fpregs32(struct thread *td, struct fpreg32 *regs)
146 {
147 struct save87 *sv_87 = (struct save87 *)regs;
148 struct env87 *penv_87 = &sv_87->sv_env;
149 struct savefpu *sv_fpu = &td->td_pcb->pcb_save;
150 struct envxmm *penv_xmm = &sv_fpu->sv_env;
151 int i;
152
153 bzero(regs, sizeof(*regs));
154
155 /* FPU control/status */
156 penv_87->en_cw = penv_xmm->en_cw;
157 penv_87->en_sw = penv_xmm->en_sw;
158 penv_87->en_tw = penv_xmm->en_tw;
159 /*
160 * XXX for en_fip/fcs/foo/fos, check if the fxsave format
161 * uses the old-style layout for 32 bit user apps. If so,
162 * read the ip and operand segment registers from there.
163 * For now, use the process's %cs/%ds.
164 */
165 penv_87->en_fip = penv_xmm->en_rip;
166 penv_87->en_fcs = td->td_frame->tf_cs;
167 penv_87->en_opcode = penv_xmm->en_opcode;
168 penv_87->en_foo = penv_xmm->en_rdp;
169 penv_87->en_fos = td->td_pcb->pcb_ds;
170
171 /* FPU registers */
172 for (i = 0; i < 8; ++i)
173 sv_87->sv_ac[i] = sv_fpu->sv_fp[i].fp_acc;
174
175 return (0);
176 }
177
178 int
179 set_fpregs32(struct thread *td, struct fpreg32 *regs)
180 {
181 struct save87 *sv_87 = (struct save87 *)regs;
182 struct env87 *penv_87 = &sv_87->sv_env;
183 struct savefpu *sv_fpu = &td->td_pcb->pcb_save;
184 struct envxmm *penv_xmm = &sv_fpu->sv_env;
185 int i;
186
187 /* FPU control/status */
188 penv_xmm->en_cw = penv_87->en_cw;
189 penv_xmm->en_sw = penv_87->en_sw;
190 penv_xmm->en_tw = penv_87->en_tw;
191 penv_xmm->en_rip = penv_87->en_fip;
192 /* penv_87->en_fcs and en_fos ignored, see above */
193 penv_xmm->en_opcode = penv_87->en_opcode;
194 penv_xmm->en_rdp = penv_87->en_foo;
195
196 /* FPU registers */
197 for (i = 0; i < 8; ++i)
198 sv_fpu->sv_fp[i].fp_acc = sv_87->sv_ac[i];
199 for (i = 8; i < 16; ++i)
200 bzero(&sv_fpu->sv_fp[i].fp_acc, sizeof(sv_fpu->sv_fp[i].fp_acc));
201
202 return (0);
203 }
204
205 int
206 fill_dbregs32(struct thread *td, struct dbreg32 *regs)
207 {
208 struct dbreg dr;
209 int err, i;
210
211 err = fill_dbregs(td, &dr);
212 for (i = 0; i < 8; i++)
213 regs->dr[i] = dr.dr[i];
214 for (i = 8; i < 16; i++)
215 regs->dr[i] = 0;
216 return (err);
217 }
218
219 int
220 set_dbregs32(struct thread *td, struct dbreg32 *regs)
221 {
222 struct dbreg dr;
223 int i;
224
225 for (i = 0; i < 8; i++)
226 dr.dr[i] = regs->dr[i];
227 for (i = 8; i < 16; i++)
228 dr.dr[i] = 0;
229 return (set_dbregs(td, &dr));
230 }
231 Cache object: dfefdfa8633afd04ee516f96752f8730
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