The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/amd64/ia32/ia32_reg.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2005 Peter Wemm
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  *
   28  * $FreeBSD$
   29  */
   30 
   31 #include <sys/cdefs.h>
   32 __FBSDID("$FreeBSD$");
   33 
   34 #include <sys/param.h>
   35 #include <sys/elf.h>
   36 #include <sys/exec.h>
   37 #include <sys/fcntl.h>
   38 #include <sys/imgact.h>
   39 #include <sys/kernel.h>
   40 #include <sys/lock.h>
   41 #include <sys/malloc.h>
   42 #include <sys/mutex.h>
   43 #include <sys/mman.h>
   44 #include <sys/namei.h>
   45 #include <sys/proc.h>
   46 #include <sys/procfs.h>
   47 #include <sys/reg.h>
   48 #include <sys/resourcevar.h>
   49 #include <sys/systm.h>
   50 #include <sys/signalvar.h>
   51 #include <sys/stat.h>
   52 #include <sys/sx.h>
   53 #include <sys/syscall.h>
   54 #include <sys/sysctl.h>
   55 #include <sys/sysent.h>
   56 #include <sys/vnode.h>
   57 
   58 #include <vm/vm.h>
   59 #include <vm/vm_kern.h>
   60 #include <vm/vm_param.h>
   61 #include <vm/pmap.h>
   62 #include <vm/vm_map.h>
   63 #include <vm/vm_object.h>
   64 #include <vm/vm_extern.h>
   65 
   66 #include <compat/freebsd32/freebsd32_util.h>
   67 #include <compat/freebsd32/freebsd32_proto.h>
   68 #include <machine/fpu.h>
   69 #include <machine/psl.h>
   70 #include <machine/segments.h>
   71 #include <machine/specialreg.h>
   72 #include <machine/frame.h>
   73 #include <machine/md_var.h>
   74 #include <machine/pcb.h>
   75 #include <machine/cpufunc.h>
   76 
   77 int
   78 fill_regs32(struct thread *td, struct reg32 *regs)
   79 {
   80         struct trapframe *tp;
   81 
   82         tp = td->td_frame;
   83         if (tp->tf_flags & TF_HASSEGS) {
   84                 regs->r_gs = tp->tf_gs;
   85                 regs->r_fs = tp->tf_fs;
   86                 regs->r_es = tp->tf_es;
   87                 regs->r_ds = tp->tf_ds;
   88         } else {
   89                 regs->r_gs = _ugssel;
   90                 regs->r_fs = _ufssel;
   91                 regs->r_es = _udatasel;
   92                 regs->r_ds = _udatasel;
   93         }
   94         regs->r_edi = tp->tf_rdi;
   95         regs->r_esi = tp->tf_rsi;
   96         regs->r_ebp = tp->tf_rbp;
   97         regs->r_ebx = tp->tf_rbx;
   98         regs->r_edx = tp->tf_rdx;
   99         regs->r_ecx = tp->tf_rcx;
  100         regs->r_eax = tp->tf_rax;
  101         regs->r_eip = tp->tf_rip;
  102         regs->r_cs = tp->tf_cs;
  103         regs->r_eflags = tp->tf_rflags;
  104         regs->r_esp = tp->tf_rsp;
  105         regs->r_ss = tp->tf_ss;
  106         regs->r_err = 0;
  107         regs->r_trapno = 0;
  108         return (0);
  109 }
  110 
  111 int
  112 set_regs32(struct thread *td, struct reg32 *regs)
  113 {
  114         struct trapframe *tp;
  115 
  116         tp = td->td_frame;
  117         if (!EFL_SECURE(regs->r_eflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
  118                 return (EINVAL);
  119         tp->tf_gs = regs->r_gs;
  120         tp->tf_fs = regs->r_fs;
  121         tp->tf_es = regs->r_es;
  122         tp->tf_ds = regs->r_ds;
  123         set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
  124         tp->tf_flags = TF_HASSEGS;
  125         tp->tf_rdi = regs->r_edi;
  126         tp->tf_rsi = regs->r_esi;
  127         tp->tf_rbp = regs->r_ebp;
  128         tp->tf_rbx = regs->r_ebx;
  129         tp->tf_rdx = regs->r_edx;
  130         tp->tf_rcx = regs->r_ecx;
  131         tp->tf_rax = regs->r_eax;
  132         tp->tf_rip = regs->r_eip;
  133         tp->tf_cs = regs->r_cs;
  134         tp->tf_rflags = regs->r_eflags;
  135         tp->tf_rsp = regs->r_esp;
  136         tp->tf_ss = regs->r_ss;
  137         return (0);
  138 }
  139 
  140 int
  141 fill_fpregs32(struct thread *td, struct fpreg32 *regs)
  142 {
  143         struct savefpu *sv_fpu;
  144         struct save87 *sv_87;
  145         struct env87 *penv_87;
  146         struct envxmm *penv_xmm;
  147         struct fpacc87 *fx_reg;
  148         int i, st;
  149         uint64_t mantissa;
  150         uint16_t tw, exp;
  151         uint8_t ab_tw;
  152 
  153         bzero(regs, sizeof(*regs));
  154         sv_87 = (struct save87 *)regs;
  155         penv_87 = &sv_87->sv_env;
  156         fpugetregs(td);
  157         sv_fpu = get_pcb_user_save_td(td);
  158         penv_xmm = &sv_fpu->sv_env;
  159 
  160         /* FPU control/status */
  161         penv_87->en_cw = penv_xmm->en_cw;
  162         penv_87->en_sw = penv_xmm->en_sw;
  163 
  164         /*
  165          * XXX for en_fip/fcs/foo/fos, check if the fxsave format
  166          * uses the old-style layout for 32 bit user apps.  If so,
  167          * read the ip and operand segment registers from there.
  168          * For now, use the process's %cs/%ds.
  169          */
  170         penv_87->en_fip = penv_xmm->en_rip;
  171         penv_87->en_fcs = td->td_frame->tf_cs;
  172         penv_87->en_opcode = penv_xmm->en_opcode;
  173         penv_87->en_foo = penv_xmm->en_rdp;
  174         /* Entry into the kernel always sets TF_HASSEGS */
  175         penv_87->en_fos = td->td_frame->tf_ds;
  176 
  177         /*
  178          * FPU registers and tags.
  179          * For ST(i), i = fpu_reg - top; we start with fpu_reg=7.
  180          */
  181         st = 7 - ((penv_xmm->en_sw >> 11) & 7);
  182         ab_tw = penv_xmm->en_tw;
  183         tw = 0;
  184         for (i = 0x80; i != 0; i >>= 1) {
  185                 sv_87->sv_ac[st] = sv_fpu->sv_fp[st].fp_acc;
  186                 tw <<= 2;
  187                 if ((ab_tw & i) != 0) {
  188                         /* Non-empty - we need to check ST(i) */
  189                         fx_reg = &sv_fpu->sv_fp[st].fp_acc;
  190                         /* The first 64 bits contain the mantissa. */
  191                         mantissa = *((uint64_t *)fx_reg->fp_bytes);
  192                         /*
  193                          * The final 16 bits contain the sign bit and the exponent.
  194                          * Mask the sign bit since it is of no consequence to these
  195                          * tests.
  196                          */
  197                         exp = *((uint16_t *)&fx_reg->fp_bytes[8]) & 0x7fff;
  198                         if (exp == 0) {
  199                                 if (mantissa == 0)
  200                                         tw |= 1; /* Zero */
  201                                 else
  202                                         tw |= 2; /* Denormal */
  203                         } else if (exp == 0x7fff)
  204                                 tw |= 2; /* Infinity or NaN */
  205                 } else
  206                         tw |= 3; /* Empty */
  207                 st = (st - 1) & 7;
  208         }
  209         penv_87->en_tw = tw;
  210 
  211         return (0);
  212 }
  213 
  214 int
  215 set_fpregs32(struct thread *td, struct fpreg32 *regs)
  216 {
  217         struct save87 *sv_87 = (struct save87 *)regs;
  218         struct env87 *penv_87 = &sv_87->sv_env;
  219         struct savefpu *sv_fpu = get_pcb_user_save_td(td);
  220         struct envxmm *penv_xmm = &sv_fpu->sv_env;
  221         int i;
  222 
  223         /* FPU control/status */
  224         penv_xmm->en_cw = penv_87->en_cw;
  225         penv_xmm->en_sw = penv_87->en_sw;
  226         penv_xmm->en_rip = penv_87->en_fip;
  227         /* penv_87->en_fcs and en_fos ignored, see above */
  228         penv_xmm->en_opcode = penv_87->en_opcode;
  229         penv_xmm->en_rdp = penv_87->en_foo;
  230 
  231         /* FPU registers and tags */
  232         penv_xmm->en_tw = 0;
  233         for (i = 0; i < 8; ++i) {
  234                 sv_fpu->sv_fp[i].fp_acc = sv_87->sv_ac[i];
  235                 if ((penv_87->en_tw & (3 << i * 2)) != (3 << i * 2))
  236                         penv_xmm->en_tw |= 1 << i;
  237         }
  238 
  239         for (i = 8; i < 16; ++i)
  240                 bzero(&sv_fpu->sv_fp[i].fp_acc, sizeof(sv_fpu->sv_fp[i].fp_acc));
  241         fpuuserinited(td);
  242 
  243         return (0);
  244 }
  245 
  246 int
  247 fill_dbregs32(struct thread *td, struct dbreg32 *regs)
  248 {
  249         struct dbreg dr;
  250         int err, i;
  251 
  252         err = fill_dbregs(td, &dr);
  253         for (i = 0; i < 8; i++)
  254                 regs->dr[i] = dr.dr[i];
  255         return (err);
  256 }
  257 
  258 int
  259 set_dbregs32(struct thread *td, struct dbreg32 *regs)
  260 {
  261         struct dbreg dr;
  262         int i;
  263 
  264         for (i = 0; i < 8; i++)
  265                 dr.dr[i] = regs->dr[i];
  266         for (i = 8; i < 16; i++)
  267                 dr.dr[i] = 0;
  268         return (set_dbregs(td, &dr));
  269 }
  270 
  271 static bool
  272 get_i386_segbases(struct regset *rs, struct thread *td, void *buf,
  273     size_t *sizep)
  274 {
  275         struct segbasereg32 *reg;
  276         struct pcb *pcb;
  277 
  278         if (buf != NULL) {
  279                 KASSERT(*sizep == sizeof(*reg), ("%s: invalid size", __func__));
  280                 reg = buf;
  281 
  282                 pcb = td->td_pcb;
  283                 if (td == curthread)
  284                         update_pcb_bases(pcb);
  285                 reg->r_fsbase = pcb->pcb_fsbase;
  286                 reg->r_gsbase = pcb->pcb_gsbase;
  287         }
  288         *sizep = sizeof(*reg);
  289         return (true);
  290 }
  291 
  292 static bool
  293 set_i386_segbases(struct regset *rs, struct thread *td, void *buf,
  294     size_t size)
  295 {
  296         struct segbasereg32 *reg;
  297         struct pcb *pcb;
  298 
  299         KASSERT(size == sizeof(*reg), ("%s: invalid size", __func__));
  300         reg = buf;
  301 
  302         pcb = td->td_pcb;
  303         set_pcb_flags(pcb, PCB_FULL_IRET);
  304         pcb->pcb_fsbase = reg->r_fsbase;
  305         td->td_frame->tf_fs = _ufssel;
  306         pcb->pcb_gsbase = reg->r_gsbase;
  307         td->td_frame->tf_gs = _ugssel;
  308 
  309         return (true);
  310 }
  311 
  312 static struct regset regset_i386_segbases = {
  313         .note = NT_X86_SEGBASES,
  314         .size = sizeof(struct segbasereg),
  315         .get = get_i386_segbases,
  316         .set = set_i386_segbases,
  317 };
  318 ELF32_REGSET(regset_i386_segbases);

Cache object: dfefdfa8633afd04ee516f96752f8730


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