The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/amd64/include/ieeefp.h

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    1 /*-
    2  * Copyright (c) 2003 Peter Wemm.
    3  * Copyright (c) 1990 Andrew Moore, Talke Studio
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  * 3. All advertising materials mentioning features or use of this software
   15  *    must display the following acknowledgement:
   16  *      This product includes software developed by the University of
   17  *      California, Berkeley and its contributors.
   18  * 4. Neither the name of the University nor the names of its contributors
   19  *    may be used to endorse or promote products derived from this software
   20  *    without specific prior written permission.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   32  * SUCH DAMAGE.
   33  *
   34  *      from: @(#) ieeefp.h     1.0 (Berkeley) 9/23/93
   35  * $FreeBSD: releng/9.0/sys/amd64/include/ieeefp.h 175231 2008-01-11 17:11:32Z bde $
   36  */
   37 
   38 #ifndef _MACHINE_IEEEFP_H_
   39 #define _MACHINE_IEEEFP_H_
   40 
   41 /*
   42  * IEEE floating point type, constant and function definitions.
   43  * XXX: {FP,SSE}*FLD and {FP,SSE}*OFF are undocumented pollution.
   44  */
   45 
   46 #ifndef _SYS_CDEFS_H_
   47 #error this file needs sys/cdefs.h as a prerequisite
   48 #endif
   49 
   50 /*
   51  * Rounding modes.
   52  */
   53 typedef enum {
   54         FP_RN=0,        /* round to nearest */
   55         FP_RM,          /* round down towards minus infinity */
   56         FP_RP,          /* round up towards plus infinity */
   57         FP_RZ           /* truncate */
   58 } fp_rnd_t;
   59 
   60 /*
   61  * Precision (i.e., rounding precision) modes.
   62  */
   63 typedef enum {
   64         FP_PS=0,        /* 24 bit (single-precision) */
   65         FP_PRS,         /* reserved */
   66         FP_PD,          /* 53 bit (double-precision) */
   67         FP_PE           /* 64 bit (extended-precision) */
   68 } fp_prec_t;
   69 
   70 #define fp_except_t     int
   71 
   72 /*
   73  * Exception bit masks.
   74  */
   75 #define FP_X_INV        0x01    /* invalid operation */
   76 #define FP_X_DNML       0x02    /* denormal */
   77 #define FP_X_DZ         0x04    /* zero divide */
   78 #define FP_X_OFL        0x08    /* overflow */
   79 #define FP_X_UFL        0x10    /* underflow */
   80 #define FP_X_IMP        0x20    /* (im)precision */
   81 #define FP_X_STK        0x40    /* stack fault */
   82 
   83 /*
   84  * FPU control word bit-field masks.
   85  */
   86 #define FP_MSKS_FLD     0x3f    /* exception masks field */
   87 #define FP_PRC_FLD      0x300   /* precision control field */
   88 #define FP_RND_FLD      0xc00   /* rounding control field */
   89 
   90 /*
   91  * FPU status word bit-field masks.
   92  */
   93 #define FP_STKY_FLD     0x3f    /* sticky flags field */
   94 
   95 /*
   96  * SSE mxcsr register bit-field masks.
   97  */
   98 #define SSE_STKY_FLD    0x3f    /* exception flags */
   99 #define SSE_DAZ_FLD     0x40    /* Denormals are zero */
  100 #define SSE_MSKS_FLD    0x1f80  /* exception masks field */
  101 #define SSE_RND_FLD     0x6000  /* rounding control */
  102 #define SSE_FZ_FLD      0x8000  /* flush to zero on underflow */
  103 
  104 /*
  105  * FPU control word bit-field offsets (shift counts).
  106  */
  107 #define FP_MSKS_OFF     0       /* exception masks offset */
  108 #define FP_PRC_OFF      8       /* precision control offset */
  109 #define FP_RND_OFF      10      /* rounding control offset */
  110 
  111 /*
  112  * FPU status word bit-field offsets (shift counts).
  113  */
  114 #define FP_STKY_OFF     0       /* sticky flags offset */
  115 
  116 /*
  117  * SSE mxcsr register bit-field offsets (shift counts).
  118  */
  119 #define SSE_STKY_OFF    0       /* exception flags offset */
  120 #define SSE_DAZ_OFF     6       /* DAZ exception mask offset */
  121 #define SSE_MSKS_OFF    7       /* other exception masks offset */
  122 #define SSE_RND_OFF     13      /* rounding control offset */
  123 #define SSE_FZ_OFF      15      /* flush to zero offset */
  124 
  125 #ifdef __GNUCLIKE_ASM
  126 
  127 #define __fldcw(addr)   __asm __volatile("fldcw %0" : : "m" (*(addr)))
  128 #define __fldenv(addr)  __asm __volatile("fldenv %0" : : "m" (*(addr)))
  129 #define __fnstcw(addr)  __asm __volatile("fnstcw %0" : "=m" (*(addr)))
  130 #define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr)))
  131 #define __fnstsw(addr)  __asm __volatile("fnstsw %0" : "=m" (*(addr)))
  132 #define __ldmxcsr(addr) __asm __volatile("ldmxcsr %0" : : "m" (*(addr)))
  133 #define __stmxcsr(addr) __asm __volatile("stmxcsr %0" : "=m" (*(addr)))
  134 
  135 /*
  136  * Load the control word.  Be careful not to trap if there is a currently
  137  * unmasked exception (ones that will become freshly unmasked are not a
  138  * problem).  This case must be handled by a save/restore of the
  139  * environment or even of the full x87 state.  Accessing the environment
  140  * is very inefficient, so only do it when necessary.
  141  */
  142 static __inline void
  143 __fnldcw(unsigned short _cw, unsigned short _newcw)
  144 {
  145         struct {
  146                 unsigned _cw;
  147                 unsigned _other[6];
  148         } _env;
  149         unsigned short _sw;
  150 
  151         if ((_cw & FP_MSKS_FLD) != FP_MSKS_FLD) {
  152                 __fnstsw(&_sw);
  153                 if (((_sw & ~_cw) & FP_STKY_FLD) != 0) {
  154                         __fnstenv(&_env);
  155                         _env._cw = _newcw;
  156                         __fldenv(&_env);
  157                         return;
  158                 }
  159         }
  160         __fldcw(&_newcw);
  161 }
  162 
  163 /*
  164  * General notes about conflicting SSE vs FP status bits.
  165  * This code assumes that software will not fiddle with the control
  166  * bits of the SSE and x87 in such a way to get them out of sync and
  167  * still expect this to work.  Break this at your peril.
  168  * Because I based this on the i386 port, the x87 state is used for
  169  * the fpget*() functions, and is shadowed into the SSE state for
  170  * the fpset*() functions.  For dual source fpget*() functions, I
  171  * merge the two together.  I think.
  172  */
  173 
  174 static __inline fp_rnd_t
  175 __fpgetround(void)
  176 {
  177         unsigned short _cw;
  178 
  179         __fnstcw(&_cw);
  180         return ((fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF));
  181 }
  182 
  183 static __inline fp_rnd_t
  184 __fpsetround(fp_rnd_t _m)
  185 {
  186         fp_rnd_t _p;
  187         unsigned _mxcsr;
  188         unsigned short _cw, _newcw;
  189 
  190         __fnstcw(&_cw);
  191         _p = (fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF);
  192         _newcw = _cw & ~FP_RND_FLD;
  193         _newcw |= (_m << FP_RND_OFF) & FP_RND_FLD;
  194         __fnldcw(_cw, _newcw);
  195         __stmxcsr(&_mxcsr);
  196         _mxcsr &= ~SSE_RND_FLD;
  197         _mxcsr |= (_m << SSE_RND_OFF) & SSE_RND_FLD;
  198         __ldmxcsr(&_mxcsr);
  199         return (_p);
  200 }
  201 
  202 /*
  203  * Get or set the rounding precision for x87 arithmetic operations.
  204  * There is no equivalent SSE mode or control.
  205  */
  206 
  207 static __inline fp_prec_t
  208 __fpgetprec(void)
  209 {
  210         unsigned short _cw;
  211 
  212         __fnstcw(&_cw);
  213         return ((fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF));
  214 }
  215 
  216 static __inline fp_prec_t
  217 __fpsetprec(fp_prec_t _m)
  218 {
  219         fp_prec_t _p;
  220         unsigned short _cw, _newcw;
  221 
  222         __fnstcw(&_cw);
  223         _p = (fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF);
  224         _newcw = _cw & ~FP_PRC_FLD;
  225         _newcw |= (_m << FP_PRC_OFF) & FP_PRC_FLD;
  226         __fnldcw(_cw, _newcw);
  227         return (_p);
  228 }
  229 
  230 /*
  231  * Get or set the exception mask.
  232  * Note that the x87 mask bits are inverted by the API -- a mask bit of 1
  233  * means disable for x87 and SSE, but for fp*mask() it means enable.
  234  */
  235 
  236 static __inline fp_except_t
  237 __fpgetmask(void)
  238 {
  239         unsigned short _cw;
  240 
  241         __fnstcw(&_cw);
  242         return ((~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF);
  243 }
  244 
  245 static __inline fp_except_t
  246 __fpsetmask(fp_except_t _m)
  247 {
  248         fp_except_t _p;
  249         unsigned _mxcsr;
  250         unsigned short _cw, _newcw;
  251 
  252         __fnstcw(&_cw);
  253         _p = (~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF;
  254         _newcw = _cw & ~FP_MSKS_FLD;
  255         _newcw |= (~_m << FP_MSKS_OFF) & FP_MSKS_FLD;
  256         __fnldcw(_cw, _newcw);
  257         __stmxcsr(&_mxcsr);
  258         /* XXX should we clear non-ieee SSE_DAZ_FLD and SSE_FZ_FLD ? */
  259         _mxcsr &= ~SSE_MSKS_FLD;
  260         _mxcsr |= (~_m << SSE_MSKS_OFF) & SSE_MSKS_FLD;
  261         __ldmxcsr(&_mxcsr);
  262         return (_p);
  263 }
  264 
  265 static __inline fp_except_t
  266 __fpgetsticky(void)
  267 {
  268         unsigned _ex, _mxcsr;
  269         unsigned short _sw;
  270 
  271         __fnstsw(&_sw);
  272         _ex = (_sw & FP_STKY_FLD) >> FP_STKY_OFF;
  273         __stmxcsr(&_mxcsr);
  274         _ex |= (_mxcsr & SSE_STKY_FLD) >> SSE_STKY_OFF;
  275         return ((fp_except_t)_ex);
  276 }
  277 
  278 #endif /* __GNUCLIKE_ASM */
  279 
  280 #if !defined(__IEEEFP_NOINLINES__) && defined(__GNUCLIKE_ASM)
  281 
  282 #define fpgetmask()     __fpgetmask()
  283 #define fpgetprec()     __fpgetprec()
  284 #define fpgetround()    __fpgetround()
  285 #define fpgetsticky()   __fpgetsticky()
  286 #define fpsetmask(m)    __fpsetmask(m)
  287 #define fpsetprec(m)    __fpsetprec(m)
  288 #define fpsetround(m)   __fpsetround(m)
  289 
  290 /* Suppress prototypes in the MI header. */
  291 #define _IEEEFP_INLINED_        1
  292 
  293 #else /* !(!__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM) */
  294 
  295 /* Augment the userland declarations. */
  296 __BEGIN_DECLS
  297 fp_prec_t       fpgetprec(void);
  298 fp_prec_t       fpsetprec(fp_prec_t);
  299 __END_DECLS
  300 
  301 #endif /* !__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM */
  302 
  303 #endif /* !_MACHINE_IEEEFP_H_ */

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