The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/amd64/include/param.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-4-Clause
    3  *
    4  * Copyright (c) 2002 David E. O'Brien.  All rights reserved.
    5  * Copyright (c) 1992, 1993
    6  *      The Regents of the University of California.  All rights reserved.
    7  *
    8  * This code is derived from software contributed to Berkeley by
    9  * the Systems Programming Group of the University of Utah Computer
   10  * Science Department and Ralph Campbell.
   11  *
   12  * Redistribution and use in source and binary forms, with or without
   13  * modification, are permitted provided that the following conditions
   14  * are met:
   15  * 1. Redistributions of source code must retain the above copyright
   16  *    notice, this list of conditions and the following disclaimer.
   17  * 2. Redistributions in binary form must reproduce the above copyright
   18  *    notice, this list of conditions and the following disclaimer in the
   19  *    documentation and/or other materials provided with the distribution.
   20  * 3. All advertising materials mentioning features or use of this software
   21  *    must display the following acknowledgement:
   22  *      This product includes software developed by the University of
   23  *      California, Berkeley and its contributors.
   24  * 4. Neither the name of the University nor the names of its contributors
   25  *    may be used to endorse or promote products derived from this software
   26  *    without specific prior written permission.
   27  *
   28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   38  * SUCH DAMAGE.
   39  *
   40  *      @(#)param.h     8.1 (Berkeley) 6/10/93
   41  * $FreeBSD$
   42  */
   43 
   44 #ifndef _AMD64_INCLUDE_PARAM_H_
   45 #define _AMD64_INCLUDE_PARAM_H_
   46 
   47 #include <machine/_align.h>
   48 
   49 /*
   50  * Machine dependent constants for AMD64.
   51  */
   52 
   53 #define __HAVE_ACPI
   54 #define __PCI_REROUTE_INTERRUPT
   55 
   56 #ifndef MACHINE
   57 #define MACHINE         "amd64"
   58 #endif
   59 #ifndef MACHINE_ARCH
   60 #define MACHINE_ARCH    "amd64"
   61 #endif
   62 #ifndef MACHINE_ARCH32
   63 #define MACHINE_ARCH32  "i386"
   64 #endif
   65 
   66 #ifdef SMP
   67 #ifndef MAXCPU
   68 #define MAXCPU          256
   69 #endif
   70 #else
   71 #define MAXCPU          1
   72 #endif
   73 
   74 #ifndef MAXMEMDOM
   75 #define MAXMEMDOM       8
   76 #endif
   77 
   78 #define ALIGNBYTES              _ALIGNBYTES
   79 #define ALIGN(p)                _ALIGN(p)
   80 /*
   81  * ALIGNED_POINTER is a boolean macro that checks whether an address
   82  * is valid to fetch data elements of type t from on this architecture.
   83  * This does not reflect the optimal alignment, just the possibility
   84  * (within reasonable limits). 
   85  */
   86 #define ALIGNED_POINTER(p, t)   1
   87 
   88 /*
   89  * CACHE_LINE_SIZE is the compile-time maximum cache line size for an
   90  * architecture.  It should be used with appropriate caution.
   91  */
   92 #define CACHE_LINE_SHIFT        6
   93 #define CACHE_LINE_SIZE         (1 << CACHE_LINE_SHIFT)
   94 
   95 /* Size of the level 1 page table units */
   96 #define NPTEPG          (PAGE_SIZE/(sizeof (pt_entry_t)))
   97 #define NPTEPGSHIFT     9               /* LOG2(NPTEPG) */
   98 #define PAGE_SHIFT      12              /* LOG2(PAGE_SIZE) */
   99 #define PAGE_SIZE       (1<<PAGE_SHIFT) /* bytes/page */
  100 #define PAGE_MASK       (PAGE_SIZE-1)
  101 /* Size of the level 2 page directory units */
  102 #define NPDEPG          (PAGE_SIZE/(sizeof (pd_entry_t)))
  103 #define NPDEPGSHIFT     9               /* LOG2(NPDEPG) */
  104 #define PDRSHIFT        21              /* LOG2(NBPDR) */
  105 #define NBPDR           (1<<PDRSHIFT)   /* bytes/page dir */
  106 #define PDRMASK         (NBPDR-1)
  107 /* Size of the level 3 page directory pointer table units */
  108 #define NPDPEPG         (PAGE_SIZE/(sizeof (pdp_entry_t)))
  109 #define NPDPEPGSHIFT    9               /* LOG2(NPDPEPG) */
  110 #define PDPSHIFT        30              /* LOG2(NBPDP) */
  111 #define NBPDP           (1<<PDPSHIFT)   /* bytes/page dir ptr table */
  112 #define PDPMASK         (NBPDP-1)
  113 /* Size of the level 4 page-map level-4 table units */
  114 #define NPML4EPG        (PAGE_SIZE/(sizeof (pml4_entry_t)))
  115 #define NPML4EPGSHIFT   9               /* LOG2(NPML4EPG) */
  116 #define PML4SHIFT       39              /* LOG2(NBPML4) */
  117 #define NBPML4          (1UL<<PML4SHIFT)/* bytes/page map lev4 table */
  118 #define PML4MASK        (NBPML4-1)
  119 /* Size of the level 5 page-map level-5 table units */
  120 #define NPML5EPG        (PAGE_SIZE/(sizeof (pml5_entry_t)))
  121 #define NPML5EPGSHIFT   9               /* LOG2(NPML5EPG) */
  122 #define PML5SHIFT       48              /* LOG2(NBPML5) */
  123 #define NBPML5          (1UL<<PML5SHIFT)/* bytes/page map lev5 table */
  124 #define PML5MASK        (NBPML5-1)
  125 
  126 #define MAXPAGESIZES    3       /* maximum number of supported page sizes */
  127 
  128 #define IOPAGES 2               /* pages of i/o permission bitmap */
  129 /*
  130  * I/O permission bitmap has a bit for each I/O port plus an additional
  131  * byte at the end with all bits set. See section "I/O Permission Bit Map"
  132  * in the Intel SDM for more details.
  133  */
  134 #define IOPERM_BITMAP_SIZE      (IOPAGES * PAGE_SIZE + 1)
  135 
  136 #ifndef KSTACK_PAGES
  137 #if defined(KASAN) || defined(KMSAN)
  138 #define KSTACK_PAGES    6
  139 #else
  140 #define KSTACK_PAGES    4       /* pages of kstack (with pcb) */
  141 #endif
  142 #endif
  143 #define KSTACK_GUARD_PAGES 1    /* pages of kstack guard; 0 disables */
  144 
  145 /*
  146  * Mach derived conversion macros
  147  */
  148 #define round_page(x)   ((((unsigned long)(x)) + PAGE_MASK) & ~(PAGE_MASK))
  149 #define trunc_page(x)   ((unsigned long)(x) & ~(PAGE_MASK))
  150 #define trunc_2mpage(x) ((unsigned long)(x) & ~PDRMASK)
  151 #define round_2mpage(x) ((((unsigned long)(x)) + PDRMASK) & ~PDRMASK)
  152 #define trunc_1gpage(x) ((unsigned long)(x) & ~PDPMASK)
  153 
  154 #define atop(x)         ((unsigned long)(x) >> PAGE_SHIFT)
  155 #define ptoa(x)         ((unsigned long)(x) << PAGE_SHIFT)
  156 
  157 #define amd64_btop(x)   ((unsigned long)(x) >> PAGE_SHIFT)
  158 #define amd64_ptob(x)   ((unsigned long)(x) << PAGE_SHIFT)
  159 
  160 #define pgtok(x)        ((unsigned long)(x) * (PAGE_SIZE / 1024)) 
  161 
  162 #define INKERNEL(va) (((va) >= DMAP_MIN_ADDRESS && (va) < DMAP_MAX_ADDRESS) \
  163     || ((va) >= VM_MIN_KERNEL_ADDRESS && (va) < VM_MAX_KERNEL_ADDRESS))
  164 
  165 #ifdef SMP
  166 #define SC_TABLESIZE    1024                     /* Must be power of 2. */
  167 #endif
  168 
  169 #endif /* !_AMD64_INCLUDE_PARAM_H_ */

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