Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/amd64/isa/isa_dma.c
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1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 4. Neither the name of the University nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD: releng/5.4/sys/amd64/isa/isa_dma.c 143242 2005-03-07 13:10:48Z phk $"); 37 38 /* 39 * code to manage AT bus 40 * 41 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 42 * Fixed uninitialized variable problem and added code to deal 43 * with DMA page boundaries in isa_dmarangecheck(). Fixed word 44 * mode DMA count compution and reorganized DMA setup code in 45 * isa_dmastart() 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/bus.h> 51 #include <sys/kernel.h> 52 #include <sys/malloc.h> 53 #include <sys/lock.h> 54 #include <sys/proc.h> 55 #include <sys/mutex.h> 56 #include <sys/module.h> 57 #include <vm/vm.h> 58 #include <vm/vm_param.h> 59 #include <vm/pmap.h> 60 #include <amd64/isa/isa.h> 61 #include <dev/ic/i8237.h> 62 #include <isa/isavar.h> 63 64 /* 65 ** Register definitions for DMA controller 1 (channels 0..3): 66 */ 67 #define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 68 #define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 69 #define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 70 #define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 71 72 /* 73 ** Register definitions for DMA controller 2 (channels 4..7): 74 */ 75 #define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 76 #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 77 #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 78 #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 79 80 #define ISARAM_END 0x1000000 81 82 static int isa_dmarangecheck(caddr_t va, u_int length, int chan); 83 84 static caddr_t dma_bouncebuf[8]; 85 static u_int dma_bouncebufsize[8]; 86 static u_int8_t dma_bounced = 0; 87 static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ 88 static u_int8_t dma_inuse = 0; /* User for acquire/release */ 89 static u_int8_t dma_auto_mode = 0; 90 91 #define VALID_DMA_MASK (7) 92 93 /* high byte of address is stored in this port for i-th dma channel */ 94 static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 95 96 /* 97 * Setup a DMA channel's bounce buffer. 98 */ 99 void 100 isa_dmainit(chan, bouncebufsize) 101 int chan; 102 u_int bouncebufsize; 103 { 104 void *buf; 105 106 /* 107 * If a DMA channel is shared, both drivers have to call isa_dmainit 108 * since they don't know that the other driver will do it. 109 * Just return if we're already set up good. 110 * XXX: this only works if they agree on the bouncebuf size. This 111 * XXX: is typically the case since they are multiple instances of 112 * XXX: the same driver. 113 */ 114 if (dma_bouncebuf[chan] != NULL) 115 return; 116 117 #ifdef DIAGNOSTIC 118 if (chan & ~VALID_DMA_MASK) 119 panic("isa_dmainit: channel out of range"); 120 #endif 121 122 dma_bouncebufsize[chan] = bouncebufsize; 123 124 /* Try malloc() first. It works better if it works. */ 125 buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT); 126 if (buf != NULL) { 127 if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) { 128 dma_bouncebuf[chan] = buf; 129 return; 130 } 131 free(buf, M_DEVBUF); 132 } 133 buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful, 134 1ul, chan & 4 ? 0x20000ul : 0x10000ul); 135 if (buf == NULL) 136 printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize); 137 else 138 dma_bouncebuf[chan] = buf; 139 } 140 141 /* 142 * Register a DMA channel's usage. Usually called from a device driver 143 * in open() or during its initialization. 144 */ 145 int 146 isa_dma_acquire(chan) 147 int chan; 148 { 149 #ifdef DIAGNOSTIC 150 if (chan & ~VALID_DMA_MASK) 151 panic("isa_dma_acquire: channel out of range"); 152 #endif 153 154 if (dma_inuse & (1 << chan)) { 155 printf("isa_dma_acquire: channel %d already in use\n", chan); 156 return (EBUSY); 157 } 158 dma_inuse |= (1 << chan); 159 dma_auto_mode &= ~(1 << chan); 160 161 return (0); 162 } 163 164 /* 165 * Unregister a DMA channel's usage. Usually called from a device driver 166 * during close() or during its shutdown. 167 */ 168 void 169 isa_dma_release(chan) 170 int chan; 171 { 172 #ifdef DIAGNOSTIC 173 if (chan & ~VALID_DMA_MASK) 174 panic("isa_dma_release: channel out of range"); 175 176 if ((dma_inuse & (1 << chan)) == 0) 177 printf("isa_dma_release: channel %d not in use\n", chan); 178 #endif 179 180 if (dma_busy & (1 << chan)) { 181 dma_busy &= ~(1 << chan); 182 /* 183 * XXX We should also do "dma_bounced &= (1 << chan);" 184 * because we are acting on behalf of isa_dmadone() which 185 * was not called to end the last DMA operation. This does 186 * not matter now, but it may in the future. 187 */ 188 } 189 190 dma_inuse &= ~(1 << chan); 191 dma_auto_mode &= ~(1 << chan); 192 } 193 194 /* 195 * isa_dmacascade(): program 8237 DMA controller channel to accept 196 * external dma control by a board. 197 */ 198 void 199 isa_dmacascade(chan) 200 int chan; 201 { 202 #ifdef DIAGNOSTIC 203 if (chan & ~VALID_DMA_MASK) 204 panic("isa_dmacascade: channel out of range"); 205 #endif 206 207 /* set dma channel mode, and set dma channel mode */ 208 if ((chan & 4) == 0) { 209 outb(DMA1_MODE, DMA37MD_CASCADE | chan); 210 outb(DMA1_SMSK, chan); 211 } else { 212 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 213 outb(DMA2_SMSK, chan & 3); 214 } 215 } 216 217 /* 218 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 219 * problems by using a bounce buffer. 220 */ 221 void 222 isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan) 223 { 224 vm_paddr_t phys; 225 int waport; 226 caddr_t newaddr; 227 228 GIANT_REQUIRED; 229 230 #ifdef DIAGNOSTIC 231 if (chan & ~VALID_DMA_MASK) 232 panic("isa_dmastart: channel out of range"); 233 234 if ((chan < 4 && nbytes > (1<<16)) 235 || (chan >= 4 && (nbytes > (1<<17) || (uintptr_t)addr & 1))) 236 panic("isa_dmastart: impossible request"); 237 238 if ((dma_inuse & (1 << chan)) == 0) 239 printf("isa_dmastart: channel %d not acquired\n", chan); 240 #endif 241 242 #if 0 243 /* 244 * XXX This should be checked, but drivers like ad1848 only call 245 * isa_dmastart() once because they use Auto DMA mode. If we 246 * leave this in, drivers that do this will print this continuously. 247 */ 248 if (dma_busy & (1 << chan)) 249 printf("isa_dmastart: channel %d busy\n", chan); 250 #endif 251 252 dma_busy |= (1 << chan); 253 254 if (isa_dmarangecheck(addr, nbytes, chan)) { 255 if (dma_bouncebuf[chan] == NULL 256 || dma_bouncebufsize[chan] < nbytes) 257 panic("isa_dmastart: bad bounce buffer"); 258 dma_bounced |= (1 << chan); 259 newaddr = dma_bouncebuf[chan]; 260 261 /* copy bounce buffer on write */ 262 if (!(flags & ISADMA_READ)) 263 bcopy(addr, newaddr, nbytes); 264 addr = newaddr; 265 } 266 267 /* translate to physical */ 268 phys = pmap_extract(kernel_pmap, (vm_offset_t)addr); 269 270 if (flags & ISADMA_RAW) { 271 dma_auto_mode |= (1 << chan); 272 } else { 273 dma_auto_mode &= ~(1 << chan); 274 } 275 276 if ((chan & 4) == 0) { 277 /* 278 * Program one of DMA channels 0..3. These are 279 * byte mode channels. 280 */ 281 /* set dma channel mode, and reset address ff */ 282 283 /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 284 if (flags & ISADMA_RAW) { 285 if (flags & ISADMA_READ) 286 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan); 287 else 288 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan); 289 } 290 else 291 if (flags & ISADMA_READ) 292 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 293 else 294 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 295 outb(DMA1_FFC, 0); 296 297 /* send start address */ 298 waport = DMA1_CHN(chan); 299 outb(waport, phys); 300 outb(waport, phys>>8); 301 outb(dmapageport[chan], phys>>16); 302 303 /* send count */ 304 outb(waport + 1, --nbytes); 305 outb(waport + 1, nbytes>>8); 306 307 /* unmask channel */ 308 outb(DMA1_SMSK, chan); 309 } else { 310 /* 311 * Program one of DMA channels 4..7. These are 312 * word mode channels. 313 */ 314 /* set dma channel mode, and reset address ff */ 315 316 /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 317 if (flags & ISADMA_RAW) { 318 if (flags & ISADMA_READ) 319 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3)); 320 else 321 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3)); 322 } 323 else 324 if (flags & ISADMA_READ) 325 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 326 else 327 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 328 outb(DMA2_FFC, 0); 329 330 /* send start address */ 331 waport = DMA2_CHN(chan - 4); 332 outb(waport, phys>>1); 333 outb(waport, phys>>9); 334 outb(dmapageport[chan], phys>>16); 335 336 /* send count */ 337 nbytes >>= 1; 338 outb(waport + 2, --nbytes); 339 outb(waport + 2, nbytes>>8); 340 341 /* unmask channel */ 342 outb(DMA2_SMSK, chan & 3); 343 } 344 } 345 346 void 347 isa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 348 { 349 #ifdef DIAGNOSTIC 350 if (chan & ~VALID_DMA_MASK) 351 panic("isa_dmadone: channel out of range"); 352 353 if ((dma_inuse & (1 << chan)) == 0) 354 printf("isa_dmadone: channel %d not acquired\n", chan); 355 #endif 356 357 if (((dma_busy & (1 << chan)) == 0) && 358 (dma_auto_mode & (1 << chan)) == 0 ) 359 printf("isa_dmadone: channel %d not busy\n", chan); 360 361 if ((dma_auto_mode & (1 << chan)) == 0) 362 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4); 363 364 if (dma_bounced & (1 << chan)) { 365 /* copy bounce buffer on read */ 366 if (flags & ISADMA_READ) 367 bcopy(dma_bouncebuf[chan], addr, nbytes); 368 369 dma_bounced &= ~(1 << chan); 370 } 371 dma_busy &= ~(1 << chan); 372 } 373 374 /* 375 * Check for problems with the address range of a DMA transfer 376 * (non-contiguous physical pages, outside of bus address space, 377 * crossing DMA page boundaries). 378 * Return true if special handling needed. 379 */ 380 381 static int 382 isa_dmarangecheck(caddr_t va, u_int length, int chan) 383 { 384 vm_paddr_t phys, priorpage = 0; 385 vm_offset_t endva; 386 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 387 388 GIANT_REQUIRED; 389 390 endva = (vm_offset_t)round_page((vm_offset_t)va + length); 391 for (; va < (caddr_t) endva ; va += PAGE_SIZE) { 392 phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va)); 393 if (phys == 0) 394 panic("isa_dmacheck: no physical page present"); 395 if (phys >= ISARAM_END) 396 return (1); 397 if (priorpage) { 398 if (priorpage + PAGE_SIZE != phys) 399 return (1); 400 /* check if crossing a DMA page boundary */ 401 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 402 return (1); 403 } 404 priorpage = phys; 405 } 406 return (0); 407 } 408 409 /* 410 * Query the progress of a transfer on a DMA channel. 411 * 412 * To avoid having to interrupt a transfer in progress, we sample 413 * each of the high and low databytes twice, and apply the following 414 * logic to determine the correct count. 415 * 416 * Reads are performed with interrupts disabled, thus it is to be 417 * expected that the time between reads is very small. At most 418 * one rollover in the low count byte can be expected within the 419 * four reads that are performed. 420 * 421 * There are three gaps in which a rollover can occur : 422 * 423 * - read low1 424 * gap1 425 * - read high1 426 * gap2 427 * - read low2 428 * gap3 429 * - read high2 430 * 431 * If a rollover occurs in gap1 or gap2, the low2 value will be 432 * greater than the low1 value. In this case, low2 and high2 are a 433 * corresponding pair. 434 * 435 * In any other case, low1 and high1 can be considered to be correct. 436 * 437 * The function returns the number of bytes remaining in the transfer, 438 * or -1 if the channel requested is not active. 439 * 440 */ 441 int 442 isa_dmastatus(int chan) 443 { 444 u_long cnt = 0; 445 int ffport, waport; 446 u_long low1, high1, low2, high2; 447 448 /* channel active? */ 449 if ((dma_inuse & (1 << chan)) == 0) { 450 printf("isa_dmastatus: channel %d not active\n", chan); 451 return(-1); 452 } 453 /* channel busy? */ 454 455 if (((dma_busy & (1 << chan)) == 0) && 456 (dma_auto_mode & (1 << chan)) == 0 ) { 457 printf("chan %d not busy\n", chan); 458 return -2 ; 459 } 460 if (chan < 4) { /* low DMA controller */ 461 ffport = DMA1_FFC; 462 waport = DMA1_CHN(chan) + 1; 463 } else { /* high DMA controller */ 464 ffport = DMA2_FFC; 465 waport = DMA2_CHN(chan - 4) + 2; 466 } 467 468 disable_intr(); /* no interrupts Mr Jones! */ 469 outb(ffport, 0); /* clear register LSB flipflop */ 470 low1 = inb(waport); 471 high1 = inb(waport); 472 outb(ffport, 0); /* clear again */ 473 low2 = inb(waport); 474 high2 = inb(waport); 475 enable_intr(); /* enable interrupts again */ 476 477 /* 478 * Now decide if a wrap has tried to skew our results. 479 * Note that after TC, the count will read 0xffff, while we want 480 * to return zero, so we add and then mask to compensate. 481 */ 482 if (low1 >= low2) { 483 cnt = (low1 + (high1 << 8) + 1) & 0xffff; 484 } else { 485 cnt = (low2 + (high2 << 8) + 1) & 0xffff; 486 } 487 488 if (chan >= 4) /* high channels move words */ 489 cnt *= 2; 490 return(cnt); 491 } 492 493 /* 494 * Reached terminal count yet ? 495 */ 496 int 497 isa_dmatc(int chan) 498 { 499 500 if (chan < 4) 501 return(inb(DMA1_STATUS) & (1 << chan)); 502 else 503 return(inb(DMA2_STATUS) & (1 << (chan & 3))); 504 } 505 506 /* 507 * Stop a DMA transfer currently in progress. 508 */ 509 int 510 isa_dmastop(int chan) 511 { 512 if ((dma_inuse & (1 << chan)) == 0) 513 printf("isa_dmastop: channel %d not acquired\n", chan); 514 515 if (((dma_busy & (1 << chan)) == 0) && 516 ((dma_auto_mode & (1 << chan)) == 0)) { 517 printf("chan %d not busy\n", chan); 518 return -2 ; 519 } 520 521 if ((chan & 4) == 0) { 522 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */); 523 } else { 524 outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */); 525 } 526 return(isa_dmastatus(chan)); 527 } 528 529 /* 530 * Attach to the ISA PnP descriptor for the AT DMA controller 531 */ 532 static struct isa_pnp_id atdma_ids[] = { 533 { 0x0002d041 /* PNP0200 */, "AT DMA controller" }, 534 { 0 } 535 }; 536 537 static int 538 atdma_probe(device_t dev) 539 { 540 int result; 541 542 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0) 543 device_quiet(dev); 544 return(result); 545 } 546 547 static int 548 atdma_attach(device_t dev) 549 { 550 return(0); 551 } 552 553 static device_method_t atdma_methods[] = { 554 /* Device interface */ 555 DEVMETHOD(device_probe, atdma_probe), 556 DEVMETHOD(device_attach, atdma_attach), 557 DEVMETHOD(device_detach, bus_generic_detach), 558 DEVMETHOD(device_shutdown, bus_generic_shutdown), 559 DEVMETHOD(device_suspend, bus_generic_suspend), 560 DEVMETHOD(device_resume, bus_generic_resume), 561 { 0, 0 } 562 }; 563 564 static driver_t atdma_driver = { 565 "atdma", 566 atdma_methods, 567 1, /* no softc */ 568 }; 569 570 static devclass_t atdma_devclass; 571 572 DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0); 573 DRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0);
Cache object: ea15d7d44ea99ae92fe75d9fc19d5386
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