pci_bus.c

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    1 /*-
    2  * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice unmodified, this list of conditions, and the following
   10  *    disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD$");
   29 
   30 #include "opt_cpu.h"
   31 
   32 #include <sys/param.h>
   33 #include <sys/systm.h>
   34 #include <sys/bus.h>
   35 #include <sys/kernel.h>
   36 #include <sys/malloc.h>
   37 #include <sys/module.h>
   38 #include <sys/sysctl.h>
   39 
   40 #include <dev/pci/pcivar.h>
   41 #include <dev/pci/pcireg.h>
   42 #include <dev/pci/pcib_private.h>
   43 #include <isa/isavar.h>
   44 #include <machine/legacyvar.h>
   45 #include <machine/pci_cfgreg.h>
   46 #include <machine/resource.h>
   47 
   48 #include "pcib_if.h"
   49 
   50 int
   51 legacy_pcib_maxslots(device_t dev)
   52 {
   53         return 31;
   54 }
   55 
   56 /* read configuration space register */
   57 
   58 u_int32_t
   59 legacy_pcib_read_config(device_t dev, int bus, int slot, int func,
   60                         int reg, int bytes)
   61 {
   62         return(pci_cfgregread(bus, slot, func, reg, bytes));
   63 }
   64 
   65 /* write configuration space register */
   66 
   67 void
   68 legacy_pcib_write_config(device_t dev, int bus, int slot, int func,
   69                          int reg, u_int32_t data, int bytes)
   70 {
   71         pci_cfgregwrite(bus, slot, func, reg, data, bytes);
   72 }
   73 
   74 /* route interrupt */
   75 
   76 static int
   77 legacy_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
   78 {
   79 
   80         /* No routing possible */
   81         return (PCI_INVALID_IRQ);
   82 }
   83 
   84 /* Pass MSI requests up to the nexus. */
   85 
   86 static int
   87 legacy_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
   88     int *irqs)
   89 {
   90         device_t bus;
   91 
   92         bus = device_get_parent(pcib);
   93         return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
   94             irqs));
   95 }
   96 
   97 static int
   98 legacy_pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
   99 {
  100         device_t bus;
  101 
  102         bus = device_get_parent(pcib);
  103         return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
  104 }
  105 
  106 static int
  107 legacy_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
  108     uint32_t *data)
  109 {
  110         device_t bus;
  111 
  112         bus = device_get_parent(pcib);
  113         return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data));
  114 }
  115 
  116 static const char *
  117 legacy_pcib_is_host_bridge(int bus, int slot, int func,
  118                           uint32_t id, uint8_t class, uint8_t subclass,
  119                           uint8_t *busnum)
  120 {
  121         const char *s = NULL;
  122 
  123         *busnum = 0;
  124         if (class == PCIC_BRIDGE && subclass == PCIS_BRIDGE_HOST)
  125                 s = "Host to PCI bridge";
  126         return s;
  127 }
  128 
  129 /*
  130  * Scan the first pci bus for host-pci bridges and add pcib instances
  131  * to the nexus for each bridge.
  132  */
  133 static void
  134 legacy_pcib_identify(driver_t *driver, device_t parent)
  135 {
  136         int bus, slot, func;
  137         u_int8_t  hdrtype;
  138         int found = 0;
  139         int pcifunchigh;
  140         int found824xx = 0;
  141         int found_orion = 0;
  142         device_t child;
  143         devclass_t pci_devclass;
  144 
  145         if (pci_cfgregopen() == 0)
  146                 return;
  147         /*
  148          * Check to see if we haven't already had a PCI bus added
  149          * via some other means.  If we have, bail since otherwise
  150          * we're going to end up duplicating it.
  151          */
  152         if ((pci_devclass = devclass_find("pci")) &&
  153                 devclass_get_device(pci_devclass, 0))
  154                 return;
  155 
  156 
  157         bus = 0;
  158  retry:
  159         for (slot = 0; slot <= PCI_SLOTMAX; slot++) {
  160                 func = 0;
  161                 hdrtype = legacy_pcib_read_config(0, bus, slot, func,
  162                                                  PCIR_HDRTYPE, 1);
  163                 /*
  164                  * When enumerating bus devices, the standard says that
  165                  * one should check the header type and ignore the slots whose
  166                  * header types that the software doesn't know about.  We use
  167                  * this to filter out devices.
  168                  */
  169                 if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
  170                         continue;
  171                 if ((hdrtype & PCIM_MFDEV) &&
  172                     (!found_orion || hdrtype != 0xff))
  173                         pcifunchigh = PCI_FUNCMAX;
  174                 else
  175                         pcifunchigh = 0;
  176                 for (func = 0; func <= pcifunchigh; func++) {
  177                         /*
  178                          * Read the IDs and class from the device.
  179                          */
  180                         u_int32_t id;
  181                         u_int8_t class, subclass, busnum;
  182                         const char *s;
  183                         device_t *devs;
  184                         int ndevs, i;
  185 
  186                         id = legacy_pcib_read_config(0, bus, slot, func,
  187                                                     PCIR_DEVVENDOR, 4);
  188                         if (id == -1)
  189                                 continue;
  190                         class = legacy_pcib_read_config(0, bus, slot, func,
  191                                                        PCIR_CLASS, 1);
  192                         subclass = legacy_pcib_read_config(0, bus, slot, func,
  193                                                           PCIR_SUBCLASS, 1);
  194 
  195                         s = legacy_pcib_is_host_bridge(bus, slot, func,
  196                                                       id, class, subclass,
  197                                                       &busnum);
  198                         if (s == NULL)
  199                                 continue;
  200 
  201                         /*
  202                          * Check to see if the physical bus has already
  203                          * been seen.  Eg: hybrid 32 and 64 bit host
  204                          * bridges to the same logical bus.
  205                          */
  206                         if (device_get_children(parent, &devs, &ndevs) == 0) {
  207                                 for (i = 0; s != NULL && i < ndevs; i++) {
  208                                         if (strcmp(device_get_name(devs[i]),
  209                                             "pcib") != 0)
  210                                                 continue;
  211                                         if (legacy_get_pcibus(devs[i]) == busnum)
  212                                                 s = NULL;
  213                                 }
  214                                 free(devs, M_TEMP);
  215                         }
  216 
  217                         if (s == NULL)
  218                                 continue;
  219                         /*
  220                          * Add at priority 100 to make sure we
  221                          * go after any motherboard resources
  222                          */
  223                         child = BUS_ADD_CHILD(parent, 100,
  224                                               "pcib", busnum);
  225                         device_set_desc(child, s);
  226                         legacy_set_pcibus(child, busnum);
  227 
  228                         found = 1;
  229                         if (id == 0x12258086)
  230                                 found824xx = 1;
  231                         if (id == 0x84c48086)
  232                                 found_orion = 1;
  233                 }
  234         }
  235         if (found824xx && bus == 0) {
  236                 bus++;
  237                 goto retry;
  238         }
  239 
  240         /*
  241          * Make sure we add at least one bridge since some old
  242          * hardware doesn't actually have a host-pci bridge device.
  243          * Note that pci_cfgregopen() thinks we have PCI devices..
  244          */
  245         if (!found) {
  246                 if (bootverbose)
  247                         printf(
  248         "legacy_pcib_identify: no bridge found, adding pcib0 anyway\n");
  249                 child = BUS_ADD_CHILD(parent, 100, "pcib", 0);
  250                 legacy_set_pcibus(child, 0);
  251         }
  252 }
  253 
  254 static int
  255 legacy_pcib_probe(device_t dev)
  256 {
  257 
  258         if (pci_cfgregopen() == 0)
  259                 return ENXIO;
  260         return -100;
  261 }
  262 
  263 static int
  264 legacy_pcib_attach(device_t dev)
  265 {
  266         int bus;
  267 
  268         bus = pcib_get_bus(dev);
  269         device_add_child(dev, "pci", bus);
  270         return bus_generic_attach(dev);
  271 }
  272 
  273 int
  274 legacy_pcib_read_ivar(device_t dev, device_t child, int which,
  275     uintptr_t *result)
  276 {
  277 
  278         switch (which) {
  279         case  PCIB_IVAR_BUS:
  280                 *result = legacy_get_pcibus(dev);
  281                 return 0;
  282         }
  283         return ENOENT;
  284 }
  285 
  286 int
  287 legacy_pcib_write_ivar(device_t dev, device_t child, int which,
  288     uintptr_t value)
  289 {
  290 
  291         switch (which) {
  292         case  PCIB_IVAR_BUS:
  293                 legacy_set_pcibus(dev, value);
  294                 return 0;
  295         }
  296         return ENOENT;
  297 }
  298 
  299 SYSCTL_DECL(_hw_pci);
  300 
  301 static unsigned long legacy_host_mem_start = 0x80000000;
  302 TUNABLE_ULONG("hw.pci.host_mem_start", &legacy_host_mem_start);
  303 SYSCTL_ULONG(_hw_pci, OID_AUTO, host_mem_start, CTLFLAG_RDTUN,
  304     &legacy_host_mem_start, 0x80000000,
  305     "Limit the host bridge memory to being above this address.  Must be\n\
  306 set at boot via a tunable.");
  307 
  308 struct resource *
  309 legacy_pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
  310     u_long start, u_long end, u_long count, u_int flags)
  311 {
  312     /*
  313      * If no memory preference is given, use upper 32MB slot most
  314      * bioses use for their memory window.  Typically other bridges
  315      * before us get in the way to assert their preferences on memory.
  316      * Hardcoding like this sucks, so a more MD/MI way needs to be
  317      * found to do it.  This is typically only used on older laptops
  318      * that don't have pci busses behind pci bridge, so assuming > 32MB
  319      * is liekly OK.
  320      *
  321      * However, this can cause problems for other chipsets, so we make
  322      * this tunable by hw.pci.host_mem_start.
  323      */
  324     if (type == SYS_RES_MEMORY && start == 0UL && end == ~0UL)
  325         start = legacy_host_mem_start;
  326     if (type == SYS_RES_IOPORT && start == 0UL && end == ~0UL)
  327         start = 0x1000;
  328     return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
  329         count, flags));
  330 }
  331 
  332 static device_method_t legacy_pcib_methods[] = {
  333         /* Device interface */
  334         DEVMETHOD(device_identify,      legacy_pcib_identify),
  335         DEVMETHOD(device_probe,         legacy_pcib_probe),
  336         DEVMETHOD(device_attach,        legacy_pcib_attach),
  337         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  338         DEVMETHOD(device_suspend,       bus_generic_suspend),
  339         DEVMETHOD(device_resume,        bus_generic_resume),
  340 
  341         /* Bus interface */
  342         DEVMETHOD(bus_print_child,      bus_generic_print_child),
  343         DEVMETHOD(bus_read_ivar,        legacy_pcib_read_ivar),
  344         DEVMETHOD(bus_write_ivar,       legacy_pcib_write_ivar),
  345         DEVMETHOD(bus_alloc_resource,   legacy_pcib_alloc_resource),
  346         DEVMETHOD(bus_release_resource, bus_generic_release_resource),
  347         DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
  348         DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
  349         DEVMETHOD(bus_setup_intr,       bus_generic_setup_intr),
  350         DEVMETHOD(bus_teardown_intr,    bus_generic_teardown_intr),
  351 
  352         /* pcib interface */
  353         DEVMETHOD(pcib_maxslots,        legacy_pcib_maxslots),
  354         DEVMETHOD(pcib_read_config,     legacy_pcib_read_config),
  355         DEVMETHOD(pcib_write_config,    legacy_pcib_write_config),
  356         DEVMETHOD(pcib_route_interrupt, legacy_pcib_route_interrupt),
  357         DEVMETHOD(pcib_alloc_msi,       legacy_pcib_alloc_msi),
  358         DEVMETHOD(pcib_release_msi,     pcib_release_msi),
  359         DEVMETHOD(pcib_alloc_msix,      legacy_pcib_alloc_msix),
  360         DEVMETHOD(pcib_release_msix,    pcib_release_msix),
  361         DEVMETHOD(pcib_map_msi,         legacy_pcib_map_msi),
  362 
  363         { 0, 0 }
  364 };
  365 
  366 static devclass_t pcib_devclass;
  367 
  368 DEFINE_CLASS_0(pcib, legacy_pcib_driver, legacy_pcib_methods, 1);
  369 DRIVER_MODULE(pcib, legacy, legacy_pcib_driver, pcib_devclass, 0, 0);
  370 
  371 
  372 /*
  373  * Provide a device to "eat" the host->pci bridges that we dug up above
  374  * and stop them showing up twice on the probes.  This also stops them
  375  * showing up as 'none' in pciconf -l.
  376  */
  377 static int
  378 pci_hostb_probe(device_t dev)
  379 {
  380         u_int32_t id;
  381 
  382         id = pci_get_devid(dev);
  383 
  384         switch (id) {
  385 
  386         /* VIA VT82C596 Power Managment Function */
  387         case 0x30501106:
  388                 return ENXIO;
  389 
  390         default:
  391                 break;
  392         }
  393 
  394         if (pci_get_class(dev) == PCIC_BRIDGE &&
  395             pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
  396                 device_set_desc(dev, "Host to PCI bridge");
  397                 device_quiet(dev);
  398                 return -10000;
  399         }
  400         return ENXIO;
  401 }
  402 
  403 static int
  404 pci_hostb_attach(device_t dev)
  405 {
  406 
  407         return 0;
  408 }
  409 
  410 static device_method_t pci_hostb_methods[] = {
  411         /* Device interface */
  412         DEVMETHOD(device_probe,         pci_hostb_probe),
  413         DEVMETHOD(device_attach,        pci_hostb_attach),
  414         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  415         DEVMETHOD(device_suspend,       bus_generic_suspend),
  416         DEVMETHOD(device_resume,        bus_generic_resume),
  417 
  418         { 0, 0 }
  419 };
  420 static driver_t pci_hostb_driver = {
  421         "hostb",
  422         pci_hostb_methods,
  423         1,
  424 };
  425 static devclass_t pci_hostb_devclass;
  426 
  427 DRIVER_MODULE(hostb, pci, pci_hostb_driver, pci_hostb_devclass, 0, 0);
  428 
  429 
  430 /*
  431  * Install placeholder to claim the resources owned by the
  432  * PCI bus interface.  This could be used to extract the
  433  * config space registers in the extreme case where the PnP
  434  * ID is available and the PCI BIOS isn't, but for now we just
  435  * eat the PnP ID and do nothing else.
  436  *
  437  * XXX we should silence this probe, as it will generally confuse
  438  * people.
  439  */
  440 static struct isa_pnp_id pcibus_pnp_ids[] = {
  441         { 0x030ad041 /* PNP0A03 */, "PCI Bus" },
  442         { 0 }
  443 };
  444 
  445 static int
  446 pcibus_pnp_probe(device_t dev)
  447 {
  448         int result;
  449 
  450         if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, pcibus_pnp_ids)) <= 0)
  451                 device_quiet(dev);
  452         return(result);
  453 }
  454 
  455 static int
  456 pcibus_pnp_attach(device_t dev)
  457 {
  458         return(0);
  459 }
  460 
  461 static device_method_t pcibus_pnp_methods[] = {
  462         /* Device interface */
  463         DEVMETHOD(device_probe,         pcibus_pnp_probe),
  464         DEVMETHOD(device_attach,        pcibus_pnp_attach),
  465         DEVMETHOD(device_detach,        bus_generic_detach),
  466         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
  467         DEVMETHOD(device_suspend,       bus_generic_suspend),
  468         DEVMETHOD(device_resume,        bus_generic_resume),
  469         { 0, 0 }
  470 };
  471 
  472 static devclass_t pcibus_pnp_devclass;
  473 
  474 DEFINE_CLASS_0(pcibus_pnp, pcibus_pnp_driver, pcibus_pnp_methods, 1);
  475 DRIVER_MODULE(pcibus_pnp, isa, pcibus_pnp_driver, pcibus_pnp_devclass, 0, 0);
Cache object: 98b4ca1823da638be4a91dbeb3c40143
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FreeBSD/Linux Kernel Cross Reference sys/amd64/pci/pci_bus.c

FreeBSD/Linux Kernel Cross Reference
sys/amd64/pci/pci_bus.c
