1 /*-
2 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@gmail.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 /* Simple clock driver for Allwinner A10 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD: releng/10.0/sys/arm/allwinner/a10_clk.c 246851 2013-02-15 21:29:03Z gonzo $");
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/malloc.h>
38 #include <sys/rman.h>
39 #include <sys/timeet.h>
40 #include <sys/timetc.h>
41 #include <sys/watchdog.h>
42 #include <machine/bus.h>
43 #include <machine/cpu.h>
44 #include <machine/frame.h>
45 #include <machine/intr.h>
46
47 #include <dev/fdt/fdt_common.h>
48 #include <dev/ofw/openfirm.h>
49 #include <dev/ofw/ofw_bus.h>
50 #include <dev/ofw/ofw_bus_subr.h>
51
52 #include <machine/bus.h>
53 #include <machine/fdt.h>
54
55 #include "a10_clk.h"
56
57 struct a10_ccm_softc {
58 struct resource *res;
59 bus_space_tag_t bst;
60 bus_space_handle_t bsh;
61 };
62
63 static struct a10_ccm_softc *a10_ccm_sc = NULL;
64
65 #define ccm_read_4(sc, reg) \
66 bus_space_read_4((sc)->bst, (sc)->bsh, (reg))
67 #define ccm_write_4(sc, reg, val) \
68 bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
69
70 static int
71 a10_ccm_probe(device_t dev)
72 {
73 if (ofw_bus_is_compatible(dev, "allwinner,sun4i-ccm")) {
74 device_set_desc(dev, "Allwinner Clock Control Module");
75 return(BUS_PROBE_DEFAULT);
76 }
77
78 return (ENXIO);
79 }
80
81 static int
82 a10_ccm_attach(device_t dev)
83 {
84 struct a10_ccm_softc *sc = device_get_softc(dev);
85 int rid = 0;
86
87 if (a10_ccm_sc)
88 return (ENXIO);
89
90 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
91 if (!sc->res) {
92 device_printf(dev, "could not allocate resource\n");
93 return (ENXIO);
94 }
95
96 sc->bst = rman_get_bustag(sc->res);
97 sc->bsh = rman_get_bushandle(sc->res);
98
99 a10_ccm_sc = sc;
100
101 return (0);
102 }
103
104 static device_method_t a10_ccm_methods[] = {
105 DEVMETHOD(device_probe, a10_ccm_probe),
106 DEVMETHOD(device_attach, a10_ccm_attach),
107 { 0, 0 }
108 };
109
110 static driver_t a10_ccm_driver = {
111 "a10_ccm",
112 a10_ccm_methods,
113 sizeof(struct a10_ccm_softc),
114 };
115
116 static devclass_t a10_ccm_devclass;
117
118 DRIVER_MODULE(a10_ccm, simplebus, a10_ccm_driver, a10_ccm_devclass, 0, 0);
119
120 int
121 a10_clk_usb_activate(void)
122 {
123 struct a10_ccm_softc *sc = a10_ccm_sc;
124 uint32_t reg_value;
125
126 if (sc == NULL)
127 return ENXIO;
128
129 /* Gating AHB clock for USB */
130 reg_value = ccm_read_4(sc, CCM_AHB_GATING0);
131 reg_value |= CCM_AHB_GATING_USB0; /* AHB clock gate usb0 */
132 reg_value |= CCM_AHB_GATING_EHCI0; /* AHB clock gate ehci1 */
133 reg_value |= CCM_AHB_GATING_EHCI1; /* AHB clock gate ehci1 */
134 ccm_write_4(sc, CCM_AHB_GATING0, reg_value);
135
136 /* Enable clock for USB */
137 reg_value = ccm_read_4(sc, CCM_USB_CLK);
138 reg_value |= CCM_USB_PHY; /* USBPHY */
139 reg_value |= CCM_USB0_RESET; /* disable reset for USB0 */
140 reg_value |= CCM_USB1_RESET; /* disable reset for USB1 */
141 reg_value |= CCM_USB2_RESET; /* disable reset for USB2 */
142 ccm_write_4(sc, CCM_USB_CLK, reg_value);
143
144 return (0);
145 }
146
147 int
148 a10_clk_usb_deactivate(void)
149 {
150 struct a10_ccm_softc *sc = a10_ccm_sc;
151 uint32_t reg_value;
152
153 if (sc == NULL)
154 return ENXIO;
155
156 /* Disable clock for USB */
157 reg_value = ccm_read_4(sc, CCM_USB_CLK);
158 reg_value &= ~CCM_USB_PHY; /* USBPHY */
159 reg_value &= ~CCM_USB0_RESET; /* reset for USB0 */
160 reg_value &= ~CCM_USB1_RESET; /* reset for USB1 */
161 reg_value &= ~CCM_USB2_RESET; /* reset for USB2 */
162 ccm_write_4(sc, CCM_USB_CLK, reg_value);
163
164 /* Disable gating AHB clock for USB */
165 reg_value = ccm_read_4(sc, CCM_AHB_GATING0);
166 reg_value &= ~CCM_AHB_GATING_USB0; /* disable AHB clock gate usb0 */
167 reg_value &= ~CCM_AHB_GATING_EHCI1; /* disable AHB clock gate ehci1 */
168 ccm_write_4(sc, CCM_AHB_GATING0, reg_value);
169
170 return (0);
171 }
172
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