1 /*-
2 * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 /* Simple clock driver for Allwinner A10 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD: releng/10.2/sys/arm/allwinner/a10_clk.c 266337 2014-05-17 18:53:36Z ian $");
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/malloc.h>
38 #include <sys/rman.h>
39 #include <sys/timeet.h>
40 #include <sys/timetc.h>
41 #include <sys/watchdog.h>
42 #include <machine/bus.h>
43 #include <machine/cpu.h>
44 #include <machine/intr.h>
45
46 #include <dev/fdt/fdt_common.h>
47 #include <dev/ofw/openfirm.h>
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50
51 #include <machine/bus.h>
52 #include <machine/fdt.h>
53
54 #include "a10_clk.h"
55
56 struct a10_ccm_softc {
57 struct resource *res;
58 bus_space_tag_t bst;
59 bus_space_handle_t bsh;
60 };
61
62 static struct a10_ccm_softc *a10_ccm_sc = NULL;
63
64 #define ccm_read_4(sc, reg) \
65 bus_space_read_4((sc)->bst, (sc)->bsh, (reg))
66 #define ccm_write_4(sc, reg, val) \
67 bus_space_write_4((sc)->bst, (sc)->bsh, (reg), (val))
68
69 static int
70 a10_ccm_probe(device_t dev)
71 {
72
73 if (!ofw_bus_status_okay(dev))
74 return (ENXIO);
75
76 if (ofw_bus_is_compatible(dev, "allwinner,sun4i-ccm")) {
77 device_set_desc(dev, "Allwinner Clock Control Module");
78 return(BUS_PROBE_DEFAULT);
79 }
80
81 return (ENXIO);
82 }
83
84 static int
85 a10_ccm_attach(device_t dev)
86 {
87 struct a10_ccm_softc *sc = device_get_softc(dev);
88 int rid = 0;
89
90 if (a10_ccm_sc)
91 return (ENXIO);
92
93 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
94 if (!sc->res) {
95 device_printf(dev, "could not allocate resource\n");
96 return (ENXIO);
97 }
98
99 sc->bst = rman_get_bustag(sc->res);
100 sc->bsh = rman_get_bushandle(sc->res);
101
102 a10_ccm_sc = sc;
103
104 return (0);
105 }
106
107 static device_method_t a10_ccm_methods[] = {
108 DEVMETHOD(device_probe, a10_ccm_probe),
109 DEVMETHOD(device_attach, a10_ccm_attach),
110 { 0, 0 }
111 };
112
113 static driver_t a10_ccm_driver = {
114 "a10_ccm",
115 a10_ccm_methods,
116 sizeof(struct a10_ccm_softc),
117 };
118
119 static devclass_t a10_ccm_devclass;
120
121 DRIVER_MODULE(a10_ccm, simplebus, a10_ccm_driver, a10_ccm_devclass, 0, 0);
122
123 int
124 a10_clk_usb_activate(void)
125 {
126 struct a10_ccm_softc *sc = a10_ccm_sc;
127 uint32_t reg_value;
128
129 if (sc == NULL)
130 return (ENXIO);
131
132 /* Gating AHB clock for USB */
133 reg_value = ccm_read_4(sc, CCM_AHB_GATING0);
134 reg_value |= CCM_AHB_GATING_USB0; /* AHB clock gate usb0 */
135 reg_value |= CCM_AHB_GATING_EHCI0; /* AHB clock gate ehci1 */
136 reg_value |= CCM_AHB_GATING_EHCI1; /* AHB clock gate ehci1 */
137 ccm_write_4(sc, CCM_AHB_GATING0, reg_value);
138
139 /* Enable clock for USB */
140 reg_value = ccm_read_4(sc, CCM_USB_CLK);
141 reg_value |= CCM_USB_PHY; /* USBPHY */
142 reg_value |= CCM_USB0_RESET; /* disable reset for USB0 */
143 reg_value |= CCM_USB1_RESET; /* disable reset for USB1 */
144 reg_value |= CCM_USB2_RESET; /* disable reset for USB2 */
145 ccm_write_4(sc, CCM_USB_CLK, reg_value);
146
147 return (0);
148 }
149
150 int
151 a10_clk_usb_deactivate(void)
152 {
153 struct a10_ccm_softc *sc = a10_ccm_sc;
154 uint32_t reg_value;
155
156 if (sc == NULL)
157 return (ENXIO);
158
159 /* Disable clock for USB */
160 reg_value = ccm_read_4(sc, CCM_USB_CLK);
161 reg_value &= ~CCM_USB_PHY; /* USBPHY */
162 reg_value &= ~CCM_USB0_RESET; /* reset for USB0 */
163 reg_value &= ~CCM_USB1_RESET; /* reset for USB1 */
164 reg_value &= ~CCM_USB2_RESET; /* reset for USB2 */
165 ccm_write_4(sc, CCM_USB_CLK, reg_value);
166
167 /* Disable gating AHB clock for USB */
168 reg_value = ccm_read_4(sc, CCM_AHB_GATING0);
169 reg_value &= ~CCM_AHB_GATING_USB0; /* disable AHB clock gate usb0 */
170 reg_value &= ~CCM_AHB_GATING_EHCI1; /* disable AHB clock gate ehci1 */
171 ccm_write_4(sc, CCM_AHB_GATING0, reg_value);
172
173 return (0);
174 }
175
176 int
177 a10_clk_emac_activate(void) {
178 struct a10_ccm_softc *sc = a10_ccm_sc;
179 uint32_t reg_value;
180
181 if (sc == NULL)
182 return (ENXIO);
183
184 /* Gating AHB clock for EMAC */
185 reg_value = ccm_read_4(sc, CCM_AHB_GATING0);
186 reg_value |= CCM_AHB_GATING_EMAC;
187 ccm_write_4(sc, CCM_AHB_GATING0, reg_value);
188
189 return (0);
190 }
191
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