The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/allwinner/aw_if_dwc.c

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    1 /*-
    2  * Copyright (c) 2015 Luiz Otavio O Souza <loos@FreeBSD.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD$");
   29 
   30 #include <sys/param.h>
   31 #include <sys/systm.h>
   32 #include <sys/bus.h>
   33 #include <sys/kernel.h>
   34 #include <sys/module.h>
   35 
   36 #include <machine/bus.h>
   37 
   38 #include <dev/dwc/if_dwc.h>
   39 #include <dev/dwc/if_dwcvar.h>
   40 #include <dev/ofw/ofw_bus.h>
   41 #include <dev/ofw/ofw_bus_subr.h>
   42 
   43 #include <arm/allwinner/aw_machdep.h>
   44 #include <dev/extres/clk/clk.h>
   45 #include <dev/extres/regulator/regulator.h>
   46 
   47 #include "if_dwc_if.h"
   48 
   49 static int
   50 a20_if_dwc_probe(device_t dev)
   51 {
   52 
   53         if (!ofw_bus_status_okay(dev))
   54                 return (ENXIO);
   55         if (!ofw_bus_is_compatible(dev, "allwinner,sun7i-a20-gmac"))
   56                 return (ENXIO);
   57         device_set_desc(dev, "A20 Gigabit Ethernet Controller");
   58 
   59         return (BUS_PROBE_DEFAULT);
   60 }
   61 
   62 static int
   63 a20_if_dwc_init(device_t dev)
   64 {
   65         struct dwc_softc *sc;
   66         const char *tx_parent_name;
   67         clk_t clk_tx, clk_tx_parent;
   68         regulator_t reg;
   69         int error;
   70 
   71         sc = device_get_softc(dev);
   72 
   73         /* Configure PHY for MII or RGMII mode */
   74         switch(sc->phy_mode) {
   75         case PHY_MODE_RGMII:
   76                 tx_parent_name = "gmac_int_tx";
   77                 break;
   78         case PHY_MODE_MII:
   79                 tx_parent_name = "mii_phy_tx";
   80                 break;
   81         default:
   82                 device_printf(dev, "unsupported PHY connection type: %d",
   83                     sc->phy_mode);
   84                 return (ENXIO);
   85         }
   86 
   87         error = clk_get_by_ofw_name(dev, 0, "allwinner_gmac_tx", &clk_tx);
   88         if (error != 0) {
   89                 device_printf(dev, "could not get tx clk\n");
   90                 return (error);
   91         }
   92         error = clk_get_by_name(dev, tx_parent_name, &clk_tx_parent);
   93         if (error != 0) {
   94                 device_printf(dev, "could not get clock '%s'\n",
   95                     tx_parent_name);
   96                 return (error);
   97         }
   98         error = clk_set_parent_by_clk(clk_tx, clk_tx_parent);
   99         if (error != 0) {
  100                 device_printf(dev, "could not set tx clk parent\n");
  101                 return (error);
  102         }
  103 
  104         /* Enable PHY regulator if applicable */
  105         if (regulator_get_by_ofw_property(dev, 0, "phy-supply", &reg) == 0) {
  106                 error = regulator_enable(reg);
  107                 if (error != 0) {
  108                         device_printf(dev, "could not enable PHY regulator\n");
  109                         return (error);
  110                 }
  111         }
  112 
  113         return (0);
  114 }
  115 
  116 static int
  117 a20_if_dwc_mac_type(device_t dev)
  118 {
  119 
  120         return (DWC_GMAC_NORMAL_DESC);
  121 }
  122 
  123 static int
  124 a20_if_dwc_mii_clk(device_t dev)
  125 {
  126 
  127         return (GMAC_MII_CLK_150_250M_DIV102);
  128 }
  129 
  130 static device_method_t a20_dwc_methods[] = {
  131         DEVMETHOD(device_probe,         a20_if_dwc_probe),
  132 
  133         DEVMETHOD(if_dwc_init,          a20_if_dwc_init),
  134         DEVMETHOD(if_dwc_mac_type,      a20_if_dwc_mac_type),
  135         DEVMETHOD(if_dwc_mii_clk,       a20_if_dwc_mii_clk),
  136 
  137         DEVMETHOD_END
  138 };
  139 
  140 static devclass_t a20_dwc_devclass;
  141 
  142 extern driver_t dwc_driver;
  143 
  144 DEFINE_CLASS_1(dwc, a20_dwc_driver, a20_dwc_methods, sizeof(struct dwc_softc),
  145     dwc_driver);
  146 DRIVER_MODULE(a20_dwc, simplebus, a20_dwc_driver, a20_dwc_devclass, 0, 0);
  147 
  148 MODULE_DEPEND(a20_dwc, dwc, 1, 1, 1);

Cache object: 4a270eb1d9fd2add3c42b246853120e3


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