The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/allwinner/aw_reset.c

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    1 /*-
    2  * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  *
   13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   14  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   15  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   16  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   17  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
   18  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   19  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
   20  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
   21  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   23  * SUCH DAMAGE.
   24  *
   25  * $FreeBSD$
   26  */
   27 
   28 /*
   29  * Allwinner module software reset registers
   30  */
   31 
   32 #include <sys/cdefs.h>
   33 __FBSDID("$FreeBSD$");
   34 
   35 #include <sys/param.h>
   36 #include <sys/systm.h>
   37 #include <sys/bus.h>
   38 #include <sys/rman.h>
   39 #include <sys/kernel.h>
   40 #include <sys/lock.h>
   41 #include <sys/module.h>
   42 #include <sys/mutex.h>
   43 #include <machine/bus.h>
   44 
   45 #include <dev/ofw/ofw_bus.h>
   46 #include <dev/ofw/ofw_bus_subr.h>
   47 
   48 #include <dev/extres/hwreset/hwreset.h>
   49 
   50 #include "hwreset_if.h"
   51 
   52 #define RESET_OFFSET(index)     ((index / 32) * 4)
   53 #define RESET_SHIFT(index)      (index % 32)
   54 
   55 static struct ofw_compat_data compat_data[] = {
   56         { "allwinner,sun6i-a31-ahb1-reset",     1 },
   57         { "allwinner,sun6i-a31-clock-reset",    1 },
   58         { NULL,                                 0 }
   59 };
   60 
   61 struct aw_reset_softc {
   62         struct resource         *res;
   63         struct mtx              mtx;
   64 };
   65 
   66 static struct resource_spec aw_reset_spec[] = {
   67         { SYS_RES_MEMORY,       0,      RF_ACTIVE },
   68         { -1, 0 }
   69 };
   70 
   71 #define RESET_READ(sc, reg)             bus_read_4((sc)->res, (reg))
   72 #define RESET_WRITE(sc, reg, val)       bus_write_4((sc)->res, (reg), (val))
   73 
   74 static int
   75 aw_reset_assert(device_t dev, intptr_t id, bool reset)
   76 {
   77         struct aw_reset_softc *sc;
   78         uint32_t reg_value;
   79 
   80         sc = device_get_softc(dev);
   81 
   82         mtx_lock(&sc->mtx);
   83         reg_value = RESET_READ(sc, RESET_OFFSET(id));
   84         if (reset)
   85                 reg_value &= ~(1 << RESET_SHIFT(id));
   86         else
   87                 reg_value |= (1 << RESET_SHIFT(id));
   88         RESET_WRITE(sc, RESET_OFFSET(id), reg_value);
   89         mtx_unlock(&sc->mtx);
   90 
   91         return (0);
   92 }
   93 
   94 static int
   95 aw_reset_is_asserted(device_t dev, intptr_t id, bool *reset)
   96 {
   97         struct aw_reset_softc *sc;
   98         uint32_t reg_value;
   99 
  100         sc = device_get_softc(dev);
  101 
  102         mtx_lock(&sc->mtx);
  103         reg_value = RESET_READ(sc, RESET_OFFSET(id));
  104         mtx_unlock(&sc->mtx);
  105 
  106         *reset = (reg_value & (1 << RESET_SHIFT(id))) != 0 ? false : true;
  107 
  108         return (0);
  109 }
  110 
  111 static int
  112 aw_reset_probe(device_t dev)
  113 {
  114         if (!ofw_bus_status_okay(dev))
  115                 return (ENXIO);
  116 
  117         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
  118                 return (ENXIO);
  119 
  120         device_set_desc(dev, "Allwinner Module Resets");
  121         return (BUS_PROBE_DEFAULT);
  122 }
  123 
  124 static int
  125 aw_reset_attach(device_t dev)
  126 {
  127         struct aw_reset_softc *sc;
  128 
  129         sc = device_get_softc(dev);
  130 
  131         if (bus_alloc_resources(dev, aw_reset_spec, &sc->res) != 0) {
  132                 device_printf(dev, "cannot allocate resources for device\n");
  133                 return (ENXIO);
  134         }
  135 
  136         mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
  137 
  138         hwreset_register_ofw_provider(dev);
  139 
  140         return (0);
  141 }
  142 
  143 static device_method_t aw_reset_methods[] = {
  144         /* Device interface */
  145         DEVMETHOD(device_probe,         aw_reset_probe),
  146         DEVMETHOD(device_attach,        aw_reset_attach),
  147 
  148         /* Reset interface */
  149         DEVMETHOD(hwreset_assert,       aw_reset_assert),
  150         DEVMETHOD(hwreset_is_asserted,  aw_reset_is_asserted),
  151 
  152         DEVMETHOD_END
  153 };
  154 
  155 static driver_t aw_reset_driver = {
  156         "aw_reset",
  157         aw_reset_methods,
  158         sizeof(struct aw_reset_softc),
  159 };
  160 
  161 static devclass_t aw_reset_devclass;
  162 
  163 EARLY_DRIVER_MODULE(aw_reset, simplebus, aw_reset_driver, aw_reset_devclass,
  164     0, 0, BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
  165 MODULE_VERSION(aw_reset, 1);

Cache object: 8c078c344fa67f5c5d63f2f066811fac


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