1 /*-
2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org>
3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29 /*
30 * X-Powers AXP803/813/818 PMU for Allwinner SoCs
31 */
32
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/eventhandler.h>
39 #include <sys/bus.h>
40 #include <sys/rman.h>
41 #include <sys/kernel.h>
42 #include <sys/reboot.h>
43 #include <sys/gpio.h>
44 #include <sys/module.h>
45 #include <machine/bus.h>
46
47 #include <dev/iicbus/iicbus.h>
48 #include <dev/iicbus/iiconf.h>
49
50 #include <dev/gpio/gpiobusvar.h>
51
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
54
55 #include <dev/extres/regulator/regulator.h>
56
57 #include "gpio_if.h"
58 #include "iicbus_if.h"
59 #include "regdev_if.h"
60
61 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator");
62
63 #define AXP_POWERSRC 0x00
64 #define AXP_POWERSRC_ACIN (1 << 7)
65 #define AXP_POWERSRC_VBUS (1 << 5)
66 #define AXP_POWERSRC_VBAT (1 << 3)
67 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */
68 #define AXP_POWERSRC_SHORTED (1 << 1)
69 #define AXP_POWERSRC_STARTUP (1 << 0)
70 #define AXP_POWERMODE 0x01
71 #define AXP_POWERMODE_BAT_CHARGING (1 << 6)
72 #define AXP_POWERMODE_BAT_PRESENT (1 << 5)
73 #define AXP_POWERMODE_BAT_VALID (1 << 4)
74 #define AXP_ICTYPE 0x03
75 #define AXP_POWERCTL1 0x10
76 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */
77 #define AXP_POWERCTL1_DCDC6 (1 << 5)
78 #define AXP_POWERCTL1_DCDC5 (1 << 4)
79 #define AXP_POWERCTL1_DCDC4 (1 << 3)
80 #define AXP_POWERCTL1_DCDC3 (1 << 2)
81 #define AXP_POWERCTL1_DCDC2 (1 << 1)
82 #define AXP_POWERCTL1_DCDC1 (1 << 0)
83 #define AXP_POWERCTL2 0x12
84 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */
85 #define AXP_POWERCTL2_DLDO4 (1 << 6)
86 #define AXP_POWERCTL2_DLDO3 (1 << 5)
87 #define AXP_POWERCTL2_DLDO2 (1 << 4)
88 #define AXP_POWERCTL2_DLDO1 (1 << 3)
89 #define AXP_POWERCTL2_ELDO3 (1 << 2)
90 #define AXP_POWERCTL2_ELDO2 (1 << 1)
91 #define AXP_POWERCTL2_ELDO1 (1 << 0)
92 #define AXP_POWERCTL3 0x13
93 #define AXP_POWERCTL3_ALDO3 (1 << 7)
94 #define AXP_POWERCTL3_ALDO2 (1 << 6)
95 #define AXP_POWERCTL3_ALDO1 (1 << 5)
96 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */
97 #define AXP_POWERCTL3_FLDO2 (1 << 3)
98 #define AXP_POWERCTL3_FLDO1 (1 << 2)
99 #define AXP_VOLTCTL_DLDO1 0x15
100 #define AXP_VOLTCTL_DLDO2 0x16
101 #define AXP_VOLTCTL_DLDO3 0x17
102 #define AXP_VOLTCTL_DLDO4 0x18
103 #define AXP_VOLTCTL_ELDO1 0x19
104 #define AXP_VOLTCTL_ELDO2 0x1A
105 #define AXP_VOLTCTL_ELDO3 0x1B
106 #define AXP_VOLTCTL_FLDO1 0x1C
107 #define AXP_VOLTCTL_FLDO2 0x1D
108 #define AXP_VOLTCTL_DCDC1 0x20
109 #define AXP_VOLTCTL_DCDC2 0x21
110 #define AXP_VOLTCTL_DCDC3 0x22
111 #define AXP_VOLTCTL_DCDC4 0x23
112 #define AXP_VOLTCTL_DCDC5 0x24
113 #define AXP_VOLTCTL_DCDC6 0x25
114 #define AXP_VOLTCTL_DCDC7 0x26
115 #define AXP_VOLTCTL_ALDO1 0x28
116 #define AXP_VOLTCTL_ALDO2 0x29
117 #define AXP_VOLTCTL_ALDO3 0x2A
118 #define AXP_VOLTCTL_STATUS (1 << 7)
119 #define AXP_VOLTCTL_MASK 0x7f
120 #define AXP_POWERBAT 0x32
121 #define AXP_POWERBAT_SHUTDOWN (1 << 7)
122 #define AXP_CHARGERCTL1 0x33
123 #define AXP_CHARGERCTL1_MIN 0
124 #define AXP_CHARGERCTL1_MAX 13
125 #define AXP_CHARGERCTL1_CMASK 0xf
126 #define AXP_IRQEN1 0x40
127 #define AXP_IRQEN1_ACIN_HI (1 << 6)
128 #define AXP_IRQEN1_ACIN_LO (1 << 5)
129 #define AXP_IRQEN1_VBUS_HI (1 << 3)
130 #define AXP_IRQEN1_VBUS_LO (1 << 2)
131 #define AXP_IRQEN2 0x41
132 #define AXP_IRQEN2_BAT_IN (1 << 7)
133 #define AXP_IRQEN2_BAT_NO (1 << 6)
134 #define AXP_IRQEN2_BATCHGC (1 << 3)
135 #define AXP_IRQEN2_BATCHGD (1 << 2)
136 #define AXP_IRQEN3 0x42
137 #define AXP_IRQEN4 0x43
138 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1)
139 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0)
140 #define AXP_IRQEN5 0x44
141 #define AXP_IRQEN5_POKSIRQ (1 << 4)
142 #define AXP_IRQEN5_POKLIRQ (1 << 3)
143 #define AXP_IRQEN6 0x45
144 #define AXP_IRQSTAT1 0x48
145 #define AXP_IRQSTAT1_ACIN_HI (1 << 6)
146 #define AXP_IRQSTAT1_ACIN_LO (1 << 5)
147 #define AXP_IRQSTAT1_VBUS_HI (1 << 3)
148 #define AXP_IRQSTAT1_VBUS_LO (1 << 2)
149 #define AXP_IRQSTAT2 0x49
150 #define AXP_IRQSTAT2_BAT_IN (1 << 7)
151 #define AXP_IRQSTAT2_BAT_NO (1 << 6)
152 #define AXP_IRQSTAT2_BATCHGC (1 << 3)
153 #define AXP_IRQSTAT2_BATCHGD (1 << 2)
154 #define AXP_IRQSTAT3 0x4a
155 #define AXP_IRQSTAT4 0x4b
156 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1)
157 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0)
158 #define AXP_IRQSTAT5 0x4c
159 #define AXP_IRQSTAT5_POKSIRQ (1 << 4)
160 #define AXP_IRQEN5_POKLIRQ (1 << 3)
161 #define AXP_IRQSTAT6 0x4d
162 #define AXP_BATSENSE_HI 0x78
163 #define AXP_BATSENSE_LO 0x79
164 #define AXP_BATCHG_HI 0x7a
165 #define AXP_BATCHG_LO 0x7b
166 #define AXP_BATDISCHG_HI 0x7c
167 #define AXP_BATDISCHG_LO 0x7d
168 #define AXP_GPIO0_CTRL 0x90
169 #define AXP_GPIO0LDO_CTRL 0x91
170 #define AXP_GPIO1_CTRL 0x92
171 #define AXP_GPIO1LDO_CTRL 0x93
172 #define AXP_GPIO_FUNC (0x7 << 0)
173 #define AXP_GPIO_FUNC_SHIFT 0
174 #define AXP_GPIO_FUNC_DRVLO 0
175 #define AXP_GPIO_FUNC_DRVHI 1
176 #define AXP_GPIO_FUNC_INPUT 2
177 #define AXP_GPIO_FUNC_LDO_ON 3
178 #define AXP_GPIO_FUNC_LDO_OFF 4
179 #define AXP_GPIO_SIGBIT 0x94
180 #define AXP_GPIO_PD 0x97
181 #define AXP_FUEL_GAUGECTL 0xb8
182 #define AXP_FUEL_GAUGECTL_EN (1 << 7)
183
184 #define AXP_BAT_CAP 0xb9
185 #define AXP_BAT_CAP_VALID (1 << 7)
186 #define AXP_BAT_CAP_PERCENT 0x7f
187
188 #define AXP_BAT_MAX_CAP_HI 0xe0
189 #define AXP_BAT_MAX_CAP_VALID (1 << 7)
190 #define AXP_BAT_MAX_CAP_LO 0xe1
191
192 #define AXP_BAT_COULOMB_HI 0xe2
193 #define AXP_BAT_COULOMB_VALID (1 << 7)
194 #define AXP_BAT_COULOMB_LO 0xe3
195
196 #define AXP_BAT_CAP_WARN 0xe6
197 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */
198 #define AXP_BAP_CAP_WARN_LV1BASE 5 /* 5-20%, 1% per step */
199 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */
200
201 /* Sensor conversion macros */
202 #define AXP_SENSOR_BAT_H(hi) ((hi) << 4)
203 #define AXP_SENSOR_BAT_L(lo) ((lo) & 0xf)
204 #define AXP_SENSOR_COULOMB(hi, lo) (((hi & ~(1 << 7)) << 8) | (lo))
205
206 static const struct {
207 const char *name;
208 uint8_t ctrl_reg;
209 } axp8xx_pins[] = {
210 { "GPIO0", AXP_GPIO0_CTRL },
211 { "GPIO1", AXP_GPIO1_CTRL },
212 };
213
214 enum AXP8XX_TYPE {
215 AXP803 = 1,
216 AXP813,
217 };
218
219 static struct ofw_compat_data compat_data[] = {
220 { "x-powers,axp803", AXP803 },
221 { "x-powers,axp813", AXP813 },
222 { "x-powers,axp818", AXP813 },
223 { NULL, 0 }
224 };
225
226 static struct resource_spec axp8xx_spec[] = {
227 { SYS_RES_IRQ, 0, RF_ACTIVE },
228 { -1, 0 }
229 };
230
231 struct axp8xx_regdef {
232 intptr_t id;
233 char *name;
234 char *supply_name;
235 uint8_t enable_reg;
236 uint8_t enable_mask;
237 uint8_t enable_value;
238 uint8_t disable_value;
239 uint8_t voltage_reg;
240 int voltage_min;
241 int voltage_max;
242 int voltage_step1;
243 int voltage_nstep1;
244 int voltage_step2;
245 int voltage_nstep2;
246 };
247
248 enum axp8xx_reg_id {
249 AXP8XX_REG_ID_DCDC1 = 100,
250 AXP8XX_REG_ID_DCDC2,
251 AXP8XX_REG_ID_DCDC3,
252 AXP8XX_REG_ID_DCDC4,
253 AXP8XX_REG_ID_DCDC5,
254 AXP8XX_REG_ID_DCDC6,
255 AXP813_REG_ID_DCDC7,
256 AXP803_REG_ID_DC1SW,
257 AXP8XX_REG_ID_DLDO1,
258 AXP8XX_REG_ID_DLDO2,
259 AXP8XX_REG_ID_DLDO3,
260 AXP8XX_REG_ID_DLDO4,
261 AXP8XX_REG_ID_ELDO1,
262 AXP8XX_REG_ID_ELDO2,
263 AXP8XX_REG_ID_ELDO3,
264 AXP8XX_REG_ID_ALDO1,
265 AXP8XX_REG_ID_ALDO2,
266 AXP8XX_REG_ID_ALDO3,
267 AXP8XX_REG_ID_FLDO1,
268 AXP8XX_REG_ID_FLDO2,
269 AXP813_REG_ID_FLDO3,
270 AXP8XX_REG_ID_GPIO0_LDO,
271 AXP8XX_REG_ID_GPIO1_LDO,
272 };
273
274 static struct axp8xx_regdef axp803_regdefs[] = {
275 {
276 .id = AXP803_REG_ID_DC1SW,
277 .name = "dc1sw",
278 .enable_reg = AXP_POWERCTL2,
279 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW,
280 .enable_value = AXP_POWERCTL2_DC1SW,
281 },
282 };
283
284 static struct axp8xx_regdef axp813_regdefs[] = {
285 {
286 .id = AXP813_REG_ID_DCDC7,
287 .name = "dcdc7",
288 .enable_reg = AXP_POWERCTL1,
289 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7,
290 .enable_value = AXP_POWERCTL1_DCDC7,
291 .voltage_reg = AXP_VOLTCTL_DCDC7,
292 .voltage_min = 600,
293 .voltage_max = 1520,
294 .voltage_step1 = 10,
295 .voltage_nstep1 = 50,
296 .voltage_step2 = 20,
297 .voltage_nstep2 = 21,
298 },
299 };
300
301 static struct axp8xx_regdef axp8xx_common_regdefs[] = {
302 {
303 .id = AXP8XX_REG_ID_DCDC1,
304 .name = "dcdc1",
305 .enable_reg = AXP_POWERCTL1,
306 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1,
307 .enable_value = AXP_POWERCTL1_DCDC1,
308 .voltage_reg = AXP_VOLTCTL_DCDC1,
309 .voltage_min = 1600,
310 .voltage_max = 3400,
311 .voltage_step1 = 100,
312 .voltage_nstep1 = 18,
313 },
314 {
315 .id = AXP8XX_REG_ID_DCDC2,
316 .name = "dcdc2",
317 .enable_reg = AXP_POWERCTL1,
318 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2,
319 .enable_value = AXP_POWERCTL1_DCDC2,
320 .voltage_reg = AXP_VOLTCTL_DCDC2,
321 .voltage_min = 500,
322 .voltage_max = 1300,
323 .voltage_step1 = 10,
324 .voltage_nstep1 = 70,
325 .voltage_step2 = 20,
326 .voltage_nstep2 = 5,
327 },
328 {
329 .id = AXP8XX_REG_ID_DCDC3,
330 .name = "dcdc3",
331 .enable_reg = AXP_POWERCTL1,
332 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3,
333 .enable_value = AXP_POWERCTL1_DCDC3,
334 .voltage_reg = AXP_VOLTCTL_DCDC3,
335 .voltage_min = 500,
336 .voltage_max = 1300,
337 .voltage_step1 = 10,
338 .voltage_nstep1 = 70,
339 .voltage_step2 = 20,
340 .voltage_nstep2 = 5,
341 },
342 {
343 .id = AXP8XX_REG_ID_DCDC4,
344 .name = "dcdc4",
345 .enable_reg = AXP_POWERCTL1,
346 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4,
347 .enable_value = AXP_POWERCTL1_DCDC4,
348 .voltage_reg = AXP_VOLTCTL_DCDC4,
349 .voltage_min = 500,
350 .voltage_max = 1300,
351 .voltage_step1 = 10,
352 .voltage_nstep1 = 70,
353 .voltage_step2 = 20,
354 .voltage_nstep2 = 5,
355 },
356 {
357 .id = AXP8XX_REG_ID_DCDC5,
358 .name = "dcdc5",
359 .enable_reg = AXP_POWERCTL1,
360 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5,
361 .enable_value = AXP_POWERCTL1_DCDC5,
362 .voltage_reg = AXP_VOLTCTL_DCDC5,
363 .voltage_min = 800,
364 .voltage_max = 1840,
365 .voltage_step1 = 10,
366 .voltage_nstep1 = 42,
367 .voltage_step2 = 20,
368 .voltage_nstep2 = 36,
369 },
370 {
371 .id = AXP8XX_REG_ID_DCDC6,
372 .name = "dcdc6",
373 .enable_reg = AXP_POWERCTL1,
374 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6,
375 .enable_value = AXP_POWERCTL1_DCDC6,
376 .voltage_reg = AXP_VOLTCTL_DCDC6,
377 .voltage_min = 600,
378 .voltage_max = 1520,
379 .voltage_step1 = 10,
380 .voltage_nstep1 = 50,
381 .voltage_step2 = 20,
382 .voltage_nstep2 = 21,
383 },
384 {
385 .id = AXP8XX_REG_ID_DLDO1,
386 .name = "dldo1",
387 .enable_reg = AXP_POWERCTL2,
388 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1,
389 .enable_value = AXP_POWERCTL2_DLDO1,
390 .voltage_reg = AXP_VOLTCTL_DLDO1,
391 .voltage_min = 700,
392 .voltage_max = 3300,
393 .voltage_step1 = 100,
394 .voltage_nstep1 = 26,
395 },
396 {
397 .id = AXP8XX_REG_ID_DLDO2,
398 .name = "dldo2",
399 .enable_reg = AXP_POWERCTL2,
400 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2,
401 .enable_value = AXP_POWERCTL2_DLDO2,
402 .voltage_reg = AXP_VOLTCTL_DLDO2,
403 .voltage_min = 700,
404 .voltage_max = 4200,
405 .voltage_step1 = 100,
406 .voltage_nstep1 = 27,
407 .voltage_step2 = 200,
408 .voltage_nstep2 = 4,
409 },
410 {
411 .id = AXP8XX_REG_ID_DLDO3,
412 .name = "dldo3",
413 .enable_reg = AXP_POWERCTL2,
414 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3,
415 .enable_value = AXP_POWERCTL2_DLDO3,
416 .voltage_reg = AXP_VOLTCTL_DLDO3,
417 .voltage_min = 700,
418 .voltage_max = 3300,
419 .voltage_step1 = 100,
420 .voltage_nstep1 = 26,
421 },
422 {
423 .id = AXP8XX_REG_ID_DLDO4,
424 .name = "dldo4",
425 .enable_reg = AXP_POWERCTL2,
426 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4,
427 .enable_value = AXP_POWERCTL2_DLDO4,
428 .voltage_reg = AXP_VOLTCTL_DLDO4,
429 .voltage_min = 700,
430 .voltage_max = 3300,
431 .voltage_step1 = 100,
432 .voltage_nstep1 = 26,
433 },
434 {
435 .id = AXP8XX_REG_ID_ALDO1,
436 .name = "aldo1",
437 .enable_reg = AXP_POWERCTL3,
438 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1,
439 .enable_value = AXP_POWERCTL3_ALDO1,
440 .voltage_reg = AXP_VOLTCTL_ALDO1,
441 .voltage_min = 700,
442 .voltage_max = 3300,
443 .voltage_step1 = 100,
444 .voltage_nstep1 = 26,
445 },
446 {
447 .id = AXP8XX_REG_ID_ALDO2,
448 .name = "aldo2",
449 .enable_reg = AXP_POWERCTL3,
450 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2,
451 .enable_value = AXP_POWERCTL3_ALDO2,
452 .voltage_reg = AXP_VOLTCTL_ALDO2,
453 .voltage_min = 700,
454 .voltage_max = 3300,
455 .voltage_step1 = 100,
456 .voltage_nstep1 = 26,
457 },
458 {
459 .id = AXP8XX_REG_ID_ALDO3,
460 .name = "aldo3",
461 .enable_reg = AXP_POWERCTL3,
462 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3,
463 .enable_value = AXP_POWERCTL3_ALDO3,
464 .voltage_reg = AXP_VOLTCTL_ALDO3,
465 .voltage_min = 700,
466 .voltage_max = 3300,
467 .voltage_step1 = 100,
468 .voltage_nstep1 = 26,
469 },
470 {
471 .id = AXP8XX_REG_ID_ELDO1,
472 .name = "eldo1",
473 .enable_reg = AXP_POWERCTL2,
474 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1,
475 .enable_value = AXP_POWERCTL2_ELDO1,
476 .voltage_reg = AXP_VOLTCTL_ELDO1,
477 .voltage_min = 700,
478 .voltage_max = 1900,
479 .voltage_step1 = 50,
480 .voltage_nstep1 = 24,
481 },
482 {
483 .id = AXP8XX_REG_ID_ELDO2,
484 .name = "eldo2",
485 .enable_reg = AXP_POWERCTL2,
486 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2,
487 .enable_value = AXP_POWERCTL2_ELDO2,
488 .voltage_reg = AXP_VOLTCTL_ELDO2,
489 .voltage_min = 700,
490 .voltage_max = 1900,
491 .voltage_step1 = 50,
492 .voltage_nstep1 = 24,
493 },
494 {
495 .id = AXP8XX_REG_ID_ELDO3,
496 .name = "eldo3",
497 .enable_reg = AXP_POWERCTL2,
498 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3,
499 .enable_value = AXP_POWERCTL2_ELDO3,
500 .voltage_reg = AXP_VOLTCTL_ELDO3,
501 .voltage_min = 700,
502 .voltage_max = 1900,
503 .voltage_step1 = 50,
504 .voltage_nstep1 = 24,
505 },
506 {
507 .id = AXP8XX_REG_ID_FLDO1,
508 .name = "fldo1",
509 .enable_reg = AXP_POWERCTL3,
510 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1,
511 .enable_value = AXP_POWERCTL3_FLDO1,
512 .voltage_reg = AXP_VOLTCTL_FLDO1,
513 .voltage_min = 700,
514 .voltage_max = 1450,
515 .voltage_step1 = 50,
516 .voltage_nstep1 = 15,
517 },
518 {
519 .id = AXP8XX_REG_ID_FLDO2,
520 .name = "fldo2",
521 .enable_reg = AXP_POWERCTL3,
522 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2,
523 .enable_value = AXP_POWERCTL3_FLDO2,
524 .voltage_reg = AXP_VOLTCTL_FLDO2,
525 .voltage_min = 700,
526 .voltage_max = 1450,
527 .voltage_step1 = 50,
528 .voltage_nstep1 = 15,
529 },
530 {
531 .id = AXP8XX_REG_ID_GPIO0_LDO,
532 .name = "ldo-io0",
533 .enable_reg = AXP_GPIO0_CTRL,
534 .enable_mask = (uint8_t) AXP_GPIO_FUNC,
535 .enable_value = AXP_GPIO_FUNC_LDO_ON,
536 .disable_value = AXP_GPIO_FUNC_LDO_OFF,
537 .voltage_reg = AXP_GPIO0LDO_CTRL,
538 .voltage_min = 700,
539 .voltage_max = 3300,
540 .voltage_step1 = 100,
541 .voltage_nstep1 = 26,
542 },
543 {
544 .id = AXP8XX_REG_ID_GPIO1_LDO,
545 .name = "ldo-io1",
546 .enable_reg = AXP_GPIO1_CTRL,
547 .enable_mask = (uint8_t) AXP_GPIO_FUNC,
548 .enable_value = AXP_GPIO_FUNC_LDO_ON,
549 .disable_value = AXP_GPIO_FUNC_LDO_OFF,
550 .voltage_reg = AXP_GPIO1LDO_CTRL,
551 .voltage_min = 700,
552 .voltage_max = 3300,
553 .voltage_step1 = 100,
554 .voltage_nstep1 = 26,
555 },
556 };
557
558 enum axp8xx_sensor {
559 AXP_SENSOR_ACIN_PRESENT,
560 AXP_SENSOR_VBUS_PRESENT,
561 AXP_SENSOR_BATT_PRESENT,
562 AXP_SENSOR_BATT_CHARGING,
563 AXP_SENSOR_BATT_CHARGE_STATE,
564 AXP_SENSOR_BATT_VOLTAGE,
565 AXP_SENSOR_BATT_CHARGE_CURRENT,
566 AXP_SENSOR_BATT_DISCHARGE_CURRENT,
567 AXP_SENSOR_BATT_CAPACITY_PERCENT,
568 AXP_SENSOR_BATT_MAXIMUM_CAPACITY,
569 AXP_SENSOR_BATT_CURRENT_CAPACITY,
570 };
571
572 enum battery_capacity_state {
573 BATT_CAPACITY_NORMAL = 1, /* normal cap in battery */
574 BATT_CAPACITY_WARNING, /* warning cap in battery */
575 BATT_CAPACITY_CRITICAL, /* critical cap in battery */
576 BATT_CAPACITY_HIGH, /* high cap in battery */
577 BATT_CAPACITY_MAX, /* maximum cap in battery */
578 BATT_CAPACITY_LOW /* low cap in battery */
579 };
580
581 struct axp8xx_sensors {
582 int id;
583 const char *name;
584 const char *desc;
585 const char *format;
586 };
587
588 static const struct axp8xx_sensors axp8xx_common_sensors[] = {
589 {
590 .id = AXP_SENSOR_ACIN_PRESENT,
591 .name = "acin",
592 .format = "I",
593 .desc = "ACIN Present",
594 },
595 {
596 .id = AXP_SENSOR_VBUS_PRESENT,
597 .name = "vbus",
598 .format = "I",
599 .desc = "VBUS Present",
600 },
601 {
602 .id = AXP_SENSOR_BATT_PRESENT,
603 .name = "bat",
604 .format = "I",
605 .desc = "Battery Present",
606 },
607 {
608 .id = AXP_SENSOR_BATT_CHARGING,
609 .name = "batcharging",
610 .format = "I",
611 .desc = "Battery Charging",
612 },
613 {
614 .id = AXP_SENSOR_BATT_CHARGE_STATE,
615 .name = "batchargestate",
616 .format = "I",
617 .desc = "Battery Charge State",
618 },
619 {
620 .id = AXP_SENSOR_BATT_VOLTAGE,
621 .name = "batvolt",
622 .format = "I",
623 .desc = "Battery Voltage",
624 },
625 {
626 .id = AXP_SENSOR_BATT_CHARGE_CURRENT,
627 .name = "batchargecurrent",
628 .format = "I",
629 .desc = "Average Battery Charging Current",
630 },
631 {
632 .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT,
633 .name = "batdischargecurrent",
634 .format = "I",
635 .desc = "Average Battery Discharging Current",
636 },
637 {
638 .id = AXP_SENSOR_BATT_CAPACITY_PERCENT,
639 .name = "batcapacitypercent",
640 .format = "I",
641 .desc = "Battery Capacity Percentage",
642 },
643 {
644 .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY,
645 .name = "batmaxcapacity",
646 .format = "I",
647 .desc = "Battery Maximum Capacity",
648 },
649 {
650 .id = AXP_SENSOR_BATT_CURRENT_CAPACITY,
651 .name = "batcurrentcapacity",
652 .format = "I",
653 .desc = "Battery Current Capacity",
654 },
655 };
656
657 struct axp8xx_config {
658 const char *name;
659 int batsense_step; /* uV */
660 int charge_step; /* uA */
661 int discharge_step; /* uA */
662 int maxcap_step; /* uAh */
663 int coulomb_step; /* uAh */
664 };
665
666 static struct axp8xx_config axp803_config = {
667 .name = "AXP803",
668 .batsense_step = 1100,
669 .charge_step = 1000,
670 .discharge_step = 1000,
671 .maxcap_step = 1456,
672 .coulomb_step = 1456,
673 };
674
675 struct axp8xx_softc;
676
677 struct axp8xx_reg_sc {
678 struct regnode *regnode;
679 device_t base_dev;
680 struct axp8xx_regdef *def;
681 phandle_t xref;
682 struct regnode_std_param *param;
683 };
684
685 struct axp8xx_softc {
686 struct resource *res;
687 uint16_t addr;
688 void *ih;
689 device_t gpiodev;
690 struct mtx mtx;
691 int busy;
692
693 int type;
694
695 /* Configs */
696 const struct axp8xx_config *config;
697
698 /* Sensors */
699 const struct axp8xx_sensors *sensors;
700 int nsensors;
701
702 /* Regulators */
703 struct axp8xx_reg_sc **regs;
704 int nregs;
705
706 /* Warning, shutdown thresholds */
707 int warn_thres;
708 int shut_thres;
709 };
710
711 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx)
712 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
713 static int axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
714 int max_uvolt, int *udelay);
715
716 static int
717 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size)
718 {
719 struct axp8xx_softc *sc;
720 struct iic_msg msg[2];
721
722 sc = device_get_softc(dev);
723
724 msg[0].slave = sc->addr;
725 msg[0].flags = IIC_M_WR;
726 msg[0].len = 1;
727 msg[0].buf = ®
728
729 msg[1].slave = sc->addr;
730 msg[1].flags = IIC_M_RD;
731 msg[1].len = size;
732 msg[1].buf = data;
733
734 return (iicbus_transfer(dev, msg, 2));
735 }
736
737 static int
738 axp8xx_write(device_t dev, uint8_t reg, uint8_t val)
739 {
740 struct axp8xx_softc *sc;
741 struct iic_msg msg[2];
742
743 sc = device_get_softc(dev);
744
745 msg[0].slave = sc->addr;
746 msg[0].flags = IIC_M_WR;
747 msg[0].len = 1;
748 msg[0].buf = ®
749
750 msg[1].slave = sc->addr;
751 msg[1].flags = IIC_M_WR;
752 msg[1].len = 1;
753 msg[1].buf = &val;
754
755 return (iicbus_transfer(dev, msg, 2));
756 }
757
758 static int
759 axp8xx_regnode_init(struct regnode *regnode)
760 {
761 struct regnode_std_param *param;
762 int rv, udelay;
763
764 param = regnode_get_stdparam(regnode);
765 if (param->min_uvolt == 0)
766 return (0);
767
768 /*
769 * Set the regulator at the correct voltage
770 * Do not enable it, this is will be done either by a
771 * consumer or by regnode_set_constraint if boot_on is true
772 */
773 rv = axp8xx_regnode_set_voltage(regnode, param->min_uvolt,
774 param->max_uvolt, &udelay);
775 if (rv != 0)
776 DELAY(udelay);
777
778 return (rv);
779 }
780
781 static int
782 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay)
783 {
784 struct axp8xx_reg_sc *sc;
785 uint8_t val;
786
787 sc = regnode_get_softc(regnode);
788
789 if (bootverbose)
790 device_printf(sc->base_dev, "%sable %s (%s)\n",
791 enable ? "En" : "Dis",
792 regnode_get_name(regnode),
793 sc->def->name);
794
795 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
796 val &= ~sc->def->enable_mask;
797 if (enable)
798 val |= sc->def->enable_value;
799 else {
800 if (sc->def->disable_value)
801 val |= sc->def->disable_value;
802 else
803 val &= ~sc->def->enable_value;
804 }
805 axp8xx_write(sc->base_dev, sc->def->enable_reg, val);
806
807 *udelay = 0;
808
809 return (0);
810 }
811
812 static void
813 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv)
814 {
815 if (val < sc->def->voltage_nstep1)
816 *uv = sc->def->voltage_min + val * sc->def->voltage_step1;
817 else
818 *uv = sc->def->voltage_min +
819 (sc->def->voltage_nstep1 * sc->def->voltage_step1) +
820 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2);
821 *uv *= 1000;
822 }
823
824 static int
825 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt,
826 int max_uvolt, uint8_t *val)
827 {
828 uint8_t nval;
829 int nstep, uvolt;
830
831 nval = 0;
832 uvolt = sc->def->voltage_min * 1000;
833
834 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt;
835 nstep++) {
836 ++nval;
837 uvolt += (sc->def->voltage_step1 * 1000);
838 }
839 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt;
840 nstep++) {
841 ++nval;
842 uvolt += (sc->def->voltage_step2 * 1000);
843 }
844 if (uvolt > max_uvolt)
845 return (EINVAL);
846
847 *val = nval;
848 return (0);
849 }
850
851 static int
852 axp8xx_regnode_status(struct regnode *regnode, int *status)
853 {
854 struct axp8xx_reg_sc *sc;
855 uint8_t val;
856
857 sc = regnode_get_softc(regnode);
858
859 *status = 0;
860 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
861 if (val & sc->def->enable_mask)
862 *status = REGULATOR_STATUS_ENABLED;
863
864 return (0);
865 }
866
867 static int
868 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
869 int max_uvolt, int *udelay)
870 {
871 struct axp8xx_reg_sc *sc;
872 uint8_t val;
873
874 sc = regnode_get_softc(regnode);
875
876 if (bootverbose)
877 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n",
878 regnode_get_name(regnode),
879 sc->def->name,
880 min_uvolt, max_uvolt);
881
882 if (sc->def->voltage_step1 == 0)
883 return (ENXIO);
884
885 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0)
886 return (ERANGE);
887
888 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val);
889
890 *udelay = 0;
891
892 return (0);
893 }
894
895 static int
896 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt)
897 {
898 struct axp8xx_reg_sc *sc;
899 uint8_t val;
900
901 sc = regnode_get_softc(regnode);
902
903 if (!sc->def->voltage_step1 || !sc->def->voltage_step2)
904 return (ENXIO);
905
906 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1);
907 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt);
908
909 return (0);
910 }
911
912 static regnode_method_t axp8xx_regnode_methods[] = {
913 /* Regulator interface */
914 REGNODEMETHOD(regnode_init, axp8xx_regnode_init),
915 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable),
916 REGNODEMETHOD(regnode_status, axp8xx_regnode_status),
917 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage),
918 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage),
919 REGNODEMETHOD(regnode_check_voltage, regnode_method_check_voltage),
920 REGNODEMETHOD_END
921 };
922 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods,
923 sizeof(struct axp8xx_reg_sc), regnode_class);
924
925 static void
926 axp8xx_shutdown(void *devp, int howto)
927 {
928 device_t dev;
929
930 if ((howto & RB_POWEROFF) == 0)
931 return;
932
933 dev = devp;
934
935 if (bootverbose)
936 device_printf(dev, "Shutdown Axp8xx\n");
937
938 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN);
939 }
940
941 static int
942 axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS)
943 {
944 device_t dev = arg1;
945 uint8_t data;
946 int val, error;
947
948 error = axp8xx_read(dev, AXP_CHARGERCTL1, &data, 1);
949 if (error != 0)
950 return (error);
951
952 if (bootverbose)
953 device_printf(dev, "Raw CHARGECTL1 val: 0x%0x\n", data);
954 val = (data & AXP_CHARGERCTL1_CMASK);
955 error = sysctl_handle_int(oidp, &val, 0, req);
956 if (error || !req->newptr) /* error || read request */
957 return (error);
958
959 if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX))
960 return (EINVAL);
961
962 val |= (data & (AXP_CHARGERCTL1_CMASK << 4));
963 axp8xx_write(dev, AXP_CHARGERCTL1, val);
964
965 return (0);
966 }
967
968 static int
969 axp8xx_sysctl(SYSCTL_HANDLER_ARGS)
970 {
971 struct axp8xx_softc *sc;
972 device_t dev = arg1;
973 enum axp8xx_sensor sensor = arg2;
974 const struct axp8xx_config *c;
975 uint8_t data;
976 int val, i, found, batt_val;
977 uint8_t lo, hi;
978
979 sc = device_get_softc(dev);
980 c = sc->config;
981
982 for (found = 0, i = 0; i < sc->nsensors; i++) {
983 if (sc->sensors[i].id == sensor) {
984 found = 1;
985 break;
986 }
987 }
988
989 if (found == 0)
990 return (ENOENT);
991
992 switch (sensor) {
993 case AXP_SENSOR_ACIN_PRESENT:
994 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0)
995 val = !!(data & AXP_POWERSRC_ACIN);
996 break;
997 case AXP_SENSOR_VBUS_PRESENT:
998 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0)
999 val = !!(data & AXP_POWERSRC_VBUS);
1000 break;
1001 case AXP_SENSOR_BATT_PRESENT:
1002 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) {
1003 if (data & AXP_POWERMODE_BAT_VALID)
1004 val = !!(data & AXP_POWERMODE_BAT_PRESENT);
1005 }
1006 break;
1007 case AXP_SENSOR_BATT_CHARGING:
1008 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0)
1009 val = !!(data & AXP_POWERMODE_BAT_CHARGING);
1010 break;
1011 case AXP_SENSOR_BATT_CHARGE_STATE:
1012 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 &&
1013 (data & AXP_BAT_CAP_VALID) != 0) {
1014 batt_val = (data & AXP_BAT_CAP_PERCENT);
1015 if (batt_val <= sc->shut_thres)
1016 val = BATT_CAPACITY_CRITICAL;
1017 else if (batt_val <= sc->warn_thres)
1018 val = BATT_CAPACITY_WARNING;
1019 else
1020 val = BATT_CAPACITY_NORMAL;
1021 }
1022 break;
1023 case AXP_SENSOR_BATT_CAPACITY_PERCENT:
1024 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 &&
1025 (data & AXP_BAT_CAP_VALID) != 0)
1026 val = (data & AXP_BAT_CAP_PERCENT);
1027 break;
1028 case AXP_SENSOR_BATT_VOLTAGE:
1029 if (axp8xx_read(dev, AXP_BATSENSE_HI, &hi, 1) == 0 &&
1030 axp8xx_read(dev, AXP_BATSENSE_LO, &lo, 1) == 0) {
1031 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
1032 val *= c->batsense_step;
1033 }
1034 break;
1035 case AXP_SENSOR_BATT_CHARGE_CURRENT:
1036 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 &&
1037 (data & AXP_POWERSRC_CHARING) != 0 &&
1038 axp8xx_read(dev, AXP_BATCHG_HI, &hi, 1) == 0 &&
1039 axp8xx_read(dev, AXP_BATCHG_LO, &lo, 1) == 0) {
1040 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
1041 val *= c->charge_step;
1042 }
1043 break;
1044 case AXP_SENSOR_BATT_DISCHARGE_CURRENT:
1045 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 &&
1046 (data & AXP_POWERSRC_CHARING) == 0 &&
1047 axp8xx_read(dev, AXP_BATDISCHG_HI, &hi, 1) == 0 &&
1048 axp8xx_read(dev, AXP_BATDISCHG_LO, &lo, 1) == 0) {
1049 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
1050 val *= c->discharge_step;
1051 }
1052 break;
1053 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY:
1054 if (axp8xx_read(dev, AXP_BAT_MAX_CAP_HI, &hi, 1) == 0 &&
1055 axp8xx_read(dev, AXP_BAT_MAX_CAP_LO, &lo, 1) == 0) {
1056 val = AXP_SENSOR_COULOMB(hi, lo);
1057 val *= c->maxcap_step;
1058 }
1059 break;
1060 case AXP_SENSOR_BATT_CURRENT_CAPACITY:
1061 if (axp8xx_read(dev, AXP_BAT_COULOMB_HI, &hi, 1) == 0 &&
1062 axp8xx_read(dev, AXP_BAT_COULOMB_LO, &lo, 1) == 0) {
1063 val = AXP_SENSOR_COULOMB(hi, lo);
1064 val *= c->coulomb_step;
1065 }
1066 break;
1067 }
1068
1069 return sysctl_handle_opaque(oidp, &val, sizeof(val), req);
1070 }
1071
1072 static void
1073 axp8xx_intr(void *arg)
1074 {
1075 device_t dev;
1076 uint8_t val;
1077 int error;
1078
1079 dev = arg;
1080
1081 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1);
1082 if (error != 0)
1083 return;
1084
1085 if (val) {
1086 if (bootverbose)
1087 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val);
1088 if (val & AXP_IRQSTAT1_ACIN_HI)
1089 devctl_notify("PMU", "AC", "plugged", NULL);
1090 if (val & AXP_IRQSTAT1_ACIN_LO)
1091 devctl_notify("PMU", "AC", "unplugged", NULL);
1092 if (val & AXP_IRQSTAT1_VBUS_HI)
1093 devctl_notify("PMU", "USB", "plugged", NULL);
1094 if (val & AXP_IRQSTAT1_VBUS_LO)
1095 devctl_notify("PMU", "USB", "unplugged", NULL);
1096 /* Acknowledge */
1097 axp8xx_write(dev, AXP_IRQSTAT1, val);
1098 }
1099
1100 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1);
1101 if (error != 0)
1102 return;
1103
1104 if (val) {
1105 if (bootverbose)
1106 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val);
1107 if (val & AXP_IRQSTAT2_BATCHGD)
1108 devctl_notify("PMU", "Battery", "charged", NULL);
1109 if (val & AXP_IRQSTAT2_BATCHGC)
1110 devctl_notify("PMU", "Battery", "charging", NULL);
1111 if (val & AXP_IRQSTAT2_BAT_NO)
1112 devctl_notify("PMU", "Battery", "absent", NULL);
1113 if (val & AXP_IRQSTAT2_BAT_IN)
1114 devctl_notify("PMU", "Battery", "plugged", NULL);
1115 /* Acknowledge */
1116 axp8xx_write(dev, AXP_IRQSTAT2, val);
1117 }
1118
1119 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1);
1120 if (error != 0)
1121 return;
1122
1123 if (val) {
1124 /* Acknowledge */
1125 axp8xx_write(dev, AXP_IRQSTAT3, val);
1126 }
1127
1128 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1);
1129 if (error != 0)
1130 return;
1131
1132 if (val) {
1133 if (bootverbose)
1134 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val);
1135 if (val & AXP_IRQSTAT4_BATLVL_LO0)
1136 devctl_notify("PMU", "Battery", "shutdown-threshold", NULL);
1137 if (val & AXP_IRQSTAT4_BATLVL_LO1)
1138 devctl_notify("PMU", "Battery", "warning-threshold", NULL);
1139 /* Acknowledge */
1140 axp8xx_write(dev, AXP_IRQSTAT4, val);
1141 }
1142
1143 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1);
1144 if (error != 0)
1145 return;
1146
1147 if (val != 0) {
1148 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) {
1149 if (bootverbose)
1150 device_printf(dev, "Power button pressed\n");
1151 shutdown_nice(RB_POWEROFF);
1152 }
1153 /* Acknowledge */
1154 axp8xx_write(dev, AXP_IRQSTAT5, val);
1155 }
1156
1157 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1);
1158 if (error != 0)
1159 return;
1160
1161 if (val) {
1162 /* Acknowledge */
1163 axp8xx_write(dev, AXP_IRQSTAT6, val);
1164 }
1165 }
1166
1167 static device_t
1168 axp8xx_gpio_get_bus(device_t dev)
1169 {
1170 struct axp8xx_softc *sc;
1171
1172 sc = device_get_softc(dev);
1173
1174 return (sc->gpiodev);
1175 }
1176
1177 static int
1178 axp8xx_gpio_pin_max(device_t dev, int *maxpin)
1179 {
1180 *maxpin = nitems(axp8xx_pins) - 1;
1181
1182 return (0);
1183 }
1184
1185 static int
1186 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
1187 {
1188 if (pin >= nitems(axp8xx_pins))
1189 return (EINVAL);
1190
1191 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name);
1192
1193 return (0);
1194 }
1195
1196 static int
1197 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
1198 {
1199 if (pin >= nitems(axp8xx_pins))
1200 return (EINVAL);
1201
1202 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
1203
1204 return (0);
1205 }
1206
1207 static int
1208 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
1209 {
1210 struct axp8xx_softc *sc;
1211 uint8_t data, func;
1212 int error;
1213
1214 if (pin >= nitems(axp8xx_pins))
1215 return (EINVAL);
1216
1217 sc = device_get_softc(dev);
1218
1219 AXP_LOCK(sc);
1220 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1221 if (error == 0) {
1222 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1223 if (func == AXP_GPIO_FUNC_INPUT)
1224 *flags = GPIO_PIN_INPUT;
1225 else if (func == AXP_GPIO_FUNC_DRVLO ||
1226 func == AXP_GPIO_FUNC_DRVHI)
1227 *flags = GPIO_PIN_OUTPUT;
1228 else
1229 *flags = 0;
1230 }
1231 AXP_UNLOCK(sc);
1232
1233 return (error);
1234 }
1235
1236 static int
1237 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
1238 {
1239 struct axp8xx_softc *sc;
1240 uint8_t data;
1241 int error;
1242
1243 if (pin >= nitems(axp8xx_pins))
1244 return (EINVAL);
1245
1246 sc = device_get_softc(dev);
1247
1248 AXP_LOCK(sc);
1249 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1250 if (error == 0) {
1251 data &= ~AXP_GPIO_FUNC;
1252 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) {
1253 if ((flags & GPIO_PIN_OUTPUT) == 0)
1254 data |= AXP_GPIO_FUNC_INPUT;
1255 }
1256 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
1257 }
1258 AXP_UNLOCK(sc);
1259
1260 return (error);
1261 }
1262
1263 static int
1264 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
1265 {
1266 struct axp8xx_softc *sc;
1267 uint8_t data, func;
1268 int error;
1269
1270 if (pin >= nitems(axp8xx_pins))
1271 return (EINVAL);
1272
1273 sc = device_get_softc(dev);
1274
1275 AXP_LOCK(sc);
1276 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1277 if (error == 0) {
1278 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1279 switch (func) {
1280 case AXP_GPIO_FUNC_DRVLO:
1281 *val = 0;
1282 break;
1283 case AXP_GPIO_FUNC_DRVHI:
1284 *val = 1;
1285 break;
1286 case AXP_GPIO_FUNC_INPUT:
1287 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1);
1288 if (error == 0)
1289 *val = (data & (1 << pin)) ? 1 : 0;
1290 break;
1291 default:
1292 error = EIO;
1293 break;
1294 }
1295 }
1296 AXP_UNLOCK(sc);
1297
1298 return (error);
1299 }
1300
1301 static int
1302 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val)
1303 {
1304 struct axp8xx_softc *sc;
1305 uint8_t data, func;
1306 int error;
1307
1308 if (pin >= nitems(axp8xx_pins))
1309 return (EINVAL);
1310
1311 sc = device_get_softc(dev);
1312
1313 AXP_LOCK(sc);
1314 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1315 if (error == 0) {
1316 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1317 switch (func) {
1318 case AXP_GPIO_FUNC_DRVLO:
1319 case AXP_GPIO_FUNC_DRVHI:
1320 data &= ~AXP_GPIO_FUNC;
1321 data |= (val << AXP_GPIO_FUNC_SHIFT);
1322 break;
1323 default:
1324 error = EIO;
1325 break;
1326 }
1327 }
1328 if (error == 0)
1329 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
1330 AXP_UNLOCK(sc);
1331
1332 return (error);
1333 }
1334
1335 static int
1336 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin)
1337 {
1338 struct axp8xx_softc *sc;
1339 uint8_t data, func;
1340 int error;
1341
1342 if (pin >= nitems(axp8xx_pins))
1343 return (EINVAL);
1344
1345 sc = device_get_softc(dev);
1346
1347 AXP_LOCK(sc);
1348 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1349 if (error == 0) {
1350 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1351 switch (func) {
1352 case AXP_GPIO_FUNC_DRVLO:
1353 data &= ~AXP_GPIO_FUNC;
1354 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT);
1355 break;
1356 case AXP_GPIO_FUNC_DRVHI:
1357 data &= ~AXP_GPIO_FUNC;
1358 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT);
1359 break;
1360 default:
1361 error = EIO;
1362 break;
1363 }
1364 }
1365 if (error == 0)
1366 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
1367 AXP_UNLOCK(sc);
1368
1369 return (error);
1370 }
1371
1372 static int
1373 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent,
1374 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags)
1375 {
1376 if (gpios[0] >= nitems(axp8xx_pins))
1377 return (EINVAL);
1378
1379 *pin = gpios[0];
1380 *flags = gpios[1];
1381
1382 return (0);
1383 }
1384
1385 static phandle_t
1386 axp8xx_get_node(device_t dev, device_t bus)
1387 {
1388 return (ofw_bus_get_node(dev));
1389 }
1390
1391 static struct axp8xx_reg_sc *
1392 axp8xx_reg_attach(device_t dev, phandle_t node,
1393 struct axp8xx_regdef *def)
1394 {
1395 struct axp8xx_reg_sc *reg_sc;
1396 struct regnode_init_def initdef;
1397 struct regnode *regnode;
1398
1399 memset(&initdef, 0, sizeof(initdef));
1400 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0)
1401 return (NULL);
1402 if (initdef.std_param.min_uvolt == 0)
1403 initdef.std_param.min_uvolt = def->voltage_min * 1000;
1404 if (initdef.std_param.max_uvolt == 0)
1405 initdef.std_param.max_uvolt = def->voltage_max * 1000;
1406 initdef.id = def->id;
1407 initdef.ofw_node = node;
1408 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef);
1409 if (regnode == NULL) {
1410 device_printf(dev, "cannot create regulator\n");
1411 return (NULL);
1412 }
1413
1414 reg_sc = regnode_get_softc(regnode);
1415 reg_sc->regnode = regnode;
1416 reg_sc->base_dev = dev;
1417 reg_sc->def = def;
1418 reg_sc->xref = OF_xref_from_node(node);
1419 reg_sc->param = regnode_get_stdparam(regnode);
1420
1421 regnode_register(regnode);
1422
1423 return (reg_sc);
1424 }
1425
1426 static int
1427 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells,
1428 intptr_t *num)
1429 {
1430 struct axp8xx_softc *sc;
1431 int i;
1432
1433 sc = device_get_softc(dev);
1434 for (i = 0; i < sc->nregs; i++) {
1435 if (sc->regs[i] == NULL)
1436 continue;
1437 if (sc->regs[i]->xref == xref) {
1438 *num = sc->regs[i]->def->id;
1439 return (0);
1440 }
1441 }
1442
1443 return (ENXIO);
1444 }
1445
1446 static int
1447 axp8xx_probe(device_t dev)
1448 {
1449 if (!ofw_bus_status_okay(dev))
1450 return (ENXIO);
1451
1452 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data)
1453 {
1454 case AXP803:
1455 device_set_desc(dev, "X-Powers AXP803 Power Management Unit");
1456 break;
1457 case AXP813:
1458 device_set_desc(dev, "X-Powers AXP813 Power Management Unit");
1459 break;
1460 default:
1461 return (ENXIO);
1462 }
1463
1464 return (BUS_PROBE_DEFAULT);
1465 }
1466
1467 static int
1468 axp8xx_attach(device_t dev)
1469 {
1470 struct axp8xx_softc *sc;
1471 struct axp8xx_reg_sc *reg;
1472 uint8_t chip_id, val;
1473 phandle_t rnode, child;
1474 int error, i;
1475
1476 sc = device_get_softc(dev);
1477
1478 sc->addr = iicbus_get_addr(dev);
1479 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
1480
1481 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res);
1482 if (error != 0) {
1483 device_printf(dev, "cannot allocate resources for device\n");
1484 return (error);
1485 }
1486
1487 if (bootverbose) {
1488 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1);
1489 device_printf(dev, "chip ID 0x%02x\n", chip_id);
1490 }
1491
1492 sc->nregs = nitems(axp8xx_common_regdefs);
1493 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
1494 switch (sc->type) {
1495 case AXP803:
1496 sc->nregs += nitems(axp803_regdefs);
1497 break;
1498 case AXP813:
1499 sc->nregs += nitems(axp813_regdefs);
1500 break;
1501 }
1502 sc->config = &axp803_config;
1503 sc->sensors = axp8xx_common_sensors;
1504 sc->nsensors = nitems(axp8xx_common_sensors);
1505
1506 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs,
1507 M_AXP8XX_REG, M_WAITOK | M_ZERO);
1508
1509 /* Attach known regulators that exist in the DT */
1510 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators");
1511 if (rnode > 0) {
1512 for (i = 0; i < sc->nregs; i++) {
1513 char *regname;
1514 struct axp8xx_regdef *regdef;
1515
1516 if (i <= nitems(axp8xx_common_regdefs)) {
1517 regname = axp8xx_common_regdefs[i].name;
1518 regdef = &axp8xx_common_regdefs[i];
1519 } else {
1520 int off;
1521
1522 off = i - nitems(axp8xx_common_regdefs);
1523 switch (sc->type) {
1524 case AXP803:
1525 regname = axp803_regdefs[off].name;
1526 regdef = &axp803_regdefs[off];
1527 break;
1528 case AXP813:
1529 regname = axp813_regdefs[off].name;
1530 regdef = &axp813_regdefs[off];
1531 break;
1532 }
1533 }
1534 child = ofw_bus_find_child(rnode,
1535 regname);
1536 if (child == 0)
1537 continue;
1538 reg = axp8xx_reg_attach(dev, child,
1539 regdef);
1540 if (reg == NULL) {
1541 device_printf(dev,
1542 "cannot attach regulator %s\n",
1543 regname);
1544 continue;
1545 }
1546 sc->regs[i] = reg;
1547 }
1548 }
1549
1550 /* Add sensors */
1551 for (i = 0; i < sc->nsensors; i++) {
1552 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1553 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1554 OID_AUTO, sc->sensors[i].name,
1555 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT,
1556 dev, sc->sensors[i].id, axp8xx_sysctl,
1557 sc->sensors[i].format,
1558 sc->sensors[i].desc);
1559 }
1560 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1561 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1562 OID_AUTO, "batchargecurrentstep",
1563 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
1564 dev, 0, axp8xx_sysctl_chargecurrent,
1565 "I", "Battery Charging Current Step, "
1566 "0: 200mA, 1: 400mA, 2: 600mA, 3: 800mA, "
1567 "4: 1000mA, 5: 1200mA, 6: 1400mA, 7: 1600mA, "
1568 "8: 1800mA, 9: 2000mA, 10: 2200mA, 11: 2400mA, "
1569 "12: 2600mA, 13: 2800mA");
1570
1571 /* Get thresholds */
1572 if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) {
1573 sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4;
1574 sc->warn_thres += AXP_BAP_CAP_WARN_LV1BASE;
1575 sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2);
1576 if (bootverbose) {
1577 device_printf(dev,
1578 "Raw reg val: 0x%02x\n", val);
1579 device_printf(dev,
1580 "Warning threshold: 0x%02x\n", sc->warn_thres);
1581 device_printf(dev,
1582 "Shutdown threshold: 0x%02x\n", sc->shut_thres);
1583 }
1584 }
1585
1586 /* Enable interrupts */
1587 axp8xx_write(dev, AXP_IRQEN1,
1588 AXP_IRQEN1_VBUS_LO |
1589 AXP_IRQEN1_VBUS_HI |
1590 AXP_IRQEN1_ACIN_LO |
1591 AXP_IRQEN1_ACIN_HI);
1592 axp8xx_write(dev, AXP_IRQEN2,
1593 AXP_IRQEN2_BATCHGD |
1594 AXP_IRQEN2_BATCHGC |
1595 AXP_IRQEN2_BAT_NO |
1596 AXP_IRQEN2_BAT_IN);
1597 axp8xx_write(dev, AXP_IRQEN3, 0);
1598 axp8xx_write(dev, AXP_IRQEN4,
1599 AXP_IRQEN4_BATLVL_LO0 |
1600 AXP_IRQEN4_BATLVL_LO1);
1601 axp8xx_write(dev, AXP_IRQEN5,
1602 AXP_IRQEN5_POKSIRQ |
1603 AXP_IRQEN5_POKLIRQ);
1604 axp8xx_write(dev, AXP_IRQEN6, 0);
1605
1606 /* Install interrupt handler */
1607 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE,
1608 NULL, axp8xx_intr, dev, &sc->ih);
1609 if (error != 0) {
1610 device_printf(dev, "cannot setup interrupt handler\n");
1611 return (error);
1612 }
1613
1614 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev,
1615 SHUTDOWN_PRI_LAST);
1616
1617 sc->gpiodev = gpiobus_attach_bus(dev);
1618
1619 return (0);
1620 }
1621
1622 static device_method_t axp8xx_methods[] = {
1623 /* Device interface */
1624 DEVMETHOD(device_probe, axp8xx_probe),
1625 DEVMETHOD(device_attach, axp8xx_attach),
1626
1627 /* GPIO interface */
1628 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus),
1629 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max),
1630 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname),
1631 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps),
1632 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags),
1633 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags),
1634 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get),
1635 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set),
1636 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle),
1637 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios),
1638
1639 /* Regdev interface */
1640 DEVMETHOD(regdev_map, axp8xx_regdev_map),
1641
1642 /* OFW bus interface */
1643 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node),
1644
1645 DEVMETHOD_END
1646 };
1647
1648 static driver_t axp8xx_driver = {
1649 "axp8xx_pmu",
1650 axp8xx_methods,
1651 sizeof(struct axp8xx_softc),
1652 };
1653
1654 extern driver_t ofw_gpiobus_driver, gpioc_driver;
1655
1656 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, 0, 0,
1657 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1658 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver, 0, 0,
1659 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1660 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, 0, 0);
1661 MODULE_VERSION(axp8xx, 1);
1662 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1);
1663 SIMPLEBUS_PNP_INFO(compat_data);
Cache object: 7fda3a40058ef5de78d129ac7e6ac064
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