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sys/arm/allwinner/axp81x.c
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1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 /* 30 * X-Powers AXP803/813/818 PMU for Allwinner SoCs 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/eventhandler.h> 39 #include <sys/bus.h> 40 #include <sys/rman.h> 41 #include <sys/kernel.h> 42 #include <sys/reboot.h> 43 #include <sys/gpio.h> 44 #include <sys/module.h> 45 #include <machine/bus.h> 46 47 #include <dev/iicbus/iicbus.h> 48 #include <dev/iicbus/iiconf.h> 49 50 #include <dev/gpio/gpiobusvar.h> 51 52 #include <dev/ofw/ofw_bus.h> 53 #include <dev/ofw/ofw_bus_subr.h> 54 55 #include <dev/extres/regulator/regulator.h> 56 57 #include "gpio_if.h" 58 #include "iicbus_if.h" 59 #include "regdev_if.h" 60 61 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator"); 62 63 #define AXP_POWERSRC 0x00 64 #define AXP_POWERSRC_ACIN (1 << 7) 65 #define AXP_POWERSRC_VBUS (1 << 5) 66 #define AXP_POWERSRC_VBAT (1 << 3) 67 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */ 68 #define AXP_POWERSRC_SHORTED (1 << 1) 69 #define AXP_POWERSRC_STARTUP (1 << 0) 70 #define AXP_POWERMODE 0x01 71 #define AXP_POWERMODE_BAT_CHARGING (1 << 6) 72 #define AXP_POWERMODE_BAT_PRESENT (1 << 5) 73 #define AXP_POWERMODE_BAT_VALID (1 << 4) 74 #define AXP_ICTYPE 0x03 75 #define AXP_POWERCTL1 0x10 76 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */ 77 #define AXP_POWERCTL1_DCDC6 (1 << 5) 78 #define AXP_POWERCTL1_DCDC5 (1 << 4) 79 #define AXP_POWERCTL1_DCDC4 (1 << 3) 80 #define AXP_POWERCTL1_DCDC3 (1 << 2) 81 #define AXP_POWERCTL1_DCDC2 (1 << 1) 82 #define AXP_POWERCTL1_DCDC1 (1 << 0) 83 #define AXP_POWERCTL2 0x12 84 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */ 85 #define AXP_POWERCTL2_DLDO4 (1 << 6) 86 #define AXP_POWERCTL2_DLDO3 (1 << 5) 87 #define AXP_POWERCTL2_DLDO2 (1 << 4) 88 #define AXP_POWERCTL2_DLDO1 (1 << 3) 89 #define AXP_POWERCTL2_ELDO3 (1 << 2) 90 #define AXP_POWERCTL2_ELDO2 (1 << 1) 91 #define AXP_POWERCTL2_ELDO1 (1 << 0) 92 #define AXP_POWERCTL3 0x13 93 #define AXP_POWERCTL3_ALDO3 (1 << 7) 94 #define AXP_POWERCTL3_ALDO2 (1 << 6) 95 #define AXP_POWERCTL3_ALDO1 (1 << 5) 96 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */ 97 #define AXP_POWERCTL3_FLDO2 (1 << 3) 98 #define AXP_POWERCTL3_FLDO1 (1 << 2) 99 #define AXP_VOLTCTL_DLDO1 0x15 100 #define AXP_VOLTCTL_DLDO2 0x16 101 #define AXP_VOLTCTL_DLDO3 0x17 102 #define AXP_VOLTCTL_DLDO4 0x18 103 #define AXP_VOLTCTL_ELDO1 0x19 104 #define AXP_VOLTCTL_ELDO2 0x1A 105 #define AXP_VOLTCTL_ELDO3 0x1B 106 #define AXP_VOLTCTL_FLDO1 0x1C 107 #define AXP_VOLTCTL_FLDO2 0x1D 108 #define AXP_VOLTCTL_DCDC1 0x20 109 #define AXP_VOLTCTL_DCDC2 0x21 110 #define AXP_VOLTCTL_DCDC3 0x22 111 #define AXP_VOLTCTL_DCDC4 0x23 112 #define AXP_VOLTCTL_DCDC5 0x24 113 #define AXP_VOLTCTL_DCDC6 0x25 114 #define AXP_VOLTCTL_DCDC7 0x26 115 #define AXP_VOLTCTL_ALDO1 0x28 116 #define AXP_VOLTCTL_ALDO2 0x29 117 #define AXP_VOLTCTL_ALDO3 0x2A 118 #define AXP_VOLTCTL_STATUS (1 << 7) 119 #define AXP_VOLTCTL_MASK 0x7f 120 #define AXP_POWERBAT 0x32 121 #define AXP_POWERBAT_SHUTDOWN (1 << 7) 122 #define AXP_CHARGERCTL1 0x33 123 #define AXP_CHARGERCTL1_MIN 0 124 #define AXP_CHARGERCTL1_MAX 13 125 #define AXP_CHARGERCTL1_CMASK 0xf 126 #define AXP_IRQEN1 0x40 127 #define AXP_IRQEN1_ACIN_HI (1 << 6) 128 #define AXP_IRQEN1_ACIN_LO (1 << 5) 129 #define AXP_IRQEN1_VBUS_HI (1 << 3) 130 #define AXP_IRQEN1_VBUS_LO (1 << 2) 131 #define AXP_IRQEN2 0x41 132 #define AXP_IRQEN2_BAT_IN (1 << 7) 133 #define AXP_IRQEN2_BAT_NO (1 << 6) 134 #define AXP_IRQEN2_BATCHGC (1 << 3) 135 #define AXP_IRQEN2_BATCHGD (1 << 2) 136 #define AXP_IRQEN3 0x42 137 #define AXP_IRQEN4 0x43 138 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1) 139 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0) 140 #define AXP_IRQEN5 0x44 141 #define AXP_IRQEN5_POKSIRQ (1 << 4) 142 #define AXP_IRQEN5_POKLIRQ (1 << 3) 143 #define AXP_IRQEN6 0x45 144 #define AXP_IRQSTAT1 0x48 145 #define AXP_IRQSTAT1_ACIN_HI (1 << 6) 146 #define AXP_IRQSTAT1_ACIN_LO (1 << 5) 147 #define AXP_IRQSTAT1_VBUS_HI (1 << 3) 148 #define AXP_IRQSTAT1_VBUS_LO (1 << 2) 149 #define AXP_IRQSTAT2 0x49 150 #define AXP_IRQSTAT2_BAT_IN (1 << 7) 151 #define AXP_IRQSTAT2_BAT_NO (1 << 6) 152 #define AXP_IRQSTAT2_BATCHGC (1 << 3) 153 #define AXP_IRQSTAT2_BATCHGD (1 << 2) 154 #define AXP_IRQSTAT3 0x4a 155 #define AXP_IRQSTAT4 0x4b 156 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1) 157 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0) 158 #define AXP_IRQSTAT5 0x4c 159 #define AXP_IRQSTAT5_POKSIRQ (1 << 4) 160 #define AXP_IRQEN5_POKLIRQ (1 << 3) 161 #define AXP_IRQSTAT6 0x4d 162 #define AXP_BATSENSE_HI 0x78 163 #define AXP_BATSENSE_LO 0x79 164 #define AXP_BATCHG_HI 0x7a 165 #define AXP_BATCHG_LO 0x7b 166 #define AXP_BATDISCHG_HI 0x7c 167 #define AXP_BATDISCHG_LO 0x7d 168 #define AXP_GPIO0_CTRL 0x90 169 #define AXP_GPIO0LDO_CTRL 0x91 170 #define AXP_GPIO1_CTRL 0x92 171 #define AXP_GPIO1LDO_CTRL 0x93 172 #define AXP_GPIO_FUNC (0x7 << 0) 173 #define AXP_GPIO_FUNC_SHIFT 0 174 #define AXP_GPIO_FUNC_DRVLO 0 175 #define AXP_GPIO_FUNC_DRVHI 1 176 #define AXP_GPIO_FUNC_INPUT 2 177 #define AXP_GPIO_FUNC_LDO_ON 3 178 #define AXP_GPIO_FUNC_LDO_OFF 4 179 #define AXP_GPIO_SIGBIT 0x94 180 #define AXP_GPIO_PD 0x97 181 #define AXP_FUEL_GAUGECTL 0xb8 182 #define AXP_FUEL_GAUGECTL_EN (1 << 7) 183 184 #define AXP_BAT_CAP 0xb9 185 #define AXP_BAT_CAP_VALID (1 << 7) 186 #define AXP_BAT_CAP_PERCENT 0x7f 187 188 #define AXP_BAT_MAX_CAP_HI 0xe0 189 #define AXP_BAT_MAX_CAP_VALID (1 << 7) 190 #define AXP_BAT_MAX_CAP_LO 0xe1 191 192 #define AXP_BAT_COULOMB_HI 0xe2 193 #define AXP_BAT_COULOMB_VALID (1 << 7) 194 #define AXP_BAT_COULOMB_LO 0xe3 195 196 #define AXP_BAT_CAP_WARN 0xe6 197 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */ 198 #define AXP_BAP_CAP_WARN_LV1BASE 5 /* 5-20%, 1% per step */ 199 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */ 200 201 /* Sensor conversion macros */ 202 #define AXP_SENSOR_BAT_H(hi) ((hi) << 4) 203 #define AXP_SENSOR_BAT_L(lo) ((lo) & 0xf) 204 #define AXP_SENSOR_COULOMB(hi, lo) (((hi & ~(1 << 7)) << 8) | (lo)) 205 206 static const struct { 207 const char *name; 208 uint8_t ctrl_reg; 209 } axp8xx_pins[] = { 210 { "GPIO0", AXP_GPIO0_CTRL }, 211 { "GPIO1", AXP_GPIO1_CTRL }, 212 }; 213 214 enum AXP8XX_TYPE { 215 AXP803 = 1, 216 AXP813, 217 }; 218 219 static struct ofw_compat_data compat_data[] = { 220 { "x-powers,axp803", AXP803 }, 221 { "x-powers,axp813", AXP813 }, 222 { "x-powers,axp818", AXP813 }, 223 { NULL, 0 } 224 }; 225 226 static struct resource_spec axp8xx_spec[] = { 227 { SYS_RES_IRQ, 0, RF_ACTIVE }, 228 { -1, 0 } 229 }; 230 231 struct axp8xx_regdef { 232 intptr_t id; 233 char *name; 234 char *supply_name; 235 uint8_t enable_reg; 236 uint8_t enable_mask; 237 uint8_t enable_value; 238 uint8_t disable_value; 239 uint8_t voltage_reg; 240 int voltage_min; 241 int voltage_max; 242 int voltage_step1; 243 int voltage_nstep1; 244 int voltage_step2; 245 int voltage_nstep2; 246 }; 247 248 enum axp8xx_reg_id { 249 AXP8XX_REG_ID_DCDC1 = 100, 250 AXP8XX_REG_ID_DCDC2, 251 AXP8XX_REG_ID_DCDC3, 252 AXP8XX_REG_ID_DCDC4, 253 AXP8XX_REG_ID_DCDC5, 254 AXP8XX_REG_ID_DCDC6, 255 AXP813_REG_ID_DCDC7, 256 AXP803_REG_ID_DC1SW, 257 AXP8XX_REG_ID_DLDO1, 258 AXP8XX_REG_ID_DLDO2, 259 AXP8XX_REG_ID_DLDO3, 260 AXP8XX_REG_ID_DLDO4, 261 AXP8XX_REG_ID_ELDO1, 262 AXP8XX_REG_ID_ELDO2, 263 AXP8XX_REG_ID_ELDO3, 264 AXP8XX_REG_ID_ALDO1, 265 AXP8XX_REG_ID_ALDO2, 266 AXP8XX_REG_ID_ALDO3, 267 AXP8XX_REG_ID_FLDO1, 268 AXP8XX_REG_ID_FLDO2, 269 AXP813_REG_ID_FLDO3, 270 AXP8XX_REG_ID_GPIO0_LDO, 271 AXP8XX_REG_ID_GPIO1_LDO, 272 }; 273 274 static struct axp8xx_regdef axp803_regdefs[] = { 275 { 276 .id = AXP803_REG_ID_DC1SW, 277 .name = "dc1sw", 278 .enable_reg = AXP_POWERCTL2, 279 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW, 280 .enable_value = AXP_POWERCTL2_DC1SW, 281 }, 282 }; 283 284 static struct axp8xx_regdef axp813_regdefs[] = { 285 { 286 .id = AXP813_REG_ID_DCDC7, 287 .name = "dcdc7", 288 .enable_reg = AXP_POWERCTL1, 289 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7, 290 .enable_value = AXP_POWERCTL1_DCDC7, 291 .voltage_reg = AXP_VOLTCTL_DCDC7, 292 .voltage_min = 600, 293 .voltage_max = 1520, 294 .voltage_step1 = 10, 295 .voltage_nstep1 = 50, 296 .voltage_step2 = 20, 297 .voltage_nstep2 = 21, 298 }, 299 }; 300 301 static struct axp8xx_regdef axp8xx_common_regdefs[] = { 302 { 303 .id = AXP8XX_REG_ID_DCDC1, 304 .name = "dcdc1", 305 .enable_reg = AXP_POWERCTL1, 306 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1, 307 .enable_value = AXP_POWERCTL1_DCDC1, 308 .voltage_reg = AXP_VOLTCTL_DCDC1, 309 .voltage_min = 1600, 310 .voltage_max = 3400, 311 .voltage_step1 = 100, 312 .voltage_nstep1 = 18, 313 }, 314 { 315 .id = AXP8XX_REG_ID_DCDC2, 316 .name = "dcdc2", 317 .enable_reg = AXP_POWERCTL1, 318 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2, 319 .enable_value = AXP_POWERCTL1_DCDC2, 320 .voltage_reg = AXP_VOLTCTL_DCDC2, 321 .voltage_min = 500, 322 .voltage_max = 1300, 323 .voltage_step1 = 10, 324 .voltage_nstep1 = 70, 325 .voltage_step2 = 20, 326 .voltage_nstep2 = 5, 327 }, 328 { 329 .id = AXP8XX_REG_ID_DCDC3, 330 .name = "dcdc3", 331 .enable_reg = AXP_POWERCTL1, 332 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3, 333 .enable_value = AXP_POWERCTL1_DCDC3, 334 .voltage_reg = AXP_VOLTCTL_DCDC3, 335 .voltage_min = 500, 336 .voltage_max = 1300, 337 .voltage_step1 = 10, 338 .voltage_nstep1 = 70, 339 .voltage_step2 = 20, 340 .voltage_nstep2 = 5, 341 }, 342 { 343 .id = AXP8XX_REG_ID_DCDC4, 344 .name = "dcdc4", 345 .enable_reg = AXP_POWERCTL1, 346 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4, 347 .enable_value = AXP_POWERCTL1_DCDC4, 348 .voltage_reg = AXP_VOLTCTL_DCDC4, 349 .voltage_min = 500, 350 .voltage_max = 1300, 351 .voltage_step1 = 10, 352 .voltage_nstep1 = 70, 353 .voltage_step2 = 20, 354 .voltage_nstep2 = 5, 355 }, 356 { 357 .id = AXP8XX_REG_ID_DCDC5, 358 .name = "dcdc5", 359 .enable_reg = AXP_POWERCTL1, 360 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5, 361 .enable_value = AXP_POWERCTL1_DCDC5, 362 .voltage_reg = AXP_VOLTCTL_DCDC5, 363 .voltage_min = 800, 364 .voltage_max = 1840, 365 .voltage_step1 = 10, 366 .voltage_nstep1 = 42, 367 .voltage_step2 = 20, 368 .voltage_nstep2 = 36, 369 }, 370 { 371 .id = AXP8XX_REG_ID_DCDC6, 372 .name = "dcdc6", 373 .enable_reg = AXP_POWERCTL1, 374 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6, 375 .enable_value = AXP_POWERCTL1_DCDC6, 376 .voltage_reg = AXP_VOLTCTL_DCDC6, 377 .voltage_min = 600, 378 .voltage_max = 1520, 379 .voltage_step1 = 10, 380 .voltage_nstep1 = 50, 381 .voltage_step2 = 20, 382 .voltage_nstep2 = 21, 383 }, 384 { 385 .id = AXP8XX_REG_ID_DLDO1, 386 .name = "dldo1", 387 .enable_reg = AXP_POWERCTL2, 388 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1, 389 .enable_value = AXP_POWERCTL2_DLDO1, 390 .voltage_reg = AXP_VOLTCTL_DLDO1, 391 .voltage_min = 700, 392 .voltage_max = 3300, 393 .voltage_step1 = 100, 394 .voltage_nstep1 = 26, 395 }, 396 { 397 .id = AXP8XX_REG_ID_DLDO2, 398 .name = "dldo2", 399 .enable_reg = AXP_POWERCTL2, 400 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2, 401 .enable_value = AXP_POWERCTL2_DLDO2, 402 .voltage_reg = AXP_VOLTCTL_DLDO2, 403 .voltage_min = 700, 404 .voltage_max = 4200, 405 .voltage_step1 = 100, 406 .voltage_nstep1 = 27, 407 .voltage_step2 = 200, 408 .voltage_nstep2 = 4, 409 }, 410 { 411 .id = AXP8XX_REG_ID_DLDO3, 412 .name = "dldo3", 413 .enable_reg = AXP_POWERCTL2, 414 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3, 415 .enable_value = AXP_POWERCTL2_DLDO3, 416 .voltage_reg = AXP_VOLTCTL_DLDO3, 417 .voltage_min = 700, 418 .voltage_max = 3300, 419 .voltage_step1 = 100, 420 .voltage_nstep1 = 26, 421 }, 422 { 423 .id = AXP8XX_REG_ID_DLDO4, 424 .name = "dldo4", 425 .enable_reg = AXP_POWERCTL2, 426 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4, 427 .enable_value = AXP_POWERCTL2_DLDO4, 428 .voltage_reg = AXP_VOLTCTL_DLDO4, 429 .voltage_min = 700, 430 .voltage_max = 3300, 431 .voltage_step1 = 100, 432 .voltage_nstep1 = 26, 433 }, 434 { 435 .id = AXP8XX_REG_ID_ALDO1, 436 .name = "aldo1", 437 .enable_reg = AXP_POWERCTL3, 438 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1, 439 .enable_value = AXP_POWERCTL3_ALDO1, 440 .voltage_reg = AXP_VOLTCTL_ALDO1, 441 .voltage_min = 700, 442 .voltage_max = 3300, 443 .voltage_step1 = 100, 444 .voltage_nstep1 = 26, 445 }, 446 { 447 .id = AXP8XX_REG_ID_ALDO2, 448 .name = "aldo2", 449 .enable_reg = AXP_POWERCTL3, 450 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2, 451 .enable_value = AXP_POWERCTL3_ALDO2, 452 .voltage_reg = AXP_VOLTCTL_ALDO2, 453 .voltage_min = 700, 454 .voltage_max = 3300, 455 .voltage_step1 = 100, 456 .voltage_nstep1 = 26, 457 }, 458 { 459 .id = AXP8XX_REG_ID_ALDO3, 460 .name = "aldo3", 461 .enable_reg = AXP_POWERCTL3, 462 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3, 463 .enable_value = AXP_POWERCTL3_ALDO3, 464 .voltage_reg = AXP_VOLTCTL_ALDO3, 465 .voltage_min = 700, 466 .voltage_max = 3300, 467 .voltage_step1 = 100, 468 .voltage_nstep1 = 26, 469 }, 470 { 471 .id = AXP8XX_REG_ID_ELDO1, 472 .name = "eldo1", 473 .enable_reg = AXP_POWERCTL2, 474 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1, 475 .enable_value = AXP_POWERCTL2_ELDO1, 476 .voltage_reg = AXP_VOLTCTL_ELDO1, 477 .voltage_min = 700, 478 .voltage_max = 1900, 479 .voltage_step1 = 50, 480 .voltage_nstep1 = 24, 481 }, 482 { 483 .id = AXP8XX_REG_ID_ELDO2, 484 .name = "eldo2", 485 .enable_reg = AXP_POWERCTL2, 486 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2, 487 .enable_value = AXP_POWERCTL2_ELDO2, 488 .voltage_reg = AXP_VOLTCTL_ELDO2, 489 .voltage_min = 700, 490 .voltage_max = 1900, 491 .voltage_step1 = 50, 492 .voltage_nstep1 = 24, 493 }, 494 { 495 .id = AXP8XX_REG_ID_ELDO3, 496 .name = "eldo3", 497 .enable_reg = AXP_POWERCTL2, 498 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3, 499 .enable_value = AXP_POWERCTL2_ELDO3, 500 .voltage_reg = AXP_VOLTCTL_ELDO3, 501 .voltage_min = 700, 502 .voltage_max = 1900, 503 .voltage_step1 = 50, 504 .voltage_nstep1 = 24, 505 }, 506 { 507 .id = AXP8XX_REG_ID_FLDO1, 508 .name = "fldo1", 509 .enable_reg = AXP_POWERCTL3, 510 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1, 511 .enable_value = AXP_POWERCTL3_FLDO1, 512 .voltage_reg = AXP_VOLTCTL_FLDO1, 513 .voltage_min = 700, 514 .voltage_max = 1450, 515 .voltage_step1 = 50, 516 .voltage_nstep1 = 15, 517 }, 518 { 519 .id = AXP8XX_REG_ID_FLDO2, 520 .name = "fldo2", 521 .enable_reg = AXP_POWERCTL3, 522 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2, 523 .enable_value = AXP_POWERCTL3_FLDO2, 524 .voltage_reg = AXP_VOLTCTL_FLDO2, 525 .voltage_min = 700, 526 .voltage_max = 1450, 527 .voltage_step1 = 50, 528 .voltage_nstep1 = 15, 529 }, 530 { 531 .id = AXP8XX_REG_ID_GPIO0_LDO, 532 .name = "ldo-io0", 533 .enable_reg = AXP_GPIO0_CTRL, 534 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 535 .enable_value = AXP_GPIO_FUNC_LDO_ON, 536 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 537 .voltage_reg = AXP_GPIO0LDO_CTRL, 538 .voltage_min = 700, 539 .voltage_max = 3300, 540 .voltage_step1 = 100, 541 .voltage_nstep1 = 26, 542 }, 543 { 544 .id = AXP8XX_REG_ID_GPIO1_LDO, 545 .name = "ldo-io1", 546 .enable_reg = AXP_GPIO1_CTRL, 547 .enable_mask = (uint8_t) AXP_GPIO_FUNC, 548 .enable_value = AXP_GPIO_FUNC_LDO_ON, 549 .disable_value = AXP_GPIO_FUNC_LDO_OFF, 550 .voltage_reg = AXP_GPIO1LDO_CTRL, 551 .voltage_min = 700, 552 .voltage_max = 3300, 553 .voltage_step1 = 100, 554 .voltage_nstep1 = 26, 555 }, 556 }; 557 558 enum axp8xx_sensor { 559 AXP_SENSOR_ACIN_PRESENT, 560 AXP_SENSOR_VBUS_PRESENT, 561 AXP_SENSOR_BATT_PRESENT, 562 AXP_SENSOR_BATT_CHARGING, 563 AXP_SENSOR_BATT_CHARGE_STATE, 564 AXP_SENSOR_BATT_VOLTAGE, 565 AXP_SENSOR_BATT_CHARGE_CURRENT, 566 AXP_SENSOR_BATT_DISCHARGE_CURRENT, 567 AXP_SENSOR_BATT_CAPACITY_PERCENT, 568 AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 569 AXP_SENSOR_BATT_CURRENT_CAPACITY, 570 }; 571 572 enum battery_capacity_state { 573 BATT_CAPACITY_NORMAL = 1, /* normal cap in battery */ 574 BATT_CAPACITY_WARNING, /* warning cap in battery */ 575 BATT_CAPACITY_CRITICAL, /* critical cap in battery */ 576 BATT_CAPACITY_HIGH, /* high cap in battery */ 577 BATT_CAPACITY_MAX, /* maximum cap in battery */ 578 BATT_CAPACITY_LOW /* low cap in battery */ 579 }; 580 581 struct axp8xx_sensors { 582 int id; 583 const char *name; 584 const char *desc; 585 const char *format; 586 }; 587 588 static const struct axp8xx_sensors axp8xx_common_sensors[] = { 589 { 590 .id = AXP_SENSOR_ACIN_PRESENT, 591 .name = "acin", 592 .format = "I", 593 .desc = "ACIN Present", 594 }, 595 { 596 .id = AXP_SENSOR_VBUS_PRESENT, 597 .name = "vbus", 598 .format = "I", 599 .desc = "VBUS Present", 600 }, 601 { 602 .id = AXP_SENSOR_BATT_PRESENT, 603 .name = "bat", 604 .format = "I", 605 .desc = "Battery Present", 606 }, 607 { 608 .id = AXP_SENSOR_BATT_CHARGING, 609 .name = "batcharging", 610 .format = "I", 611 .desc = "Battery Charging", 612 }, 613 { 614 .id = AXP_SENSOR_BATT_CHARGE_STATE, 615 .name = "batchargestate", 616 .format = "I", 617 .desc = "Battery Charge State", 618 }, 619 { 620 .id = AXP_SENSOR_BATT_VOLTAGE, 621 .name = "batvolt", 622 .format = "I", 623 .desc = "Battery Voltage", 624 }, 625 { 626 .id = AXP_SENSOR_BATT_CHARGE_CURRENT, 627 .name = "batchargecurrent", 628 .format = "I", 629 .desc = "Average Battery Charging Current", 630 }, 631 { 632 .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT, 633 .name = "batdischargecurrent", 634 .format = "I", 635 .desc = "Average Battery Discharging Current", 636 }, 637 { 638 .id = AXP_SENSOR_BATT_CAPACITY_PERCENT, 639 .name = "batcapacitypercent", 640 .format = "I", 641 .desc = "Battery Capacity Percentage", 642 }, 643 { 644 .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY, 645 .name = "batmaxcapacity", 646 .format = "I", 647 .desc = "Battery Maximum Capacity", 648 }, 649 { 650 .id = AXP_SENSOR_BATT_CURRENT_CAPACITY, 651 .name = "batcurrentcapacity", 652 .format = "I", 653 .desc = "Battery Current Capacity", 654 }, 655 }; 656 657 struct axp8xx_config { 658 const char *name; 659 int batsense_step; /* uV */ 660 int charge_step; /* uA */ 661 int discharge_step; /* uA */ 662 int maxcap_step; /* uAh */ 663 int coulomb_step; /* uAh */ 664 }; 665 666 static struct axp8xx_config axp803_config = { 667 .name = "AXP803", 668 .batsense_step = 1100, 669 .charge_step = 1000, 670 .discharge_step = 1000, 671 .maxcap_step = 1456, 672 .coulomb_step = 1456, 673 }; 674 675 struct axp8xx_softc; 676 677 struct axp8xx_reg_sc { 678 struct regnode *regnode; 679 device_t base_dev; 680 struct axp8xx_regdef *def; 681 phandle_t xref; 682 struct regnode_std_param *param; 683 }; 684 685 struct axp8xx_softc { 686 struct resource *res; 687 uint16_t addr; 688 void *ih; 689 device_t gpiodev; 690 struct mtx mtx; 691 int busy; 692 693 int type; 694 695 /* Configs */ 696 const struct axp8xx_config *config; 697 698 /* Sensors */ 699 const struct axp8xx_sensors *sensors; 700 int nsensors; 701 702 /* Regulators */ 703 struct axp8xx_reg_sc **regs; 704 int nregs; 705 706 /* Warning, shutdown thresholds */ 707 int warn_thres; 708 int shut_thres; 709 }; 710 711 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx) 712 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 713 static int axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 714 int max_uvolt, int *udelay); 715 716 static int 717 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size) 718 { 719 struct axp8xx_softc *sc; 720 struct iic_msg msg[2]; 721 722 sc = device_get_softc(dev); 723 724 msg[0].slave = sc->addr; 725 msg[0].flags = IIC_M_WR; 726 msg[0].len = 1; 727 msg[0].buf = ® 728 729 msg[1].slave = sc->addr; 730 msg[1].flags = IIC_M_RD; 731 msg[1].len = size; 732 msg[1].buf = data; 733 734 return (iicbus_transfer(dev, msg, 2)); 735 } 736 737 static int 738 axp8xx_write(device_t dev, uint8_t reg, uint8_t val) 739 { 740 struct axp8xx_softc *sc; 741 struct iic_msg msg[2]; 742 743 sc = device_get_softc(dev); 744 745 msg[0].slave = sc->addr; 746 msg[0].flags = IIC_M_WR; 747 msg[0].len = 1; 748 msg[0].buf = ® 749 750 msg[1].slave = sc->addr; 751 msg[1].flags = IIC_M_WR; 752 msg[1].len = 1; 753 msg[1].buf = &val; 754 755 return (iicbus_transfer(dev, msg, 2)); 756 } 757 758 static int 759 axp8xx_regnode_init(struct regnode *regnode) 760 { 761 struct axp8xx_reg_sc *sc; 762 struct regnode_std_param *param; 763 int rv, udelay; 764 765 sc = regnode_get_softc(regnode); 766 param = regnode_get_stdparam(regnode); 767 if (param->min_uvolt == 0) 768 return (0); 769 770 /* 771 * Set the regulator at the correct voltage 772 * Do not enable it, this is will be done either by a 773 * consumer or by regnode_set_constraint if boot_on is true 774 */ 775 rv = axp8xx_regnode_set_voltage(regnode, param->min_uvolt, 776 param->max_uvolt, &udelay); 777 if (rv != 0) 778 DELAY(udelay); 779 780 return (rv); 781 } 782 783 static int 784 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay) 785 { 786 struct axp8xx_reg_sc *sc; 787 uint8_t val; 788 789 sc = regnode_get_softc(regnode); 790 791 if (bootverbose) 792 device_printf(sc->base_dev, "%sable %s (%s)\n", 793 enable ? "En" : "Dis", 794 regnode_get_name(regnode), 795 sc->def->name); 796 797 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); 798 val &= ~sc->def->enable_mask; 799 if (enable) 800 val |= sc->def->enable_value; 801 else { 802 if (sc->def->disable_value) 803 val |= sc->def->disable_value; 804 else 805 val &= ~sc->def->enable_value; 806 } 807 axp8xx_write(sc->base_dev, sc->def->enable_reg, val); 808 809 *udelay = 0; 810 811 return (0); 812 } 813 814 static void 815 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv) 816 { 817 if (val < sc->def->voltage_nstep1) 818 *uv = sc->def->voltage_min + val * sc->def->voltage_step1; 819 else 820 *uv = sc->def->voltage_min + 821 (sc->def->voltage_nstep1 * sc->def->voltage_step1) + 822 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2); 823 *uv *= 1000; 824 } 825 826 static int 827 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt, 828 int max_uvolt, uint8_t *val) 829 { 830 uint8_t nval; 831 int nstep, uvolt; 832 833 nval = 0; 834 uvolt = sc->def->voltage_min * 1000; 835 836 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt; 837 nstep++) { 838 ++nval; 839 uvolt += (sc->def->voltage_step1 * 1000); 840 } 841 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt; 842 nstep++) { 843 ++nval; 844 uvolt += (sc->def->voltage_step2 * 1000); 845 } 846 if (uvolt > max_uvolt) 847 return (EINVAL); 848 849 *val = nval; 850 return (0); 851 } 852 853 static int 854 axp8xx_regnode_status(struct regnode *regnode, int *status) 855 { 856 struct axp8xx_reg_sc *sc; 857 uint8_t val; 858 859 sc = regnode_get_softc(regnode); 860 861 *status = 0; 862 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1); 863 if (val & sc->def->enable_mask) 864 *status = REGULATOR_STATUS_ENABLED; 865 866 return (0); 867 } 868 869 static int 870 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt, 871 int max_uvolt, int *udelay) 872 { 873 struct axp8xx_reg_sc *sc; 874 uint8_t val; 875 876 sc = regnode_get_softc(regnode); 877 878 if (bootverbose) 879 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n", 880 regnode_get_name(regnode), 881 sc->def->name, 882 min_uvolt, max_uvolt); 883 884 if (sc->def->voltage_step1 == 0) 885 return (ENXIO); 886 887 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0) 888 return (ERANGE); 889 890 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val); 891 892 *udelay = 0; 893 894 return (0); 895 } 896 897 static int 898 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt) 899 { 900 struct axp8xx_reg_sc *sc; 901 uint8_t val; 902 903 sc = regnode_get_softc(regnode); 904 905 if (!sc->def->voltage_step1 || !sc->def->voltage_step2) 906 return (ENXIO); 907 908 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1); 909 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt); 910 911 return (0); 912 } 913 914 static regnode_method_t axp8xx_regnode_methods[] = { 915 /* Regulator interface */ 916 REGNODEMETHOD(regnode_init, axp8xx_regnode_init), 917 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable), 918 REGNODEMETHOD(regnode_status, axp8xx_regnode_status), 919 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage), 920 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage), 921 REGNODEMETHOD(regnode_check_voltage, regnode_method_check_voltage), 922 REGNODEMETHOD_END 923 }; 924 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods, 925 sizeof(struct axp8xx_reg_sc), regnode_class); 926 927 static void 928 axp8xx_shutdown(void *devp, int howto) 929 { 930 device_t dev; 931 932 if ((howto & RB_POWEROFF) == 0) 933 return; 934 935 dev = devp; 936 937 if (bootverbose) 938 device_printf(dev, "Shutdown Axp8xx\n"); 939 940 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN); 941 } 942 943 static int 944 axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS) 945 { 946 device_t dev = arg1; 947 uint8_t data; 948 int val, error; 949 950 error = axp8xx_read(dev, AXP_CHARGERCTL1, &data, 1); 951 if (error != 0) 952 return (error); 953 954 if (bootverbose) 955 device_printf(dev, "Raw CHARGECTL1 val: 0x%0x\n", data); 956 val = (data & AXP_CHARGERCTL1_CMASK); 957 error = sysctl_handle_int(oidp, &val, 0, req); 958 if (error || !req->newptr) /* error || read request */ 959 return (error); 960 961 if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX)) 962 return (EINVAL); 963 964 val |= (data & (AXP_CHARGERCTL1_CMASK << 4)); 965 axp8xx_write(dev, AXP_CHARGERCTL1, val); 966 967 return (0); 968 } 969 970 static int 971 axp8xx_sysctl(SYSCTL_HANDLER_ARGS) 972 { 973 struct axp8xx_softc *sc; 974 device_t dev = arg1; 975 enum axp8xx_sensor sensor = arg2; 976 const struct axp8xx_config *c; 977 uint8_t data; 978 int val, i, found, batt_val; 979 uint8_t lo, hi; 980 981 sc = device_get_softc(dev); 982 c = sc->config; 983 984 for (found = 0, i = 0; i < sc->nsensors; i++) { 985 if (sc->sensors[i].id == sensor) { 986 found = 1; 987 break; 988 } 989 } 990 991 if (found == 0) 992 return (ENOENT); 993 994 switch (sensor) { 995 case AXP_SENSOR_ACIN_PRESENT: 996 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 997 val = !!(data & AXP_POWERSRC_ACIN); 998 break; 999 case AXP_SENSOR_VBUS_PRESENT: 1000 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0) 1001 val = !!(data & AXP_POWERSRC_VBUS); 1002 break; 1003 case AXP_SENSOR_BATT_PRESENT: 1004 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) { 1005 if (data & AXP_POWERMODE_BAT_VALID) 1006 val = !!(data & AXP_POWERMODE_BAT_PRESENT); 1007 } 1008 break; 1009 case AXP_SENSOR_BATT_CHARGING: 1010 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) 1011 val = !!(data & AXP_POWERMODE_BAT_CHARGING); 1012 break; 1013 case AXP_SENSOR_BATT_CHARGE_STATE: 1014 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 1015 (data & AXP_BAT_CAP_VALID) != 0) { 1016 batt_val = (data & AXP_BAT_CAP_PERCENT); 1017 if (batt_val <= sc->shut_thres) 1018 val = BATT_CAPACITY_CRITICAL; 1019 else if (batt_val <= sc->warn_thres) 1020 val = BATT_CAPACITY_WARNING; 1021 else 1022 val = BATT_CAPACITY_NORMAL; 1023 } 1024 break; 1025 case AXP_SENSOR_BATT_CAPACITY_PERCENT: 1026 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 && 1027 (data & AXP_BAT_CAP_VALID) != 0) 1028 val = (data & AXP_BAT_CAP_PERCENT); 1029 break; 1030 case AXP_SENSOR_BATT_VOLTAGE: 1031 if (axp8xx_read(dev, AXP_BATSENSE_HI, &hi, 1) == 0 && 1032 axp8xx_read(dev, AXP_BATSENSE_LO, &lo, 1) == 0) { 1033 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1034 val *= c->batsense_step; 1035 } 1036 break; 1037 case AXP_SENSOR_BATT_CHARGE_CURRENT: 1038 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 1039 (data & AXP_POWERSRC_CHARING) != 0 && 1040 axp8xx_read(dev, AXP_BATCHG_HI, &hi, 1) == 0 && 1041 axp8xx_read(dev, AXP_BATCHG_LO, &lo, 1) == 0) { 1042 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1043 val *= c->charge_step; 1044 } 1045 break; 1046 case AXP_SENSOR_BATT_DISCHARGE_CURRENT: 1047 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 && 1048 (data & AXP_POWERSRC_CHARING) == 0 && 1049 axp8xx_read(dev, AXP_BATDISCHG_HI, &hi, 1) == 0 && 1050 axp8xx_read(dev, AXP_BATDISCHG_LO, &lo, 1) == 0) { 1051 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo)); 1052 val *= c->discharge_step; 1053 } 1054 break; 1055 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY: 1056 if (axp8xx_read(dev, AXP_BAT_MAX_CAP_HI, &hi, 1) == 0 && 1057 axp8xx_read(dev, AXP_BAT_MAX_CAP_LO, &lo, 1) == 0) { 1058 val = AXP_SENSOR_COULOMB(hi, lo); 1059 val *= c->maxcap_step; 1060 } 1061 break; 1062 case AXP_SENSOR_BATT_CURRENT_CAPACITY: 1063 if (axp8xx_read(dev, AXP_BAT_COULOMB_HI, &hi, 1) == 0 && 1064 axp8xx_read(dev, AXP_BAT_COULOMB_LO, &lo, 1) == 0) { 1065 val = AXP_SENSOR_COULOMB(hi, lo); 1066 val *= c->coulomb_step; 1067 } 1068 break; 1069 } 1070 1071 return sysctl_handle_opaque(oidp, &val, sizeof(val), req); 1072 } 1073 1074 static void 1075 axp8xx_intr(void *arg) 1076 { 1077 device_t dev; 1078 uint8_t val; 1079 int error; 1080 1081 dev = arg; 1082 1083 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1); 1084 if (error != 0) 1085 return; 1086 1087 if (val) { 1088 if (bootverbose) 1089 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val); 1090 if (val & AXP_IRQSTAT1_ACIN_HI) 1091 devctl_notify("PMU", "AC", "plugged", NULL); 1092 if (val & AXP_IRQSTAT1_ACIN_LO) 1093 devctl_notify("PMU", "AC", "unplugged", NULL); 1094 if (val & AXP_IRQSTAT1_VBUS_HI) 1095 devctl_notify("PMU", "USB", "plugged", NULL); 1096 if (val & AXP_IRQSTAT1_VBUS_LO) 1097 devctl_notify("PMU", "USB", "unplugged", NULL); 1098 /* Acknowledge */ 1099 axp8xx_write(dev, AXP_IRQSTAT1, val); 1100 } 1101 1102 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1); 1103 if (error != 0) 1104 return; 1105 1106 if (val) { 1107 if (bootverbose) 1108 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val); 1109 if (val & AXP_IRQSTAT2_BATCHGD) 1110 devctl_notify("PMU", "Battery", "charged", NULL); 1111 if (val & AXP_IRQSTAT2_BATCHGC) 1112 devctl_notify("PMU", "Battery", "charging", NULL); 1113 if (val & AXP_IRQSTAT2_BAT_NO) 1114 devctl_notify("PMU", "Battery", "absent", NULL); 1115 if (val & AXP_IRQSTAT2_BAT_IN) 1116 devctl_notify("PMU", "Battery", "plugged", NULL); 1117 /* Acknowledge */ 1118 axp8xx_write(dev, AXP_IRQSTAT2, val); 1119 } 1120 1121 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1); 1122 if (error != 0) 1123 return; 1124 1125 if (val) { 1126 /* Acknowledge */ 1127 axp8xx_write(dev, AXP_IRQSTAT3, val); 1128 } 1129 1130 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1); 1131 if (error != 0) 1132 return; 1133 1134 if (val) { 1135 if (bootverbose) 1136 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val); 1137 if (val & AXP_IRQSTAT4_BATLVL_LO0) 1138 devctl_notify("PMU", "Battery", "shutdown-threshold", NULL); 1139 if (val & AXP_IRQSTAT4_BATLVL_LO1) 1140 devctl_notify("PMU", "Battery", "warning-threshold", NULL); 1141 /* Acknowledge */ 1142 axp8xx_write(dev, AXP_IRQSTAT4, val); 1143 } 1144 1145 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1); 1146 if (error != 0) 1147 return; 1148 1149 if (val != 0) { 1150 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) { 1151 if (bootverbose) 1152 device_printf(dev, "Power button pressed\n"); 1153 shutdown_nice(RB_POWEROFF); 1154 } 1155 /* Acknowledge */ 1156 axp8xx_write(dev, AXP_IRQSTAT5, val); 1157 } 1158 1159 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1); 1160 if (error != 0) 1161 return; 1162 1163 if (val) { 1164 /* Acknowledge */ 1165 axp8xx_write(dev, AXP_IRQSTAT6, val); 1166 } 1167 } 1168 1169 static device_t 1170 axp8xx_gpio_get_bus(device_t dev) 1171 { 1172 struct axp8xx_softc *sc; 1173 1174 sc = device_get_softc(dev); 1175 1176 return (sc->gpiodev); 1177 } 1178 1179 static int 1180 axp8xx_gpio_pin_max(device_t dev, int *maxpin) 1181 { 1182 *maxpin = nitems(axp8xx_pins) - 1; 1183 1184 return (0); 1185 } 1186 1187 static int 1188 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 1189 { 1190 if (pin >= nitems(axp8xx_pins)) 1191 return (EINVAL); 1192 1193 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name); 1194 1195 return (0); 1196 } 1197 1198 static int 1199 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 1200 { 1201 if (pin >= nitems(axp8xx_pins)) 1202 return (EINVAL); 1203 1204 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT; 1205 1206 return (0); 1207 } 1208 1209 static int 1210 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 1211 { 1212 struct axp8xx_softc *sc; 1213 uint8_t data, func; 1214 int error; 1215 1216 if (pin >= nitems(axp8xx_pins)) 1217 return (EINVAL); 1218 1219 sc = device_get_softc(dev); 1220 1221 AXP_LOCK(sc); 1222 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1223 if (error == 0) { 1224 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1225 if (func == AXP_GPIO_FUNC_INPUT) 1226 *flags = GPIO_PIN_INPUT; 1227 else if (func == AXP_GPIO_FUNC_DRVLO || 1228 func == AXP_GPIO_FUNC_DRVHI) 1229 *flags = GPIO_PIN_OUTPUT; 1230 else 1231 *flags = 0; 1232 } 1233 AXP_UNLOCK(sc); 1234 1235 return (error); 1236 } 1237 1238 static int 1239 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 1240 { 1241 struct axp8xx_softc *sc; 1242 uint8_t data; 1243 int error; 1244 1245 if (pin >= nitems(axp8xx_pins)) 1246 return (EINVAL); 1247 1248 sc = device_get_softc(dev); 1249 1250 AXP_LOCK(sc); 1251 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1252 if (error == 0) { 1253 data &= ~AXP_GPIO_FUNC; 1254 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) { 1255 if ((flags & GPIO_PIN_OUTPUT) == 0) 1256 data |= AXP_GPIO_FUNC_INPUT; 1257 } 1258 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1259 } 1260 AXP_UNLOCK(sc); 1261 1262 return (error); 1263 } 1264 1265 static int 1266 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 1267 { 1268 struct axp8xx_softc *sc; 1269 uint8_t data, func; 1270 int error; 1271 1272 if (pin >= nitems(axp8xx_pins)) 1273 return (EINVAL); 1274 1275 sc = device_get_softc(dev); 1276 1277 AXP_LOCK(sc); 1278 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1279 if (error == 0) { 1280 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1281 switch (func) { 1282 case AXP_GPIO_FUNC_DRVLO: 1283 *val = 0; 1284 break; 1285 case AXP_GPIO_FUNC_DRVHI: 1286 *val = 1; 1287 break; 1288 case AXP_GPIO_FUNC_INPUT: 1289 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1); 1290 if (error == 0) 1291 *val = (data & (1 << pin)) ? 1 : 0; 1292 break; 1293 default: 1294 error = EIO; 1295 break; 1296 } 1297 } 1298 AXP_UNLOCK(sc); 1299 1300 return (error); 1301 } 1302 1303 static int 1304 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val) 1305 { 1306 struct axp8xx_softc *sc; 1307 uint8_t data, func; 1308 int error; 1309 1310 if (pin >= nitems(axp8xx_pins)) 1311 return (EINVAL); 1312 1313 sc = device_get_softc(dev); 1314 1315 AXP_LOCK(sc); 1316 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1317 if (error == 0) { 1318 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1319 switch (func) { 1320 case AXP_GPIO_FUNC_DRVLO: 1321 case AXP_GPIO_FUNC_DRVHI: 1322 data &= ~AXP_GPIO_FUNC; 1323 data |= (val << AXP_GPIO_FUNC_SHIFT); 1324 break; 1325 default: 1326 error = EIO; 1327 break; 1328 } 1329 } 1330 if (error == 0) 1331 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1332 AXP_UNLOCK(sc); 1333 1334 return (error); 1335 } 1336 1337 static int 1338 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin) 1339 { 1340 struct axp8xx_softc *sc; 1341 uint8_t data, func; 1342 int error; 1343 1344 if (pin >= nitems(axp8xx_pins)) 1345 return (EINVAL); 1346 1347 sc = device_get_softc(dev); 1348 1349 AXP_LOCK(sc); 1350 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1); 1351 if (error == 0) { 1352 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT; 1353 switch (func) { 1354 case AXP_GPIO_FUNC_DRVLO: 1355 data &= ~AXP_GPIO_FUNC; 1356 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT); 1357 break; 1358 case AXP_GPIO_FUNC_DRVHI: 1359 data &= ~AXP_GPIO_FUNC; 1360 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT); 1361 break; 1362 default: 1363 error = EIO; 1364 break; 1365 } 1366 } 1367 if (error == 0) 1368 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data); 1369 AXP_UNLOCK(sc); 1370 1371 return (error); 1372 } 1373 1374 static int 1375 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, 1376 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags) 1377 { 1378 if (gpios[0] >= nitems(axp8xx_pins)) 1379 return (EINVAL); 1380 1381 *pin = gpios[0]; 1382 *flags = gpios[1]; 1383 1384 return (0); 1385 } 1386 1387 static phandle_t 1388 axp8xx_get_node(device_t dev, device_t bus) 1389 { 1390 return (ofw_bus_get_node(dev)); 1391 } 1392 1393 static struct axp8xx_reg_sc * 1394 axp8xx_reg_attach(device_t dev, phandle_t node, 1395 struct axp8xx_regdef *def) 1396 { 1397 struct axp8xx_reg_sc *reg_sc; 1398 struct regnode_init_def initdef; 1399 struct regnode *regnode; 1400 1401 memset(&initdef, 0, sizeof(initdef)); 1402 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0) 1403 return (NULL); 1404 if (initdef.std_param.min_uvolt == 0) 1405 initdef.std_param.min_uvolt = def->voltage_min * 1000; 1406 if (initdef.std_param.max_uvolt == 0) 1407 initdef.std_param.max_uvolt = def->voltage_max * 1000; 1408 initdef.id = def->id; 1409 initdef.ofw_node = node; 1410 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef); 1411 if (regnode == NULL) { 1412 device_printf(dev, "cannot create regulator\n"); 1413 return (NULL); 1414 } 1415 1416 reg_sc = regnode_get_softc(regnode); 1417 reg_sc->regnode = regnode; 1418 reg_sc->base_dev = dev; 1419 reg_sc->def = def; 1420 reg_sc->xref = OF_xref_from_node(node); 1421 reg_sc->param = regnode_get_stdparam(regnode); 1422 1423 regnode_register(regnode); 1424 1425 return (reg_sc); 1426 } 1427 1428 static int 1429 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells, 1430 intptr_t *num) 1431 { 1432 struct axp8xx_softc *sc; 1433 int i; 1434 1435 sc = device_get_softc(dev); 1436 for (i = 0; i < sc->nregs; i++) { 1437 if (sc->regs[i] == NULL) 1438 continue; 1439 if (sc->regs[i]->xref == xref) { 1440 *num = sc->regs[i]->def->id; 1441 return (0); 1442 } 1443 } 1444 1445 return (ENXIO); 1446 } 1447 1448 static int 1449 axp8xx_probe(device_t dev) 1450 { 1451 if (!ofw_bus_status_okay(dev)) 1452 return (ENXIO); 1453 1454 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) 1455 { 1456 case AXP803: 1457 device_set_desc(dev, "X-Powers AXP803 Power Management Unit"); 1458 break; 1459 case AXP813: 1460 device_set_desc(dev, "X-Powers AXP813 Power Management Unit"); 1461 break; 1462 default: 1463 return (ENXIO); 1464 } 1465 1466 return (BUS_PROBE_DEFAULT); 1467 } 1468 1469 static int 1470 axp8xx_attach(device_t dev) 1471 { 1472 struct axp8xx_softc *sc; 1473 struct axp8xx_reg_sc *reg; 1474 uint8_t chip_id, val; 1475 phandle_t rnode, child; 1476 int error, i; 1477 1478 sc = device_get_softc(dev); 1479 1480 sc->addr = iicbus_get_addr(dev); 1481 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1482 1483 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res); 1484 if (error != 0) { 1485 device_printf(dev, "cannot allocate resources for device\n"); 1486 return (error); 1487 } 1488 1489 if (bootverbose) { 1490 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1); 1491 device_printf(dev, "chip ID 0x%02x\n", chip_id); 1492 } 1493 1494 sc->nregs = nitems(axp8xx_common_regdefs); 1495 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data; 1496 switch (sc->type) { 1497 case AXP803: 1498 sc->nregs += nitems(axp803_regdefs); 1499 break; 1500 case AXP813: 1501 sc->nregs += nitems(axp813_regdefs); 1502 break; 1503 } 1504 sc->config = &axp803_config; 1505 sc->sensors = axp8xx_common_sensors; 1506 sc->nsensors = nitems(axp8xx_common_sensors); 1507 1508 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs, 1509 M_AXP8XX_REG, M_WAITOK | M_ZERO); 1510 1511 /* Attach known regulators that exist in the DT */ 1512 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators"); 1513 if (rnode > 0) { 1514 for (i = 0; i < sc->nregs; i++) { 1515 char *regname; 1516 struct axp8xx_regdef *regdef; 1517 1518 if (i <= nitems(axp8xx_common_regdefs)) { 1519 regname = axp8xx_common_regdefs[i].name; 1520 regdef = &axp8xx_common_regdefs[i]; 1521 } else { 1522 int off; 1523 1524 off = i - nitems(axp8xx_common_regdefs); 1525 switch (sc->type) { 1526 case AXP803: 1527 regname = axp803_regdefs[off].name; 1528 regdef = &axp803_regdefs[off]; 1529 break; 1530 case AXP813: 1531 regname = axp813_regdefs[off].name; 1532 regdef = &axp813_regdefs[off]; 1533 break; 1534 } 1535 } 1536 child = ofw_bus_find_child(rnode, 1537 regname); 1538 if (child == 0) 1539 continue; 1540 reg = axp8xx_reg_attach(dev, child, 1541 regdef); 1542 if (reg == NULL) { 1543 device_printf(dev, 1544 "cannot attach regulator %s\n", 1545 regname); 1546 continue; 1547 } 1548 sc->regs[i] = reg; 1549 } 1550 } 1551 1552 /* Add sensors */ 1553 for (i = 0; i < sc->nsensors; i++) { 1554 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1555 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1556 OID_AUTO, sc->sensors[i].name, 1557 CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 1558 dev, sc->sensors[i].id, axp8xx_sysctl, 1559 sc->sensors[i].format, 1560 sc->sensors[i].desc); 1561 } 1562 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 1563 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 1564 OID_AUTO, "batchargecurrentstep", 1565 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, 1566 dev, 0, axp8xx_sysctl_chargecurrent, 1567 "I", "Battery Charging Current Step, " 1568 "0: 200mA, 1: 400mA, 2: 600mA, 3: 800mA, " 1569 "4: 1000mA, 5: 1200mA, 6: 1400mA, 7: 1600mA, " 1570 "8: 1800mA, 9: 2000mA, 10: 2200mA, 11: 2400mA, " 1571 "12: 2600mA, 13: 2800mA"); 1572 1573 /* Get thresholds */ 1574 if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) { 1575 sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4; 1576 sc->warn_thres += AXP_BAP_CAP_WARN_LV1BASE; 1577 sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2); 1578 if (bootverbose) { 1579 device_printf(dev, 1580 "Raw reg val: 0x%02x\n", val); 1581 device_printf(dev, 1582 "Warning threshold: 0x%02x\n", sc->warn_thres); 1583 device_printf(dev, 1584 "Shutdown threshold: 0x%02x\n", sc->shut_thres); 1585 } 1586 } 1587 1588 /* Enable interrupts */ 1589 axp8xx_write(dev, AXP_IRQEN1, 1590 AXP_IRQEN1_VBUS_LO | 1591 AXP_IRQEN1_VBUS_HI | 1592 AXP_IRQEN1_ACIN_LO | 1593 AXP_IRQEN1_ACIN_HI); 1594 axp8xx_write(dev, AXP_IRQEN2, 1595 AXP_IRQEN2_BATCHGD | 1596 AXP_IRQEN2_BATCHGC | 1597 AXP_IRQEN2_BAT_NO | 1598 AXP_IRQEN2_BAT_IN); 1599 axp8xx_write(dev, AXP_IRQEN3, 0); 1600 axp8xx_write(dev, AXP_IRQEN4, 1601 AXP_IRQEN4_BATLVL_LO0 | 1602 AXP_IRQEN4_BATLVL_LO1); 1603 axp8xx_write(dev, AXP_IRQEN5, 1604 AXP_IRQEN5_POKSIRQ | 1605 AXP_IRQEN5_POKLIRQ); 1606 axp8xx_write(dev, AXP_IRQEN6, 0); 1607 1608 /* Install interrupt handler */ 1609 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE, 1610 NULL, axp8xx_intr, dev, &sc->ih); 1611 if (error != 0) { 1612 device_printf(dev, "cannot setup interrupt handler\n"); 1613 return (error); 1614 } 1615 1616 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev, 1617 SHUTDOWN_PRI_LAST); 1618 1619 sc->gpiodev = gpiobus_attach_bus(dev); 1620 1621 return (0); 1622 } 1623 1624 static device_method_t axp8xx_methods[] = { 1625 /* Device interface */ 1626 DEVMETHOD(device_probe, axp8xx_probe), 1627 DEVMETHOD(device_attach, axp8xx_attach), 1628 1629 /* GPIO interface */ 1630 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus), 1631 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max), 1632 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname), 1633 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps), 1634 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags), 1635 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags), 1636 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get), 1637 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set), 1638 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle), 1639 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios), 1640 1641 /* Regdev interface */ 1642 DEVMETHOD(regdev_map, axp8xx_regdev_map), 1643 1644 /* OFW bus interface */ 1645 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node), 1646 1647 DEVMETHOD_END 1648 }; 1649 1650 static driver_t axp8xx_driver = { 1651 "axp8xx_pmu", 1652 axp8xx_methods, 1653 sizeof(struct axp8xx_softc), 1654 }; 1655 1656 static devclass_t axp8xx_devclass; 1657 extern devclass_t ofwgpiobus_devclass, gpioc_devclass; 1658 extern driver_t ofw_gpiobus_driver, gpioc_driver; 1659 1660 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, axp8xx_devclass, 0, 0, 1661 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1662 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver, 1663 ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST); 1664 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, gpioc_devclass, 0, 0); 1665 MODULE_VERSION(axp8xx, 1); 1666 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1); 1667 SIMPLEBUS_PNP_INFO(compat_data);
Cache object: 50a56e1223021dd8d6a081c59884d980
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