1 /*-
2 * Copyright (c) 2012 Ganbold Tsagaankhuu <ganbold@gmail.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 /* Simple UART console driver for Allwinner A10 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD: releng/10.0/sys/arm/allwinner/console.c 245500 2013-01-16 08:04:55Z ganbold $");
31
32 #include <sys/types.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/cons.h>
36 #include <sys/consio.h>
37 #include <sys/kernel.h>
38
39 #ifndef A10_UART_BASE
40 #define A10_UART_BASE 0xe1c28000 /* UART0 */
41 #endif
42
43 #define REG_SHIFT 2
44
45 #define UART_DLL 0 /* Out: Divisor Latch Low */
46 #define UART_DLM 1 /* Out: Divisor Latch High */
47 #define UART_FCR 2 /* Out: FIFO Control Register */
48 #define UART_LCR 3 /* Out: Line Control Register */
49 #define UART_MCR 4 /* Out: Modem Control Register */
50 #define UART_LSR 5 /* In: Line Status Register */
51 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
52 #define UART_LSR_DR 0x01 /* Receiver data ready */
53 #define UART_MSR 6 /* In: Modem Status Register */
54 #define UART_SCR 7 /* I/O: Scratch Register */
55
56 static uint32_t
57 uart_getreg(uint32_t *bas)
58 {
59 return *((volatile uint32_t *)(bas)) & 0xff;
60 }
61
62 static void
63 uart_setreg(uint32_t *bas, uint32_t val)
64 {
65 *((volatile uint32_t *)(bas)) = val;
66 }
67
68 static int
69 ub_getc(void)
70 {
71 while ((uart_getreg((uint32_t *)(A10_UART_BASE +
72 (UART_LSR << REG_SHIFT))) & UART_LSR_DR) == 0);
73 __asm __volatile("nop");
74
75 return (uart_getreg((uint32_t *)A10_UART_BASE) & 0xff);
76 }
77
78 static void
79 ub_putc(unsigned char c)
80 {
81 if (c == '\n')
82 ub_putc('\r');
83
84 while ((uart_getreg((uint32_t *)(A10_UART_BASE +
85 (UART_LSR << REG_SHIFT))) & UART_LSR_THRE) == 0)
86 __asm __volatile("nop");
87
88 uart_setreg((uint32_t *)A10_UART_BASE, c);
89 }
90
91 static cn_probe_t uart_cnprobe;
92 static cn_init_t uart_cninit;
93 static cn_term_t uart_cnterm;
94 static cn_getc_t uart_cngetc;
95 static cn_putc_t uart_cnputc;
96 static cn_grab_t uart_cngrab;
97 static cn_ungrab_t uart_cnungrab;
98
99 static void
100 uart_cngrab(struct consdev *cp)
101 {
102 }
103
104 static void
105 uart_cnungrab(struct consdev *cp)
106 {
107 }
108
109
110 static void
111 uart_cnprobe(struct consdev *cp)
112 {
113 sprintf(cp->cn_name, "uart");
114 cp->cn_pri = CN_NORMAL;
115 }
116
117 static void
118 uart_cninit(struct consdev *cp)
119 {
120 uart_setreg((uint32_t *)(A10_UART_BASE +
121 (UART_FCR << REG_SHIFT)), 0x06);
122 }
123
124 void
125 uart_cnputc(struct consdev *cp, int c)
126 {
127 ub_putc(c);
128 }
129
130 int
131 uart_cngetc(struct consdev * cp)
132 {
133 return ub_getc();
134 }
135
136 static void
137 uart_cnterm(struct consdev * cp)
138 {
139 }
140
141 CONSOLE_DRIVER(uart);
142
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