alpine_pci.c

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    1 /*-
    2  * Copyright (c) 2015,2016 Annapurna Labs Ltd. and affiliates
    3  * All rights reserved.
    4  *
    5  * Developed by Semihalf.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 /*
   30  * Alpine PCI/PCI-Express controller driver.
   31  */
   32 
   33 #include <sys/cdefs.h>
   34 __FBSDID("$FreeBSD$");
   35 
   36 #include <sys/param.h>
   37 #include <sys/systm.h>
   38 #include <sys/kernel.h>
   39 #include <sys/module.h>
   40 #include <sys/bus.h>
   41 #include <sys/rman.h>
   42 #include <sys/intr.h>
   43 
   44 #include <dev/ofw/openfirm.h>
   45 #include <dev/ofw/ofw_bus.h>
   46 #include <dev/ofw/ofw_bus_subr.h>
   47 #include <dev/pci/pci_host_generic.h>
   48 #include <dev/pci/pci_host_generic_fdt.h>
   49 #include <dev/pci/pcivar.h>
   50 #include <dev/pci/pcireg.h>
   51 
   52 #include "pcib_if.h"
   53 
   54 #include "contrib/alpine-hal/al_hal_unit_adapter_regs.h"
   55 #include "contrib/alpine-hal/al_hal_pcie.h"
   56 #include "contrib/alpine-hal/al_hal_pcie_axi_reg.h"
   57 
   58 #define ANNAPURNA_VENDOR_ID             0x1c36
   59 
   60 /* Forward prototypes */
   61 static int al_pcib_probe(device_t);
   62 static int al_pcib_attach(device_t);
   63 static void al_pcib_fixup(device_t);
   64 
   65 static struct ofw_compat_data compat_data[] = {
   66         {"annapurna-labs,al-internal-pcie",     true},
   67         {"annapurna-labs,alpine-internal-pcie", true},
   68         {NULL,                                  false}
   69 };
   70 
   71 /*
   72  * Bus interface definitions.
   73  */
   74 static device_method_t al_pcib_methods[] = {
   75         /* Device interface */
   76         DEVMETHOD(device_probe,                 al_pcib_probe),
   77         DEVMETHOD(device_attach,                al_pcib_attach),
   78 
   79         DEVMETHOD_END
   80 };
   81 
   82 DEFINE_CLASS_1(pcib, al_pcib_driver, al_pcib_methods,
   83     sizeof(struct generic_pcie_fdt_softc), generic_pcie_fdt_driver);
   84 
   85 DRIVER_MODULE(alpine_pcib, simplebus, al_pcib_driver, 0, 0);
   86 DRIVER_MODULE(alpine_pcib, ofwbus, al_pcib_driver, 0, 0);
   87 
   88 static int
   89 al_pcib_probe(device_t dev)
   90 {
   91 
   92         if (!ofw_bus_status_okay(dev))
   93                 return (ENXIO);
   94 
   95         if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
   96                 return (ENXIO);
   97 
   98         device_set_desc(dev,
   99             "Annapurna-Labs Integrated Internal PCI-E Controller");
  100         return (BUS_PROBE_DEFAULT);
  101 }
  102 
  103 static int
  104 al_pcib_attach(device_t dev)
  105 {
  106         int rv;
  107 
  108         rv = pci_host_generic_fdt_attach(dev);
  109 
  110         /* Annapurna quirk: configure vendor-specific registers */
  111         if (rv == 0)
  112                 al_pcib_fixup(dev);
  113 
  114         return (rv);
  115 }
  116 
  117 static void
  118 al_pcib_fixup(device_t dev)
  119 {
  120         uint32_t val;
  121         uint16_t vid;
  122         uint8_t hdrtype;
  123         int bus, slot, func, maxfunc;
  124 
  125         /* Fixup is only needed on bus 0 */
  126         bus = 0;
  127         for (slot = 0; slot <= PCI_SLOTMAX; slot++) {
  128                 maxfunc = 0;
  129                 for (func = 0; func <= maxfunc; func++) {
  130                         hdrtype = PCIB_READ_CONFIG(dev, bus, slot, func,
  131                             PCIR_HDRTYPE, 1);
  132 
  133                         if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
  134                                 continue;
  135 
  136                         if (func == 0 && (hdrtype & PCIM_MFDEV) != 0)
  137                                 maxfunc = PCI_FUNCMAX;
  138 
  139                         vid = PCIB_READ_CONFIG(dev, bus, slot, func,
  140                             PCIR_VENDOR, 2);
  141                         if (vid == ANNAPURNA_VENDOR_ID) {
  142                                 val = PCIB_READ_CONFIG(dev, bus, slot, func,
  143                                     AL_PCI_AXI_CFG_AND_CTR_0, 4);
  144                                 val |= PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_PH_VEC_OVRD_FROM_AXUSER_MASK;
  145                                 PCIB_WRITE_CONFIG(dev, bus, slot, func,
  146                                     AL_PCI_AXI_CFG_AND_CTR_0, val, 4);
  147 
  148                                 val = PCIB_READ_CONFIG(dev, bus, slot, func,
  149                                     AL_PCI_APP_CONTROL, 4);
  150                                 val &= ~0xffff;
  151                                 val |= PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_4_PF_VEC_MEM_ADDR54_63_SEL_TGTID_MASK;
  152                                 PCIB_WRITE_CONFIG(dev, bus, slot, func,
  153                                     AL_PCI_APP_CONTROL, val, 4);
  154                         }
  155                 }
  156         }
  157 }

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FreeBSD/Linux Kernel Cross Reference sys/arm/annapurna/alpine/alpine_pci.c

FreeBSD/Linux Kernel Cross Reference
sys/arm/annapurna/alpine/alpine_pci.c