Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/arm/arm/bus_space_asm_generic.S
Version:
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1 /* $NetBSD: bus_space_asm_generic.S,v 1.3 2003/03/27 19:46:14 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1997 Causality Limited. 5 * Copyright (c) 1997 Mark Brinicombe. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Mark Brinicombe 19 * for the NetBSD Project. 20 * 4. The name of the company nor the name of the author may be used to 21 * endorse or promote products derived from this software without specific 22 * prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 */ 37 38 #include <machine/asm.h> 39 #include <machine/cpuconf.h> 40 __FBSDID("$FreeBSD$"); 41 42 /* 43 * Generic bus_space functions. 44 */ 45 46 /* 47 * read single 48 */ 49 50 ENTRY(generic_bs_r_1) 51 ldrb r0, [r1, r2] 52 RET 53 END(generic_bs_r_1) 54 55 ENTRY(generic_bs_r_2) 56 ldrh r0, [r1, r2] 57 RET 58 END(generic_bs_r_2) 59 60 ENTRY(generic_bs_r_4) 61 ldr r0, [r1, r2] 62 RET 63 END(generic_bs_r_4) 64 65 /* 66 * write single 67 */ 68 69 ENTRY(generic_bs_w_1) 70 strb r3, [r1, r2] 71 RET 72 END(generic_bs_w_1) 73 74 ENTRY(generic_bs_w_2) 75 strh r3, [r1, r2] 76 RET 77 END(generic_bs_w_2) 78 79 ENTRY(generic_bs_w_4) 80 str r3, [r1, r2] 81 RET 82 END(generic_bs_w_4) 83 84 /* 85 * read multiple 86 */ 87 88 ENTRY(generic_bs_rm_1) 89 add r0, r1, r2 90 mov r1, r3 91 ldr r2, [sp, #0] 92 teq r2, #0 93 RETeq 94 95 1: ldrb r3, [r0] 96 strb r3, [r1], #1 97 subs r2, r2, #1 98 bne 1b 99 100 RET 101 END(generic_bs_rm_1) 102 103 ENTRY(generic_bs_rm_2) 104 add r0, r1, r2 105 mov r1, r3 106 ldr r2, [sp, #0] 107 teq r2, #0 108 RETeq 109 110 1: ldrh r3, [r0] 111 strh r3, [r1], #2 112 subs r2, r2, #1 113 bne 1b 114 115 RET 116 END(generic_bs_rm_2) 117 118 ENTRY(generic_bs_rm_4) 119 add r0, r1, r2 120 mov r1, r3 121 ldr r2, [sp, #0] 122 teq r2, #0 123 RETeq 124 125 1: ldr r3, [r0] 126 str r3, [r1], #4 127 subs r2, r2, #1 128 bne 1b 129 130 RET 131 END(generic_bs_rm_4) 132 133 /* 134 * write multiple 135 */ 136 137 ENTRY(generic_bs_wm_1) 138 add r0, r1, r2 139 mov r1, r3 140 ldr r2, [sp, #0] 141 teq r2, #0 142 RETeq 143 144 1: ldrb r3, [r1], #1 145 strb r3, [r0] 146 subs r2, r2, #1 147 bne 1b 148 149 RET 150 END(generic_bs_wm_1) 151 152 ENTRY(generic_bs_wm_2) 153 add r0, r1, r2 154 mov r1, r3 155 ldr r2, [sp, #0] 156 teq r2, #0 157 RETeq 158 159 1: ldrh r3, [r1], #2 160 strh r3, [r0] 161 subs r2, r2, #1 162 bne 1b 163 164 RET 165 END(generic_bs_wm_2) 166 167 ENTRY(generic_bs_wm_4) 168 add r0, r1, r2 169 mov r1, r3 170 ldr r2, [sp, #0] 171 teq r2, #0 172 RETeq 173 174 1: ldr r3, [r1], #4 175 str r3, [r0] 176 subs r2, r2, #1 177 bne 1b 178 179 RET 180 END(generic_bs_wm_4) 181 182 /* 183 * read region 184 */ 185 186 ENTRY(generic_bs_rr_1) 187 add r0, r1, r2 188 mov r1, r3 189 ldr r2, [sp, #0] 190 teq r2, #0 191 RETeq 192 193 1: ldrb r3, [r0], #1 194 strb r3, [r1], #1 195 subs r2, r2, #1 196 bne 1b 197 198 RET 199 END(generic_bs_rr_1) 200 201 ENTRY(generic_bs_rr_2) 202 add r0, r1, r2 203 mov r1, r3 204 ldr r2, [sp, #0] 205 teq r2, #0 206 RETeq 207 208 1: ldrh r3, [r0], #2 209 strh r3, [r1], #2 210 subs r2, r2, #1 211 bne 1b 212 213 RET 214 END(generic_bs_rr_2) 215 216 ENTRY(generic_bs_rr_4) 217 add r0, r1, r2 218 mov r1, r3 219 ldr r2, [sp, #0] 220 teq r2, #0 221 RETeq 222 223 1: ldr r3, [r0], #4 224 str r3, [r1], #4 225 subs r2, r2, #1 226 bne 1b 227 228 RET 229 END(generic_bs_rr_4) 230 231 /* 232 * write region. 233 */ 234 235 ENTRY(generic_bs_wr_1) 236 add r0, r1, r2 237 mov r1, r3 238 ldr r2, [sp, #0] 239 teq r2, #0 240 RETeq 241 242 1: ldrb r3, [r1], #1 243 strb r3, [r0], #1 244 subs r2, r2, #1 245 bne 1b 246 247 RET 248 END(generic_bs_wr_1) 249 250 ENTRY(generic_bs_wr_2) 251 add r0, r1, r2 252 mov r1, r3 253 ldr r2, [sp, #0] 254 teq r2, #0 255 RETeq 256 257 1: ldrh r3, [r1], #2 258 strh r3, [r0], #2 259 subs r2, r2, #1 260 bne 1b 261 262 RET 263 END(generic_bs_wr_2) 264 265 ENTRY(generic_bs_wr_4) 266 add r0, r1, r2 267 mov r1, r3 268 ldr r2, [sp, #0] 269 teq r2, #0 270 RETeq 271 272 1: ldr r3, [r1], #4 273 str r3, [r0], #4 274 subs r2, r2, #1 275 bne 1b 276 277 RET 278 END(generic_bs_wr_4) 279 280 /* 281 * set region 282 */ 283 284 ENTRY(generic_bs_sr_1) 285 add r0, r1, r2 286 mov r1, r3 287 ldr r2, [sp, #0] 288 teq r2, #0 289 RETeq 290 291 1: strb r1, [r0], #1 292 subs r2, r2, #1 293 bne 1b 294 295 RET 296 END(generic_bs_sr_1) 297 298 ENTRY(generic_bs_sr_2) 299 add r0, r1, r2 300 mov r1, r3 301 ldr r2, [sp, #0] 302 teq r2, #0 303 RETeq 304 305 1: strh r1, [r0], #2 306 subs r2, r2, #1 307 bne 1b 308 309 RET 310 END(generic_bs_sr_2) 311 312 ENTRY(generic_bs_sr_4) 313 add r0, r1, r2 314 mov r1, r3 315 ldr r2, [sp, #0] 316 teq r2, #0 317 RETeq 318 319 1: str r1, [r0], #4 320 subs r2, r2, #1 321 bne 1b 322 323 RET 324 END(generic_bs_sr_4) 325 326 /* 327 * copy region 328 */ 329 330 ENTRY(generic_bs_c_2) 331 add r0, r1, r2 332 ldr r2, [sp, #0] 333 add r1, r2, r3 334 ldr r2, [sp, #4] 335 teq r2, #0 336 RETeq 337 338 cmp r0, r1 339 blt 2f 340 341 1: ldrh r3, [r0], #2 342 strh r3, [r1], #2 343 subs r2, r2, #1 344 bne 1b 345 346 RET 347 348 2: add r0, r0, r2, lsl #1 349 add r1, r1, r2, lsl #1 350 sub r0, r0, #2 351 sub r1, r1, #2 352 353 3: ldrh r3, [r0], #-2 354 strh r3, [r1], #-2 355 subs r2, r2, #1 356 bne 3b 357 358 RET 359 END(generic_bs_c_2) 360
Cache object: 9556a606a47ff65d2abf55f1b5290a2a
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