The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/arm/bus_space_asm_generic.S

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    1 /*      $NetBSD: bus_space_asm_generic.S,v 1.3 2003/03/27 19:46:14 mycroft Exp $        */
    2 
    3 /*-
    4  * Copyright (c) 1997 Causality Limited.
    5  * Copyright (c) 1997 Mark Brinicombe.
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. All advertising materials mentioning features or use of this software
   17  *    must display the following acknowledgement:
   18  *      This product includes software developed by Mark Brinicombe
   19  *      for the NetBSD Project.
   20  * 4. The name of the company nor the name of the author may be used to
   21  *    endorse or promote products derived from this software without specific
   22  *    prior written permission.
   23  *
   24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
   25  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   26  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   27  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   28  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   29  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   30  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   34  * SUCH DAMAGE.
   35  *
   36  */
   37 
   38 #include <machine/asm.h>
   39 __FBSDID("$FreeBSD$");
   40 
   41 /*
   42  * Generic bus_space functions.
   43  */
   44 
   45 /*
   46  * read single
   47  */
   48 
   49 ENTRY(generic_bs_r_1)
   50         ldrb    r0, [r1, r2]
   51         RET
   52 END(generic_bs_r_1)
   53 
   54 ENTRY(generic_bs_r_2)
   55         ldrh    r0, [r1, r2]
   56         RET
   57 END(generic_bs_r_2)
   58 
   59 ENTRY(generic_bs_r_4)
   60         ldr     r0, [r1, r2]
   61         RET
   62 END(generic_bs_r_4)
   63 
   64 /*
   65  * write single
   66  */
   67 
   68 ENTRY(generic_bs_w_1)
   69         strb    r3, [r1, r2]
   70         RET
   71 END(generic_bs_w_1)
   72 
   73 ENTRY(generic_bs_w_2)
   74         strh    r3, [r1, r2]
   75         RET
   76 END(generic_bs_w_2)
   77 
   78 ENTRY(generic_bs_w_4)
   79         str     r3, [r1, r2]
   80         RET
   81 END(generic_bs_w_4)
   82 
   83 /*
   84  * read multiple
   85  */
   86 
   87 ENTRY(generic_bs_rm_1)
   88         add     r0, r1, r2
   89         mov     r1, r3
   90         ldr     r2, [sp, #0]
   91         teq     r2, #0
   92         RETeq
   93 
   94 1:      ldrb    r3, [r0]
   95         strb    r3, [r1], #1
   96         subs    r2, r2, #1
   97         bne     1b
   98 
   99         RET
  100 END(generic_bs_rm_1)
  101 
  102 ENTRY(generic_bs_rm_2)
  103         add     r0, r1, r2
  104         mov     r1, r3
  105         ldr     r2, [sp, #0]
  106         teq     r2, #0
  107         RETeq
  108 
  109 1:      ldrh    r3, [r0]
  110         strh    r3, [r1], #2
  111         subs    r2, r2, #1
  112         bne     1b
  113 
  114         RET
  115 END(generic_bs_rm_2)
  116 
  117 ENTRY(generic_bs_rm_4)
  118         add     r0, r1, r2
  119         mov     r1, r3
  120         ldr     r2, [sp, #0]
  121         teq     r2, #0
  122         RETeq
  123 
  124 1:      ldr     r3, [r0]
  125         str     r3, [r1], #4
  126         subs    r2, r2, #1
  127         bne     1b
  128 
  129         RET
  130 END(generic_bs_rm_4)
  131 
  132 /*
  133  * write multiple
  134  */
  135 
  136 ENTRY(generic_bs_wm_1)
  137         add     r0, r1, r2
  138         mov     r1, r3
  139         ldr     r2, [sp, #0]
  140         teq     r2, #0
  141         RETeq
  142 
  143 1:      ldrb    r3, [r1], #1
  144         strb    r3, [r0]
  145         subs    r2, r2, #1
  146         bne     1b
  147 
  148         RET
  149 END(generic_bs_wm_1)
  150 
  151 ENTRY(generic_bs_wm_2)
  152         add     r0, r1, r2
  153         mov     r1, r3
  154         ldr     r2, [sp, #0]
  155         teq     r2, #0
  156         RETeq
  157 
  158 1:      ldrh    r3, [r1], #2
  159         strh    r3, [r0]
  160         subs    r2, r2, #1
  161         bne     1b
  162 
  163         RET
  164 END(generic_bs_wm_2)
  165 
  166 ENTRY(generic_bs_wm_4)
  167         add     r0, r1, r2
  168         mov     r1, r3
  169         ldr     r2, [sp, #0]
  170         teq     r2, #0
  171         RETeq
  172 
  173 1:      ldr     r3, [r1], #4
  174         str     r3, [r0]
  175         subs    r2, r2, #1
  176         bne     1b
  177 
  178         RET
  179 END(generic_bs_wm_4)
  180 
  181 /*
  182  * read region
  183  */
  184 
  185 ENTRY(generic_bs_rr_1)
  186         add     r0, r1, r2
  187         mov     r1, r3
  188         ldr     r2, [sp, #0]
  189         teq     r2, #0
  190         RETeq
  191 
  192 1:      ldrb    r3, [r0], #1
  193         strb    r3, [r1], #1
  194         subs    r2, r2, #1
  195         bne     1b
  196 
  197         RET
  198 END(generic_bs_rr_1)
  199 
  200 ENTRY(generic_bs_rr_2)
  201         add     r0, r1, r2
  202         mov     r1, r3
  203         ldr     r2, [sp, #0]
  204         teq     r2, #0
  205         RETeq
  206 
  207 1:      ldrh    r3, [r0], #2
  208         strh    r3, [r1], #2
  209         subs    r2, r2, #1
  210         bne     1b
  211 
  212         RET
  213 END(generic_bs_rr_2)
  214 
  215 ENTRY(generic_bs_rr_4)
  216         add     r0, r1, r2
  217         mov     r1, r3
  218         ldr     r2, [sp, #0]
  219         teq     r2, #0
  220         RETeq
  221 
  222 1:      ldr     r3, [r0], #4
  223         str     r3, [r1], #4
  224         subs    r2, r2, #1
  225         bne     1b
  226 
  227         RET
  228 END(generic_bs_rr_4)
  229 
  230 /*
  231  * write region.
  232  */
  233 
  234 ENTRY(generic_bs_wr_1)
  235         add     r0, r1, r2
  236         mov     r1, r3
  237         ldr     r2, [sp, #0]
  238         teq     r2, #0
  239         RETeq
  240 
  241 1:      ldrb    r3, [r1], #1
  242         strb    r3, [r0], #1
  243         subs    r2, r2, #1
  244         bne     1b
  245 
  246         RET
  247 END(generic_bs_wr_1)
  248 
  249 ENTRY(generic_bs_wr_2)
  250         add     r0, r1, r2
  251         mov     r1, r3
  252         ldr     r2, [sp, #0]
  253         teq     r2, #0
  254         RETeq
  255 
  256 1:      ldrh    r3, [r1], #2
  257         strh    r3, [r0], #2
  258         subs    r2, r2, #1
  259         bne     1b
  260 
  261         RET
  262 END(generic_bs_wr_2)
  263 
  264 ENTRY(generic_bs_wr_4)
  265         add     r0, r1, r2
  266         mov     r1, r3
  267         ldr     r2, [sp, #0]
  268         teq     r2, #0
  269         RETeq
  270 
  271 1:      ldr     r3, [r1], #4
  272         str     r3, [r0], #4
  273         subs    r2, r2, #1
  274         bne     1b
  275 
  276         RET
  277 END(generic_bs_wr_4)
  278 
  279 /*
  280  * set region
  281  */
  282 
  283 ENTRY(generic_bs_sr_1)
  284         add     r0, r1, r2
  285         mov     r1, r3
  286         ldr     r2, [sp, #0]
  287         teq     r2, #0
  288         RETeq
  289 
  290 1:      strb    r1, [r0], #1
  291         subs    r2, r2, #1
  292         bne     1b
  293 
  294         RET
  295 END(generic_bs_sr_1)
  296 
  297 ENTRY(generic_bs_sr_2)
  298         add     r0, r1, r2
  299         mov     r1, r3
  300         ldr     r2, [sp, #0]
  301         teq     r2, #0
  302         RETeq
  303 
  304 1:      strh    r1, [r0], #2
  305         subs    r2, r2, #1
  306         bne     1b
  307 
  308         RET
  309 END(generic_bs_sr_2)
  310 
  311 ENTRY(generic_bs_sr_4)
  312         add     r0, r1, r2
  313         mov     r1, r3
  314         ldr     r2, [sp, #0]
  315         teq     r2, #0
  316         RETeq
  317 
  318 1:      str     r1, [r0], #4
  319         subs    r2, r2, #1
  320         bne     1b
  321 
  322         RET
  323 END(generic_bs_sr_4)
  324 
  325 /*
  326  * copy region
  327  */
  328 
  329 ENTRY(generic_bs_c_2)
  330         add     r0, r1, r2
  331         ldr     r2, [sp, #0]
  332         add     r1, r2, r3
  333         ldr     r2, [sp, #4]
  334         teq     r2, #0
  335         RETeq
  336 
  337         cmp     r0, r1
  338         blt     2f
  339 
  340 1:      ldrh    r3, [r0], #2
  341         strh    r3, [r1], #2
  342         subs    r2, r2, #1
  343         bne     1b
  344 
  345         RET
  346 
  347 2:      add     r0, r0, r2, lsl #1
  348         add     r1, r1, r2, lsl #1
  349         sub     r0, r0, #2
  350         sub     r1, r1, #2
  351 
  352 3:      ldrh    r3, [r0], #-2
  353         strh    r3, [r1], #-2
  354         subs    r2, r2, #1
  355         bne     3b
  356 
  357         RET
  358 END(generic_bs_c_2)
  359 

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