1 /*-
2 * Copyright (c) 2004 Olivier Houchard
3 * Copyright (c) 2002 Peter Grehan
4 * Copyright (c) 1997, 1998 Justin T. Gibbs.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification, immediately at the beginning of the file.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
29 */
30
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD: src/sys/arm/arm/busdma_machdep.c,v 1.40 2008/11/30 22:58:27 stas Exp $");
33
34 /*
35 * ARM bus dma support routines
36 */
37
38 #define _ARM32_BUS_DMA_PRIVATE
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/malloc.h>
42 #include <sys/bus.h>
43 #include <sys/interrupt.h>
44 #include <sys/lock.h>
45 #include <sys/proc.h>
46 #include <sys/mutex.h>
47 #include <sys/mbuf.h>
48 #include <sys/uio.h>
49 #include <sys/ktr.h>
50 #include <sys/kernel.h>
51 #include <sys/sysctl.h>
52
53 #include <vm/vm.h>
54 #include <vm/vm_page.h>
55 #include <vm/vm_map.h>
56
57 #include <machine/atomic.h>
58 #include <machine/bus.h>
59 #include <machine/cpufunc.h>
60 #include <machine/md_var.h>
61
62 #define MAX_BPAGES 64
63 #define BUS_DMA_COULD_BOUNCE BUS_DMA_BUS3
64 #define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4
65
66 struct bounce_zone;
67
68 struct bus_dma_tag {
69 bus_dma_tag_t parent;
70 bus_size_t alignment;
71 bus_size_t boundary;
72 bus_addr_t lowaddr;
73 bus_addr_t highaddr;
74 bus_dma_filter_t *filter;
75 void *filterarg;
76 bus_size_t maxsize;
77 u_int nsegments;
78 bus_size_t maxsegsz;
79 int flags;
80 int ref_count;
81 int map_count;
82 bus_dma_lock_t *lockfunc;
83 void *lockfuncarg;
84 /*
85 * DMA range for this tag. If the page doesn't fall within
86 * one of these ranges, an error is returned. The caller
87 * may then decide what to do with the transfer. If the
88 * range pointer is NULL, it is ignored.
89 */
90 struct arm32_dma_range *ranges;
91 int _nranges;
92 struct bounce_zone *bounce_zone;
93 };
94
95 struct bounce_page {
96 vm_offset_t vaddr; /* kva of bounce buffer */
97 vm_offset_t vaddr_nocache; /* kva of bounce buffer uncached */
98 bus_addr_t busaddr; /* Physical address */
99 vm_offset_t datavaddr; /* kva of client data */
100 bus_size_t datacount; /* client data count */
101 STAILQ_ENTRY(bounce_page) links;
102 };
103
104 int busdma_swi_pending;
105
106 struct bounce_zone {
107 STAILQ_ENTRY(bounce_zone) links;
108 STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
109 int total_bpages;
110 int free_bpages;
111 int reserved_bpages;
112 int active_bpages;
113 int total_bounced;
114 int total_deferred;
115 bus_size_t alignment;
116 bus_size_t boundary;
117 bus_addr_t lowaddr;
118 char zoneid[8];
119 char lowaddrid[20];
120 struct sysctl_ctx_list sysctl_tree;
121 struct sysctl_oid *sysctl_tree_top;
122 };
123
124 static struct mtx bounce_lock;
125 static int total_bpages;
126 static int busdma_zonecount;
127 static STAILQ_HEAD(, bounce_zone) bounce_zone_list;
128
129 SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters");
130 SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
131 "Total bounce pages");
132
133 #define DMAMAP_LINEAR 0x1
134 #define DMAMAP_MBUF 0x2
135 #define DMAMAP_UIO 0x4
136 #define DMAMAP_ALLOCATED 0x10
137 #define DMAMAP_TYPE_MASK (DMAMAP_LINEAR|DMAMAP_MBUF|DMAMAP_UIO)
138 #define DMAMAP_COHERENT 0x8
139 struct bus_dmamap {
140 struct bp_list bpages;
141 int pagesneeded;
142 int pagesreserved;
143 bus_dma_tag_t dmat;
144 int flags;
145 void *buffer;
146 void *origbuffer;
147 void *allocbuffer;
148 TAILQ_ENTRY(bus_dmamap) freelist;
149 int len;
150 STAILQ_ENTRY(bus_dmamap) links;
151 bus_dmamap_callback_t *callback;
152 void *callback_arg;
153
154 };
155
156 static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
157 static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
158
159 static TAILQ_HEAD(,bus_dmamap) dmamap_freelist =
160 TAILQ_HEAD_INITIALIZER(dmamap_freelist);
161
162 #define BUSDMA_STATIC_MAPS 500
163 static struct bus_dmamap map_pool[BUSDMA_STATIC_MAPS];
164
165 static struct mtx busdma_mtx;
166
167 MTX_SYSINIT(busdma_mtx, &busdma_mtx, "busdma lock", MTX_DEF);
168
169 static void init_bounce_pages(void *dummy);
170 static int alloc_bounce_zone(bus_dma_tag_t dmat);
171 static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
172 static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
173 int commit);
174 static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
175 vm_offset_t vaddr, bus_size_t size);
176 static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
177
178 /* Default tag, as most drivers provide no parent tag. */
179 bus_dma_tag_t arm_root_dma_tag;
180
181 /*
182 * Return true if a match is made.
183 *
184 * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
185 *
186 * If paddr is within the bounds of the dma tag then call the filter callback
187 * to check for a match, if there is no filter callback then assume a match.
188 */
189 static int
190 run_filter(bus_dma_tag_t dmat, bus_addr_t paddr)
191 {
192 int retval;
193
194 retval = 0;
195
196 do {
197 if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr)
198 || ((paddr & (dmat->alignment - 1)) != 0))
199 && (dmat->filter == NULL
200 || (*dmat->filter)(dmat->filterarg, paddr) != 0))
201 retval = 1;
202
203 dmat = dmat->parent;
204 } while (retval == 0 && dmat != NULL);
205 return (retval);
206 }
207
208 static void
209 arm_dmamap_freelist_init(void *dummy)
210 {
211 int i;
212
213 for (i = 0; i < BUSDMA_STATIC_MAPS; i++)
214 TAILQ_INSERT_HEAD(&dmamap_freelist, &map_pool[i], freelist);
215 }
216
217 SYSINIT(busdma, SI_SUB_VM, SI_ORDER_ANY, arm_dmamap_freelist_init, NULL);
218
219 /*
220 * Check to see if the specified page is in an allowed DMA range.
221 */
222
223 static __inline int
224 bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs,
225 bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap,
226 int flags, vm_offset_t *lastaddrp, int *segp);
227
228 static __inline int
229 _bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr)
230 {
231 int i;
232 for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) {
233 if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1])
234 || (lowaddr < phys_avail[i] &&
235 highaddr > phys_avail[i]))
236 return (1);
237 }
238 return (0);
239 }
240
241 static __inline struct arm32_dma_range *
242 _bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
243 bus_addr_t curaddr)
244 {
245 struct arm32_dma_range *dr;
246 int i;
247
248 for (i = 0, dr = ranges; i < nranges; i++, dr++) {
249 if (curaddr >= dr->dr_sysbase &&
250 round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
251 return (dr);
252 }
253
254 return (NULL);
255 }
256 /*
257 * Convenience function for manipulating driver locks from busdma (during
258 * busdma_swi, for example). Drivers that don't provide their own locks
259 * should specify &Giant to dmat->lockfuncarg. Drivers that use their own
260 * non-mutex locking scheme don't have to use this at all.
261 */
262 void
263 busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
264 {
265 struct mtx *dmtx;
266
267 dmtx = (struct mtx *)arg;
268 switch (op) {
269 case BUS_DMA_LOCK:
270 mtx_lock(dmtx);
271 break;
272 case BUS_DMA_UNLOCK:
273 mtx_unlock(dmtx);
274 break;
275 default:
276 panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
277 }
278 }
279
280 /*
281 * dflt_lock should never get called. It gets put into the dma tag when
282 * lockfunc == NULL, which is only valid if the maps that are associated
283 * with the tag are meant to never be defered.
284 * XXX Should have a way to identify which driver is responsible here.
285 */
286 static void
287 dflt_lock(void *arg, bus_dma_lock_op_t op)
288 {
289 #ifdef INVARIANTS
290 panic("driver error: busdma dflt_lock called");
291 #else
292 printf("DRIVER_ERROR: busdma dflt_lock called\n");
293 #endif
294 }
295
296 static __inline bus_dmamap_t
297 _busdma_alloc_dmamap(void)
298 {
299 bus_dmamap_t map;
300
301 mtx_lock(&busdma_mtx);
302 map = TAILQ_FIRST(&dmamap_freelist);
303 if (map)
304 TAILQ_REMOVE(&dmamap_freelist, map, freelist);
305 mtx_unlock(&busdma_mtx);
306 if (!map) {
307 map = malloc(sizeof(*map), M_DEVBUF, M_NOWAIT | M_ZERO);
308 if (map)
309 map->flags = DMAMAP_ALLOCATED;
310 } else
311 map->flags = 0;
312 STAILQ_INIT(&map->bpages);
313 return (map);
314 }
315
316 static __inline void
317 _busdma_free_dmamap(bus_dmamap_t map)
318 {
319 if (map->flags & DMAMAP_ALLOCATED)
320 free(map, M_DEVBUF);
321 else {
322 mtx_lock(&busdma_mtx);
323 TAILQ_INSERT_HEAD(&dmamap_freelist, map, freelist);
324 mtx_unlock(&busdma_mtx);
325 }
326 }
327
328 /*
329 * Allocate a device specific dma_tag.
330 */
331 #define SEG_NB 1024
332
333 int
334 bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
335 bus_size_t boundary, bus_addr_t lowaddr,
336 bus_addr_t highaddr, bus_dma_filter_t *filter,
337 void *filterarg, bus_size_t maxsize, int nsegments,
338 bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
339 void *lockfuncarg, bus_dma_tag_t *dmat)
340 {
341 bus_dma_tag_t newtag;
342 int error = 0;
343 /* Return a NULL tag on failure */
344 *dmat = NULL;
345 if (!parent)
346 parent = arm_root_dma_tag;
347
348 newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT);
349 if (newtag == NULL) {
350 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
351 __func__, newtag, 0, error);
352 return (ENOMEM);
353 }
354
355 newtag->parent = parent;
356 newtag->alignment = alignment;
357 newtag->boundary = boundary;
358 newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1);
359 newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1);
360 newtag->filter = filter;
361 newtag->filterarg = filterarg;
362 newtag->maxsize = maxsize;
363 newtag->nsegments = nsegments;
364 newtag->maxsegsz = maxsegsz;
365 newtag->flags = flags;
366 newtag->ref_count = 1; /* Count ourself */
367 newtag->map_count = 0;
368 newtag->ranges = bus_dma_get_range();
369 newtag->_nranges = bus_dma_get_range_nb();
370 if (lockfunc != NULL) {
371 newtag->lockfunc = lockfunc;
372 newtag->lockfuncarg = lockfuncarg;
373 } else {
374 newtag->lockfunc = dflt_lock;
375 newtag->lockfuncarg = NULL;
376 }
377 /*
378 * Take into account any restrictions imposed by our parent tag
379 */
380 if (parent != NULL) {
381 newtag->lowaddr = min(parent->lowaddr, newtag->lowaddr);
382 newtag->highaddr = max(parent->highaddr, newtag->highaddr);
383 if (newtag->boundary == 0)
384 newtag->boundary = parent->boundary;
385 else if (parent->boundary != 0)
386 newtag->boundary = min(parent->boundary,
387 newtag->boundary);
388 if ((newtag->filter != NULL) ||
389 ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0))
390 newtag->flags |= BUS_DMA_COULD_BOUNCE;
391 if (newtag->filter == NULL) {
392 /*
393 * Short circuit looking at our parent directly
394 * since we have encapsulated all of its information
395 */
396 newtag->filter = parent->filter;
397 newtag->filterarg = parent->filterarg;
398 newtag->parent = parent->parent;
399 }
400 if (newtag->parent != NULL)
401 atomic_add_int(&parent->ref_count, 1);
402 }
403 if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr)
404 || newtag->alignment > 1)
405 newtag->flags |= BUS_DMA_COULD_BOUNCE;
406
407 if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
408 (flags & BUS_DMA_ALLOCNOW) != 0) {
409 struct bounce_zone *bz;
410
411 /* Must bounce */
412
413 if ((error = alloc_bounce_zone(newtag)) != 0) {
414 free(newtag, M_DEVBUF);
415 return (error);
416 }
417 bz = newtag->bounce_zone;
418
419 if (ptoa(bz->total_bpages) < maxsize) {
420 int pages;
421
422 pages = atop(maxsize) - bz->total_bpages;
423
424 /* Add pages to our bounce pool */
425 if (alloc_bounce_pages(newtag, pages) < pages)
426 error = ENOMEM;
427 }
428 /* Performed initial allocation */
429 newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
430 } else
431 newtag->bounce_zone = NULL;
432 if (error != 0)
433 free(newtag, M_DEVBUF);
434 else
435 *dmat = newtag;
436 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
437 __func__, newtag, (newtag != NULL ? newtag->flags : 0), error);
438
439 return (error);
440 }
441
442 int
443 bus_dma_tag_destroy(bus_dma_tag_t dmat)
444 {
445 #ifdef KTR
446 bus_dma_tag_t dmat_copy = dmat;
447 #endif
448
449 if (dmat != NULL) {
450
451 if (dmat->map_count != 0)
452 return (EBUSY);
453
454 while (dmat != NULL) {
455 bus_dma_tag_t parent;
456
457 parent = dmat->parent;
458 atomic_subtract_int(&dmat->ref_count, 1);
459 if (dmat->ref_count == 0) {
460 free(dmat, M_DEVBUF);
461 /*
462 * Last reference count, so
463 * release our reference
464 * count on our parent.
465 */
466 dmat = parent;
467 } else
468 dmat = NULL;
469 }
470 }
471 CTR2(KTR_BUSDMA, "%s tag %p", __func__, dmat_copy);
472
473 return (0);
474 }
475
476 #include <sys/kdb.h>
477 /*
478 * Allocate a handle for mapping from kva/uva/physical
479 * address space into bus device space.
480 */
481 int
482 bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
483 {
484 bus_dmamap_t newmap;
485 int error = 0;
486
487 newmap = _busdma_alloc_dmamap();
488 if (newmap == NULL) {
489 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM);
490 return (ENOMEM);
491 }
492 *mapp = newmap;
493 newmap->dmat = dmat;
494 newmap->allocbuffer = NULL;
495 dmat->map_count++;
496
497 /*
498 * Bouncing might be required if the driver asks for an active
499 * exclusion region, a data alignment that is stricter than 1, and/or
500 * an active address boundary.
501 */
502 if (dmat->flags & BUS_DMA_COULD_BOUNCE) {
503
504 /* Must bounce */
505 struct bounce_zone *bz;
506 int maxpages;
507
508 if (dmat->bounce_zone == NULL) {
509 if ((error = alloc_bounce_zone(dmat)) != 0) {
510 _busdma_free_dmamap(newmap);
511 *mapp = NULL;
512 return (error);
513 }
514 }
515 bz = dmat->bounce_zone;
516
517 /* Initialize the new map */
518 STAILQ_INIT(&((*mapp)->bpages));
519
520 /*
521 * Attempt to add pages to our pool on a per-instance
522 * basis up to a sane limit.
523 */
524 maxpages = MAX_BPAGES;
525 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
526 || (dmat->map_count > 0 && bz->total_bpages < maxpages)) {
527 int pages;
528
529 pages = MAX(atop(dmat->maxsize), 1);
530 pages = MIN(maxpages - bz->total_bpages, pages);
531 pages = MAX(pages, 1);
532 if (alloc_bounce_pages(dmat, pages) < pages)
533 error = ENOMEM;
534
535 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) {
536 if (error == 0)
537 dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
538 } else {
539 error = 0;
540 }
541 }
542 }
543 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
544 __func__, dmat, dmat->flags, error);
545
546 return (0);
547 }
548
549 /*
550 * Destroy a handle for mapping from kva/uva/physical
551 * address space into bus device space.
552 */
553 int
554 bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
555 {
556
557 _busdma_free_dmamap(map);
558 if (STAILQ_FIRST(&map->bpages) != NULL) {
559 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
560 __func__, dmat, EBUSY);
561 return (EBUSY);
562 }
563 dmat->map_count--;
564 CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
565 return (0);
566 }
567
568 /*
569 * Allocate a piece of memory that can be efficiently mapped into
570 * bus device space based on the constraints lited in the dma tag.
571 * A dmamap to for use with dmamap_load is also allocated.
572 */
573 int
574 bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
575 bus_dmamap_t *mapp)
576 {
577 bus_dmamap_t newmap = NULL;
578
579 int mflags;
580
581 if (flags & BUS_DMA_NOWAIT)
582 mflags = M_NOWAIT;
583 else
584 mflags = M_WAITOK;
585 if (flags & BUS_DMA_ZERO)
586 mflags |= M_ZERO;
587
588 newmap = _busdma_alloc_dmamap();
589 if (newmap == NULL) {
590 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
591 __func__, dmat, dmat->flags, ENOMEM);
592 return (ENOMEM);
593 }
594 dmat->map_count++;
595 *mapp = newmap;
596 newmap->dmat = dmat;
597
598 if (dmat->maxsize <= PAGE_SIZE &&
599 (dmat->alignment < dmat->maxsize) &&
600 !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) {
601 *vaddr = malloc(dmat->maxsize, M_DEVBUF, mflags);
602 } else {
603 /*
604 * XXX Use Contigmalloc until it is merged into this facility
605 * and handles multi-seg allocations. Nobody is doing
606 * multi-seg allocations yet though.
607 */
608 *vaddr = contigmalloc(dmat->maxsize, M_DEVBUF, mflags,
609 0ul, dmat->lowaddr, dmat->alignment? dmat->alignment : 1ul,
610 dmat->boundary);
611 }
612 if (*vaddr == NULL) {
613 if (newmap != NULL) {
614 _busdma_free_dmamap(newmap);
615 dmat->map_count--;
616 }
617 *mapp = NULL;
618 return (ENOMEM);
619 }
620 if (flags & BUS_DMA_COHERENT) {
621 void *tmpaddr = arm_remap_nocache(
622 (void *)((vm_offset_t)*vaddr &~ PAGE_MASK),
623 dmat->maxsize + ((vm_offset_t)*vaddr & PAGE_MASK));
624
625 if (tmpaddr) {
626 tmpaddr = (void *)((vm_offset_t)(tmpaddr) +
627 ((vm_offset_t)*vaddr & PAGE_MASK));
628 newmap->origbuffer = *vaddr;
629 newmap->allocbuffer = tmpaddr;
630 cpu_idcache_wbinv_range((vm_offset_t)*vaddr,
631 dmat->maxsize);
632 cpu_l2cache_wbinv_range((vm_offset_t)*vaddr,
633 dmat->maxsize);
634 *vaddr = tmpaddr;
635 } else
636 newmap->origbuffer = newmap->allocbuffer = NULL;
637 } else
638 newmap->origbuffer = newmap->allocbuffer = NULL;
639 return (0);
640 }
641
642 /*
643 * Free a piece of memory and it's allocated dmamap, that was allocated
644 * via bus_dmamem_alloc. Make the same choice for free/contigfree.
645 */
646 void
647 bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
648 {
649 if (map->allocbuffer) {
650 KASSERT(map->allocbuffer == vaddr,
651 ("Trying to freeing the wrong DMA buffer"));
652 vaddr = map->origbuffer;
653 arm_unmap_nocache(map->allocbuffer, dmat->maxsize);
654 }
655 if (dmat->maxsize <= PAGE_SIZE &&
656 dmat->alignment < dmat->maxsize &&
657 !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr))
658 free(vaddr, M_DEVBUF);
659 else {
660 contigfree(vaddr, dmat->maxsize, M_DEVBUF);
661 }
662 dmat->map_count--;
663 _busdma_free_dmamap(map);
664 CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags);
665 }
666
667 static int
668 _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
669 bus_size_t buflen, int flags)
670 {
671 vm_offset_t vaddr;
672 vm_offset_t vendaddr;
673 bus_addr_t paddr;
674
675 if ((map->pagesneeded == 0)) {
676 CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
677 dmat->lowaddr, dmat->boundary, dmat->alignment);
678 CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
679 map, map->pagesneeded);
680 /*
681 * Count the number of bounce pages
682 * needed in order to complete this transfer
683 */
684 vaddr = trunc_page((vm_offset_t)buf);
685 vendaddr = (vm_offset_t)buf + buflen;
686
687 while (vaddr < vendaddr) {
688 paddr = pmap_kextract(vaddr);
689 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
690 run_filter(dmat, paddr) != 0)
691 map->pagesneeded++;
692 vaddr += PAGE_SIZE;
693 }
694 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
695 }
696
697 /* Reserve Necessary Bounce Pages */
698 if (map->pagesneeded != 0) {
699 mtx_lock(&bounce_lock);
700 if (flags & BUS_DMA_NOWAIT) {
701 if (reserve_bounce_pages(dmat, map, 0) != 0) {
702 mtx_unlock(&bounce_lock);
703 return (ENOMEM);
704 }
705 } else {
706 if (reserve_bounce_pages(dmat, map, 1) != 0) {
707 /* Queue us for resources */
708 STAILQ_INSERT_TAIL(&bounce_map_waitinglist,
709 map, links);
710 mtx_unlock(&bounce_lock);
711 return (EINPROGRESS);
712 }
713 }
714 mtx_unlock(&bounce_lock);
715 }
716
717 return (0);
718 }
719
720 /*
721 * Utility function to load a linear buffer. lastaddrp holds state
722 * between invocations (for multiple-buffer loads). segp contains
723 * the starting segment on entrance, and the ending segment on exit.
724 * first indicates if this is the first invocation of this function.
725 */
726 static __inline int
727 bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs,
728 bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap,
729 int flags, vm_offset_t *lastaddrp, int *segp)
730 {
731 bus_size_t sgsize;
732 bus_addr_t curaddr, lastaddr, baddr, bmask;
733 vm_offset_t vaddr = (vm_offset_t)buf;
734 int seg;
735 int error = 0;
736 pd_entry_t *pde;
737 pt_entry_t pte;
738 pt_entry_t *ptep;
739
740 lastaddr = *lastaddrp;
741 bmask = ~(dmat->boundary - 1);
742
743 if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
744 error = _bus_dmamap_count_pages(dmat, map, buf, buflen, flags);
745 if (error)
746 return (error);
747 }
748 CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, "
749 "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment);
750
751 for (seg = *segp; buflen > 0 ; ) {
752 /*
753 * Get the physical address for this segment.
754 *
755 * XXX Don't support checking for coherent mappings
756 * XXX in user address space.
757 */
758 if (__predict_true(pmap == pmap_kernel())) {
759 if (pmap_get_pde_pte(pmap, vaddr, &pde, &ptep) == FALSE)
760 return (EFAULT);
761
762 if (__predict_false(pmap_pde_section(pde))) {
763 if (*pde & L1_S_SUPERSEC)
764 curaddr = (*pde & L1_SUP_FRAME) |
765 (vaddr & L1_SUP_OFFSET);
766 else
767 curaddr = (*pde & L1_S_FRAME) |
768 (vaddr & L1_S_OFFSET);
769 if (*pde & L1_S_CACHE_MASK) {
770 map->flags &=
771 ~DMAMAP_COHERENT;
772 }
773 } else {
774 pte = *ptep;
775 KASSERT((pte & L2_TYPE_MASK) != L2_TYPE_INV,
776 ("INV type"));
777 if (__predict_false((pte & L2_TYPE_MASK)
778 == L2_TYPE_L)) {
779 curaddr = (pte & L2_L_FRAME) |
780 (vaddr & L2_L_OFFSET);
781 if (pte & L2_L_CACHE_MASK) {
782 map->flags &=
783 ~DMAMAP_COHERENT;
784
785 }
786 } else {
787 curaddr = (pte & L2_S_FRAME) |
788 (vaddr & L2_S_OFFSET);
789 if (pte & L2_S_CACHE_MASK) {
790 map->flags &=
791 ~DMAMAP_COHERENT;
792 }
793 }
794 }
795 } else {
796 curaddr = pmap_extract(pmap, vaddr);
797 map->flags &= ~DMAMAP_COHERENT;
798 }
799
800 /*
801 * Compute the segment size, and adjust counts.
802 */
803 sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
804 if (sgsize > dmat->maxsegsz)
805 sgsize = dmat->maxsegsz;
806 if (buflen < sgsize)
807 sgsize = buflen;
808
809 /*
810 * Make sure we don't cross any boundaries.
811 */
812 if (dmat->boundary > 0) {
813 baddr = (curaddr + dmat->boundary) & bmask;
814 if (sgsize > (baddr - curaddr))
815 sgsize = (baddr - curaddr);
816 }
817 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
818 map->pagesneeded != 0 && run_filter(dmat, curaddr))
819 curaddr = add_bounce_page(dmat, map, vaddr, sgsize);
820
821 if (dmat->ranges) {
822 struct arm32_dma_range *dr;
823
824 dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges,
825 curaddr);
826 if (dr == NULL)
827 return (EINVAL);
828 /*
829 * In a valid DMA range. Translate the physical
830 * memory address to an address in the DMA window.
831 */
832 curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
833
834 }
835
836 /*
837 * Insert chunk into a segment, coalescing with
838 * the previous segment if possible.
839 */
840 if (seg >= 0 && curaddr == lastaddr &&
841 (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
842 (dmat->boundary == 0 ||
843 (segs[seg].ds_addr & bmask) ==
844 (curaddr & bmask))) {
845 segs[seg].ds_len += sgsize;
846 goto segdone;
847 } else {
848 if (++seg >= dmat->nsegments)
849 break;
850 segs[seg].ds_addr = curaddr;
851 segs[seg].ds_len = sgsize;
852 }
853 if (error)
854 break;
855 segdone:
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