The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/arm/arm/busdma_machdep.c

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * Copyright (c) 2004 Olivier Houchard
    3  * Copyright (c) 2002 Peter Grehan
    4  * Copyright (c) 1997, 1998 Justin T. Gibbs.
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions, and the following disclaimer,
   12  *    without modification, immediately at the beginning of the file.
   13  * 2. The name of the author may not be used to endorse or promote products
   14  *    derived from this software without specific prior written permission.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
   20  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  *
   28  *   From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
   29  */
   30 
   31 #include <sys/cdefs.h>
   32 __FBSDID("$FreeBSD: releng/8.1/sys/arm/arm/busdma_machdep.c 205193 2010-03-15 19:59:16Z raj $");
   33 
   34 /*
   35  * ARM bus dma support routines
   36  */
   37 
   38 #define _ARM32_BUS_DMA_PRIVATE
   39 #include <sys/param.h>
   40 #include <sys/systm.h>
   41 #include <sys/malloc.h>
   42 #include <sys/bus.h>
   43 #include <sys/interrupt.h>
   44 #include <sys/lock.h>
   45 #include <sys/proc.h>
   46 #include <sys/mutex.h>
   47 #include <sys/mbuf.h>
   48 #include <sys/uio.h>
   49 #include <sys/ktr.h>
   50 #include <sys/kernel.h>
   51 #include <sys/sysctl.h>
   52 
   53 #include <vm/vm.h>
   54 #include <vm/vm_page.h>
   55 #include <vm/vm_map.h>
   56 
   57 #include <machine/atomic.h>
   58 #include <machine/bus.h>
   59 #include <machine/cpufunc.h>
   60 #include <machine/md_var.h>
   61 
   62 #define MAX_BPAGES 64
   63 #define BUS_DMA_COULD_BOUNCE    BUS_DMA_BUS3
   64 #define BUS_DMA_MIN_ALLOC_COMP  BUS_DMA_BUS4
   65 
   66 struct bounce_zone;
   67 
   68 struct bus_dma_tag {
   69         bus_dma_tag_t           parent;
   70         bus_size_t              alignment;
   71         bus_size_t              boundary;
   72         bus_addr_t              lowaddr;
   73         bus_addr_t              highaddr;
   74         bus_dma_filter_t        *filter;
   75         void                    *filterarg;
   76         bus_size_t              maxsize;
   77         u_int                   nsegments;
   78         bus_size_t              maxsegsz;
   79         int                     flags;
   80         int                     ref_count;
   81         int                     map_count;
   82         bus_dma_lock_t          *lockfunc;
   83         void                    *lockfuncarg;
   84         /*
   85          * DMA range for this tag.  If the page doesn't fall within
   86          * one of these ranges, an error is returned.  The caller
   87          * may then decide what to do with the transfer.  If the
   88          * range pointer is NULL, it is ignored.
   89          */
   90         struct arm32_dma_range  *ranges;
   91         int                     _nranges;
   92         struct bounce_zone *bounce_zone;
   93 };
   94 
   95 struct bounce_page {
   96         vm_offset_t     vaddr;          /* kva of bounce buffer */
   97         vm_offset_t     vaddr_nocache;  /* kva of bounce buffer uncached */
   98         bus_addr_t      busaddr;        /* Physical address */
   99         vm_offset_t     datavaddr;      /* kva of client data */
  100         bus_size_t      datacount;      /* client data count */
  101         STAILQ_ENTRY(bounce_page) links;
  102 };
  103 
  104 int busdma_swi_pending;
  105 
  106 struct bounce_zone {
  107         STAILQ_ENTRY(bounce_zone) links;
  108         STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
  109         int             total_bpages;
  110         int             free_bpages;
  111         int             reserved_bpages;
  112         int             active_bpages;
  113         int             total_bounced;
  114         int             total_deferred;
  115         int             map_count;
  116         bus_size_t      alignment;
  117         bus_addr_t      lowaddr;
  118         char            zoneid[8];
  119         char            lowaddrid[20];
  120         struct sysctl_ctx_list sysctl_tree;
  121         struct sysctl_oid *sysctl_tree_top;
  122 };
  123 
  124 static struct mtx bounce_lock;
  125 static int total_bpages;
  126 static int busdma_zonecount;
  127 static STAILQ_HEAD(, bounce_zone) bounce_zone_list;
  128 
  129 SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters");
  130 SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
  131            "Total bounce pages");
  132 
  133 #define DMAMAP_LINEAR           0x1
  134 #define DMAMAP_MBUF             0x2
  135 #define DMAMAP_UIO              0x4
  136 #define DMAMAP_ALLOCATED        0x10
  137 #define DMAMAP_TYPE_MASK        (DMAMAP_LINEAR|DMAMAP_MBUF|DMAMAP_UIO)
  138 #define DMAMAP_COHERENT         0x8
  139 struct bus_dmamap {
  140         struct bp_list  bpages;
  141         int             pagesneeded;
  142         int             pagesreserved;
  143         bus_dma_tag_t   dmat;
  144         int             flags;
  145         void            *buffer;
  146         void            *origbuffer;
  147         void            *allocbuffer;
  148         TAILQ_ENTRY(bus_dmamap) freelist;
  149         int             len;
  150         STAILQ_ENTRY(bus_dmamap) links;
  151         bus_dmamap_callback_t *callback;
  152         void                  *callback_arg;
  153 
  154 };
  155 
  156 static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
  157 static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
  158 
  159 static TAILQ_HEAD(,bus_dmamap) dmamap_freelist = 
  160         TAILQ_HEAD_INITIALIZER(dmamap_freelist);
  161 
  162 #define BUSDMA_STATIC_MAPS      500
  163 static struct bus_dmamap map_pool[BUSDMA_STATIC_MAPS];
  164 
  165 static struct mtx busdma_mtx;
  166 
  167 MTX_SYSINIT(busdma_mtx, &busdma_mtx, "busdma lock", MTX_DEF);
  168 
  169 static void init_bounce_pages(void *dummy);
  170 static int alloc_bounce_zone(bus_dma_tag_t dmat);
  171 static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
  172 static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
  173                                 int commit);
  174 static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
  175                                    vm_offset_t vaddr, bus_size_t size);
  176 static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
  177 
  178 /* Default tag, as most drivers provide no parent tag. */
  179 bus_dma_tag_t arm_root_dma_tag;
  180 
  181 /*
  182  * Return true if a match is made.
  183  *
  184  * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
  185  *
  186  * If paddr is within the bounds of the dma tag then call the filter callback
  187  * to check for a match, if there is no filter callback then assume a match.
  188  */
  189 static int
  190 run_filter(bus_dma_tag_t dmat, bus_addr_t paddr)
  191 {
  192         int retval;
  193 
  194         retval = 0;
  195 
  196         do {
  197                 if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr)
  198                  || ((paddr & (dmat->alignment - 1)) != 0))
  199                  && (dmat->filter == NULL
  200                   || (*dmat->filter)(dmat->filterarg, paddr) != 0))
  201                         retval = 1;
  202 
  203                 dmat = dmat->parent;            
  204         } while (retval == 0 && dmat != NULL);
  205         return (retval);
  206 }
  207 
  208 static void
  209 arm_dmamap_freelist_init(void *dummy)
  210 {
  211         int i;
  212 
  213         for (i = 0; i < BUSDMA_STATIC_MAPS; i++) 
  214                 TAILQ_INSERT_HEAD(&dmamap_freelist, &map_pool[i], freelist);
  215 }
  216 
  217 SYSINIT(busdma, SI_SUB_VM, SI_ORDER_ANY, arm_dmamap_freelist_init, NULL);
  218 
  219 /*
  220  * Check to see if the specified page is in an allowed DMA range.
  221  */
  222 
  223 static __inline int
  224 bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs,
  225     bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap,
  226     int flags, vm_offset_t *lastaddrp, int *segp);
  227 
  228 static __inline int
  229 _bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr)
  230 {
  231         int i;
  232         for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) {
  233                 if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1])
  234                     || (lowaddr < phys_avail[i] && 
  235                     highaddr > phys_avail[i]))
  236                         return (1);
  237         }
  238         return (0);
  239 }
  240 
  241 static __inline struct arm32_dma_range *
  242 _bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
  243     bus_addr_t curaddr)
  244 {
  245         struct arm32_dma_range *dr;
  246         int i;
  247 
  248         for (i = 0, dr = ranges; i < nranges; i++, dr++) {
  249                 if (curaddr >= dr->dr_sysbase &&
  250                     round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
  251                         return (dr);
  252         }
  253 
  254         return (NULL);
  255 }
  256 /*
  257  * Convenience function for manipulating driver locks from busdma (during
  258  * busdma_swi, for example).  Drivers that don't provide their own locks
  259  * should specify &Giant to dmat->lockfuncarg.  Drivers that use their own
  260  * non-mutex locking scheme don't have to use this at all.
  261  */
  262 void
  263 busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
  264 {
  265         struct mtx *dmtx;
  266 
  267         dmtx = (struct mtx *)arg;
  268         switch (op) {
  269         case BUS_DMA_LOCK:
  270                 mtx_lock(dmtx);
  271                 break;
  272         case BUS_DMA_UNLOCK:
  273                 mtx_unlock(dmtx);
  274                 break;
  275         default:
  276                 panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
  277         }
  278 }
  279 
  280 /*
  281  * dflt_lock should never get called.  It gets put into the dma tag when
  282  * lockfunc == NULL, which is only valid if the maps that are associated
  283  * with the tag are meant to never be defered.
  284  * XXX Should have a way to identify which driver is responsible here.
  285  */
  286 static void
  287 dflt_lock(void *arg, bus_dma_lock_op_t op)
  288 {
  289 #ifdef INVARIANTS
  290         panic("driver error: busdma dflt_lock called");
  291 #else
  292         printf("DRIVER_ERROR: busdma dflt_lock called\n");
  293 #endif
  294 }
  295 
  296 static __inline bus_dmamap_t
  297 _busdma_alloc_dmamap(void)
  298 {
  299         bus_dmamap_t map;
  300 
  301         mtx_lock(&busdma_mtx);
  302         map = TAILQ_FIRST(&dmamap_freelist);
  303         if (map)
  304                 TAILQ_REMOVE(&dmamap_freelist, map, freelist);
  305         mtx_unlock(&busdma_mtx);
  306         if (!map) {
  307                 map = malloc(sizeof(*map), M_DEVBUF, M_NOWAIT | M_ZERO);
  308                 if (map)
  309                         map->flags = DMAMAP_ALLOCATED;
  310         } else
  311                 map->flags = 0;
  312         STAILQ_INIT(&map->bpages);
  313         return (map);
  314 }
  315 
  316 static __inline void 
  317 _busdma_free_dmamap(bus_dmamap_t map)
  318 {
  319         if (map->flags & DMAMAP_ALLOCATED)
  320                 free(map, M_DEVBUF);
  321         else {
  322                 mtx_lock(&busdma_mtx);
  323                 TAILQ_INSERT_HEAD(&dmamap_freelist, map, freelist);
  324                 mtx_unlock(&busdma_mtx);
  325         }
  326 }
  327 
  328 /*
  329  * Allocate a device specific dma_tag.
  330  */
  331 #define SEG_NB 1024
  332 
  333 int
  334 bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
  335                    bus_size_t boundary, bus_addr_t lowaddr,
  336                    bus_addr_t highaddr, bus_dma_filter_t *filter,
  337                    void *filterarg, bus_size_t maxsize, int nsegments,
  338                    bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
  339                    void *lockfuncarg, bus_dma_tag_t *dmat)
  340 {
  341         bus_dma_tag_t newtag;
  342         int error = 0;
  343         /* Return a NULL tag on failure */
  344         *dmat = NULL;
  345         if (!parent)
  346                 parent = arm_root_dma_tag;
  347 
  348         newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT);
  349         if (newtag == NULL) {
  350                 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
  351                     __func__, newtag, 0, error);
  352                 return (ENOMEM);
  353         }
  354 
  355         newtag->parent = parent;
  356         newtag->alignment = alignment;
  357         newtag->boundary = boundary;
  358         newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1);
  359         newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1);
  360         newtag->filter = filter;
  361         newtag->filterarg = filterarg;
  362         newtag->maxsize = maxsize;
  363         newtag->nsegments = nsegments;
  364         newtag->maxsegsz = maxsegsz;
  365         newtag->flags = flags;
  366         newtag->ref_count = 1; /* Count ourself */
  367         newtag->map_count = 0;
  368         newtag->ranges = bus_dma_get_range();
  369         newtag->_nranges = bus_dma_get_range_nb();
  370         if (lockfunc != NULL) {
  371                 newtag->lockfunc = lockfunc;
  372                 newtag->lockfuncarg = lockfuncarg;
  373         } else {
  374                 newtag->lockfunc = dflt_lock;
  375                 newtag->lockfuncarg = NULL;
  376         }
  377         /*
  378          * Take into account any restrictions imposed by our parent tag
  379          */
  380         if (parent != NULL) {
  381                 newtag->lowaddr = min(parent->lowaddr, newtag->lowaddr);
  382                 newtag->highaddr = max(parent->highaddr, newtag->highaddr);
  383                 if (newtag->boundary == 0)
  384                         newtag->boundary = parent->boundary;
  385                 else if (parent->boundary != 0)
  386                         newtag->boundary = min(parent->boundary,
  387                                                newtag->boundary);
  388                 if ((newtag->filter != NULL) ||
  389                     ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0))
  390                         newtag->flags |= BUS_DMA_COULD_BOUNCE;
  391                 if (newtag->filter == NULL) {
  392                         /*
  393                          * Short circuit looking at our parent directly
  394                          * since we have encapsulated all of its information
  395                          */
  396                         newtag->filter = parent->filter;
  397                         newtag->filterarg = parent->filterarg;
  398                         newtag->parent = parent->parent;
  399                 }
  400                 if (newtag->parent != NULL)
  401                         atomic_add_int(&parent->ref_count, 1);
  402         }
  403         if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr)
  404          || newtag->alignment > 1)
  405                 newtag->flags |= BUS_DMA_COULD_BOUNCE;
  406 
  407         if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
  408             (flags & BUS_DMA_ALLOCNOW) != 0) {
  409                 struct bounce_zone *bz;
  410 
  411                 /* Must bounce */
  412 
  413                 if ((error = alloc_bounce_zone(newtag)) != 0) {
  414                         free(newtag, M_DEVBUF);
  415                         return (error);
  416                 }
  417                 bz = newtag->bounce_zone;
  418 
  419                 if (ptoa(bz->total_bpages) < maxsize) {
  420                         int pages;
  421 
  422                         pages = atop(maxsize) - bz->total_bpages;
  423 
  424                         /* Add pages to our bounce pool */
  425                         if (alloc_bounce_pages(newtag, pages) < pages)
  426                                 error = ENOMEM;
  427                 }
  428                 /* Performed initial allocation */
  429                 newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
  430         } else
  431                 newtag->bounce_zone = NULL;
  432         if (error != 0)
  433                 free(newtag, M_DEVBUF);
  434         else
  435                 *dmat = newtag;
  436         CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
  437             __func__, newtag, (newtag != NULL ? newtag->flags : 0), error);
  438 
  439         return (error);
  440 }
  441 
  442 int
  443 bus_dma_tag_destroy(bus_dma_tag_t dmat)
  444 {
  445 #ifdef KTR
  446         bus_dma_tag_t dmat_copy = dmat;
  447 #endif
  448 
  449         if (dmat != NULL) {
  450                 
  451                 if (dmat->map_count != 0)
  452                         return (EBUSY);
  453                 
  454                 while (dmat != NULL) {
  455                         bus_dma_tag_t parent;
  456                         
  457                         parent = dmat->parent;
  458                         atomic_subtract_int(&dmat->ref_count, 1);
  459                         if (dmat->ref_count == 0) {
  460                                 free(dmat, M_DEVBUF);
  461                                 /*
  462                                  * Last reference count, so
  463                                  * release our reference
  464                                  * count on our parent.
  465                                  */
  466                                 dmat = parent;
  467                         } else
  468                                 dmat = NULL;
  469                 }
  470         }
  471         CTR2(KTR_BUSDMA, "%s tag %p", __func__, dmat_copy);
  472 
  473         return (0);
  474 }
  475 
  476 #include <sys/kdb.h>
  477 /*
  478  * Allocate a handle for mapping from kva/uva/physical
  479  * address space into bus device space.
  480  */
  481 int
  482 bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
  483 {
  484         bus_dmamap_t newmap;
  485         int error = 0;
  486 
  487         newmap = _busdma_alloc_dmamap();
  488         if (newmap == NULL) {
  489                 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM);
  490                 return (ENOMEM);
  491         }
  492         *mapp = newmap;
  493         newmap->dmat = dmat;
  494         newmap->allocbuffer = NULL;
  495         dmat->map_count++;
  496 
  497         /*
  498          * Bouncing might be required if the driver asks for an active
  499          * exclusion region, a data alignment that is stricter than 1, and/or
  500          * an active address boundary.
  501          */
  502         if (dmat->flags & BUS_DMA_COULD_BOUNCE) {
  503 
  504                 /* Must bounce */
  505                 struct bounce_zone *bz;
  506                 int maxpages;
  507 
  508                 if (dmat->bounce_zone == NULL) {
  509                         if ((error = alloc_bounce_zone(dmat)) != 0) {
  510                                 _busdma_free_dmamap(newmap);
  511                                 *mapp = NULL;
  512                                 return (error);
  513                         }
  514                 }
  515                 bz = dmat->bounce_zone;
  516 
  517                 /* Initialize the new map */
  518                 STAILQ_INIT(&((*mapp)->bpages));
  519 
  520                 /*
  521                  * Attempt to add pages to our pool on a per-instance
  522                  * basis up to a sane limit.
  523                  */
  524                 maxpages = MAX_BPAGES;
  525                 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
  526                  || (bz->map_count > 0 && bz->total_bpages < maxpages)) {
  527                         int pages;
  528 
  529                         pages = MAX(atop(dmat->maxsize), 1);
  530                         pages = MIN(maxpages - bz->total_bpages, pages);
  531                         pages = MAX(pages, 1);
  532                         if (alloc_bounce_pages(dmat, pages) < pages)
  533                                 error = ENOMEM;
  534 
  535                         if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) {
  536                                 if (error == 0)
  537                                         dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
  538                         } else {
  539                                 error = 0;
  540                         }
  541                 }
  542                 bz->map_count++;
  543         }
  544         CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
  545             __func__, dmat, dmat->flags, error);
  546 
  547         return (0);
  548 }
  549 
  550 /*
  551  * Destroy a handle for mapping from kva/uva/physical
  552  * address space into bus device space.
  553  */
  554 int
  555 bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
  556 {
  557 
  558         _busdma_free_dmamap(map);
  559         if (STAILQ_FIRST(&map->bpages) != NULL) {
  560                 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
  561                     __func__, dmat, EBUSY);
  562                 return (EBUSY);
  563         }
  564         if (dmat->bounce_zone)
  565                 dmat->bounce_zone->map_count--;
  566         dmat->map_count--;
  567         CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
  568         return (0);
  569 }
  570 
  571 /*
  572  * Allocate a piece of memory that can be efficiently mapped into
  573  * bus device space based on the constraints lited in the dma tag.
  574  * A dmamap to for use with dmamap_load is also allocated.
  575  */
  576 int
  577 bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
  578                  bus_dmamap_t *mapp)
  579 {
  580         bus_dmamap_t newmap = NULL;
  581 
  582         int mflags;
  583 
  584         if (flags & BUS_DMA_NOWAIT)
  585                 mflags = M_NOWAIT;
  586         else
  587                 mflags = M_WAITOK;
  588         if (flags & BUS_DMA_ZERO)
  589                 mflags |= M_ZERO;
  590 
  591         newmap = _busdma_alloc_dmamap();
  592         if (newmap == NULL) {
  593                 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
  594                     __func__, dmat, dmat->flags, ENOMEM);
  595                 return (ENOMEM);
  596         }
  597         dmat->map_count++;
  598         *mapp = newmap;
  599         newmap->dmat = dmat;
  600         
  601         if (dmat->maxsize <= PAGE_SIZE &&
  602            (dmat->alignment < dmat->maxsize) &&
  603            !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) {
  604                 *vaddr = malloc(dmat->maxsize, M_DEVBUF, mflags);
  605         } else {
  606                 /*
  607                  * XXX Use Contigmalloc until it is merged into this facility
  608                  *     and handles multi-seg allocations.  Nobody is doing
  609                  *     multi-seg allocations yet though.
  610                  */
  611                 *vaddr = contigmalloc(dmat->maxsize, M_DEVBUF, mflags,
  612                     0ul, dmat->lowaddr, dmat->alignment? dmat->alignment : 1ul,
  613                     dmat->boundary);
  614         }
  615         if (*vaddr == NULL) {
  616                 if (newmap != NULL) {
  617                         _busdma_free_dmamap(newmap);
  618                         dmat->map_count--;
  619                 }
  620                 *mapp = NULL;
  621                 return (ENOMEM);
  622         }
  623         if (flags & BUS_DMA_COHERENT) {
  624                 void *tmpaddr = arm_remap_nocache(
  625                     (void *)((vm_offset_t)*vaddr &~ PAGE_MASK),
  626                     dmat->maxsize + ((vm_offset_t)*vaddr & PAGE_MASK));
  627 
  628                 if (tmpaddr) {
  629                         tmpaddr = (void *)((vm_offset_t)(tmpaddr) +
  630                             ((vm_offset_t)*vaddr & PAGE_MASK));
  631                         newmap->origbuffer = *vaddr;
  632                         newmap->allocbuffer = tmpaddr;
  633                         *vaddr = tmpaddr;
  634                 } else
  635                         newmap->origbuffer = newmap->allocbuffer = NULL;
  636         } else 
  637                 newmap->origbuffer = newmap->allocbuffer = NULL;
  638         return (0);
  639 }
  640 
  641 /*
  642  * Free a piece of memory and it's allocated dmamap, that was allocated
  643  * via bus_dmamem_alloc.  Make the same choice for free/contigfree.
  644  */
  645 void
  646 bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
  647 {
  648         if (map->allocbuffer) {
  649                 KASSERT(map->allocbuffer == vaddr,
  650                     ("Trying to freeing the wrong DMA buffer"));
  651                 vaddr = map->origbuffer;
  652                 arm_unmap_nocache(map->allocbuffer,
  653                     dmat->maxsize + ((vm_offset_t)vaddr & PAGE_MASK));
  654         }
  655         if (dmat->maxsize <= PAGE_SIZE &&
  656            dmat->alignment < dmat->maxsize &&
  657             !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr))
  658                 free(vaddr, M_DEVBUF);
  659         else {
  660                 contigfree(vaddr, dmat->maxsize, M_DEVBUF);
  661         }
  662         dmat->map_count--;
  663         _busdma_free_dmamap(map);
  664         CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags);
  665 }
  666 
  667 static int
  668 _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap,
  669     void *buf, bus_size_t buflen, int flags)
  670 {
  671         vm_offset_t vaddr;
  672         vm_offset_t vendaddr;
  673         bus_addr_t paddr;
  674 
  675         if ((map->pagesneeded == 0)) {
  676                 CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
  677                     dmat->lowaddr, dmat->boundary, dmat->alignment);
  678                 CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
  679                     map, map->pagesneeded);
  680                 /*
  681                  * Count the number of bounce pages
  682                  * needed in order to complete this transfer
  683                  */
  684                 vaddr = trunc_page((vm_offset_t)buf);
  685                 vendaddr = (vm_offset_t)buf + buflen;
  686 
  687                 while (vaddr < vendaddr) {
  688                         if (__predict_true(pmap == pmap_kernel()))
  689                                 paddr = pmap_kextract(vaddr);
  690                         else
  691                                 paddr = pmap_extract(pmap, vaddr);
  692                         if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
  693                             run_filter(dmat, paddr) != 0)
  694                                 map->pagesneeded++;
  695                         vaddr += PAGE_SIZE;
  696                 }
  697                 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
  698         }
  699 
  700         /* Reserve Necessary Bounce Pages */
  701         if (map->pagesneeded != 0) {
  702                 mtx_lock(&bounce_lock);
  703                 if (flags & BUS_DMA_NOWAIT) {
  704                         if (reserve_bounce_pages(dmat, map, 0) != 0) {
  705                                 mtx_unlock(&bounce_lock);
  706                                 return (ENOMEM);
  707                         }
  708                 } else {
  709                         if (reserve_bounce_pages(dmat, map, 1) != 0) {
  710                                 /* Queue us for resources */
  711                                 STAILQ_INSERT_TAIL(&bounce_map_waitinglist,
  712                                     map, links);
  713                                 mtx_unlock(&bounce_lock);
  714                                 return (EINPROGRESS);
  715                         }
  716                 }
  717                 mtx_unlock(&bounce_lock);
  718         }
  719 
  720         return (0);
  721 }
  722 
  723 /*
  724  * Utility function to load a linear buffer.  lastaddrp holds state
  725  * between invocations (for multiple-buffer loads).  segp contains
  726  * the starting segment on entrance, and the ending segment on exit.
  727  * first indicates if this is the first invocation of this function.
  728  */
  729 static __inline int
  730 bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs,
  731     bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap,
  732     int flags, vm_offset_t *lastaddrp, int *segp)
  733 {
  734         bus_size_t sgsize;
  735         bus_addr_t curaddr, lastaddr, baddr, bmask;
  736         vm_offset_t vaddr = (vm_offset_t)buf;
  737         int seg;
  738         int error = 0;
  739         pd_entry_t *pde;
  740         pt_entry_t pte;
  741         pt_entry_t *ptep;
  742 
  743         lastaddr = *lastaddrp;
  744         bmask = ~(dmat->boundary - 1);
  745 
  746         if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
  747                 error = _bus_dmamap_count_pages(dmat, map, pmap, buf, buflen,
  748                     flags);
  749                 if (error)
  750                         return (error);
  751         }
  752         CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, "
  753             "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment);
  754 
  755         for (seg = *segp; buflen > 0 ; ) {
  756                 /*
  757                  * Get the physical address for this segment.
  758                  *
  759                  * XXX Don't support checking for coherent mappings
  760                  * XXX in user address space.
  761                  */
  762                 if (__predict_true(pmap == pmap_kernel())) {
  763                         if (pmap_get_pde_pte(pmap, vaddr, &pde, &ptep) == FALSE)
  764                                 return (EFAULT);
  765 
  766                         if (__predict_false(pmap_pde_section(pde))) {
  767                                 if (*pde & L1_S_SUPERSEC)
  768                                         curaddr = (*pde & L1_SUP_FRAME) |
  769                                             (vaddr & L1_SUP_OFFSET);
  770                                 else
  771                                         curaddr = (*pde & L1_S_FRAME) |
  772                                             (vaddr & L1_S_OFFSET);
  773                                 if (*pde & L1_S_CACHE_MASK) {
  774                                         map->flags &=
  775                                             ~DMAMAP_COHERENT;
  776                                 }
  777                         } else {
  778                                 pte = *ptep;
  779                                 KASSERT((pte & L2_TYPE_MASK) != L2_TYPE_INV,
  780                                     ("INV type"));
  781                                 if (__predict_false((pte & L2_TYPE_MASK)
  782                                                     == L2_TYPE_L)) {
  783                                         curaddr = (pte & L2_L_FRAME) |
  784                                             (vaddr & L2_L_OFFSET);
  785                                         if (pte & L2_L_CACHE_MASK) {
  786                                                 map->flags &=
  787                                                     ~DMAMAP_COHERENT;
  788                                                 
  789                                         }
  790                                 } else {
  791                                         curaddr = (pte & L2_S_FRAME) |
  792                                             (vaddr & L2_S_OFFSET);
  793                                         if (pte & L2_S_CACHE_MASK) {
  794                                                 map->flags &=
  795                                                     ~DMAMAP_COHERENT;
  796                                         }
  797                                 }
  798                         }
  799                 } else {
  800                         curaddr = pmap_extract(pmap, vaddr);
  801                         map->flags &= ~DMAMAP_COHERENT;
  802                 }
  803 
  804                 /*
  805                  * Compute the segment size, and adjust counts.
  806                  */
  807                 sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
  808                 if (sgsize > dmat->maxsegsz)
  809                         sgsize = dmat->maxsegsz;
  810                 if (buflen < sgsize)
  811                         sgsize = buflen;
  812 
  813                 /*
  814                  * Make sure we don't cross any boundaries.
  815                  */
  816                 if (dmat->boundary > 0) {
  817                         baddr = (curaddr + dmat->boundary) & bmask;
  818                         if (sgsize > (baddr - curaddr))
  819                                 sgsize = (baddr - curaddr);
  820                 }
  821                 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
  822                     map->pagesneeded != 0 && run_filter(dmat, curaddr))
  823                         curaddr = add_bounce_page(dmat, map, vaddr, sgsize);
  824 
  825                 if (dmat->ranges) {
  826                         struct arm32_dma_range *dr;
  827 
  828                         dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges,
  829                             curaddr);
  830                         if (dr == NULL)
  831                                 return (EINVAL);
  832                         /*
  833                          * In a valid DMA range.  Translate the physical
  834                          * memory address to an address in the DMA window.
  835                          */
  836                         curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
  837                                                 
  838                 }
  839 
  840                 /*
  841                  * Insert chunk into a segment, coalescing with
  842                  * the previous segment if possible.
  843                  */
  844                 if (seg >= 0 && curaddr == lastaddr &&
  845                     (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
  846                     (dmat->boundary == 0 ||
  847                      (segs[seg].ds_addr & bmask) == 
  848                      (curaddr & bmask))) {
  849                         segs[seg].ds_len += sgsize;
  850                         goto segdone;
  851                 } else {
  852                         if (++seg >= dmat->nsegments)
  853                                 break;
  854                         segs[seg].ds_addr = curaddr;
  855                         segs[seg].ds_len = sgsize;
  856                 }
  857                 if (error)
  858                         break;
  859 segdone:
  860                 lastaddr = curaddr + sgsize;
  861                 vaddr += sgsize;
  862                 buflen -= sgsize;
  863         }
  864 
  865         *segp = seg;
  866         *lastaddrp = lastaddr;
  867 
  868         /*
  869          * Did we fit?
  870          */
  871         if (buflen != 0)
  872                 error = EFBIG; /* XXX better return value here? */
  873         return (error);
  874 }
  875 
  876 /*
  877  * Map the buffer buf into bus space using the dmamap map.
  878  */
  879 int
  880 bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
  881                 bus_size_t buflen, bus_dmamap_callback_t *callback,
  882                 void *callback_arg, int flags)
  883 {
  884         vm_offset_t     lastaddr = 0;
  885         int             error, nsegs = -1;
  886 #ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT
  887         bus_dma_segment_t dm_segments[dmat->nsegments];
  888 #else
  889         bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
  890 #endif
  891 
  892         KASSERT(dmat != NULL, ("dmatag is NULL"));
  893         KASSERT(map != NULL, ("dmamap is NULL"));
  894         map->callback = callback;
  895         map->callback_arg = callback_arg;
  896         map->flags &= ~DMAMAP_TYPE_MASK;
  897         map->flags |= DMAMAP_LINEAR|DMAMAP_COHERENT;
  898         map->buffer = buf;
  899         map->len = buflen;
  900         error = bus_dmamap_load_buffer(dmat,
  901             dm_segments, map, buf, buflen, kernel_pmap,
  902             flags, &lastaddr, &nsegs);
  903         if (error == EINPROGRESS)
  904                 return (error);
  905         if (error)
  906                 (*callback)(callback_arg, NULL, 0, error);
  907         else
  908                 (*callback)(callback_arg, dm_segments, nsegs + 1, error);
  909         
  910         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
  911             __func__, dmat, dmat->flags, nsegs + 1, error);
  912 
  913         return (error);
  914 }
  915 
  916 /*
  917  * Like bus_dmamap_load(), but for mbufs.
  918  */
  919 int
  920 bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map, struct mbuf *m0,
  921                      bus_dmamap_callback2_t *callback, void *callback_arg,
  922                      int flags)
  923 {
  924 #ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT
  925         bus_dma_segment_t dm_segments[dmat->nsegments];
  926 #else
  927         bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
  928 #endif
  929         int nsegs = -1, error = 0;
  930 
  931         M_ASSERTPKTHDR(m0);
  932 
  933         map->flags &= ~DMAMAP_TYPE_MASK;
  934         map->flags |= DMAMAP_MBUF | DMAMAP_COHERENT;
  935         map->buffer = m0;
  936         map->len = 0;
  937         if (m0->m_pkthdr.len <= dmat->maxsize) {
  938                 vm_offset_t lastaddr = 0;
  939                 struct mbuf *m;
  940 
  941                 for (m = m0; m != NULL && error == 0; m = m->m_next) {
  942                         if (m->m_len > 0) {
  943                                 error = bus_dmamap_load_buffer(dmat,
  944                                     dm_segments, map, m->m_data, m->m_len, 
  945                                     pmap_kernel(), flags, &lastaddr, &nsegs);
  946                                 map->len += m->m_len;
  947                         }
  948                 }
  949         } else {
  950                 error = EINVAL;
  951         }
  952 
  953         if (error) {
  954                 /* 
  955                  * force "no valid mappings" on error in callback.
  956                  */
  957                 (*callback)(callback_arg, dm_segments, 0, 0, error);
  958         } else {
  959                 (*callback)(callback_arg, dm_segments, nsegs + 1,
  960                     m0->m_pkthdr.len, error);
  961         }
  962         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
  963             __func__, dmat, dmat->flags, error, nsegs + 1);
  964 
  965         return (error);
  966 }
  967 
  968 int
  969 bus_dmamap_load_mbuf_sg(bus_dma_tag_t dmat, bus_dmamap_t map,
  970                         struct mbuf *m0, bus_dma_segment_t *segs, int *nsegs,
  971                         int flags)
  972 {
  973         int error = 0;
  974         M_ASSERTPKTHDR(m0);
  975 
  976         flags |= BUS_DMA_NOWAIT;
  977         *nsegs = -1;
  978         map->flags &= ~DMAMAP_TYPE_MASK;
  979         map->flags |= DMAMAP_MBUF | DMAMAP_COHERENT;
  980         map->buffer = m0;                       
  981         map->len = 0;
  982         if (m0->m_pkthdr.len <= dmat->maxsize) {
  983                 vm_offset_t lastaddr = 0;
  984                 struct mbuf *m;
  985 
  986                 for (m = m0; m != NULL && error == 0; m = m->m_next) {
  987                         if (m->m_len > 0) {
  988                                 error = bus_dmamap_load_buffer(dmat, segs, map,
  989                                                 m->m_data, m->m_len,
  990                                                 pmap_kernel(), flags, &lastaddr,
  991                                                 nsegs);
  992                                 map->len += m->m_len;
  993                         }
  994                 }
  995         } else {
  996                 error = EINVAL;
  997         }
  998 
  999         /* XXX FIXME: Having to increment nsegs is really annoying */
 1000         ++*nsegs;
 1001         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
 1002             __func__, dmat, dmat->flags, error, *nsegs);
 1003         return (error);
 1004 }
 1005 
 1006 /*
 1007  * Like bus_dmamap_load(), but for uios.
 1008  */
 1009 int
 1010 bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map, struct uio *uio,
 1011     bus_dmamap_callback2_t *callback, void *callback_arg,
 1012     int flags)
 1013 {
 1014         vm_offset_t lastaddr = 0;
 1015 #ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT
 1016         bus_dma_segment_t dm_segments[dmat->nsegments];
 1017 #else
 1018         bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
 1019 #endif
 1020         int nsegs, i, error;
 1021         bus_size_t resid;
 1022         struct iovec *iov;
 1023         struct pmap *pmap;
 1024 
 1025         resid = uio->uio_resid;
 1026         iov = uio->uio_iov;
 1027         map->flags &= ~DMAMAP_TYPE_MASK;
 1028         map->flags |= DMAMAP_UIO|DMAMAP_COHERENT;
 1029         map->buffer = uio;
 1030         map->len = 0;
 1031 
 1032         if (uio->uio_segflg == UIO_USERSPACE) {
 1033                 KASSERT(uio->uio_td != NULL,
 1034                     ("bus_dmamap_load_uio: USERSPACE but no proc"));
 1035                 pmap = vmspace_pmap(uio->uio_td->td_proc->p_vmspace);
 1036         } else
 1037                 pmap = kernel_pmap;
 1038 
 1039         error = 0;
 1040         nsegs = -1;
 1041         for (i = 0; i < uio->uio_iovcnt && resid != 0 && !error; i++) {
 1042                 /*
 1043                  * Now at the first iovec to load.  Load each iovec
 1044                  * until we have exhausted the residual count.
 1045                  */
 1046                 bus_size_t minlen =
 1047                     resid < iov[i].iov_len ? resid : iov[i].iov_len;
 1048                 caddr_t addr = (caddr_t) iov[i].iov_base;
 1049 
 1050                 if (minlen > 0) {
 1051                         error = bus_dmamap_load_buffer(dmat, dm_segments, map,
 1052                             addr, minlen, pmap, flags, &lastaddr, &nsegs);
 1053 
 1054                         map->len += minlen;
 1055                         resid -= minlen;
 1056                 }
 1057         }
 1058 
 1059         if (error) {
 1060                 /* 
 1061                  * force "no valid mappings" on error in callback.
 1062                  */
 1063                 (*callback)(callback_arg, dm_segments, 0, 0, error);
 1064         } else {
 1065                 (*callback)(callback_arg, dm_segments, nsegs+1,
 1066                     uio->uio_resid, error);
 1067         }
 1068 
 1069         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
 1070             __func__, dmat, dmat->flags, error, nsegs + 1);
 1071         return (error);
 1072 }
 1073 
 1074 /*
 1075  * Release the mapping held by map.
 1076  */
 1077 void
 1078 _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
 1079 {
 1080         struct bounce_page *bpage;
 1081 
 1082         map->flags &= ~DMAMAP_TYPE_MASK;
 1083         while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
 1084                 STAILQ_REMOVE_HEAD(&map->bpages, links);
 1085                 free_bounce_page(dmat, bpage);
 1086         }
 1087         return;
 1088 }
 1089 
 1090 static void
 1091 bus_dmamap_sync_buf(void *buf, int len, bus_dmasync_op_t op)
 1092 {
 1093         char _tmp_cl[arm_dcache_align], _tmp_clend[arm_dcache_align];
 1094 
 1095         if ((op & BUS_DMASYNC_PREWRITE) && !(op & BUS_DMASYNC_PREREAD)) {
 1096                 cpu_dcache_wb_range((vm_offset_t)buf, len);
 1097                 cpu_l2cache_wb_range((vm_offset_t)buf, len);
 1098         }
 1099         if (op & BUS_DMASYNC_PREREAD) {
 1100                 if (!(op & BUS_DMASYNC_PREWRITE) &&
 1101                     ((((vm_offset_t)(buf) | len) & arm_dcache_align_mask) == 0)) {
 1102                         cpu_dcache_inv_range((vm_offset_t)buf, len);
 1103                         cpu_l2cache_inv_range((vm_offset_t)buf, len);
 1104                 } else {
 1105                         cpu_dcache_wbinv_range((vm_offset_t)buf, len);
 1106                         cpu_l2cache_wbinv_range((vm_offset_t)buf, len);
 1107                 }
 1108         }
 1109         if (op & BUS_DMASYNC_POSTREAD) {
 1110                 if ((vm_offset_t)buf & arm_dcache_align_mask) {
 1111                         memcpy(_tmp_cl, (void *)((vm_offset_t)buf & ~
 1112                             arm_dcache_align_mask),
 1113                             (vm_offset_t)buf & arm_dcache_align_mask);
 1114                 }
 1115                 if (((vm_offset_t)buf + len) & arm_dcache_align_mask) {
 1116                         memcpy(_tmp_clend, (void *)((vm_offset_t)buf + len),
 1117                             arm_dcache_align - (((vm_offset_t)(buf) + len) &
 1118                            arm_dcache_align_mask));
 1119                 }
 1120                 cpu_dcache_inv_range((vm_offset_t)buf, len);
 1121                 cpu_l2cache_inv_range((vm_offset_t)buf, len);
 1122 
 1123                 if ((vm_offset_t)buf & arm_dcache_align_mask)
 1124                         memcpy((void *)((vm_offset_t)buf &
 1125                             ~arm_dcache_align_mask), _tmp_cl, 
 1126                             (vm_offset_t)buf & arm_dcache_align_mask);
 1127                 if (((vm_offset_t)buf + len) & arm_dcache_align_mask)
 1128                         memcpy((void *)((vm_offset_t)buf + len), _tmp_clend,
 1129                             arm_dcache_align - (((vm_offset_t)(buf) + len) &
 1130                            arm_dcache_align_mask));
 1131         }
 1132 }
 1133 
 1134 static void
 1135 _bus_dmamap_sync_bp(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
 1136 {
 1137         struct bounce_page *bpage;
 1138 
 1139         STAILQ_FOREACH(bpage, &map->bpages, links) {
 1140                 if (op & BUS_DMASYNC_PREWRITE) {
 1141                         bcopy((void *)bpage->datavaddr,
 1142                             (void *)(bpage->vaddr_nocache != 0 ? 
 1143                                      bpage->vaddr_nocache : bpage->vaddr),
 1144                             bpage->datacount);
 1145                         if (bpage->vaddr_nocache == 0) {
 1146                                 cpu_dcache_wb_range(bpage->vaddr,
 1147                                     bpage->datacount);
 1148                                 cpu_l2cache_wb_range(bpage->vaddr,
 1149                                     bpage->datacount);
 1150                         }
 1151                         dmat->bounce_zone->total_bounced++;
 1152                 }
 1153                 if (op & BUS_DMASYNC_POSTREAD) {
 1154                         if (bpage->vaddr_nocache == 0) {
 1155                                 cpu_dcache_inv_range(bpage->vaddr,
 1156                                     bpage->datacount);
 1157                                 cpu_l2cache_inv_range(bpage->vaddr,
 1158                                     bpage->datacount);
 1159                         }
 1160                         bcopy((void *)(bpage->vaddr_nocache != 0 ? 
 1161                             bpage->vaddr_nocache : bpage->vaddr),
 1162                             (void *)bpage->datavaddr, bpage->datacount);
 1163                         dmat->bounce_zone->total_bounced++;
 1164                 }
 1165         }
 1166 }
 1167 
 1168 static __inline int
 1169 _bus_dma_buf_is_in_bp(bus_dmamap_t map, void *buf, int len)
 1170 {
 1171         struct bounce_page *bpage;
 1172 
 1173         STAILQ_FOREACH(bpage, &map->bpages, links) {
 1174                 if ((vm_offset_t)buf >= bpage->datavaddr &&
 1175                     (vm_offset_t)buf + len <= bpage->datavaddr + 
 1176                     bpage->datacount)
 1177                         return (1);
 1178         }
 1179         return (0);
 1180 
 1181 }
 1182 
 1183 void
 1184 _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
 1185 {
 1186         struct mbuf *m;
 1187         struct uio *uio;
 1188         int resid;
 1189         struct iovec *iov;
 1190         
 1191         if (op == BUS_DMASYNC_POSTWRITE)
 1192                 return;
 1193         if (STAILQ_FIRST(&map->bpages))
 1194                 _bus_dmamap_sync_bp(dmat, map, op);
 1195         if (map->flags & DMAMAP_COHERENT)
 1196                 return;
 1197         CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags);
 1198         switch(map->flags & DMAMAP_TYPE_MASK) {
 1199         case DMAMAP_LINEAR:
 1200                 if (!(_bus_dma_buf_is_in_bp(map, map->buffer, map->len)))
 1201                         bus_dmamap_sync_buf(map->buffer, map->len, op);
 1202                 break;
 1203         case DMAMAP_MBUF:
 1204                 m = map->buffer;
 1205                 while (m) {
 1206                         if (m->m_len > 0 &&
 1207                             !(_bus_dma_buf_is_in_bp(map, m->m_data, m->m_len)))
 1208                                 bus_dmamap_sync_buf(m->m_data, m->m_len, op);
 1209                         m = m->m_next;
 1210                 }
 1211                 break;
 1212         case DMAMAP_UIO:
 1213                 uio = map->buffer;
 1214                 iov = uio->uio_iov;
 1215                 resid = uio->uio_resid;
 1216                 for (int i = 0; i < uio->uio_iovcnt && resid != 0; i++) {
 1217                         bus_size_t minlen = resid < iov[i].iov_len ? resid :
 1218                             iov[i].iov_len;
 1219                         if (minlen > 0) {
 1220                                 if (!_bus_dma_buf_is_in_bp(map, iov[i].iov_base,
 1221                                     minlen))
 1222                                         bus_dmamap_sync_buf(iov[i].iov_base,
 1223                                             minlen, op);
 1224                                 resid -= minlen;
 1225                         }
 1226                 }
 1227                 break;
 1228         default:
 1229                 break;
 1230         }
 1231         cpu_drain_writebuf();
 1232 }
 1233 
 1234 static void
 1235 init_bounce_pages(void *dummy __unused)
 1236 {
 1237 
 1238         total_bpages = 0;
 1239         STAILQ_INIT(&bounce_zone_list);
 1240         STAILQ_INIT(&bounce_map_waitinglist);
 1241         STAILQ_INIT(&bounce_map_callbacklist);
 1242         mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF);
 1243 }
 1244 SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL);
 1245 
 1246 static struct sysctl_ctx_list *
 1247 busdma_sysctl_tree(struct bounce_zone *bz)
 1248 {
 1249         return (&bz->sysctl_tree);
 1250 }
 1251 
 1252 static struct sysctl_oid *
 1253 busdma_sysctl_tree_top(struct bounce_zone *bz)
 1254 {
 1255         return (bz->sysctl_tree_top);
 1256 }
 1257 
 1258 static int
 1259 alloc_bounce_zone(bus_dma_tag_t dmat)
 1260 {
 1261         struct bounce_zone *bz;
 1262 
 1263         /* Check to see if we already have a suitable zone */
 1264         STAILQ_FOREACH(bz, &bounce_zone_list, links) {
 1265                 if ((dmat->alignment <= bz->alignment)
 1266                  && (dmat->lowaddr >= bz->lowaddr)) {
 1267                         dmat->bounce_zone = bz;
 1268                         return (0);
 1269                 }
 1270         }
 1271 
 1272         if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF,
 1273             M_NOWAIT | M_ZERO)) == NULL)
 1274                 return (ENOMEM);
 1275 
 1276         STAILQ_INIT(&bz->bounce_page_list);
 1277         bz->free_bpages = 0;
 1278         bz->reserved_bpages = 0;
 1279         bz->active_bpages = 0;
 1280         bz->lowaddr = dmat->lowaddr;
 1281         bz->alignment = MAX(dmat->alignment, PAGE_SIZE);
 1282         bz->map_count = 0;
 1283         snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount);
 1284         busdma_zonecount++;
 1285         snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr);
 1286         STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links);
 1287         dmat->bounce_zone = bz;
 1288 
 1289         sysctl_ctx_init(&bz->sysctl_tree);
 1290         bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree,
 1291             SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid,
 1292             CTLFLAG_RD, 0, "");
 1293         if (bz->sysctl_tree_top == NULL) {
 1294                 sysctl_ctx_free(&bz->sysctl_tree);
 1295                 return (0);     /* XXX error code? */
 1296         }
 1297 
 1298         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
 1299             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
 1300             "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0,
 1301             "Total bounce pages");
 1302         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
 1303             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
 1304             "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0,
 1305             "Free bounce pages");
 1306         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
 1307             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
 1308             "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0,
 1309             "Reserved bounce pages");
 1310         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
 1311             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
 1312             "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0,
 1313             "Active bounce pages");
 1314         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
 1315             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
 1316             "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0,
 1317             "Total bounce requests");
 1318         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
 1319             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
 1320             "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0,
 1321             "Total bounce requests that were deferred");
 1322         SYSCTL_ADD_STRING(busdma_sysctl_tree(bz),
 1323             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
 1324             "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, "");
 1325         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
 1326             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
 1327             "alignment", CTLFLAG_RD, &bz->alignment, 0, "");
 1328 
 1329         return (0);
 1330 }
 1331 
 1332 static int
 1333 alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
 1334 {
 1335         struct bounce_zone *bz;
 1336         int count;
 1337 
 1338         bz = dmat->bounce_zone;
 1339         count = 0;
 1340         while (numpages > 0) {
 1341                 struct bounce_page *bpage;
 1342 
 1343                 bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF,
 1344                                                      M_NOWAIT | M_ZERO);
 1345 
 1346                 if (bpage == NULL)
 1347                         break;
 1348                 bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF,
 1349                                                          M_NOWAIT, 0ul,
 1350                                                          bz->lowaddr,
 1351                                                          PAGE_SIZE,
 1352                                                          0);
 1353                 if (bpage->vaddr == 0) {
 1354                         free(bpage, M_DEVBUF);
 1355                         break;
 1356                 }
 1357                 bpage->busaddr = pmap_kextract(bpage->vaddr);
 1358                 bpage->vaddr_nocache = (vm_offset_t)arm_remap_nocache(
 1359                     (void *)bpage->vaddr, PAGE_SIZE);
 1360                 mtx_lock(&bounce_lock);
 1361                 STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links);
 1362                 total_bpages++;
 1363                 bz->total_bpages++;
 1364                 bz->free_bpages++;
 1365                 mtx_unlock(&bounce_lock);
 1366                 count++;
 1367                 numpages--;
 1368         }
 1369         return (count);
 1370 }
 1371 
 1372 static int
 1373 reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit)
 1374 {
 1375         struct bounce_zone *bz;
 1376         int pages;
 1377 
 1378         mtx_assert(&bounce_lock, MA_OWNED);
 1379         bz = dmat->bounce_zone;
 1380         pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved);
 1381         if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages))
 1382                 return (map->pagesneeded - (map->pagesreserved + pages));
 1383         bz->free_bpages -= pages;
 1384         bz->reserved_bpages += pages;
 1385         map->pagesreserved += pages;
 1386         pages = map->pagesneeded - map->pagesreserved;
 1387 
 1388         return (pages);
 1389 }
 1390 
 1391 static bus_addr_t
 1392 add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
 1393                 bus_size_t size)
 1394 {
 1395         struct bounce_zone *bz;
 1396         struct bounce_page *bpage;
 1397 
 1398         KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag"));
 1399         KASSERT(map != NULL, ("add_bounce_page: bad map %p", map));
 1400 
 1401         bz = dmat->bounce_zone;
 1402         if (map->pagesneeded == 0)
 1403                 panic("add_bounce_page: map doesn't need any pages");
 1404         map->pagesneeded--;
 1405 
 1406         if (map->pagesreserved == 0)
 1407                 panic("add_bounce_page: map doesn't need any pages");
 1408         map->pagesreserved--;
 1409 
 1410         mtx_lock(&bounce_lock);
 1411         bpage = STAILQ_FIRST(&bz->bounce_page_list);
 1412         if (bpage == NULL)
 1413                 panic("add_bounce_page: free page list is empty");
 1414 
 1415         STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links);
 1416         bz->reserved_bpages--;
 1417         bz->active_bpages++;
 1418         mtx_unlock(&bounce_lock);
 1419 
 1420         if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
 1421                 /* Page offset needs to be preserved. */
 1422                 bpage->vaddr |= vaddr & PAGE_MASK;
 1423                 bpage->busaddr |= vaddr & PAGE_MASK;
 1424         }
 1425         bpage->datavaddr = vaddr;
 1426         bpage->datacount = size;
 1427         STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
 1428         return (bpage->busaddr);
 1429 }
 1430 
 1431 static void
 1432 free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
 1433 {
 1434         struct bus_dmamap *map;
 1435         struct bounce_zone *bz;
 1436 
 1437         bz = dmat->bounce_zone;
 1438         bpage->datavaddr = 0;
 1439         bpage->datacount = 0;
 1440         if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
 1441                 /*
 1442                  * Reset the bounce page to start at offset 0.  Other uses
 1443                  * of this bounce page may need to store a full page of
 1444                  * data and/or assume it starts on a page boundary.
 1445                  */
 1446                 bpage->vaddr &= ~PAGE_MASK;
 1447                 bpage->busaddr &= ~PAGE_MASK;
 1448         }
 1449 
 1450         mtx_lock(&bounce_lock);
 1451         STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links);
 1452         bz->free_bpages++;
 1453         bz->active_bpages--;
 1454         if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
 1455                 if (reserve_bounce_pages(map->dmat, map, 1) == 0) {
 1456                         STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
 1457                         STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
 1458                                            map, links);
 1459                         busdma_swi_pending = 1;
 1460                         bz->total_deferred++;
 1461                         swi_sched(vm_ih, 0);
 1462                 }
 1463         }
 1464         mtx_unlock(&bounce_lock);
 1465 }
 1466 
 1467 void
 1468 busdma_swi(void)
 1469 {
 1470         bus_dma_tag_t dmat;
 1471         struct bus_dmamap *map;
 1472 
 1473         mtx_lock(&bounce_lock);
 1474         while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
 1475                 STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
 1476                 mtx_unlock(&bounce_lock);
 1477                 dmat = map->dmat;
 1478                 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK);
 1479                 bus_dmamap_load(map->dmat, map, map->buffer, map->len,
 1480                     map->callback, map->callback_arg, /*flags*/0);
 1481                 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK);
 1482                 mtx_lock(&bounce_lock);
 1483         }
 1484         mtx_unlock(&bounce_lock);
 1485 }

Cache object: 3f3bd99f014a472f041f3e5d6ce68373


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.