1 /* $NetBSD: cpufunc_asm_arm7tdmi.S,v 1.1 2001/11/10 23:14:09 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2001 John Fremlin
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Causality Limited.
18 * 4. The name of Causality Limited may not be used to endorse or promote
19 * products derived from this software without specific prior written
20 * permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS
23 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT,
26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * ARM7TDMI assembly functions for CPU / MMU / TLB specific operations
35 *
36 */
37
38 #include <machine/asm.h>
39 __FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc_asm_arm7tdmi.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
40
41 /*
42 * Functions to set the MMU Translation Table Base register
43 *
44 * We need to clean and flush the cache as it uses virtual
45 * addresses that are about to change.
46 */
47 ENTRY(arm7tdmi_setttb)
48 mov r1, r0 /* store the TTB in a safe place */
49 mov r2, lr /* ditto with lr */
50
51 bl _C_LABEL(arm7tdmi_cache_flushID)
52
53 /* Write the TTB */
54 mcr p15, 0, r1, c2, c0, 0
55
56 /* If we have updated the TTB we must flush the TLB */
57 bl _C_LABEL(arm7tdmi_tlb_flushID)
58
59 /* For good measure we will flush the IDC as well */
60 bl _C_LABEL(arm7tdmi_cache_flushID)
61
62 mov pc, r2
63
64 /*
65 * TLB functions
66 */
67 ENTRY(arm7tdmi_tlb_flushID)
68 mov r0, #0
69 mcr p15, 0, r0, c8, c7, 0
70 RET
71
72 ENTRY(arm7tdmi_tlb_flushID_SE)
73 mcr p15, 0, r0, c8, c7, 1
74 RET
75
76 /*
77 * Cache functions
78 */
79 ENTRY(arm7tdmi_cache_flushID)
80 mov r0, #0
81
82 mcr p15, 0, r0, c7, c7, 0
83
84 /* Make sure that the pipeline is emptied */
85 mov r0, r0
86 mov r0, r0
87
88 RET
89
90 /*
91 * Context switch.
92 *
93 * These is the CPU-specific parts of the context switcher cpu_switch()
94 * These functions actually perform the TTB reload.
95 *
96 * NOTE: Special calling convention
97 * r1, r4-r13 must be preserved
98 */
99 ENTRY(arm7tdmi_context_switch)
100 b _C_LABEL(arm7tdmi_setttb)
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