db_interface.c

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    1 /*      $NetBSD: db_interface.c,v 1.33 2003/08/25 04:51:10 mrg Exp $    */
    2 
    3 /*-
    4  * Copyright (c) 1996 Scott K. Stevens
    5  *
    6  * Mach Operating System
    7  * Copyright (c) 1991,1990 Carnegie Mellon University
    8  * All Rights Reserved.
    9  * 
   10  * Permission to use, copy, modify and distribute this software and its
   11  * documentation is hereby granted, provided that both the copyright
   12  * notice and this permission notice appear in all copies of the
   13  * software, derivative works or modified versions, and any portions
   14  * thereof, and that both notices appear in supporting documentation.
   15  * 
   16  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
   17  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
   18  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
   19  * 
   20  * Carnegie Mellon requests users of this software to return to
   21  * 
   22  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
   23  *  School of Computer Science
   24  *  Carnegie Mellon University
   25  *  Pittsburgh PA 15213-3890
   26  * 
   27  * any improvements or extensions that they make and grant Carnegie the
   28  * rights to redistribute these changes.
   29  *
   30  *      From: db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
   31  */
   32 
   33 /*
   34  * Interface to new debugger.
   35  */
   36 
   37 #include <sys/cdefs.h>
   38 __FBSDID("$FreeBSD: releng/6.2/sys/arm/arm/db_interface.c 147543 2005-06-23 11:38:47Z cognet $");
   39 #include "opt_ddb.h"
   40 
   41 #include <sys/param.h>
   42 #include <sys/proc.h>
   43 #include <sys/reboot.h>
   44 #include <sys/systm.h>  /* just for boothowto */
   45 #include <sys/exec.h>
   46 #ifdef KDB
   47 #include <sys/kdb.h>
   48 #endif
   49 
   50 #include <vm/vm.h>
   51 #include <vm/pmap.h>
   52 #include <vm/vm_map.h>
   53 #include <vm/vm_extern.h>
   54 
   55 #include <machine/db_machdep.h>
   56 #include <machine/katelib.h>
   57 #include <machine/vmparam.h>
   58 #include <machine/cpu.h>
   59 
   60 #include <ddb/ddb.h>
   61 #include <ddb/db_access.h>
   62 #include <ddb/db_command.h>
   63 #include <ddb/db_output.h>
   64 #include <ddb/db_variables.h>
   65 #include <ddb/db_sym.h>
   66 #include <sys/cons.h>
   67 
   68 static int nil = 0;
   69 
   70 int db_access_und_sp (struct db_variable *, db_expr_t *, int);
   71 int db_access_abt_sp (struct db_variable *, db_expr_t *, int);
   72 int db_access_irq_sp (struct db_variable *, db_expr_t *, int);
   73 
   74 static db_varfcn_t db_frame;
   75 
   76 #define DB_OFFSET(x)    (db_expr_t *)offsetof(struct trapframe, x)
   77 struct db_variable db_regs[] = {
   78         { "spsr", DB_OFFSET(tf_spsr),   db_frame },
   79         { "r0", DB_OFFSET(tf_r0),       db_frame },
   80         { "r1", DB_OFFSET(tf_r1),       db_frame },
   81         { "r2", DB_OFFSET(tf_r2),       db_frame },
   82         { "r3", DB_OFFSET(tf_r3),       db_frame },
   83         { "r4", DB_OFFSET(tf_r4),       db_frame },
   84         { "r5", DB_OFFSET(tf_r5),       db_frame },
   85         { "r6", DB_OFFSET(tf_r6),       db_frame },
   86         { "r7", DB_OFFSET(tf_r7),       db_frame },
   87         { "r8", DB_OFFSET(tf_r8),       db_frame },
   88         { "r9", DB_OFFSET(tf_r9),       db_frame },
   89         { "r10", DB_OFFSET(tf_r10),     db_frame },
   90         { "r11", DB_OFFSET(tf_r11),     db_frame },
   91         { "r12", DB_OFFSET(tf_r12),     db_frame },
   92         { "usr_sp", DB_OFFSET(tf_usr_sp), db_frame },
   93         { "usr_lr", DB_OFFSET(tf_usr_lr), db_frame },
   94         { "svc_sp", DB_OFFSET(tf_svc_sp), db_frame },
   95         { "svc_lr", DB_OFFSET(tf_svc_lr), db_frame },
   96         { "pc", DB_OFFSET(tf_pc),       db_frame },
   97         { "und_sp", &nil, db_access_und_sp, },
   98         { "abt_sp", &nil, db_access_abt_sp, },
   99         { "irq_sp", &nil, db_access_irq_sp, },
  100 };
  101 
  102 struct db_variable *db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]);
  103 
  104 int
  105 db_access_und_sp(struct db_variable *vp, db_expr_t *valp, int rw)
  106 {
  107 
  108         if (rw == DB_VAR_GET) {
  109                 *valp = get_stackptr(PSR_UND32_MODE);
  110                 return (1);
  111         }
  112         return(0);
  113 }
  114 
  115 int
  116 db_access_abt_sp(struct db_variable *vp, db_expr_t *valp, int rw)
  117 {
  118 
  119         if (rw == DB_VAR_GET) {
  120                 *valp = get_stackptr(PSR_ABT32_MODE);
  121                 return (1);
  122         }
  123         return(0);
  124 }
  125 
  126 int
  127 db_access_irq_sp(struct db_variable *vp, db_expr_t *valp, int rw)
  128 {
  129 
  130         if (rw == DB_VAR_GET) {
  131                 *valp = get_stackptr(PSR_IRQ32_MODE);
  132                 return (1);
  133         }
  134         return(0);
  135 }
  136 
  137 int db_frame(struct db_variable *vp, db_expr_t *valp, int rw)
  138 {
  139         int *reg;
  140 
  141         if (kdb_frame == NULL)
  142                 return (0);
  143 
  144         reg = (int *)((uintptr_t)kdb_frame + (db_expr_t)vp->valuep);
  145         if (rw == DB_VAR_GET)
  146                 *valp = *reg;
  147         else
  148                 *reg = *valp;
  149         return(1);
  150 }
  151 
  152 void
  153 db_show_mdpcpu(struct pcpu *pc)
  154 {
  155 }
  156 int
  157 db_validate_address(vm_offset_t addr)
  158 {
  159         struct proc *p = curproc;
  160         struct pmap *pmap;
  161 
  162         if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap ||
  163 #ifndef ARM32_NEW_VM_LAYOUT
  164             addr >= VM_MAXUSER_ADDRESS
  165 #else
  166             addr >= VM_MIN_KERNEL_ADDRESS
  167 #endif
  168            )
  169                 pmap = pmap_kernel();
  170         else
  171                 pmap = p->p_vmspace->vm_map.pmap;
  172 
  173         return (pmap_extract(pmap, addr) == FALSE);
  174 }
  175 
  176 /*
  177  * Read bytes from kernel address space for debugger.
  178  */
  179 int
  180 db_read_bytes(addr, size, data)
  181         vm_offset_t     addr;
  182         size_t  size;
  183         char    *data;
  184 {
  185         char    *src = (char *)addr;
  186 
  187         if (db_validate_address((u_int)src)) {
  188                 db_printf("address %p is invalid\n", src);
  189                 return (-1);
  190         }
  191 
  192         if (size == 4 && (addr & 3) == 0 && ((uintptr_t)data & 3) == 0) {
  193                 *((int*)data) = *((int*)src);
  194                 return (0);
  195         }
  196 
  197         if (size == 2 && (addr & 1) == 0 && ((uintptr_t)data & 1) == 0) {
  198                 *((short*)data) = *((short*)src);
  199                 return (0);
  200         }
  201 
  202         while (size-- > 0) {
  203                 if (db_validate_address((u_int)src)) {
  204                         db_printf("address %p is invalid\n", src);
  205                         return (-1);
  206                 }
  207                 *data++ = *src++;
  208         }
  209         return (0);
  210 }
  211 
  212 /*
  213  * Write bytes to kernel address space for debugger.
  214  */
  215 int
  216 db_write_bytes(vm_offset_t addr, size_t size, char *data)
  217 {
  218         char *dst;
  219         size_t loop;
  220 
  221         dst = (char *)addr;
  222         if (db_validate_address((u_int)dst)) {
  223                 db_printf("address %p is invalid\n", dst);
  224                 return (0);
  225         }
  226 
  227         if (size == 4 && (addr & 3) == 0 && ((uintptr_t)data & 3) == 0)
  228                 *((int*)dst) = *((int*)data);
  229         else
  230         if (size == 2 && (addr & 1) == 0 && ((uintptr_t)data & 1) == 0)
  231                 *((short*)dst) = *((short*)data);
  232         else {
  233                 loop = size;
  234                 while (loop-- > 0) {
  235                         if (db_validate_address((u_int)dst)) {
  236                                 db_printf("address %p is invalid\n", dst);
  237                                 return (-1);
  238                         }
  239                         *dst++ = *data++;
  240                 }
  241         }
  242 
  243         /* make sure the caches and memory are in sync */
  244         cpu_icache_sync_range(addr, size);
  245 
  246         /* In case the current page tables have been modified ... */
  247         cpu_tlb_flushID();
  248         cpu_cpwait();
  249         return (0);
  250 }
  251 
  252 
  253 static u_int
  254 db_fetch_reg(int reg)
  255 {
  256 
  257         switch (reg) {
  258         case 0:
  259                 return (kdb_frame->tf_r0);
  260         case 1:
  261                 return (kdb_frame->tf_r1);
  262         case 2:
  263                 return (kdb_frame->tf_r2);
  264         case 3:
  265                 return (kdb_frame->tf_r3);
  266         case 4:
  267                 return (kdb_frame->tf_r4);
  268         case 5:
  269                 return (kdb_frame->tf_r5);
  270         case 6:
  271                 return (kdb_frame->tf_r6);
  272         case 7:
  273                 return (kdb_frame->tf_r7);
  274         case 8:
  275                 return (kdb_frame->tf_r8);
  276         case 9:
  277                 return (kdb_frame->tf_r9);
  278         case 10:
  279                 return (kdb_frame->tf_r10);
  280         case 11:
  281                 return (kdb_frame->tf_r11);
  282         case 12:
  283                 return (kdb_frame->tf_r12);
  284         case 13:
  285                 return (kdb_frame->tf_svc_sp);
  286         case 14:
  287                 return (kdb_frame->tf_svc_lr);
  288         case 15:
  289                 return (kdb_frame->tf_pc);
  290         default:
  291                 panic("db_fetch_reg: botch");
  292         }
  293 }
  294 
  295 u_int
  296 branch_taken(u_int insn, db_addr_t pc)
  297 {
  298         u_int addr, nregs;
  299 
  300         switch ((insn >> 24) & 0xf) {
  301         case 0xa:       /* b ... */
  302         case 0xb:       /* bl ... */
  303                 addr = ((insn << 2) & 0x03ffffff);
  304                 if (addr & 0x02000000)
  305                         addr |= 0xfc000000;
  306                 return (pc + 8 + addr);
  307         case 0x7:       /* ldr pc, [pc, reg, lsl #2] */
  308                 addr = db_fetch_reg(insn & 0xf);
  309                 addr = pc + 8 + (addr << 2);
  310                 db_read_bytes(addr, 4, (char *)&addr);
  311                 return (addr);
  312         case 0x1:       /* mov pc, reg */
  313                 addr = db_fetch_reg(insn & 0xf);
  314                 return (addr);
  315         case 0x8:       /* ldmxx reg, {..., pc} */
  316         case 0x9:
  317                 addr = db_fetch_reg((insn >> 16) & 0xf);
  318                 nregs = (insn  & 0x5555) + ((insn  >> 1) & 0x5555);
  319                 nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333);
  320                 nregs = (nregs + (nregs >> 4)) & 0x0f0f;
  321                 nregs = (nregs + (nregs >> 8)) & 0x001f;
  322                 switch ((insn >> 23) & 0x3) {
  323                 case 0x0:       /* ldmda */
  324                         addr = addr - 0;
  325                         break;
  326                 case 0x1:       /* ldmia */
  327                         addr = addr + 0 + ((nregs - 1) << 2);
  328                         break;
  329                 case 0x2:       /* ldmdb */
  330                         addr = addr - 4;
  331                         break;
  332                 case 0x3:       /* ldmib */
  333                         addr = addr + 4 + ((nregs - 1) << 2);
  334                         break;
  335                 }
  336                 db_read_bytes(addr, 4, (char *)&addr);
  337                 return (addr);
  338         default:
  339                 panic("branch_taken: botch");
  340         }
  341 }
  342
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FreeBSD/Linux Kernel Cross Reference sys/arm/arm/db_interface.c

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sys/arm/arm/db_interface.c
