Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/arm/arm/exception.S
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1 /* $NetBSD: exception.S,v 1.13 2003/10/31 16:30:15 scw Exp $ */ 2 3 /*- 4 * Copyright (c) 1994-1997 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * exception.S 40 * 41 * Low level handlers for exception vectors 42 * 43 * Created : 24/09/94 44 * 45 * Based on kate/display/abort.s 46 * 47 */ 48 49 #include "assym.s" 50 51 #include <machine/asm.h> 52 #include <machine/armreg.h> 53 #include <machine/asmacros.h> 54 __FBSDID("$FreeBSD: releng/7.3/sys/arm/arm/exception.S 180909 2008-07-28 16:18:28Z thompsa $"); 55 56 .text 57 .align 0 58 59 AST_LOCALS 60 61 /* 62 * reset_entry: 63 * 64 * Handler for Reset exception. 65 */ 66 ASENTRY_NP(reset_entry) 67 adr r0, Lreset_panicmsg 68 bl _C_LABEL(panic) 69 /* NOTREACHED */ 70 Lreset_panicmsg: 71 .asciz "Reset vector called, LR = 0x%08x" 72 .balign 4 73 74 /* 75 * swi_entry 76 * 77 * Handler for the Software Interrupt exception. 78 */ 79 ASENTRY_NP(swi_entry) 80 PUSHFRAME 81 82 mov r0, sp /* Pass the frame to any function */ 83 bl _C_LABEL(swi_handler) /* It's a SWI ! */ 84 85 DO_AST 86 PULLFRAME 87 movs pc, lr /* Exit */ 88 89 /* 90 * prefetch_abort_entry: 91 * 92 * Handler for the Prefetch Abort exception. 93 */ 94 ASENTRY_NP(prefetch_abort_entry) 95 #ifdef __XSCALE__ 96 nop /* Make absolutely sure any pending */ 97 nop /* imprecise aborts have occurred. */ 98 #endif 99 sub lr, lr, #0x00000004 /* Adjust the lr */ 100 101 PUSHFRAMEINSVC 102 ldr r1, Lprefetch_abort_handler_address 103 adr lr, exception_exit 104 mov r0, sp /* pass the stack pointer as r0 */ 105 ldr pc, [r1] 106 107 Lprefetch_abort_handler_address: 108 .word _C_LABEL(prefetch_abort_handler_address) 109 110 .data 111 .global _C_LABEL(prefetch_abort_handler_address) 112 113 _C_LABEL(prefetch_abort_handler_address): 114 .word abortprefetch 115 116 .text 117 abortprefetch: 118 adr r0, abortprefetchmsg 119 b _C_LABEL(panic) 120 121 abortprefetchmsg: 122 .asciz "abortprefetch" 123 .align 0 124 125 /* 126 * data_abort_entry: 127 * 128 * Handler for the Data Abort exception. 129 */ 130 ASENTRY_NP(data_abort_entry) 131 #ifdef __XSCALE__ 132 nop /* Make absolutely sure any pending */ 133 nop /* imprecise aborts have occurred. */ 134 #endif 135 136 sub lr, lr, #0x00000008 /* Adjust the lr */ 137 PUSHFRAMEINSVC /* Push trap frame and switch */ 138 /* to SVC32 mode */ 139 ldr r1, Ldata_abort_handler_address 140 adr lr, exception_exit 141 mov r0, sp /* pass the stack pointer as r0 */ 142 ldr pc, [r1] 143 Ldata_abort_handler_address: 144 .word _C_LABEL(data_abort_handler_address) 145 146 .data 147 .global _C_LABEL(data_abort_handler_address) 148 _C_LABEL(data_abort_handler_address): 149 .word abortdata 150 151 .text 152 abortdata: 153 adr r0, abortdatamsg 154 b _C_LABEL(panic) 155 156 abortdatamsg: 157 .asciz "abortdata" 158 .align 0 159 160 /* 161 * address_exception_entry: 162 * 163 * Handler for the Address Exception exception. 164 * 165 * NOTE: This exception isn't really used on arm32. We 166 * print a warning message to the console and then treat 167 * it like a Data Abort. 168 */ 169 ASENTRY_NP(address_exception_entry) 170 mrs r1, cpsr_all 171 mrs r2, spsr_all 172 mov r3, lr 173 adr r0, Laddress_exception_msg 174 bl _C_LABEL(printf) /* XXX CLOBBERS LR!! */ 175 b data_abort_entry 176 Laddress_exception_msg: 177 .asciz "Address Exception CPSR=0x%08x SPSR=0x%08x LR=0x%08x\n" 178 .balign 4 179 180 /* 181 * General exception exit handler 182 * (Placed here to be within range of all the references to it) 183 * 184 * It exits straight away if not returning to USR mode. 185 * This loops around delivering any pending ASTs. 186 * Interrupts are disabled at suitable points to avoid ASTs 187 * being posted between testing and exit to user mode. 188 * 189 * This function uses PULLFRAMEFROMSVCANDEXIT and 190 * DO_AST 191 * only be called if the exception handler used PUSHFRAMEINSVC 192 * 193 */ 194 195 exception_exit: 196 DO_AST 197 PULLFRAMEFROMSVCANDEXIT 198 199 /* 200 * undefined_entry: 201 * 202 * Handler for the Undefined Instruction exception. 203 * 204 * We indirect the undefined vector via the handler address 205 * in the data area. Entry to the undefined handler must 206 * look like direct entry from the vector. 207 */ 208 ASENTRY_NP(undefined_entry) 209 stmfd sp!, {r0, r1} 210 ldr r0, Lundefined_handler_indirection 211 ldr r1, [sp], #0x0004 212 str r1, [r0, #0x0000] 213 ldr r1, [sp], #0x0004 214 str r1, [r0, #0x0004] 215 ldmia r0, {r0, r1, pc} 216 217 218 Lundefined_handler_indirection: 219 .word Lundefined_handler_indirection_data 220 221 /* 222 * assembly bounce code for calling the kernel 223 * undefined instruction handler. This uses 224 * a standard trap frame and is called in SVC mode. 225 */ 226 227 ENTRY_NP(undefinedinstruction_bounce) 228 PUSHFRAMEINSVC 229 230 mov r0, sp 231 adr lr, exception_exit 232 b _C_LABEL(undefinedinstruction) 233 234 .data 235 .align 0 236 237 /* 238 * Indirection data 239 * 2 words use for preserving r0 and r1 240 * 3rd word contains the undefined handler address. 241 */ 242 243 Lundefined_handler_indirection_data: 244 .word 0 245 .word 0 246 247 .global _C_LABEL(undefined_handler_address) 248 _C_LABEL(undefined_handler_address): 249 .word _C_LABEL(undefinedinstruction_bounce)
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