FreeBSD/Linux Kernel Cross Reference
sys/arm/arm/fiq_subr.S
1 /* $NetBSD: fiq_subr.S,v 1.3 2002/04/12 18:50:31 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 */
38
39
40 #include <machine/asm.h>
41 __FBSDID("$FreeBSD$");
42
43 #include <machine/armreg.h>
44
45 /*
46 * MODE_CHANGE_NOP should be inserted between a mode change and a
47 * banked register (R8--R15) access.
48 */
49 #if defined(CPU_ARM2) || defined(CPU_ARM250)
50 #define MODE_CHANGE_NOP mov r0, r0
51 #else
52 #define MODE_CHANGE_NOP /* Data sheet says ARM3 doesn't need it */
53 #endif
54
55 #define SWITCH_TO_FIQ_MODE \
56 mrs r2, cpsr ; \
57 mov r3, r2 ; \
58 bic r2, r2, #(PSR_MODE) ; \
59 orr r2, r2, #(PSR_FIQ32_MODE) ; \
60 msr cpsr_fsxc, r2
61
62 #define BACK_TO_SVC_MODE \
63 msr cpsr_fsxc, r3
64
65 /*
66 * fiq_getregs:
67 *
68 * Fetch the FIQ mode banked registers into the fiqhandler
69 * structure.
70 */
71 ENTRY(fiq_getregs)
72 SWITCH_TO_FIQ_MODE
73
74 stmia r0, {r8-r13}
75
76 BACK_TO_SVC_MODE
77 RET
78 END(fiq_getregs)
79
80 /*
81 * fiq_setregs:
82 *
83 * Load the FIQ mode banked registers from the fiqhandler
84 * structure.
85 */
86 ENTRY(fiq_setregs)
87 SWITCH_TO_FIQ_MODE
88
89 ldmia r0, {r8-r13}
90
91 BACK_TO_SVC_MODE
92 RET
93 END(fiq_setregs)
94
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