The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/arm/arm/machdep.c

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    1 /*      $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $        */
    2 
    3 /*-
    4  * Copyright (c) 2004 Olivier Houchard
    5  * Copyright (c) 1994-1998 Mark Brinicombe.
    6  * Copyright (c) 1994 Brini.
    7  * All rights reserved.
    8  *
    9  * This code is derived from software written for Brini by Mark Brinicombe
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. All advertising materials mentioning features or use of this software
   20  *    must display the following acknowledgement:
   21  *      This product includes software developed by Mark Brinicombe
   22  *      for the NetBSD Project.
   23  * 4. The name of the company nor the name of the author may be used to
   24  *    endorse or promote products derived from this software without specific
   25  *    prior written permission.
   26  *
   27  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
   28  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   29  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   30  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
   31  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   32  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   33  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   35  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   36  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   37  * SUCH DAMAGE.
   38  *
   39  * Machine dependant functions for kernel setup
   40  *
   41  * Created      : 17/09/94
   42  * Updated      : 18/04/01 updated for new wscons
   43  */
   44 
   45 #include "opt_compat.h"
   46 #include <sys/cdefs.h>
   47 __FBSDID("$FreeBSD$");
   48 
   49 #include <sys/param.h>
   50 #include <sys/proc.h>
   51 #include <sys/systm.h>
   52 #include <sys/bio.h>
   53 #include <sys/buf.h>
   54 #include <sys/bus.h>
   55 #include <sys/cons.h>
   56 #include <sys/cpu.h>
   57 #include <sys/exec.h>
   58 #include <sys/imgact.h>
   59 #include <sys/kernel.h>
   60 #include <sys/ktr.h>
   61 #include <sys/linker.h>
   62 #include <sys/lock.h>
   63 #include <sys/malloc.h>
   64 #include <sys/mutex.h>
   65 #include <sys/pcpu.h>
   66 #include <sys/ptrace.h>
   67 #include <sys/signalvar.h>
   68 #include <sys/sysent.h>
   69 #include <sys/sysproto.h>
   70 #include <sys/uio.h>
   71 
   72 #include <vm/vm.h>
   73 #include <vm/pmap.h>
   74 #include <vm/vm_map.h>
   75 #include <vm/vm_object.h>
   76 #include <vm/vm_page.h>
   77 #include <vm/vm_pager.h>
   78 #include <vm/vnode_pager.h>
   79 
   80 #include <machine/armreg.h>
   81 #include <machine/cpu.h>
   82 #include <machine/machdep.h>
   83 #include <machine/md_var.h>
   84 #include <machine/metadata.h>
   85 #include <machine/pcb.h>
   86 #include <machine/pmap.h>
   87 #include <machine/reg.h>
   88 #include <machine/trap.h>
   89 #include <machine/undefined.h>
   90 #include <machine/vmparam.h>
   91 #include <machine/sysarch.h>
   92 
   93 uint32_t cpu_reset_address = 0;
   94 int cold = 1;
   95 vm_offset_t vector_page;
   96 
   97 long realmem = 0;
   98 
   99 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
  100 int (*_arm_bzero)(void *, int, int) = NULL;
  101 int _min_memcpy_size = 0;
  102 int _min_bzero_size = 0;
  103 
  104 void
  105 sendsig(catcher, ksi, mask)
  106         sig_t catcher;
  107         ksiginfo_t *ksi;
  108         sigset_t *mask;
  109 {
  110         struct thread *td;
  111         struct proc *p;
  112         struct trapframe *tf;
  113         struct sigframe *fp, frame;
  114         struct sigacts *psp;
  115         int onstack;
  116         int sig;
  117         int code;
  118 
  119         td = curthread;
  120         p = td->td_proc;
  121         PROC_LOCK_ASSERT(p, MA_OWNED);
  122         sig = ksi->ksi_signo;
  123         code = ksi->ksi_code;
  124         psp = p->p_sigacts;
  125         mtx_assert(&psp->ps_mtx, MA_OWNED);
  126         tf = td->td_frame;
  127         onstack = sigonstack(tf->tf_usr_sp);
  128 
  129         CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
  130             catcher, sig);
  131 
  132         /* Allocate and validate space for the signal handler context. */
  133         if ((td->td_flags & TDP_ALTSTACK) != 0 && !(onstack) &&
  134             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  135                 fp = (struct sigframe *)(td->td_sigstk.ss_sp + 
  136                     td->td_sigstk.ss_size);
  137 #if defined(COMPAT_43)
  138                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  139 #endif
  140         } else
  141                 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
  142                  
  143         /* make room on the stack */
  144         fp--;
  145         
  146         /* make the stack aligned */
  147         fp = (struct sigframe *)STACKALIGN(fp);
  148         /* Populate the siginfo frame. */
  149         get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
  150         frame.sf_si = ksi->ksi_info;
  151         frame.sf_uc.uc_sigmask = *mask;
  152         frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 
  153             ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
  154         frame.sf_uc.uc_stack = td->td_sigstk;
  155         mtx_unlock(&psp->ps_mtx);
  156         PROC_UNLOCK(td->td_proc);
  157 
  158         /* Copy the sigframe out to the user's stack. */
  159         if (copyout(&frame, fp, sizeof(*fp)) != 0) {
  160                 /* Process has trashed its stack. Kill it. */
  161                 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
  162                 PROC_LOCK(p);
  163                 sigexit(td, SIGILL);
  164         }
  165 
  166         /* Translate the signal if appropriate. */
  167         if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
  168                 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  169 
  170         /*
  171          * Build context to run handler in.  We invoke the handler
  172          * directly, only returning via the trampoline.  Note the
  173          * trampoline version numbers are coordinated with machine-
  174          * dependent code in libc.
  175          */
  176         
  177         tf->tf_r0 = sig;
  178         tf->tf_r1 = (register_t)&fp->sf_si;
  179         tf->tf_r2 = (register_t)&fp->sf_uc;
  180 
  181         /* the trampoline uses r5 as the uc address */
  182         tf->tf_r5 = (register_t)&fp->sf_uc;
  183         tf->tf_pc = (register_t)catcher;
  184         tf->tf_usr_sp = (register_t)fp;
  185         tf->tf_usr_lr = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode));
  186 
  187         CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
  188             tf->tf_usr_sp);
  189 
  190         PROC_LOCK(p);
  191         mtx_lock(&psp->ps_mtx);
  192 }
  193 
  194 struct kva_md_info kmi;
  195 
  196 /*
  197  * arm32_vector_init:
  198  *
  199  *      Initialize the vector page, and select whether or not to
  200  *      relocate the vectors.
  201  *
  202  *      NOTE: We expect the vector page to be mapped at its expected
  203  *      destination.
  204  */
  205 
  206 extern unsigned int page0[], page0_data[];
  207 void
  208 arm_vector_init(vm_offset_t va, int which)
  209 {
  210         unsigned int *vectors = (int *) va;
  211         unsigned int *vectors_data = vectors + (page0_data - page0);
  212         int vec;
  213 
  214         /*
  215          * Loop through the vectors we're taking over, and copy the
  216          * vector's insn and data word.
  217          */
  218         for (vec = 0; vec < ARM_NVEC; vec++) {
  219                 if ((which & (1 << vec)) == 0) {
  220                         /* Don't want to take over this vector. */
  221                         continue;
  222                 }
  223                 vectors[vec] = page0[vec];
  224                 vectors_data[vec] = page0_data[vec];
  225         }
  226 
  227         /* Now sync the vectors. */
  228         cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int));
  229 
  230         vector_page = va;
  231 
  232         if (va == ARM_VECTORS_HIGH) {
  233                 /*
  234                  * Assume the MD caller knows what it's doing here, and
  235                  * really does want the vector page relocated.
  236                  *
  237                  * Note: This has to be done here (and not just in
  238                  * cpu_setup()) because the vector page needs to be
  239                  * accessible *before* cpu_startup() is called.
  240                  * Think ddb(9) ...
  241                  *
  242                  * NOTE: If the CPU control register is not readable,
  243                  * this will totally fail!  We'll just assume that
  244                  * any system that has high vector support has a
  245                  * readable CPU control register, for now.  If we
  246                  * ever encounter one that does not, we'll have to
  247                  * rethink this.
  248                  */
  249                 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
  250         }
  251 }
  252 
  253 static void
  254 cpu_startup(void *dummy)
  255 {
  256         struct pcb *pcb = thread0.td_pcb;
  257 #ifndef ARM_CACHE_LOCK_ENABLE
  258         vm_page_t m;
  259 #endif
  260 
  261         cpu_setup("");
  262         identify_arm_cpu();
  263 
  264         printf("real memory  = %ju (%ju MB)\n", (uintmax_t)ptoa(physmem),
  265             (uintmax_t)ptoa(physmem) / 1048576);
  266         realmem = physmem;
  267 
  268         /*
  269          * Display the RAM layout.
  270          */
  271         if (bootverbose) {
  272                 int indx;
  273 
  274                 printf("Physical memory chunk(s):\n");
  275                 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
  276                         vm_paddr_t size;
  277 
  278                         size = phys_avail[indx + 1] - phys_avail[indx];
  279                         printf("%#08jx - %#08jx, %ju bytes (%ju pages)\n",
  280                             (uintmax_t)phys_avail[indx],
  281                             (uintmax_t)phys_avail[indx + 1] - 1,
  282                             (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
  283                 }
  284         }
  285 
  286         vm_ksubmap_init(&kmi);
  287 
  288         printf("avail memory = %ju (%ju MB)\n",
  289             (uintmax_t)ptoa(cnt.v_free_count),
  290             (uintmax_t)ptoa(cnt.v_free_count) / 1048576);
  291 
  292         bufinit();
  293         vm_pager_bufferinit();
  294         pcb->un_32.pcb32_und_sp = (u_int)thread0.td_kstack +
  295             USPACE_UNDEF_STACK_TOP;
  296         pcb->un_32.pcb32_sp = (u_int)thread0.td_kstack +
  297             USPACE_SVC_STACK_TOP;
  298         vector_page_setprot(VM_PROT_READ);
  299         pmap_set_pcb_pagedir(pmap_kernel(), pcb);
  300         thread0.td_frame = (struct trapframe *)pcb->un_32.pcb32_sp - 1;
  301         pmap_postinit();
  302 #ifdef ARM_CACHE_LOCK_ENABLE
  303         pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
  304         arm_lock_cache_line(ARM_TP_ADDRESS);
  305 #else
  306         m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
  307         pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
  308 #endif
  309 }
  310 
  311 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
  312 
  313 /* Get current clock frequency for the given cpu id. */
  314 int
  315 cpu_est_clockrate(int cpu_id, uint64_t *rate)
  316 {
  317 
  318         return (ENXIO);
  319 }
  320 
  321 void
  322 cpu_idle(void)
  323 {
  324         cpu_sleep(0);
  325 }
  326 
  327 int
  328 fill_regs(struct thread *td, struct reg *regs)
  329 {
  330         struct trapframe *tf = td->td_frame;
  331         bcopy(&tf->tf_r0, regs->r, sizeof(regs->r));
  332         regs->r_sp = tf->tf_usr_sp;
  333         regs->r_lr = tf->tf_usr_lr;
  334         regs->r_pc = tf->tf_pc;
  335         regs->r_cpsr = tf->tf_spsr;
  336         return (0);
  337 }
  338 int
  339 fill_fpregs(struct thread *td, struct fpreg *regs)
  340 {
  341         bzero(regs, sizeof(*regs));
  342         return (0);
  343 }
  344 
  345 int
  346 set_regs(struct thread *td, struct reg *regs)
  347 {
  348         struct trapframe *tf = td->td_frame;
  349         
  350         bcopy(regs->r, &tf->tf_r0, sizeof(regs->r));
  351         tf->tf_usr_sp = regs->r_sp;
  352         tf->tf_usr_lr = regs->r_lr;
  353         tf->tf_pc = regs->r_pc;
  354         tf->tf_spsr &=  ~PSR_FLAGS;
  355         tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
  356         return (0);                                                             
  357 }
  358 
  359 int
  360 set_fpregs(struct thread *td, struct fpreg *regs)
  361 {
  362         return (0);
  363 }
  364 
  365 int
  366 fill_dbregs(struct thread *td, struct dbreg *regs)
  367 {
  368         return (0);
  369 }
  370 int
  371 set_dbregs(struct thread *td, struct dbreg *regs)
  372 {
  373         return (0);
  374 }
  375 
  376 
  377 static int
  378 ptrace_read_int(struct thread *td, vm_offset_t addr, u_int32_t *v)
  379 {
  380         struct iovec iov;
  381         struct uio uio;
  382 
  383         PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
  384         iov.iov_base = (caddr_t) v;
  385         iov.iov_len = sizeof(u_int32_t);
  386         uio.uio_iov = &iov;
  387         uio.uio_iovcnt = 1;
  388         uio.uio_offset = (off_t)addr;
  389         uio.uio_resid = sizeof(u_int32_t);
  390         uio.uio_segflg = UIO_SYSSPACE;
  391         uio.uio_rw = UIO_READ;
  392         uio.uio_td = td;
  393         return proc_rwmem(td->td_proc, &uio);
  394 }
  395 
  396 static int
  397 ptrace_write_int(struct thread *td, vm_offset_t addr, u_int32_t v)
  398 {
  399         struct iovec iov;
  400         struct uio uio;
  401 
  402         PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
  403         iov.iov_base = (caddr_t) &v;
  404         iov.iov_len = sizeof(u_int32_t);
  405         uio.uio_iov = &iov;
  406         uio.uio_iovcnt = 1;
  407         uio.uio_offset = (off_t)addr;
  408         uio.uio_resid = sizeof(u_int32_t);
  409         uio.uio_segflg = UIO_SYSSPACE;
  410         uio.uio_rw = UIO_WRITE;
  411         uio.uio_td = td;
  412         return proc_rwmem(td->td_proc, &uio);
  413 }
  414 
  415 int
  416 ptrace_single_step(struct thread *td)
  417 {
  418         struct proc *p;
  419         int error;
  420         
  421         KASSERT(td->td_md.md_ptrace_instr == 0,
  422          ("Didn't clear single step"));
  423         p = td->td_proc;
  424         PROC_UNLOCK(p);
  425         error = ptrace_read_int(td, td->td_frame->tf_pc + 4, 
  426             &td->td_md.md_ptrace_instr);
  427         if (error)
  428                 goto out;
  429         error = ptrace_write_int(td, td->td_frame->tf_pc + 4,
  430             PTRACE_BREAKPOINT);
  431         if (error)
  432                 td->td_md.md_ptrace_instr = 0;
  433         td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 4;
  434 out:
  435         PROC_LOCK(p);
  436         return (error);
  437 }
  438 
  439 int
  440 ptrace_clear_single_step(struct thread *td)
  441 {
  442         struct proc *p;
  443 
  444         if (td->td_md.md_ptrace_instr) {
  445                 p = td->td_proc;
  446                 PROC_UNLOCK(p);
  447                 ptrace_write_int(td, td->td_md.md_ptrace_addr,
  448                     td->td_md.md_ptrace_instr);
  449                 PROC_LOCK(p);
  450                 td->td_md.md_ptrace_instr = 0;
  451         }
  452         return (0);
  453 }
  454 
  455 int
  456 ptrace_set_pc(struct thread *td, unsigned long addr)
  457 {
  458         td->td_frame->tf_pc = addr;
  459         return (0);
  460 }
  461 
  462 void
  463 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
  464 {
  465 }
  466 
  467 void
  468 spinlock_enter(void)
  469 {
  470         struct thread *td;
  471 
  472         td = curthread;
  473         if (td->td_md.md_spinlock_count == 0)
  474                 td->td_md.md_saved_cspr = disable_interrupts(I32_bit | F32_bit);
  475         td->td_md.md_spinlock_count++;
  476         critical_enter();
  477 }
  478 
  479 void
  480 spinlock_exit(void)
  481 {
  482         struct thread *td;
  483 
  484         td = curthread;
  485         critical_exit();
  486         td->td_md.md_spinlock_count--;
  487         if (td->td_md.md_spinlock_count == 0)
  488                 restore_interrupts(td->td_md.md_saved_cspr);
  489 }
  490 
  491 /*
  492  * Clear registers on exec
  493  */
  494 void
  495 exec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings)
  496 {
  497         struct trapframe *tf = td->td_frame;
  498 
  499         memset(tf, 0, sizeof(*tf));
  500         tf->tf_usr_sp = stack;
  501         tf->tf_usr_lr = entry;
  502         tf->tf_svc_lr = 0x77777777;
  503         tf->tf_pc = entry;
  504         tf->tf_spsr = PSR_USR32_MODE;
  505 }
  506 
  507 /*
  508  * Get machine context.
  509  */
  510 int
  511 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
  512 {
  513         struct trapframe *tf = td->td_frame;
  514         __greg_t *gr = mcp->__gregs;
  515 
  516         if (clear_ret & GET_MC_CLEAR_RET)
  517                 gr[_REG_R0] = 0;
  518         else
  519                 gr[_REG_R0]   = tf->tf_r0;
  520         gr[_REG_R1]   = tf->tf_r1;
  521         gr[_REG_R2]   = tf->tf_r2;
  522         gr[_REG_R3]   = tf->tf_r3;
  523         gr[_REG_R4]   = tf->tf_r4;
  524         gr[_REG_R5]   = tf->tf_r5;
  525         gr[_REG_R6]   = tf->tf_r6;
  526         gr[_REG_R7]   = tf->tf_r7;
  527         gr[_REG_R8]   = tf->tf_r8;
  528         gr[_REG_R9]   = tf->tf_r9;
  529         gr[_REG_R10]  = tf->tf_r10;
  530         gr[_REG_R11]  = tf->tf_r11;
  531         gr[_REG_R12]  = tf->tf_r12;
  532         gr[_REG_SP]   = tf->tf_usr_sp;
  533         gr[_REG_LR]   = tf->tf_usr_lr;
  534         gr[_REG_PC]   = tf->tf_pc;
  535         gr[_REG_CPSR] = tf->tf_spsr;
  536 
  537         return (0);
  538 }
  539 
  540 /*
  541  * Set machine context.
  542  *
  543  * However, we don't set any but the user modifiable flags, and we won't
  544  * touch the cs selector.
  545  */
  546 int
  547 set_mcontext(struct thread *td, const mcontext_t *mcp)
  548 {
  549         struct trapframe *tf = td->td_frame;
  550         const __greg_t *gr = mcp->__gregs;
  551 
  552         tf->tf_r0 = gr[_REG_R0];
  553         tf->tf_r1 = gr[_REG_R1];
  554         tf->tf_r2 = gr[_REG_R2];
  555         tf->tf_r3 = gr[_REG_R3];
  556         tf->tf_r4 = gr[_REG_R4];
  557         tf->tf_r5 = gr[_REG_R5];
  558         tf->tf_r6 = gr[_REG_R6];
  559         tf->tf_r7 = gr[_REG_R7];
  560         tf->tf_r8 = gr[_REG_R8];
  561         tf->tf_r9 = gr[_REG_R9];
  562         tf->tf_r10 = gr[_REG_R10];
  563         tf->tf_r11 = gr[_REG_R11];
  564         tf->tf_r12 = gr[_REG_R12];
  565         tf->tf_usr_sp = gr[_REG_SP];
  566         tf->tf_usr_lr = gr[_REG_LR];
  567         tf->tf_pc = gr[_REG_PC];
  568         tf->tf_spsr = gr[_REG_CPSR];
  569 
  570         return (0);
  571 }
  572 
  573 /*
  574  * MPSAFE
  575  */
  576 int
  577 sigreturn(td, uap)
  578         struct thread *td;
  579         struct sigreturn_args /* {
  580                 const struct __ucontext *sigcntxp;
  581         } */ *uap;
  582 {
  583         struct proc *p = td->td_proc;
  584         struct sigframe sf;
  585         struct trapframe *tf;
  586         int spsr;
  587         
  588         if (uap == NULL)
  589                 return (EFAULT);
  590         if (copyin(uap->sigcntxp, &sf, sizeof(sf)))
  591                 return (EFAULT);
  592         /*
  593          * Make sure the processor mode has not been tampered with and
  594          * interrupts have not been disabled.
  595          */
  596         spsr = sf.sf_uc.uc_mcontext.__gregs[_REG_CPSR];
  597         if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
  598             (spsr & (I32_bit | F32_bit)) != 0)
  599                 return (EINVAL);
  600                 /* Restore register context. */
  601         tf = td->td_frame;
  602         set_mcontext(td, &sf.sf_uc.uc_mcontext);
  603 
  604         /* Restore signal mask. */
  605         PROC_LOCK(p);
  606         td->td_sigmask = sf.sf_uc.uc_sigmask;
  607         SIG_CANTMASK(td->td_sigmask);
  608         signotify(td);
  609         PROC_UNLOCK(p);
  610 
  611         return (EJUSTRETURN);
  612 }
  613 
  614 
  615 /*
  616  * Construct a PCB from a trapframe. This is called from kdb_trap() where
  617  * we want to start a backtrace from the function that caused us to enter
  618  * the debugger. We have the context in the trapframe, but base the trace
  619  * on the PCB. The PCB doesn't have to be perfect, as long as it contains
  620  * enough for a backtrace.
  621  */
  622 void
  623 makectx(struct trapframe *tf, struct pcb *pcb)
  624 {
  625         pcb->un_32.pcb32_r8 = tf->tf_r8;
  626         pcb->un_32.pcb32_r9 = tf->tf_r9;
  627         pcb->un_32.pcb32_r10 = tf->tf_r10;
  628         pcb->un_32.pcb32_r11 = tf->tf_r11;
  629         pcb->un_32.pcb32_r12 = tf->tf_r12;
  630         pcb->un_32.pcb32_pc = tf->tf_pc;
  631         pcb->un_32.pcb32_lr = tf->tf_usr_lr;
  632         pcb->un_32.pcb32_sp = tf->tf_usr_sp;
  633 }

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