1 /*-
2 * Copyright (c) 2011 Semihalf.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD: releng/10.0/sys/arm/arm/mp_machdep.c 254461 2013-08-17 18:51:38Z andrew $");
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/bus.h>
31 #include <sys/kernel.h>
32 #include <sys/lock.h>
33 #include <sys/mutex.h>
34 #include <sys/proc.h>
35 #include <sys/pcpu.h>
36 #include <sys/sched.h>
37 #include <sys/smp.h>
38 #include <sys/ktr.h>
39 #include <sys/malloc.h>
40
41 #include <vm/vm.h>
42 #include <vm/vm_extern.h>
43 #include <vm/vm_kern.h>
44 #include <vm/pmap.h>
45
46 #include <machine/cpu.h>
47 #include <machine/smp.h>
48 #include <machine/pcb.h>
49 #include <machine/pte.h>
50 #include <machine/intr.h>
51 #include <machine/vmparam.h>
52 #ifdef VFP
53 #include <machine/vfp.h>
54 #endif
55
56 #include "opt_smp.h"
57
58 void *temp_pagetable;
59 extern struct pcpu __pcpu[];
60 /* used to hold the AP's until we are ready to release them */
61 struct mtx ap_boot_mtx;
62 struct pcb stoppcbs[MAXCPU];
63
64 /* # of Applications processors */
65 volatile int mp_naps;
66
67 /* Set to 1 once we're ready to let the APs out of the pen. */
68 volatile int aps_ready = 0;
69
70 static int ipi_handler(void *arg);
71 void set_stackptrs(int cpu);
72
73 /* Temporary variables for init_secondary() */
74 void *dpcpu[MAXCPU - 1];
75
76 /* Determine if we running MP machine */
77 int
78 cpu_mp_probe(void)
79 {
80 CPU_SETOF(0, &all_cpus);
81
82 return (platform_mp_probe());
83 }
84
85 /* Start Application Processor via platform specific function */
86 static int
87 check_ap(void)
88 {
89 uint32_t ms;
90
91 for (ms = 0; ms < 2000; ++ms) {
92 if ((mp_naps + 1) == mp_ncpus)
93 return (0); /* success */
94 else
95 DELAY(1000);
96 }
97
98 return (-2);
99 }
100
101 extern unsigned char _end[];
102
103 /* Initialize and fire up non-boot processors */
104 void
105 cpu_mp_start(void)
106 {
107 int error, i;
108 vm_offset_t temp_pagetable_va;
109 vm_paddr_t addr, addr_end;
110
111 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
112
113 /* Reserve memory for application processors */
114 for(i = 0; i < (mp_ncpus - 1); i++)
115 dpcpu[i] = (void *)kmem_malloc(kernel_arena, DPCPU_SIZE,
116 M_WAITOK | M_ZERO);
117 temp_pagetable_va = (vm_offset_t)contigmalloc(L1_TABLE_SIZE,
118 M_TEMP, 0, 0x0, 0xffffffff, L1_TABLE_SIZE, 0);
119 addr = KERNPHYSADDR;
120 addr_end = (vm_offset_t)&_end - KERNVIRTADDR + KERNPHYSADDR;
121 addr_end &= ~L1_S_OFFSET;
122 addr_end += L1_S_SIZE;
123 bzero((void *)temp_pagetable_va, L1_TABLE_SIZE);
124 for (addr = KERNPHYSADDR; addr <= addr_end; addr += L1_S_SIZE) {
125 ((int *)(temp_pagetable_va))[addr >> L1_S_SHIFT] =
126 L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr;
127 ((int *)(temp_pagetable_va))[(addr -
128 KERNPHYSADDR + KERNVIRTADDR) >> L1_S_SHIFT] =
129 L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)|L1_S_DOM(PMAP_DOMAIN_KERNEL)|addr;
130 }
131
132 #if defined(CPU_MV_PJ4B)
133 /* Add ARMADAXP registers required for snoop filter initialization */
134 ((int *)(temp_pagetable_va))[0xf1000000 >> L1_S_SHIFT] =
135 L1_TYPE_S|L1_SHARED|L1_S_B|L1_S_AP(AP_KRW)|0xd0000000;
136 #endif
137
138 temp_pagetable = (void*)(vtophys(temp_pagetable_va));
139 cpu_idcache_wbinv_all();
140 cpu_l2cache_wbinv_all();
141
142 /* Initialize boot code and start up processors */
143 platform_mp_start_ap();
144
145 /* Check if ap's started properly */
146 error = check_ap();
147 if (error)
148 printf("WARNING: Some AP's failed to start\n");
149 else
150 for (i = 1; i < mp_ncpus; i++)
151 CPU_SET(i, &all_cpus);
152
153 contigfree((void *)temp_pagetable_va, L1_TABLE_SIZE, M_TEMP);
154 }
155
156 /* Introduce rest of cores to the world */
157 void
158 cpu_mp_announce(void)
159 {
160
161 }
162
163 extern vm_paddr_t pmap_pa;
164 void
165 init_secondary(int cpu)
166 {
167 struct pcpu *pc;
168 uint32_t loop_counter;
169 int start = 0, end = 0;
170
171 cpu_setup(NULL);
172 setttb(pmap_pa);
173 cpu_tlb_flushID();
174
175 pc = &__pcpu[cpu];
176 set_pcpu(pc);
177
178 /*
179 * pcpu_init() updates queue, so it should not be executed in parallel
180 * on several cores
181 */
182 while(mp_naps < (cpu - 1))
183 ;
184
185 pcpu_init(pc, cpu, sizeof(struct pcpu));
186 dpcpu_init(dpcpu[cpu - 1], cpu);
187
188 /* Provide stack pointers for other processor modes. */
189 set_stackptrs(cpu);
190
191 /* Signal our startup to BSP */
192 atomic_add_rel_32(&mp_naps, 1);
193
194 /* Spin until the BSP releases the APs */
195 while (!aps_ready)
196 ;
197
198 /* Initialize curthread */
199 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
200 pc->pc_curthread = pc->pc_idlethread;
201 pc->pc_curpcb = pc->pc_idlethread->td_pcb;
202 #ifdef VFP
203 pc->pc_cpu = cpu;
204
205 vfp_init();
206 #endif
207
208 mtx_lock_spin(&ap_boot_mtx);
209
210 atomic_add_rel_32(&smp_cpus, 1);
211
212 if (smp_cpus == mp_ncpus) {
213 /* enable IPI's, tlb shootdown, freezes etc */
214 atomic_store_rel_int(&smp_started, 1);
215 smp_active = 1;
216 }
217
218 mtx_unlock_spin(&ap_boot_mtx);
219
220 /* Enable ipi */
221 #ifdef IPI_IRQ_START
222 start = IPI_IRQ_START;
223 #ifdef IPI_IRQ_END
224 end = IPI_IRQ_END;
225 #else
226 end = IPI_IRQ_START;
227 #endif
228 #endif
229
230 for (int i = start; i <= end; i++)
231 arm_unmask_irq(i);
232 enable_interrupts(I32_bit);
233
234 loop_counter = 0;
235 while (smp_started == 0) {
236 DELAY(100);
237 loop_counter++;
238 if (loop_counter == 1000)
239 CTR0(KTR_SMP, "AP still wait for smp_started");
240 }
241 /* Start per-CPU event timers. */
242 cpu_initclocks_ap();
243
244 CTR0(KTR_SMP, "go into scheduler");
245 platform_mp_init_secondary();
246
247 /* Enter the scheduler */
248 sched_throw(NULL);
249
250 panic("scheduler returned us to %s", __func__);
251 /* NOTREACHED */
252 }
253
254 static int
255 ipi_handler(void *arg)
256 {
257 u_int cpu, ipi;
258
259 cpu = PCPU_GET(cpuid);
260
261 ipi = pic_ipi_get((int)arg);
262
263 while ((ipi != 0x3ff)) {
264 switch (ipi) {
265 case IPI_RENDEZVOUS:
266 CTR0(KTR_SMP, "IPI_RENDEZVOUS");
267 smp_rendezvous_action();
268 break;
269
270 case IPI_AST:
271 CTR0(KTR_SMP, "IPI_AST");
272 break;
273
274 case IPI_STOP:
275 case IPI_STOP_HARD:
276 /*
277 * IPI_STOP_HARD is mapped to IPI_STOP so it is not
278 * necessary to add it in the switch.
279 */
280 CTR0(KTR_SMP, "IPI_STOP or IPI_STOP_HARD");
281
282 savectx(&stoppcbs[cpu]);
283
284 /* Indicate we are stopped */
285 CPU_SET_ATOMIC(cpu, &stopped_cpus);
286
287 /* Wait for restart */
288 while (!CPU_ISSET(cpu, &started_cpus))
289 cpu_spinwait();
290
291 CPU_CLR_ATOMIC(cpu, &started_cpus);
292 CPU_CLR_ATOMIC(cpu, &stopped_cpus);
293 CTR0(KTR_SMP, "IPI_STOP (restart)");
294 break;
295 case IPI_PREEMPT:
296 CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__);
297 sched_preempt(curthread);
298 break;
299 case IPI_HARDCLOCK:
300 CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__);
301 hardclockintr();
302 break;
303 case IPI_TLB:
304 CTR1(KTR_SMP, "%s: IPI_TLB", __func__);
305 cpufuncs.cf_tlb_flushID();
306 break;
307 default:
308 panic("Unknown IPI 0x%0x on cpu %d", ipi, curcpu);
309 }
310
311 pic_ipi_clear(ipi);
312 ipi = pic_ipi_get(-1);
313 }
314
315 return (FILTER_HANDLED);
316 }
317
318 static void
319 release_aps(void *dummy __unused)
320 {
321 uint32_t loop_counter;
322 int start = 0, end = 0;
323
324 if (mp_ncpus == 1)
325 return;
326 #ifdef IPI_IRQ_START
327 start = IPI_IRQ_START;
328 #ifdef IPI_IRQ_END
329 end = IPI_IRQ_END;
330 #else
331 end = IPI_IRQ_START;
332 #endif
333 #endif
334
335 for (int i = start; i <= end; i++) {
336 /*
337 * IPI handler
338 */
339 /*
340 * Use 0xdeadbeef as the argument value for irq 0,
341 * if we used 0, the intr code will give the trap frame
342 * pointer instead.
343 */
344 arm_setup_irqhandler("ipi", ipi_handler, NULL, (void *)i, i,
345 INTR_TYPE_MISC | INTR_EXCL, NULL);
346
347 /* Enable ipi */
348 arm_unmask_irq(i);
349 }
350 atomic_store_rel_int(&aps_ready, 1);
351
352 printf("Release APs\n");
353
354 for (loop_counter = 0; loop_counter < 2000; loop_counter++) {
355 if (smp_started)
356 return;
357 DELAY(1000);
358 }
359 printf("AP's not started\n");
360 }
361
362 SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL);
363
364 struct cpu_group *
365 cpu_topo(void)
366 {
367
368 return (smp_topo_1level(CG_SHARE_L2, 1, 0));
369 }
370
371 void
372 cpu_mp_setmaxid(void)
373 {
374
375 platform_mp_setmaxid();
376 }
377
378 /* Sending IPI */
379 void
380 ipi_all_but_self(u_int ipi)
381 {
382 cpuset_t other_cpus;
383
384 other_cpus = all_cpus;
385 CPU_CLR(PCPU_GET(cpuid), &other_cpus);
386 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
387 platform_ipi_send(other_cpus, ipi);
388 }
389
390 void
391 ipi_cpu(int cpu, u_int ipi)
392 {
393 cpuset_t cpus;
394
395 CPU_ZERO(&cpus);
396 CPU_SET(cpu, &cpus);
397
398 CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x", __func__, cpu, ipi);
399 platform_ipi_send(cpus, ipi);
400 }
401
402 void
403 ipi_selected(cpuset_t cpus, u_int ipi)
404 {
405
406 CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi);
407 platform_ipi_send(cpus, ipi);
408 }
409
410 void
411 tlb_broadcast(int ipi)
412 {
413
414 if (smp_started)
415 ipi_all_but_self(ipi);
416 }
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