pl190.c

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2012-2017 Oleksandr Tymoshenko <gonzo@bluezbox.com>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 #include <sys/cdefs.h>
   30 __FBSDID("$FreeBSD$");
   31 
   32 #include <sys/param.h>
   33 #include <sys/systm.h>
   34 #include <sys/bus.h>
   35 #include <sys/kernel.h>
   36 #include <sys/ktr.h>
   37 #include <sys/lock.h>
   38 #include <sys/module.h>
   39 #include <sys/mutex.h>
   40 #include <sys/proc.h>
   41 #include <sys/rman.h>
   42 #include <machine/bus.h>
   43 #include <machine/intr.h>
   44 
   45 #include <dev/ofw/openfirm.h>
   46 #include <dev/ofw/ofw_bus.h>
   47 #include <dev/ofw/ofw_bus_subr.h>
   48 
   49 #include "pic_if.h"
   50 
   51 #ifdef  DEBUG
   52 #define dprintf(fmt, args...) printf(fmt, ##args)
   53 #else
   54 #define dprintf(fmt, args...)
   55 #endif
   56 
   57 #define VICIRQSTATUS    0x000
   58 #define VICFIQSTATUS    0x004
   59 #define VICRAWINTR      0x008
   60 #define VICINTSELECT    0x00C
   61 #define VICINTENABLE    0x010
   62 #define VICINTENCLEAR   0x014
   63 #define VICSOFTINT      0x018
   64 #define VICSOFTINTCLEAR 0x01C
   65 #define VICPROTECTION   0x020
   66 #define VICPERIPHID     0xFE0
   67 #define VICPRIMECELLID  0xFF0
   68 
   69 #define VIC_NIRQS       32
   70 
   71 struct pl190_intc_irqsrc {
   72         struct intr_irqsrc              isrc;
   73         u_int                           irq;
   74 };
   75 
   76 struct pl190_intc_softc {
   77         device_t                dev;
   78         struct mtx              mtx;
   79         struct resource *       intc_res;
   80         struct pl190_intc_irqsrc        isrcs[VIC_NIRQS];
   81 };
   82 
   83 #define INTC_VIC_READ_4(sc, reg)                \
   84     bus_read_4(sc->intc_res, (reg))
   85 #define INTC_VIC_WRITE_4(sc, reg, val)          \
   86     bus_write_4(sc->intc_res, (reg), (val))
   87 
   88 #define VIC_LOCK(_sc) mtx_lock_spin(&(_sc)->mtx)
   89 #define VIC_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->mtx)
   90 
   91 static inline void
   92 pl190_intc_irq_dispatch(struct pl190_intc_softc *sc, u_int irq,
   93     struct trapframe *tf)
   94 {
   95         struct pl190_intc_irqsrc *src;
   96 
   97         src = &sc->isrcs[irq];
   98         if (intr_isrc_dispatch(&src->isrc, tf) != 0)
   99                 device_printf(sc->dev, "Stray irq %u detected\n", irq);
  100 }
  101 
  102 static int
  103 pl190_intc_intr(void *arg)
  104 {
  105         struct pl190_intc_softc *sc;
  106         u_int cpu;
  107         uint32_t num, pending;
  108         struct trapframe *tf;
  109 
  110         sc = arg;
  111         cpu = PCPU_GET(cpuid);
  112         tf = curthread->td_intr_frame;
  113 
  114         VIC_LOCK(sc);
  115         pending = INTC_VIC_READ_4(sc, VICIRQSTATUS);
  116         VIC_UNLOCK(sc);
  117         for (num = 0 ; num < VIC_NIRQS; num++) {
  118                 if (pending & (1 << num))
  119                         pl190_intc_irq_dispatch(sc, num, tf);
  120         }
  121 
  122         return (FILTER_HANDLED);
  123 }
  124 
  125 static void
  126 pl190_intc_disable_intr(device_t dev, struct intr_irqsrc *isrc)
  127 {
  128         struct pl190_intc_softc *sc;
  129         struct pl190_intc_irqsrc *src;
  130 
  131         sc = device_get_softc(dev);
  132         src = (struct pl190_intc_irqsrc *)isrc;
  133 
  134         VIC_LOCK(sc);
  135         INTC_VIC_WRITE_4(sc, VICINTENCLEAR, (1 << src->irq));
  136         VIC_UNLOCK(sc);
  137 }
  138 
  139 static void
  140 pl190_intc_enable_intr(device_t dev, struct intr_irqsrc *isrc)
  141 {
  142         struct pl190_intc_softc *sc;
  143         struct pl190_intc_irqsrc *src;
  144 
  145         sc = device_get_softc(dev);
  146         src = (struct pl190_intc_irqsrc *)isrc;
  147 
  148         VIC_LOCK(sc);
  149         INTC_VIC_WRITE_4(sc, VICINTENABLE, (1 << src->irq));
  150         VIC_UNLOCK(sc);
  151 }
  152 
  153 static int
  154 pl190_intc_map_intr(device_t dev, struct intr_map_data *data,
  155     struct intr_irqsrc **isrcp)
  156 {
  157         struct intr_map_data_fdt *daf;
  158         struct pl190_intc_softc *sc;
  159 
  160         if (data->type != INTR_MAP_DATA_FDT)
  161                 return (ENOTSUP);
  162 
  163         daf = (struct intr_map_data_fdt *)data;
  164         if (daf->ncells != 1 || daf->cells[0] >= VIC_NIRQS)
  165                 return (EINVAL);
  166 
  167         sc = device_get_softc(dev);
  168         *isrcp = &sc->isrcs[daf->cells[0]].isrc;
  169         return (0);
  170 }
  171 
  172 static void
  173 pl190_intc_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
  174 {
  175         pl190_intc_disable_intr(dev, isrc);
  176 }
  177 
  178 static void
  179 pl190_intc_post_ithread(device_t dev, struct intr_irqsrc *isrc)
  180 {
  181         struct pl190_intc_irqsrc *src;
  182 
  183         src = (struct pl190_intc_irqsrc *)isrc;
  184         pl190_intc_enable_intr(dev, isrc);
  185         arm_irq_memory_barrier(src->irq);
  186 }
  187 
  188 static void
  189 pl190_intc_post_filter(device_t dev, struct intr_irqsrc *isrc)
  190 {
  191         struct pl190_intc_irqsrc *src;
  192 
  193         src = (struct pl190_intc_irqsrc *)isrc;
  194         arm_irq_memory_barrier(src->irq);
  195 }
  196 
  197 static int
  198 pl190_intc_setup_intr(device_t dev, struct intr_irqsrc *isrc,
  199     struct resource *res, struct intr_map_data *data)
  200 {
  201 
  202         return (0);
  203 }
  204 
  205 static int
  206 pl190_intc_probe(device_t dev)
  207 {
  208 
  209         if (!ofw_bus_status_okay(dev))
  210                 return (ENXIO);
  211 
  212         if (!ofw_bus_is_compatible(dev, "arm,versatile-vic"))
  213                 return (ENXIO);
  214         device_set_desc(dev, "ARM PL190 VIC");
  215         return (BUS_PROBE_DEFAULT);
  216 }
  217 
  218 static int
  219 pl190_intc_attach(device_t dev)
  220 {
  221         struct          pl190_intc_softc *sc;
  222         uint32_t        id;
  223         int             i, rid;
  224         struct          pl190_intc_irqsrc *isrcs;
  225         struct intr_pic *pic;
  226         int             error;
  227         uint32_t        irq;
  228         const char      *name;
  229         phandle_t       xref;
  230 
  231         sc = device_get_softc(dev);
  232         sc->dev = dev;
  233         mtx_init(&sc->mtx, device_get_nameunit(dev), "pl190",
  234             MTX_SPIN);
  235 
  236         /* Request memory resources */
  237         rid = 0;
  238         sc->intc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
  239             RF_ACTIVE);
  240         if (sc->intc_res == NULL) {
  241                 device_printf(dev, "Error: could not allocate memory resources\n");
  242                 return (ENXIO);
  243         }
  244 
  245         /*
  246          * All interrupts should use IRQ line
  247          */
  248         INTC_VIC_WRITE_4(sc, VICINTSELECT, 0x00000000);
  249         /* Disable all interrupts */
  250         INTC_VIC_WRITE_4(sc, VICINTENCLEAR, 0xffffffff);
  251 
  252         id = 0;
  253         for (i = 3; i >= 0; i--) {
  254                 id = (id << 8) |
  255                      (INTC_VIC_READ_4(sc, VICPERIPHID + i*4) & 0xff);
  256         }
  257 
  258         device_printf(dev, "Peripheral ID: %08x\n", id);
  259 
  260         id = 0;
  261         for (i = 3; i >= 0; i--) {
  262                 id = (id << 8) |
  263                      (INTC_VIC_READ_4(sc, VICPRIMECELLID + i*4) & 0xff);
  264         }
  265 
  266         device_printf(dev, "PrimeCell ID: %08x\n", id);
  267 
  268         /* PIC attachment */
  269         isrcs = sc->isrcs;
  270         name = device_get_nameunit(sc->dev);
  271         for (irq = 0; irq < VIC_NIRQS; irq++) {
  272                 isrcs[irq].irq = irq;
  273                 error = intr_isrc_register(&isrcs[irq].isrc, sc->dev,
  274                     0, "%s,%u", name, irq);
  275                 if (error != 0)
  276                         return (error);
  277         }
  278 
  279         xref = OF_xref_from_node(ofw_bus_get_node(sc->dev));
  280         pic = intr_pic_register(sc->dev, xref);
  281         if (pic == NULL)
  282                 return (ENXIO);
  283 
  284         return (intr_pic_claim_root(sc->dev, xref, pl190_intc_intr, sc, 0));
  285 }
  286 
  287 static device_method_t pl190_intc_methods[] = {
  288         DEVMETHOD(device_probe,         pl190_intc_probe),
  289         DEVMETHOD(device_attach,        pl190_intc_attach),
  290 
  291         DEVMETHOD(pic_disable_intr,     pl190_intc_disable_intr),
  292         DEVMETHOD(pic_enable_intr,      pl190_intc_enable_intr),
  293         DEVMETHOD(pic_map_intr,         pl190_intc_map_intr),
  294         DEVMETHOD(pic_post_filter,      pl190_intc_post_filter),
  295         DEVMETHOD(pic_post_ithread,     pl190_intc_post_ithread),
  296         DEVMETHOD(pic_pre_ithread,      pl190_intc_pre_ithread),
  297         DEVMETHOD(pic_setup_intr,       pl190_intc_setup_intr),
  298 
  299         DEVMETHOD_END
  300 };
  301 
  302 static driver_t pl190_intc_driver = {
  303         "intc",
  304         pl190_intc_methods,
  305         sizeof(struct pl190_intc_softc),
  306 };
  307 
  308 static devclass_t pl190_intc_devclass;
  309 
  310 EARLY_DRIVER_MODULE(intc, simplebus, pl190_intc_driver, pl190_intc_devclass,
  311     0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
Cache object: 282ecbc8b758d628f93d8bc21a57dee8
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.
FreeBSD/Linux Kernel Cross Reference sys/arm/arm/pl190.c

FreeBSD/Linux Kernel Cross Reference
sys/arm/arm/pl190.c
