The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/arm/sys_machdep.c

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    1 /*-
    2  * Copyright (c) 1990 The Regents of the University of California.
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. All advertising materials mentioning features or use of this software
   14  *    must display the following acknowledgement:
   15  *      This product includes software developed by the University of
   16  *      California, Berkeley and its contributors.
   17  * 4. Neither the name of the University nor the names of its contributors
   18  *    may be used to endorse or promote products derived from this software
   19  *    without specific prior written permission.
   20  *
   21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   31  * SUCH DAMAGE.
   32  *
   33  *      from: @(#)sys_machdep.c 5.5 (Berkeley) 1/19/91
   34  */
   35 
   36 #include <sys/cdefs.h>
   37 __FBSDID("$FreeBSD: releng/10.0/sys/arm/arm/sys_machdep.c 255677 2013-09-18 19:26:08Z pjd $");
   38 
   39 #include "opt_capsicum.h"
   40 
   41 #include <sys/param.h>
   42 #include <sys/systm.h>
   43 #include <sys/capability.h>
   44 #include <sys/proc.h>
   45 #include <sys/sysproto.h>
   46 #include <sys/syscall.h>
   47 #include <sys/sysent.h>
   48 
   49 #include <machine/sysarch.h>
   50 
   51 #ifndef _SYS_SYSPROTO_H_
   52 struct sysarch_args {
   53         int op;
   54         char *parms;
   55 };
   56 #endif
   57 
   58 /* Prototypes */
   59 static int arm32_sync_icache (struct thread *, void *);
   60 static int arm32_drain_writebuf(struct thread *, void *);
   61 
   62 static int
   63 arm32_sync_icache(struct thread *td, void *args)
   64 {
   65         struct arm_sync_icache_args ua;
   66         int error;
   67 
   68         if ((error = copyin(args, &ua, sizeof(ua))) != 0)
   69                 return (error);
   70 
   71         cpu_icache_sync_range(ua.addr, ua.len);
   72 
   73         td->td_retval[0] = 0;
   74         return (0);
   75 }
   76 
   77 static int
   78 arm32_drain_writebuf(struct thread *td, void *args)
   79 {
   80         /* No args. */
   81 
   82         td->td_retval[0] = 0;
   83         cpu_drain_writebuf();
   84         return (0);
   85 }
   86 
   87 static int
   88 arm32_set_tp(struct thread *td, void *args)
   89 {
   90 
   91         if (td != curthread)
   92                 td->td_md.md_tp = (register_t)args;
   93         else 
   94 #ifndef ARM_TP_ADDRESS
   95                 set_tls(args);
   96 #else
   97                 *(register_t *)ARM_TP_ADDRESS = (register_t)args;
   98 #endif
   99         return (0);
  100 }
  101 
  102 static int
  103 arm32_get_tp(struct thread *td, void *args)
  104 {
  105 
  106         if (td != curthread)
  107                 td->td_retval[0] = td->td_md.md_tp;
  108         else
  109 #ifndef ARM_TP_ADDRESS
  110                 td->td_retval[0] = (register_t)get_tls();
  111 #else
  112                 td->td_retval[0] = *(register_t *)ARM_TP_ADDRESS;
  113 #endif
  114         return (0);
  115 }
  116 
  117 int
  118 sysarch(td, uap)
  119         struct thread *td;
  120         register struct sysarch_args *uap;
  121 {
  122         int error;
  123 
  124 #ifdef CAPABILITY_MODE
  125         /*
  126          * When adding new operations, add a new case statement here to
  127          * explicitly indicate whether or not the operation is safe to
  128          * perform in capability mode.
  129          */
  130         if (IN_CAPABILITY_MODE(td)) {
  131                 switch (uap->op) {
  132                 case ARM_SYNC_ICACHE:
  133                 case ARM_DRAIN_WRITEBUF:
  134                 case ARM_SET_TP:
  135                 case ARM_GET_TP:
  136                         break;
  137 
  138                 default:
  139 #ifdef KTRACE
  140                         if (KTRPOINT(td, KTR_CAPFAIL))
  141                                 ktrcapfail(CAPFAIL_SYSCALL, NULL, NULL);
  142 #endif
  143                         return (ECAPMODE);
  144                 }
  145         }
  146 #endif
  147 
  148         switch (uap->op) {
  149         case ARM_SYNC_ICACHE:
  150                 error = arm32_sync_icache(td, uap->parms);
  151                 break;
  152         case ARM_DRAIN_WRITEBUF:
  153                 error = arm32_drain_writebuf(td, uap->parms);
  154                 break;
  155         case ARM_SET_TP:
  156                 error = arm32_set_tp(td, uap->parms);
  157                 break;
  158         case ARM_GET_TP:
  159                 error = arm32_get_tp(td, uap->parms);
  160                 break;
  161         default:
  162                 error = EINVAL;
  163                 break;
  164         }
  165         return (error);
  166 }

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