The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/arm/arm/sys_machdep.c

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    1 /*-
    2  * Copyright (c) 1990 The Regents of the University of California.
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. Neither the name of the University nor the names of its contributors
   14  *    may be used to endorse or promote products derived from this software
   15  *    without specific prior written permission.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  *
   29  *      from: @(#)sys_machdep.c 5.5 (Berkeley) 1/19/91
   30  */
   31 
   32 #include <sys/cdefs.h>
   33 __FBSDID("$FreeBSD: stable/10/sys/arm/arm/sys_machdep.c 283339 2015-05-23 23:27:00Z ian $");
   34 
   35 #include "opt_capsicum.h"
   36 
   37 #include <sys/param.h>
   38 #include <sys/systm.h>
   39 #include <sys/capsicum.h>
   40 #include <sys/proc.h>
   41 #include <sys/sysproto.h>
   42 #include <sys/syscall.h>
   43 #include <sys/sysent.h>
   44 
   45 #include <machine/sysarch.h>
   46 
   47 #ifndef _SYS_SYSPROTO_H_
   48 struct sysarch_args {
   49         int op;
   50         char *parms;
   51 };
   52 #endif
   53 
   54 /* Prototypes */
   55 static int arm32_sync_icache (struct thread *, void *);
   56 static int arm32_drain_writebuf(struct thread *, void *);
   57 
   58 static int
   59 arm32_sync_icache(struct thread *td, void *args)
   60 {
   61         struct arm_sync_icache_args ua;
   62         int error;
   63 
   64         if ((error = copyin(args, &ua, sizeof(ua))) != 0)
   65                 return (error);
   66 
   67         cpu_icache_sync_range(ua.addr, ua.len);
   68 
   69         td->td_retval[0] = 0;
   70         return (0);
   71 }
   72 
   73 static int
   74 arm32_drain_writebuf(struct thread *td, void *args)
   75 {
   76         /* No args. */
   77 
   78         td->td_retval[0] = 0;
   79         cpu_drain_writebuf();
   80         return (0);
   81 }
   82 
   83 static int
   84 arm32_set_tp(struct thread *td, void *args)
   85 {
   86 
   87         td->td_md.md_tp = (register_t)args;
   88 #ifndef ARM_TP_ADDRESS
   89         set_tls(args);
   90 #else
   91         *(register_t *)ARM_TP_ADDRESS = (register_t)args;
   92 #endif
   93         return (0);
   94 }
   95 
   96 static int
   97 arm32_get_tp(struct thread *td, void *args)
   98 {
   99 
  100 #ifndef ARM_TP_ADDRESS
  101         td->td_retval[0] = td->td_md.md_tp;
  102 #else
  103         td->td_retval[0] = *(register_t *)ARM_TP_ADDRESS;
  104 #endif
  105         return (0);
  106 }
  107 
  108 int
  109 sysarch(td, uap)
  110         struct thread *td;
  111         register struct sysarch_args *uap;
  112 {
  113         int error;
  114 
  115 #ifdef CAPABILITY_MODE
  116         /*
  117          * When adding new operations, add a new case statement here to
  118          * explicitly indicate whether or not the operation is safe to
  119          * perform in capability mode.
  120          */
  121         if (IN_CAPABILITY_MODE(td)) {
  122                 switch (uap->op) {
  123                 case ARM_SYNC_ICACHE:
  124                 case ARM_DRAIN_WRITEBUF:
  125                 case ARM_SET_TP:
  126                 case ARM_GET_TP:
  127                         break;
  128 
  129                 default:
  130 #ifdef KTRACE
  131                         if (KTRPOINT(td, KTR_CAPFAIL))
  132                                 ktrcapfail(CAPFAIL_SYSCALL, NULL, NULL);
  133 #endif
  134                         return (ECAPMODE);
  135                 }
  136         }
  137 #endif
  138 
  139         switch (uap->op) {
  140         case ARM_SYNC_ICACHE:
  141                 error = arm32_sync_icache(td, uap->parms);
  142                 break;
  143         case ARM_DRAIN_WRITEBUF:
  144                 error = arm32_drain_writebuf(td, uap->parms);
  145                 break;
  146         case ARM_SET_TP:
  147                 error = arm32_set_tp(td, uap->parms);
  148                 break;
  149         case ARM_GET_TP:
  150                 error = arm32_get_tp(td, uap->parms);
  151                 break;
  152         default:
  153                 error = EINVAL;
  154                 break;
  155         }
  156         return (error);
  157 }

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