Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/arm/at91/at91.c
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1 /*- 2 * Copyright (c) 2005 Olivier Houchard. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 */ 24 25 #include <sys/cdefs.h> 26 __FBSDID("$FreeBSD$"); 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/bus.h> 31 #include <sys/kernel.h> 32 #include <sys/malloc.h> 33 #include <sys/module.h> 34 35 #include <vm/vm.h> 36 #include <vm/vm_kern.h> 37 #include <vm/pmap.h> 38 #include <vm/vm_page.h> 39 #include <vm/vm_extern.h> 40 41 #define _ARM32_BUS_DMA_PRIVATE 42 #include <machine/bus.h> 43 #include <machine/intr.h> 44 45 #include <arm/at91/at91rm92reg.h> 46 #include <arm/at91/at91var.h> 47 48 static struct at91_softc *at91_softc; 49 50 static int 51 at91_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags, 52 bus_space_handle_t *bshp) 53 { 54 vm_paddr_t pa, endpa; 55 56 pa = trunc_page(bpa); 57 if (pa >= 0xfff00000) { 58 *bshp = pa - 0xf0000000 + 0xd0000000; 59 return (0); 60 } 61 if (pa >= 0xdff00000) 62 return (0); 63 endpa = round_page(bpa + size); 64 65 *bshp = (vm_offset_t)pmap_mapdev(pa, endpa - pa); 66 67 return (0); 68 } 69 70 static void 71 at91_bs_unmap(void *t, bus_space_handle_t h, bus_size_t size) 72 { 73 vm_offset_t va, endva; 74 75 va = trunc_page((vm_offset_t)t); 76 endva = va + round_page(size); 77 78 /* Free the kernel virtual mapping. */ 79 kmem_free(kernel_map, va, endva - va); 80 } 81 82 static int 83 at91_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, 84 bus_size_t size, bus_space_handle_t *nbshp) 85 { 86 87 *nbshp = bsh + offset; 88 return (0); 89 } 90 91 static void 92 at91_barrier(void *t, bus_space_handle_t bsh, bus_size_t size, bus_size_t b, 93 int a) 94 { 95 } 96 97 bs_protos(generic); 98 bs_protos(generic_armv4); 99 100 struct bus_space at91_bs_tag = { 101 /* cookie */ 102 (void *) 0, 103 104 /* mapping/unmapping */ 105 at91_bs_map, 106 at91_bs_unmap, 107 at91_bs_subregion, 108 109 /* allocation/deallocation */ 110 NULL, 111 NULL, 112 113 /* barrier */ 114 at91_barrier, 115 116 /* read (single) */ 117 generic_bs_r_1, 118 generic_armv4_bs_r_2, 119 generic_bs_r_4, 120 NULL, 121 122 /* read multiple */ 123 generic_bs_rm_1, 124 generic_armv4_bs_rm_2, 125 generic_bs_rm_4, 126 NULL, 127 128 /* read region */ 129 generic_bs_rr_1, 130 generic_armv4_bs_rr_2, 131 generic_bs_rr_4, 132 NULL, 133 134 /* write (single) */ 135 generic_bs_w_1, 136 generic_armv4_bs_w_2, 137 generic_bs_w_4, 138 NULL, 139 140 /* write multiple */ 141 generic_bs_wm_1, 142 generic_armv4_bs_wm_2, 143 generic_bs_wm_4, 144 NULL, 145 146 /* write region */ 147 NULL, 148 generic_armv4_bs_wr_2, 149 generic_bs_wr_4, 150 NULL, 151 152 /* set multiple */ 153 NULL, 154 NULL, 155 NULL, 156 NULL, 157 158 /* set region */ 159 NULL, 160 generic_armv4_bs_sr_2, 161 generic_bs_sr_4, 162 NULL, 163 164 /* copy */ 165 NULL, 166 generic_armv4_bs_c_2, 167 NULL, 168 NULL, 169 }; 170 171 static int 172 at91_probe(device_t dev) 173 { 174 device_set_desc(dev, "AT91 device bus"); 175 return (0); 176 } 177 178 static void 179 at91_identify(driver_t *drv, device_t parent) 180 { 181 182 BUS_ADD_CHILD(parent, 0, "atmelarm", 0); 183 } 184 185 struct arm32_dma_range * 186 bus_dma_get_range(void) 187 { 188 189 return (NULL); 190 } 191 192 int 193 bus_dma_get_range_nb(void) 194 { 195 return (0); 196 } 197 198 extern void irq_entry(void); 199 200 static void 201 at91_add_child(device_t dev, int prio, const char *name, int unit, 202 bus_addr_t addr, bus_size_t size, int irq0, int irq1, int irq2) 203 { 204 device_t kid; 205 struct at91_ivar *ivar; 206 207 kid = device_add_child_ordered(dev, prio, name, unit); 208 if (kid == NULL) { 209 printf("Can't add child %s%d ordered\n", name, unit); 210 return; 211 } 212 ivar = malloc(sizeof(*ivar), M_DEVBUF, M_NOWAIT | M_ZERO); 213 if (ivar == NULL) { 214 device_delete_child(dev, kid); 215 printf("Can't add alloc ivar\n"); 216 return; 217 } 218 device_set_ivars(kid, ivar); 219 resource_list_init(&ivar->resources); 220 if (irq0 != -1) 221 bus_set_resource(kid, SYS_RES_IRQ, 0, irq0, 1); 222 if (irq1 != 0) 223 bus_set_resource(kid, SYS_RES_IRQ, 1, irq1, 1); 224 if (irq2 != 0) 225 bus_set_resource(kid, SYS_RES_IRQ, 2, irq2, 1); 226 if (addr != 0) 227 bus_set_resource(kid, SYS_RES_MEMORY, 0, addr, size); 228 } 229 230 struct cpu_devs 231 { 232 const char *name; 233 int unit; 234 bus_addr_t mem_base; 235 bus_size_t mem_len; 236 int irq0; 237 int irq1; 238 int irq2; 239 }; 240 241 struct cpu_devs at91rm9200_devs[] = 242 { 243 // All the "system" devices 244 { 245 "at91_st", 0, 246 AT91RM92_BASE + AT91RM92_ST_BASE, AT91RM92_ST_SIZE, 247 AT91RM92_IRQ_SYSTEM 248 }, 249 { 250 "at91_pio", 0, 251 AT91RM92_BASE + AT91RM92_PIOA_BASE, AT91RM92_PIO_SIZE, 252 AT91RM92_IRQ_SYSTEM 253 }, 254 { 255 "at91_pio", 1, 256 AT91RM92_BASE + AT91RM92_PIOB_BASE, AT91RM92_PIO_SIZE, 257 AT91RM92_IRQ_SYSTEM 258 }, 259 { 260 "at91_pio", 2, 261 AT91RM92_BASE + AT91RM92_PIOC_BASE, AT91RM92_PIO_SIZE, 262 AT91RM92_IRQ_SYSTEM 263 }, 264 { 265 "at91_pio", 3, 266 AT91RM92_BASE + AT91RM92_PIOD_BASE, AT91RM92_PIO_SIZE, 267 AT91RM92_IRQ_SYSTEM 268 }, 269 { 270 "at91_pmc", 0, 271 AT91RM92_BASE + AT91RM92_PMC_BASE, AT91RM92_PMC_SIZE, 272 AT91RM92_IRQ_SYSTEM 273 }, 274 { 275 "at91_aic", 0, 276 AT91RM92_BASE + AT91RM92_AIC_BASE, AT91RM92_AIC_SIZE, 277 0 // Interrupt controller has no interrupts! 278 }, 279 { 280 "at91_rtc", 0, 281 AT91RM92_BASE + AT91RM92_RTC_BASE, AT91RM92_RTC_SIZE, 282 AT91RM92_IRQ_SYSTEM 283 }, 284 { 285 "at91_mc", 0, 286 AT91RM92_BASE + AT91RM92_MC_BASE, AT91RM92_MC_SIZE, 287 AT91RM92_IRQ_SYSTEM 288 }, 289 290 // All other devices 291 { 292 "at91_tc", 0, 293 AT91RM92_BASE + AT91RM92_TC0_BASE, AT91RM92_TC_SIZE, 294 AT91RM92_IRQ_TC0, AT91RM92_IRQ_TC1, AT91RM92_IRQ_TC2 295 }, 296 { 297 "at91_tc", 1, 298 AT91RM92_BASE + AT91RM92_TC1_BASE, AT91RM92_TC_SIZE, 299 AT91RM92_IRQ_TC3, AT91RM92_IRQ_TC4, AT91RM92_IRQ_TC5 300 }, 301 { 302 "at91_udp", 0, 303 AT91RM92_BASE + AT91RM92_UDP_BASE, AT91RM92_UDP_SIZE, 304 AT91RM92_IRQ_UDP 305 }, 306 { 307 "at91_mci", 0, 308 AT91RM92_BASE + AT91RM92_MCI_BASE, AT91RM92_MCI_SIZE, 309 AT91RM92_IRQ_MCI 310 }, 311 { 312 "at91_twi", 0, 313 AT91RM92_BASE + AT91RM92_TWI_BASE, AT91RM92_TWI_SIZE, 314 AT91RM92_IRQ_TWI 315 }, 316 { 317 "ate", 0, 318 AT91RM92_BASE + AT91RM92_EMAC_BASE, AT91RM92_EMAC_SIZE, 319 AT91RM92_IRQ_EMAC 320 }, 321 #ifndef SKYEYE_WORKAROUNDS 322 { 323 "uart", 0, 324 AT91RM92_BASE + AT91RM92_DBGU_BASE, AT91RM92_DBGU_SIZE, 325 AT91RM92_IRQ_SYSTEM 326 }, 327 { 328 "uart", 1, 329 AT91RM92_BASE + AT91RM92_USART0_BASE, AT91RM92_USART_SIZE, 330 AT91RM92_IRQ_USART0 331 }, 332 { 333 "uart", 2, 334 AT91RM92_BASE + AT91RM92_USART1_BASE, AT91RM92_USART_SIZE, 335 AT91RM92_IRQ_USART1 336 }, 337 { 338 "uart", 3, 339 AT91RM92_BASE + AT91RM92_USART2_BASE, AT91RM92_USART_SIZE, 340 AT91RM92_IRQ_USART2 341 }, 342 { 343 "uart", 4, 344 AT91RM92_BASE + AT91RM92_USART3_BASE, AT91RM92_USART_SIZE, 345 AT91RM92_IRQ_USART3 346 }, 347 #else 348 { 349 "uart", 0, 350 AT91RM92_BASE + AT91RM92_USART0_BASE, AT91RM92_USART_SIZE, 351 AT91RM92_IRQ_USART0 352 }, 353 #endif 354 { 355 "at91_ssc", 0, 356 AT91RM92_BASE + AT91RM92_SSC0_BASE, AT91RM92_SSC_SIZE, 357 AT91RM92_IRQ_SSC0 358 }, 359 { 360 "at91_ssc", 1, 361 AT91RM92_BASE + AT91RM92_SSC1_BASE, AT91RM92_SSC_SIZE, 362 AT91RM92_IRQ_SSC1 363 }, 364 { 365 "at91_ssc", 2, 366 AT91RM92_BASE + AT91RM92_SSC2_BASE, AT91RM92_SSC_SIZE, 367 AT91RM92_IRQ_SSC2 368 }, 369 { 370 "at91_spi", 0, 371 AT91RM92_BASE + AT91RM92_SPI_BASE, AT91RM92_SPI_SIZE, 372 AT91RM92_IRQ_SPI 373 }, 374 { 375 "ohci", 0, 376 AT91RM92_OHCI_BASE, AT91RM92_OHCI_SIZE, 377 AT91RM92_IRQ_UHP 378 }, 379 { 0, 0, 0, 0, 0 } 380 }; 381 382 static void 383 at91_cpu_add_builtin_children(device_t dev, struct at91_softc *sc) 384 { 385 int i; 386 struct cpu_devs *walker; 387 388 // XXX should look at the device id in the DBGU register and 389 // XXX based on the CPU load in these devices 390 for (i = 0, walker = at91rm9200_devs; walker->name; i++, walker++) { 391 at91_add_child(dev, i, walker->name, walker->unit, 392 walker->mem_base, walker->mem_len, walker->irq0, 393 walker->irq1, walker->irq2); 394 } 395 } 396 397 #define NORMDEV 50 398 399 /* 400 * Standard priority levels for the system. 0 is lowest and 7 is highest. 401 * These values are the ones Atmel uses for its Linux port, which differ 402 * a little form the ones that are in the standard distribution. Also, 403 * the ones marked with 'TWEEK' are different based on experience. 404 */ 405 static int irq_prio[32] = 406 { 407 7, /* Advanced Interrupt Controller (FIQ) */ 408 7, /* System Peripherals */ 409 1, /* Parallel IO Controller A */ 410 1, /* Parallel IO Controller B */ 411 1, /* Parallel IO Controller C */ 412 1, /* Parallel IO Controller D */ 413 5, /* USART 0 */ 414 5, /* USART 1 */ 415 5, /* USART 2 */ 416 5, /* USART 3 */ 417 0, /* Multimedia Card Interface */ 418 2, /* USB Device Port */ 419 4, /* Two-Wire Interface */ /* TWEEK */ 420 5, /* Serial Peripheral Interface */ 421 4, /* Serial Synchronous Controller 0 */ 422 6, /* Serial Synchronous Controller 1 */ /* TWEEK */ 423 4, /* Serial Synchronous Controller 2 */ 424 0, /* Timer Counter 0 */ 425 6, /* Timer Counter 1 */ /* TWEEK */ 426 0, /* Timer Counter 2 */ 427 0, /* Timer Counter 3 */ 428 0, /* Timer Counter 4 */ 429 0, /* Timer Counter 5 */ 430 2, /* USB Host port */ 431 3, /* Ethernet MAC */ 432 0, /* Advanced Interrupt Controller (IRQ0) */ 433 0, /* Advanced Interrupt Controller (IRQ1) */ 434 0, /* Advanced Interrupt Controller (IRQ2) */ 435 0, /* Advanced Interrupt Controller (IRQ3) */ 436 0, /* Advanced Interrupt Controller (IRQ4) */ 437 0, /* Advanced Interrupt Controller (IRQ5) */ 438 0 /* Advanced Interrupt Controller (IRQ6) */ 439 }; 440 441 static int 442 at91_attach(device_t dev) 443 { 444 struct at91_softc *sc = device_get_softc(dev); 445 int i; 446 447 at91_softc = sc; 448 sc->sc_st = &at91_bs_tag; 449 sc->sc_sh = AT91RM92_BASE; 450 sc->dev = dev; 451 if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_SYS_BASE, 452 AT91RM92_SYS_SIZE, &sc->sc_sys_sh) != 0) 453 panic("Enable to map IRQ registers"); 454 sc->sc_irq_rman.rm_type = RMAN_ARRAY; 455 sc->sc_irq_rman.rm_descr = "AT91 IRQs"; 456 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 457 sc->sc_mem_rman.rm_descr = "AT91 Memory"; 458 #if 0 459 sc->sc_usbmem_rman.rm_type = RMAN_ARRAY; 460 sc->sc_usbmem_rman.rm_descr = "AT91RM9200 USB Memory-mapped regs"; 461 #endif 462 if (rman_init(&sc->sc_irq_rman) != 0 || 463 rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0) 464 panic("at91_attach: failed to set up IRQ rman"); 465 if (rman_init(&sc->sc_mem_rman) != 0 || 466 rman_manage_region(&sc->sc_mem_rman, 0xdff00000ul, 467 0xdffffffful) != 0) 468 panic("at91_attach: failed to set up memory rman"); 469 if (rman_manage_region(&sc->sc_mem_rman, AT91RM92_OHCI_BASE, 470 AT91RM92_OHCI_BASE + AT91RM92_OHCI_SIZE - 1) != 0) 471 panic("at91_attach: failed to set up ohci memory"); 472 473 for (i = 0; i < 32; i++) { 474 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SVR + 475 i * 4, i); 476 /* Priority. */ 477 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SMR + i * 4, 478 irq_prio[i]); 479 if (i < 8) 480 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_EOICR, 481 1); 482 } 483 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_SPU, 32); 484 /* No debug. */ 485 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_DCR, 0); 486 /* Disable and clear all interrupts. */ 487 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR, 0xffffffff); 488 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_ICCR, 0xffffffff); 489 490 /* XXX */ 491 /* Disable all interrupts for RTC (0xe24 == RTC_IDR) */ 492 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff); 493 /* DIsable all interrupts for DBGU */ 494 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x20c, 0xffffffff); 495 /* Disable all interrupts for the SDRAM controller */ 496 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff); 497 498 at91_cpu_add_builtin_children(dev, sc); 499 500 bus_generic_probe(dev); 501 bus_generic_attach(dev); 502 enable_interrupts(I32_bit | F32_bit); 503 return (0); 504 } 505 506 static struct resource * 507 at91_alloc_resource(device_t dev, device_t child, int type, int *rid, 508 u_long start, u_long end, u_long count, u_int flags) 509 { 510 struct at91_softc *sc = device_get_softc(dev); 511 struct resource_list_entry *rle; 512 struct at91_ivar *ivar = device_get_ivars(child); 513 struct resource_list *rl = &ivar->resources; 514 515 if (device_get_parent(child) != dev) 516 return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 517 type, rid, start, end, count, flags)); 518 519 rle = resource_list_find(rl, type, *rid); 520 if (rle == NULL) 521 return (NULL); 522 if (rle->res) 523 panic("Resource rid %d type %d already in use", *rid, type); 524 if (start == 0UL && end == ~0UL) { 525 start = rle->start; 526 count = ulmax(count, rle->count); 527 end = ulmax(rle->end, start + count - 1); 528 } 529 switch (type) 530 { 531 case SYS_RES_IRQ: 532 rle->res = rman_reserve_resource(&sc->sc_irq_rman, 533 start, end, count, flags, child); 534 break; 535 case SYS_RES_MEMORY: 536 #if 0 537 if (start >= 0x00300000 && start <= 0x003fffff) 538 rle->res = rman_reserve_resource(&sc->sc_usbmem_rman, 539 start, end, count, flags, child); 540 else 541 #endif 542 rle->res = rman_reserve_resource(&sc->sc_mem_rman, 543 start, end, count, flags, child); 544 rman_set_bustag(rle->res, &at91_bs_tag); 545 rman_set_bushandle(rle->res, start); 546 break; 547 } 548 if (rle->res) { 549 rle->start = rman_get_start(rle->res); 550 rle->end = rman_get_end(rle->res); 551 rle->count = count; 552 rman_set_rid(rle->res, *rid); 553 } 554 return (rle->res); 555 } 556 557 static struct resource_list * 558 at91_get_resource_list(device_t dev, device_t child) 559 { 560 struct at91_ivar *ivar; 561 562 ivar = device_get_ivars(child); 563 return (&(ivar->resources)); 564 } 565 566 static int 567 at91_release_resource(device_t dev, device_t child, int type, 568 int rid, struct resource *r) 569 { 570 struct resource_list *rl; 571 struct resource_list_entry *rle; 572 573 rl = at91_get_resource_list(dev, child); 574 if (rl == NULL) 575 return (EINVAL); 576 rle = resource_list_find(rl, type, rid); 577 if (rle == NULL) 578 return (EINVAL); 579 rman_release_resource(r); 580 rle->res = NULL; 581 return (0); 582 } 583 584 static int 585 at91_setup_intr(device_t dev, device_t child, 586 struct resource *ires, int flags, driver_filter_t *filt, 587 driver_intr_t *intr, void *arg, void **cookiep) 588 { 589 struct at91_softc *sc = device_get_softc(dev); 590 591 if (rman_get_start(ires) == AT91RM92_IRQ_SYSTEM && filt == NULL) 592 panic("All system interrupt ISRs must be FILTER"); 593 BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, filt, 594 intr, arg, cookiep); 595 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IECR, 596 1 << rman_get_start(ires)); 597 return (0); 598 } 599 600 static int 601 at91_teardown_intr(device_t dev, device_t child, struct resource *res, 602 void *cookie) 603 { 604 struct at91_softc *sc = device_get_softc(dev); 605 606 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR, 607 1 << rman_get_start(res)); 608 return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie)); 609 } 610 611 static int 612 at91_activate_resource(device_t bus, device_t child, int type, int rid, 613 struct resource *r) 614 { 615 #if 0 616 u_long p; 617 int error; 618 619 if (type == SYS_RES_MEMORY) { 620 error = bus_space_map(rman_get_bustag(r), 621 rman_get_bushandle(r), rman_get_size(r), 0, &p); 622 if (error) 623 return (error); 624 rman_set_bushandle(r, p); 625 } 626 #endif 627 return (rman_activate_resource(r)); 628 } 629 630 static int 631 at91_print_child(device_t dev, device_t child) 632 { 633 struct at91_ivar *ivars; 634 struct resource_list *rl; 635 int retval = 0; 636 637 ivars = device_get_ivars(child); 638 rl = &ivars->resources; 639 640 retval += bus_print_child_header(dev, child); 641 642 retval += resource_list_print_type(rl, "port", SYS_RES_IOPORT, "%#lx"); 643 retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 644 retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 645 if (device_get_flags(dev)) 646 retval += printf(" flags %#x", device_get_flags(dev)); 647 648 retval += bus_print_child_footer(dev, child); 649 650 return (retval); 651 } 652 653 void 654 arm_mask_irq(uintptr_t nb) 655 { 656 657 bus_space_write_4(at91_softc->sc_st, 658 at91_softc->sc_sys_sh, IC_IDCR, 1 << nb); 659 660 } 661 662 int 663 arm_get_next_irq() 664 { 665 666 int status; 667 int irq; 668 669 irq = bus_space_read_4(at91_softc->sc_st, 670 at91_softc->sc_sys_sh, IC_IVR); 671 status = bus_space_read_4(at91_softc->sc_st, 672 at91_softc->sc_sys_sh, IC_ISR); 673 if (status == 0) { 674 bus_space_write_4(at91_softc->sc_st, 675 at91_softc->sc_sys_sh, IC_EOICR, 1); 676 return (-1); 677 } 678 return (irq); 679 } 680 681 void 682 arm_unmask_irq(uintptr_t nb) 683 { 684 685 bus_space_write_4(at91_softc->sc_st, 686 at91_softc->sc_sys_sh, IC_IECR, 1 << nb); 687 bus_space_write_4(at91_softc->sc_st, at91_softc->sc_sys_sh, 688 IC_EOICR, 0); 689 690 } 691 692 static device_method_t at91_methods[] = { 693 DEVMETHOD(device_probe, at91_probe), 694 DEVMETHOD(device_attach, at91_attach), 695 DEVMETHOD(device_identify, at91_identify), 696 697 DEVMETHOD(bus_alloc_resource, at91_alloc_resource), 698 DEVMETHOD(bus_setup_intr, at91_setup_intr), 699 DEVMETHOD(bus_teardown_intr, at91_teardown_intr), 700 DEVMETHOD(bus_activate_resource, at91_activate_resource), 701 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 702 DEVMETHOD(bus_get_resource_list,at91_get_resource_list), 703 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 704 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 705 DEVMETHOD(bus_release_resource, at91_release_resource), 706 DEVMETHOD(bus_print_child, at91_print_child), 707 708 {0, 0}, 709 }; 710 711 static driver_t at91_driver = { 712 "atmelarm", 713 at91_methods, 714 sizeof(struct at91_softc), 715 }; 716 static devclass_t at91_devclass; 717 718 DRIVER_MODULE(atmelarm, nexus, at91_driver, at91_devclass, 0, 0);
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